Energy conversion charging method and system with high power factor

Abstract

The present application relates to the technical field of energy conversion, and particularly relates to an energy conversion charging method and system with high power factor, the method comprising: obtaining input voltage, input current, bus parameter, charging state and output side parameter; performing phase tracking and power factor state representation based on the input voltage and the input current, and generating a target input current reference waveform; determining a target charging power requirement according to a current charging stage, and generating a bus power adjustment instruction in combination with the bus parameter; and then coordinating and adjusting the amplitude of the target input current reference waveform according to the bus power adjustment instruction to obtain a target current control quantity. By unifying input side current shaping, bus power coordination and output side charging stage control in the same control framework, smooth adjustment of the input current in the charging stage switching process is realized, input current distortion and power factor fluctuation are suppressed, and the input side power quality is improved while the charging stability and conversion efficiency are ensured.

Description

Technical Field

[0001] This invention relates to the field of energy conversion technology, and in particular to a high power factor energy conversion charging method and system. Background Technology

[0002] Charging equipment designed for applications such as industrial vehicles, automated guided vehicles, energy storage maintenance power supplies, and backup power replenishment devices typically uses the AC power grid as its input power source. After rectification, bus energy conversion, and downstream charging conversion, it outputs DC charging energy to the object being charged. In this type of device, the input side needs to meet the power grid's requirements for power factor, harmonic current, and input power quality. On the other hand, it also needs to adapt to the constantly changing charging needs of the object being charged at different stages, such as pre-charging, constant current, constant voltage, equalization, and cutoff. Therefore, the charging device is not simply a steady-state rectifier load, but rather an energy conversion device with a wide power range, strong dynamic load characteristics, and multi-stage control features.

[0003] In existing technologies, to improve the power factor on the AC input side, a power factor correction stage is typically set up in the pre-stage or intermediate stage of the rectifier link. This stage shapes the input current to keep the fundamental component of the input current as in phase as possible with the input voltage and reduces harmonic content. Under normal operating conditions, this type of solution can achieve good static performance near the rated load. However, the output load in a charging scenario is not constant. The charging voltage, charging current, and stage status of the object being charged are constantly changing. The power request on the output side, after being transmitted through the bus, directly affects the energy absorption process of the pre-stage. When the charging stage changes, or when there are fluctuations in the input voltage, light load operation, or increased sensitivity to zero-crossing neighborhood control, the input-side power factor adjustment often fails to keep pace with the output-side charging control, easily leading to problems such as abrupt changes in the input current reference update, aggravated local waveform distortion, amplified bus power fluctuations, and a decrease in the power factor.

[0004] To address the above issues, this application presents a high power factor energy conversion charging method and system. Summary of the Invention

[0005] The technical problem this invention aims to solve is to address the shortcomings of existing technologies by providing a high power factor energy conversion charging method and system. This method involves acquiring input voltage, input current, bus parameters, charging status, and output side parameters; performing phase tracking and power factor state characterization based on the input voltage and current to generate a target input current reference waveform; determining the target charging power demand according to the current charging stage and generating a bus power adjustment command based on the bus parameters; and then coordinating the amplitude of the target input current reference waveform according to the bus power adjustment command to obtain the target current control quantity. By unifying input-side current shaping, bus power coordination, and output-side charging stage control within the same control framework, this invention achieves smooth input current adjustment during charging stage switching, suppresses input current distortion and power factor fluctuations, and improves input-side power quality while ensuring charging stability and conversion efficiency.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] A high power factor energy conversion charging method is applied to a charging energy conversion device, wherein the charging energy conversion device is connected between an AC input terminal and the object to be charged, and the method includes:

[0008] Acquire the input voltage information, input current information, and bus parameter information of the energy conversion bus at the AC input terminal, and acquire the charging status information and output side parameter information corresponding to the object to be charged;

[0009] Phase tracking and power factor state characterization are performed based on the input voltage information and the input current information to generate a target input current reference waveform;

[0010] The target charging power demand corresponding to the current charging stage is determined based on the charging status information and the output side parameter information, and a bus power adjustment command is generated based on the target charging power demand and the bus parameter information.

[0011] Based on the bus power regulation command, the waveform amplitude of the target input current reference waveform is coordinated and adjusted to obtain the target current control quantity used to drive the AC input terminal.

[0012] The bus parameter information includes DC bus voltage information and DC bus current information. The DC bus voltage information is acquired through a voltage sampling circuit installed in the energy conversion bus, and the DC bus current information is acquired through a current sampling circuit installed in the energy conversion bus. The charging status information includes at least one of the following states corresponding to the object to be charged: pre-charge state, constant current charging state, constant voltage charging state, equalization charging state, and charging cutoff state. The charging status information is determined by detecting the output side charging voltage, output side charging current, and the status signal fed back by the object to be charged. The output side parameter information is used to characterize the current output side operating state of the object to be charged, and the output side parameter information includes at least the output side charging voltage and the output side charging current.

[0013] The method for generating the target input current reference waveform includes:

[0014] The input voltage information is subjected to periodic detection, zero-crossing identification, and phase extraction to determine the voltage phase information and voltage amplitude envelope information at the AC input terminal;

[0015] The input current information is synchronously sampled and waveform analyzed to determine the phase deviation information, harmonic distortion information, and effective value information of the input current;

[0016] A reference current waveform in phase with the AC input voltage is constructed based on the voltage phase information, the voltage amplitude envelope information, and the phase deviation information.

[0017] Based on the harmonic distortion information and the effective value information, the reference current waveform is corrected and its amplitude is constrained to generate the target input current reference waveform.

[0018] The zero-crossing identification uses a zero-crossing detection circuit, which monitors the alternation time of the positive and negative values ​​of the input voltage signal to determine the zero-crossing position. The phase extraction uses phase-locked loop technology to determine the real-time phase of the AC input voltage based on the zero-crossing position, generating voltage phase information synchronized with the phase of the input voltage signal.

[0019] The synchronous sampling includes: acquiring data at corresponding times for the input voltage information and the input current information within the same sampling period, and performing time alignment processing on the acquired input voltage data and input current data based on a unified time base to obtain mutually corresponding voltage sampling sequences and current sampling sequences; the waveform analysis includes: extracting the fundamental and harmonic components of the input current based on the current sampling sequence, and determining the phase deviation information, harmonic distortion information, and effective value information of the input current by combining the phase relationship between the voltage sampling sequence and the current sampling sequence.

[0020] Based on the harmonic distortion information and the effective value information, waveform correction and amplitude constraint are performed on the reference current waveform, including:

[0021] The distortion-sensitive segment of the input current within the current sampling period is determined based on the harmonic distortion information, and the target amplitude upper limit corresponding to the reference current waveform is determined based on the effective value information, wherein the distortion-sensitive segment is determined by segmenting the harmonic distortion information by comparison of thresholds.

[0022] The local rate of change of the reference current waveform within the distortion-sensitive section is limited to suppress abrupt changes in the reference current waveform within the distortion-sensitive section.

[0023] Based on the deviation between the limited reference current waveform and the target amplitude upper limit, the waveform amplitude of the reference current waveform in the non-distortion sensitive section is compensated and allocated.

[0024] The distortion-sensitive section is a waveform section where the input current is prone to local distortion increase, as determined based on the harmonic distortion information. The non-distortion-sensitive section is the remaining waveform section other than the distortion-sensitive section.

[0025] Limiting the local rate of change of the reference current waveform within the distortion-sensitive section includes:

[0026] The waveform change between adjacent sampling points in the distortion-sensitive section of the reference current waveform is obtained, and the local rate of change of the reference current waveform is determined according to the sampling time interval corresponding to the adjacent sampling points.

[0027] The local rate of change is compared with a preset rate of change threshold. When the local rate of change is greater than the preset rate of change threshold, the waveform slope of the corresponding sampling point is limited to obtain the limited waveform change amount.

[0028] Based on the restricted waveform change, the reference current value of the reference current waveform in the distortion-sensitive section is recursively corrected to generate a corrected waveform.

[0029] The preset rate of change threshold is determined jointly based on the harmonic distortion information and the effective value information.

[0030] The target charging power requirement includes at least one of the target charging voltage, target charging current, and target charging power upper limit corresponding to the current charging stage; the bus power adjustment command includes at least one of the bus target voltage command, bus target current command, bus target power command, and bus power change slope limit command.

[0031] The coordination and adjustment include:

[0032] Obtain the switching status information of the current charging stage, and perform trend analysis on the bus power adjustment command to obtain the change direction information of the target bus power;

[0033] Based on the bus parameter information, the actual bus power change information is determined, and based on the change direction information of the target bus power and the actual bus power change information, the bus power change trend information is determined.

[0034] When a switch in the current charging phase is detected, and the bus power change trend information indicates that the bus power is in an upward or downward process, the amplitude update rate and waveform switching boundary of the target input current reference waveform are controlled in stages.

[0035] The updated target input current reference waveform is generated based on the amplitude update rate and waveform switching boundary after phased control.

[0036] The phased control includes:

[0037] When the bus power changes from low to high, the amplitude update rate of the target input current reference waveform is limited according to the rate of change of the bus power command, and the reference amplitude of the target input current reference waveform is increased according to a preset ramp function.

[0038] When the bus power changes from high to low, the phase synchronization relationship of the target input current reference waveform remains unchanged, and the reference amplitude of the target input current reference waveform is reduced according to a preset attenuation function.

[0039] The updated target input current reference waveform is generated based on the amplitude update rate and waveform switching boundary after phased control.

[0040] A high power factor energy conversion charging system, the system comprising:

[0041] The parameter acquisition module is used to acquire input voltage information, input current information, and bus parameter information of the energy conversion bus at the AC input terminal, and to acquire charging status information and output side parameter information corresponding to the object to be charged.

[0042] The reference waveform generation module is used to perform phase tracking and power factor state characterization based on the input voltage information and the input current information to generate a target input current reference waveform;

[0043] The coordination control module is used to determine the target charging power demand corresponding to the current charging stage based on the charging status information and the output side parameter information, and to generate a bus power adjustment command based on the target charging power demand and the bus parameter information; and to coordinately adjust the waveform amplitude of the target input current reference waveform based on the bus power adjustment command to obtain the target current control quantity for driving the AC input terminal.

[0044] Compared with the prior art, the beneficial effects of the present invention are:

[0045] This invention integrates input-side power factor regulation, bus power coordination, and output-side charging phase control. By collecting input voltage, input current, bus parameters, and charging status information, a target input current reference waveform coordinated with the AC input voltage is constructed. Furthermore, a bus power regulation command is generated based on the target charging power requirement, constraining the amplitude update process of the input current reference waveform. Therefore, output power changes during charging phase switching no longer directly map to sudden changes in input current, reducing input current spikes and harmonic distortion, and improving power factor stability under dynamic operating conditions. Attached Figure Description

[0046] Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0047] Figure 1 An exemplary application scenario diagram provided for an embodiment of this application;

[0048] Figure 2 This is a schematic flowchart of a high power factor energy conversion charging method provided in an embodiment of this application. Detailed Implementation

[0049] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0050] The term "embodiment" as used herein means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0051] The high power factor energy conversion charging method proposed in this application is primarily aimed at charging-type energy conversion scenarios where the AC power grid serves as the input and battery banks or electrochemical energy storage units serve as the power receivers. It is particularly suitable for engineering applications where input-side power quality constraints are strong, the output-side charging process exhibits significant stage-specific changes, and the overall system needs to balance conversion efficiency, bus stability, and input current waveform quality. These scenarios are not limited to single-form charging equipment but are prevalent in industrial vehicle charging systems, automatic guidance equipment charging units, energy storage maintenance power supplies, backup power replenishment devices, and AC input battery charging equipment requiring long-term grid connection. In these applications, one end of the equipment directly faces the power factor and harmonic constraints of the grid, while the other end receives the constantly changing power demands of the battery during different stages such as pre-charging, constant current, constant voltage, equalization, and cutoff. The relationship between the input and output sides is not a simple power transfer relationship but a coupled energy conversion process influenced by bus dynamics, control timing, switching losses, and load conditions.

[0052] Those skilled in the art typically focus first on how to keep the current absorbed on the AC input side as in phase as possible with the input voltage, and how to make the input current waveform statistically approximate an ideal sine wave, in order to meet the grid's constraints on power factor and harmonic content. Simultaneously, the output side requires a clear staged control capability for the charging process, that is, to stably charge the energized object according to the corresponding voltage, current, or power targets at different charging stages. For this reason, existing engineering implementations often form two relatively independent control links: one facing the input side for power factor correction and input current shaping; the other facing the output side for implementing the battery charging strategy. This approach can achieve basically acceptable results under steady-state, rated load, or relatively ideal input conditions. However, when the charging process enters complex operating conditions such as stage switching, light load maintenance, power drop, input voltage fluctuations, or even weak grid operation, the coupling contradiction between input-side power factor regulation and output-side charging control gradually becomes apparent.

[0053] Existing solutions in this field typically attempt to address the issue solely from the input side, locking the voltage phase, performing closed-loop shaping of the input current, and correcting the reference waveform using harmonic distortion information, RMS information, or current error information. While these solutions are effective in general power factor correction power supplies, they face a long-standing practical challenge in rechargeable energy conversion devices: charging equipment is not merely a rectifier requiring a high power factor, but a dynamic charging system with constantly changing output targets and continuous redistribution of bus energy. In such systems, simply correcting the reference current based on input-side waveform errors often only improves existing distortions but fails to suppress input current distortion at its source—the charging phase transition and bus power migration. Especially in light-load or near-zero input voltage crossing ranges, forcibly maintaining high-precision instantaneous waveform tracking not only fails to achieve power factor gains commensurate with the control costs but also easily introduces additional losses due to local reference jitter, extreme duty cycle changes, and frequent switching operations, creating new constraints between power factor, waveform quality, and conversion efficiency.

[0054] Based on the aforementioned engineering understanding, the technical logic of this application is not simply to superimpose charging control onto an existing power factor correction architecture, nor is it merely to add a conventional correction layer to the input current reference waveform. Instead, it starts from the actual energy flow law of the charging energy conversion device and considers the input-side power factor adjustment, bus power coordination, and output-side charging stage control under the same control logic. In other words, this application does not focus on how to create an input current curve that resembles a sine wave in isolation, but rather on how to keep the input-side current shaping target consistent with the bus power adjustment target when the charging stage, bus status, and output power demand change together. This ensures that changes in output demand are not directly mapped onto the input-side current waveform in a sharp and sudden manner, thereby maintaining a high power factor and optimal efficiency during dynamic charging.

[0055] Based on this understanding, the core principle of this application can be understood as follows: current shaping on the AC input side is not an auxiliary function independent of the charging process, but should be considered as a front-end energy scheduling link in the charging energy conversion chain, forming a consistent control object together with the bus power command and the charging stage target. The controller, on the one hand, synchronously samples, phase-tracks, and characterizes the power factor state of the input voltage and current to obtain the basic information required for input-side waveform control; on the other hand, it combines bus parameters, charging state, and output-side parameters to identify the target charging power demand for the current stage, and further forms a bus power adjustment command that reflects the energy migration trend during the charging process. Subsequently, the generation and updating of the input current reference waveform are no longer solely determined by the input-side waveform error, but are constrained by the coordinated results of the bus power adjustment.

[0056] It should be noted that the application scenarios are not predicated on a specific topology, fixed power range, or specific battery type. Any AC input charging device exhibiting one of the following engineering characteristics can constitute a typical implementation environment for this application: First, the output-side charging process has clear stage boundaries, and power changes during stage switching are transmitted to the bus and input side; second, the device operates within a wide load range, and the difficulty of input current shaping under light load, half load, and rated operating conditions differs significantly; third, the input side faces non-ideal power supply conditions such as weak power grids, voltage fluctuations, frequency offsets, or waveform distortion; fourth, the system needs to meet high power factor requirements while also ensuring high efficiency, low heat loss, and long-term operational stability.

[0057] It should be noted that the concept of this application also stems from the following engineering judgment: for charging equipment, the power factor is not a static indicator evaluated only under rated operating conditions, but should be regarded as a dynamic and controllable indicator throughout the entire charging cycle. Correspondingly, the waveform quality of the input current should not be measured solely by ideal sine approximation, but should be comprehensively designed in conjunction with bus energy balance, smoothness of stage switching, light-load efficiency, and control stability. Therefore, this application does not limit the input-side control objective to a single instantaneous waveform approximation, but emphasizes maintaining the desired phase relationship between the fundamental component of the input current and the input voltage through bus-side power coordination and reference waveform consistency constraints, while suppressing waveform deterioration caused by stage switching, power transitions, and local overcorrection, under the premise of meeting the charging objective. Thus, this application forms a power factor adjustment approach more suitable for charging scenarios, namely, using the charging process as the boundary condition, bus power as the coordination center, and input current shaping as the execution object, to achieve coordinated unity between input-side power quality and output-side charging behavior.

[0058] refer to Figure 1 , Figure 1 This is an exemplary application scenario diagram provided for an embodiment of this application.

[0059] like Figure 1As shown, the high power factor energy conversion charging method described in this application is applied to a charging energy conversion device. This device is positioned between the AC input terminal and the object to be charged, and is used to convert the AC electrical energy input at the AC input terminal into charging electrical energy suitable for the object to be charged. The output port shown in the figure is not an external load unit independent of the charging energy conversion device, but rather represents the output interface area of ​​the charging energy conversion device facing the object to be charged. Parameters such as the output charging voltage and output charging current can be obtained at this output interface area, serving as the basis for determining the charging status and coordinating power control. The object to be charged can be a battery pack, battery module, power battery unit, energy storage unit, or other electrochemical energy storage object requiring controlled charging.

[0060] In application scenarios, the AC input side faces the power grid or AC distribution network. Its input conditions are typically not constant, and may include voltage fluctuations, frequency shifts, waveform distortion, or parallel connection of multiple devices. The charging device side exhibits significant phased load characteristics; that is, as the charging process progresses, the charging power, voltage, and current requirements of the charging device may change at different stages, such as pre-charging, constant current, constant voltage, equalization, and charging cutoff. In other words, the charging energy conversion device does not operate under the constraint of a single stable load, but rather under the simultaneous constraints of changing AC input conditions and output charging demands. A continuous coupling relationship exists between its input-side current shaping target, bus-side energy balance state, and output-side charging power target.

[0061] This application addresses the control contradictions in the aforementioned scenarios. For this type of rechargeable energy conversion system, if power factor correction is implemented independently from the input side without coordinating control with changes in the charging phase on the output side and the bus power migration process, the input current reference is prone to abrupt changes during power increases, decreases, or phase switching, leading to input current spikes, increased local distortion, and power factor fluctuations. Based on this, this application… Figure 1 In the application scenario shown, the AC input terminal, charging energy conversion device, output port and the object to be charged are regarded as continuous links in the same charging energy transfer link. Under the premise of meeting the charging needs of the object to be charged, the input current shaping, bus power adjustment and output power request are coordinated and controlled to achieve the unity of input power factor improvement and overall charging efficiency optimization.

[0062] It should be noted that, Figure 1The application scenarios shown are mainly used to characterize the applicable boundaries and basic energy flow of the method in this application, and do not constitute a limitation on the internal topology, power conversion stage, or specific type of the object to be charged of the charging energy conversion device. Any device that has an AC input terminal, outputs charging energy to the object to be charged after energy conversion, and needs to simultaneously consider input-side power factor regulation and output-side charging control during operation can be applied to the technical concept of this application.

[0063] Next, with reference to the accompanying drawings, the high power factor energy conversion charging method provided in the embodiments of this application will be further elaborated. Figure 2 The method shown is applied to a charging energy conversion device, wherein the high power factor is greater than or equal to 0.999, the charging energy conversion device is connected between an AC input terminal and the object to be charged, and the method includes:

[0064] S1: Obtain the input voltage information, input current information, and bus parameter information of the energy conversion bus at the AC input terminal, and obtain the charging status information and output side parameter information corresponding to the object to be charged;

[0065] In this embodiment, the input voltage information and input current information are used to characterize the current power input state of the AC input terminal, the bus parameter information is used to characterize the transient energy balance state of the energy conversion bus, and the charging state information and output side parameter information are used to characterize the current charging stage of the object to be charged and its corresponding power demand.

[0066] S2: Perform phase tracking and power factor state characterization based on the input voltage information and the input current information to generate a target input current reference waveform;

[0067] In this embodiment, the purpose of phase tracking is to determine the phase position and cycle boundary of the AC input voltage within the current control cycle. The purpose of power factor state characterization is to identify the degree of in-phase operation, distortion, and RMS distribution of the input current relative to the input voltage, thereby providing basic constraints for constructing the target input current reference waveform. Those skilled in the art will understand that phase-locked loop (PLL), segmented analysis, sliding window analysis, or other methods capable of achieving equivalent technical effects can be selected based on processor capabilities, sampling accuracy, and real-time requirements, as long as the phase relationship and waveform quality characterization can be extracted from the input-side sampling information.

[0068] S3: Determine the target charging power demand corresponding to the current charging stage based on the charging status information and the output side parameter information, and generate a bus power adjustment command based on the target charging power demand and the bus parameter information;

[0069] It should be noted that power changes during charging first affect the bus energy balance, and only then do they manifest as changes in input-side energy absorption. Without a unified power coordination mechanism established at the bus level, output-side phase switching will be directly transmitted to the input current reference as a sudden power change, easily causing input current spikes, increased waveform distortion, and power factor fluctuations. By mapping charging phase demands to bus power regulation commands, an intermediate coordination oriented towards energy flow can be completed before input-side current shaping. This prevents the front-end controlled object from passively following output changes, instead allowing for an orderly transition according to the bus's tolerance, thereby improving control consistency and engineering stability in dynamic charging scenarios.

[0070] In this embodiment, the target charging power demand is not an abstract static power setting value, but a staged control demand directly corresponding to the current charging stage. It may include target charging voltage, target charging current, target charging power upper limit, or a combination thereof. The bus power adjustment command is used to convert the output-side stage demand into an intermediate control quantity that can be directly used by the upstream energy regulation. It can be expressed as one or more of the following: bus target power command, bus target voltage command, bus power change direction information, and bus power change slope limit information. In specific implementation, the charging status information can first be used to identify which stage the object to be charged is in: pre-charging, constant current, constant voltage, equalization, or charging cutoff. Then, the output-side parameter information can be combined to determine the power request amplitude and change trend under the current stage. Furthermore, the bus parameter information can be combined to determine the current carrying capacity, response state, and power migration direction of the bus. Finally, a bus power adjustment command is obtained to coordinate the input-side current shaping and the output-side charging demand.

[0071] S4: Based on the bus power regulation command, coordinate the waveform amplitude of the target input current reference waveform to obtain the target current control quantity for driving the AC input terminal;

[0072] In this embodiment, the coordinated adjustment is not a simple scaling up or down of the target input current reference waveform. Instead, it loads the power target, direction of change, and constraints represented by the bus power adjustment command into the amplitude update process of the target input current reference waveform. This ensures that the target input current reference waveform maintains the established phase relationship and waveform constraints while remaining consistent with the power request corresponding to the current charging stage. Specifically, the bus power adjustment command can be parsed first to obtain the target power component and its corresponding constraint component. Then, the target amplitude reference of the target input current reference waveform is determined based on the target power component, and the rate of change of the target amplitude reference is limited according to the constraint component, forming the coordinated adjusted target current control quantity. When the charging stage switches and the bus power is in an increasing or decreasing process, the amplitude update rate and waveform switching boundary of the target input current reference waveform can be controlled in stages to reduce abrupt changes in the reference waveform during stage transitions.

[0073] It's important to note that in charging conversion devices, the power factor refers to the optimal balance between the input current and voltage when the device draws power from the AC grid. This ensures the current waveform closely approximates a sine wave, maximizing the absorption of active power and minimizing reactive and harmonic power. Essentially, the power factor reflects how much of the total power supplied by the grid is actually converted into effective output power. A value closer to 1 indicates more efficient energy utilization on the input side; a lower value suggests that while a significant amount of current may be drawn, some of it is not effectively converted into the actual power required for charging, but rather increases the burden on the grid as a result of phase differences or waveform distortion.

[0074] Before detailing the specific technical aspects of the steps, this application's embodiments need to reiterate:

[0075] In high power factor charging applications, the controlled object is not simply the front-end rectified current, nor is it an isolated power conversion link. Instead, it's a dynamic energy transfer process simultaneously constrained by AC-side waveform characteristics, bus energy state, and the phased power demands of the receiving end. For such processes, the art typically establishes separate input-side current shaping and output-side charging regulation stages, connecting them via the bus for power transfer. However, in actual operation, while structurally distinct, their control effects are often not independent. This is because the change in input-side power factor is not solely determined by the phase relationship between input voltage and current, but also closely related to the bus's ability to absorb power fluctuations and the way the receiving end responds to power commands at different charging stages. Especially when load demand shifts in stages rather than continuously, if input-side current shaping is still considered a local control problem solely responsible for AC-side waveform errors, even if static indicators meet expectations, dynamic conditions may still result in reference update lag, excessive local regulation, or mismatch in bus power transmission rhythm.

[0076] Based on this understanding, this embodiment does not focus control solely on a particular type of traditional power factor correction algorithm, nor does it rely on a fixed control model under a specific topology. Instead, it considers the AC-side input waveform, the bus-side power state, and the charging stage information at the receiving end as joint constraints determining the target input current control quantity. In other words, the input-side current reference is not directly given by an ideal sinusoidal approximation relationship, but rather, after obtaining the AC-side phase relationship, it is combined with the current adjustable capability of the bus and the phased power request at the receiving end for consistency correction. The significance of this approach is that the input-side control is no longer just about compensating for existing waveform deviations, but rather possesses the ability to coordinate in advance as the energy flow path changes. For those skilled in the art, this can be understood as follows: this method does not simply increase the instantaneous power factor value at a certain moment, but attempts to maintain a continuous matching relationship between the input-side shaping target and the output-side power demand throughout the entire charging process. As long as the relevant operating data can reflect the AC-side state, bus state, and receiving end state to a minimum, the corresponding coordinated control logic can be established. The specific sampling method, hardware implementation, and local adjustment algorithm can all be selected according to the actual device configuration, and this application does not impose strict limitations on them.

[0077] In conventional understanding, the input current reference waveform is usually regarded as a function of the AC input voltage, and a corresponding current curve can be formed simply by knowing the voltage phase and the target power. However, in charging scenarios, what truly determines the rationality of this reference waveform is not only how much current the input terminal is currently allowed to absorb, but also whether this current change will disrupt the bus balance, whether it matches the current charging stage, and whether it will introduce additional waveform distortion during light load, stage switching, or power rise and fall. Therefore, the target input current reference waveform is more appropriately understood as a front-end energy dispatch result constrained by stage requirements, rather than a simple mathematical fitting object on the AC side. It is based on this understanding that subsequent implementation methods revolve around sampling information acquisition, phase tracking, power factor state characterization, bus power regulation, and reference waveform coordinated updates. The focus is not on stacking more control branches, but on enabling operational information from different sources to be given a clear order of action in the same control link, thereby transforming power factor regulation from static index control to dynamic consistency control oriented towards the charging process.

[0078] It should be noted that some terms used in the implementation process can be understood as functionally equivalent under different equipment configurations. For example, the bus power regulation command can be expressed as an explicit target power value or as a combination of constraints on the target bus voltage, target current, or rate of change; charging status information can be derived from the status quantities directly fed back by the object to be charged or derived from the output voltage, current, and stage criteria; phase tracking and waveform analysis can be implemented using hardware assistance or software calculation. For those skilled in the art, as long as a correspondence can be established at the control level that "the input waveform control quantity is jointly constrained by the bus status and the charging stage," and the obtained target current control quantity can be used to drive the AC input terminal to complete power factor regulation, it can be considered to fall within the scope of the technical concept disclosed in this embodiment.

[0079] Next, we will further elaborate on the technical content of the method of this application regarding operational data.

[0080] In one example, the bus parameter information includes DC bus voltage information and DC bus current information. The DC bus voltage information is acquired through a voltage sampling circuit installed in the energy conversion bus, and the DC bus current information is acquired through a current sampling circuit installed in the energy conversion bus. The charging status information includes at least one of the following states corresponding to the object to be charged: pre-charge state, constant current charging state, constant voltage charging state, equalization charging state, and charging cutoff state. The charging status information is determined by detecting the output-side charging voltage, the output-side charging current, and the status signal fed back by the object to be charged. The output-side parameter information is used to characterize the current output-side operating state of the object to be charged, and the output-side parameter information includes at least the output-side charging voltage and the output-side charging current.

[0081] In this embodiment, the DC bus voltage and current information are not limited to simply reflecting the instantaneous values ​​of the bus, but are mainly used to determine the power carrying status, energy buffering status, and power migration trend in the current energy conversion link. The voltage sampling circuit can employ a voltage divider sampling structure, an isolated sampling structure, or other equivalent sampling structures that meet the voltage detection accuracy requirements. The current sampling circuit can employ a sampling resistor, a Hall effect device, a current transformer, or other methods capable of detecting the bus current. Those skilled in the art will understand that the specific sampling method can be selected based on the power level, insulation requirements, and wiring conditions, as long as it can at least meet the requirement of effectively characterizing the bus status. This application does not impose further limitations.

[0082] Furthermore, charging status information is not merely used to identify the current charging stage of the object being charged, but rather to define the power control boundaries and control strategy switching conditions for the current stage. Specifically, the pre-charge state typically corresponds to the initial setup process at lower power, the constant current charging state and constant voltage charging state correspond to different main control objectives, the equalization charging state may involve power fluctuations or local adjustment behavior, and the charging cutoff state corresponds to the charging process entering a stage of limited or stopped output. These states do not necessarily need to be directly provided from a single source; they can also be jointly determined by the output-side charging voltage, output-side charging current, and status signals fed back by the object being charged. The status signals fed back by the object being charged can be battery management information, charging permission signals, status codes, temperature-related status information, state of charge information, or other equivalent feedback quantities that can reflect the current charging stage, as long as they can distinguish different charging stages and support the determination of subsequent power requirements.

[0083] It should be noted that the output-side parameter information is not limited to being obtained from a single location. It can be collected at the output interface near the object to be charged, or in the output circuit of the downstream charging conversion stage, as long as the obtained parameters can accurately represent the current power supply status of the object to be charged at the output terminal. For those skilled in the art, the output-side charging voltage and output-side charging current can be used as stage judgment quantities, as power calculation quantities, protection criterion quantities, or stage transition verification quantities. Their specific usage can be adjusted according to the control logic configuration.

[0084] Next, we will further elaborate on the technical content of the method of this application regarding the target input current reference waveform.

[0085] In one example, the method for generating the target input current reference waveform includes:

[0086] S2.1: Perform periodic detection, zero-crossing identification, and phase extraction on the input voltage information to determine the voltage phase information and voltage amplitude envelope information at the AC input terminal;

[0087] Specifically, in the rechargeable energy conversion process, whether the input-side current control quantity can maintain the desired phase relationship with the input voltage depends on the accuracy, continuity, and sufficient noise immunity of the voltage phase information. If the instantaneous value of the original sampled voltage is directly used to construct the reference waveform, phase identification errors can easily occur when there are fluctuations, local glitches, jitter near zero crossings, or slight distortions in the power grid. This can lead to local shifts in the subsequently generated target input current reference waveform. Even if the subsequent current loop has high tracking capability, unnecessary adjustments may occur near zero crossings due to the instability of the reference source itself, ultimately affecting the power factor maintenance effect and the quality of the input current waveform. Therefore, before constructing the reference waveform, periodic detection, zero-crossing identification, and phase extraction of the input voltage information are performed to convert the original input voltage signal into a phase and amplitude reference quantity that can be continuously called upon by the subsequent control link, ensuring that the generation of the target input current reference waveform has a consistent time scale and amplitude boundaries.

[0088] In one example, the zero-crossing identification uses a zero-crossing detection circuit to monitor the alternation time of the positive and negative values ​​of the input voltage signal and determine the zero-crossing position. The phase extraction uses phase-locked loop technology to determine the real-time phase of the AC input voltage based on the zero-crossing position and generate voltage phase information synchronized with the phase of the input voltage signal.

[0089] It is understandable that the zero-crossing identification adopts a zero-crossing detection circuit and the phase extraction adopts phase-locked loop technology, which are relatively mature implementation methods in the field of AC signal synchronous detection. Their value does not lie in forming a new control idea on its own, but in providing a stable phase reference and period boundary information for the construction of the subsequent input current reference waveform.

[0090] In this embodiment, the zero-crossing detection circuit can be implemented using a comparator-type structure. Specifically, the original high-voltage signal at the AC input terminal can be scaled to the comparator's allowable input voltage range using a resistor divider network or an isolated sampling circuit. The scaled AC sampling signal is then fed into the comparator input terminal and compared with a pre-set zero-crossing reference level. This zero-crossing reference level is typically not absolute zero volts, but rather a narrow range near zero volts to suppress false triggering caused by noise jitter. For example, when the scaled input voltage sample is in a positive small-range interval and about to cross zero into the negative interval, the comparator output level will flip from high to low; conversely, when the input voltage crosses zero from the negative interval into the positive interval, the comparator output level will flip from low to high. The controller can then identify the positive and negative half-cycle switching boundary of the input voltage based on this level flip timing.

[0091] Furthermore, phase-locked loop (PLL) technology, which extracts phase based on the zero-crossing point, is also a commonly used phase tracking method in the field of AC synchronous control. Its basic idea is not to directly equate each zero-crossing event with complete phase information, but rather to use the zero-crossing event as a periodic synchronization anchor point, constructing a continuously progressive internal phase quantity between adjacent zero-crossing events. Specifically, PLL technology typically includes three basic parts: phase comparison, loop filtering, and phase accumulation. The phase comparison part compares the time deviation between the internally estimated phase and the actual input zero-crossing event; the loop filtering part smooths this deviation, preventing the jitter of a single cycle from directly converting into an excessively large phase correction; the phase accumulation part continuously advances the internal phase based on the corrected frequency or period estimate, thereby forming continuously changing real-time phase information between two zero-crossing points. In other words, the zero-crossing detection circuit provides discrete synchronization events, while the PLL technology converts these discrete events into a continuous phase trajectory, enabling the controller to determine the current input voltage's phase position within the linear period at any sampling time.

[0092] S2.2: The input current information is synchronously sampled and waveform analyzed to determine the phase deviation information, harmonic distortion information and effective value information of the input current;

[0093] Specifically, changes in the input-side power factor cannot be deduced solely from the input voltage phase information. It is also crucial to determine the phase relationship between the current input current and the input voltage, the amount of distortion components deviating from the fundamental frequency in the waveform, and whether the current effective value has deviated from the expected energy transfer requirements. During the charging process, the input current is not a simple rectified response under constant load but dynamically changes with bus status, output phase transitions, and control updates. If the input current is not sampled synchronously with the input voltage at strictly corresponding moments, but only approximates with independent timing, the resulting phase deviation may be influenced by sampling time differences, and waveform distortion assessment may suffer from time base misalignment, leading to inaccurate reference waveform correction directions. Especially under near-zero crossover, light load maintenance, and phase transition conditions, the local rate of change in the input current is often higher than under steady-state conditions. If the sampling time is not consistent with the voltage sampling, subsequent waveform analysis results will fail to accurately reflect the current operating state of the input side.

[0094] In one example, the synchronous sampling includes: acquiring data at corresponding times for the input voltage information and the input current information within the same sampling period, and performing time alignment processing on the acquired input voltage data and input current data based on a unified time base to obtain mutually corresponding voltage sampling sequences and current sampling sequences; the waveform analysis includes: extracting the fundamental and harmonic components of the input current based on the current sampling sequence, and determining the phase deviation information, harmonic distortion information, and RMS value information of the input current by combining the phase relationship between the voltage sampling sequence and the current sampling sequence.

[0095] Specifically, the waveform analysis does not involve a single amplitude reading or simple averaging of the current sampling sequence. Instead, it decomposes, calibrates, and compares the current sampling data within a complete line cycle or at least one stable half-line cycle, provided that the input voltage and current information have been time-aligned. During processing, the line cycle boundary corresponding to the voltage sampling sequence can be used as the starting point of the analysis window. The current sampling sequence within this window is rearranged into a continuous sequence according to a unified time base, and abnormal spikes in the sequence are preprocessed. This preprocessing can be achieved by comparing the differences between adjacent sampling points. That is, when the difference between a sampling point and the preceding and following sampling points simultaneously exceeds a preset multiple of the local average change, the sampling point is marked as an anomaly and replaced by the interpolation result of its preceding and following sampling points. The preset multiple can be set to 2 to 4 times depending on the sampling noise level. After preprocessing, the fundamental frequency and harmonic components of the current sampling sequence are extracted. The fundamental frequency extraction can be performed using a synchronous fundamental frequency projection method. That is, with the reference phase corresponding to the voltage sampling sequence as a reference, the in-phase component and quadrature component of the current sampling sequence are obtained under this phase reference, and the amplitude and phase position of the input current fundamental frequency component are determined accordingly. The harmonic components are obtained by subtracting the fundamental frequency component from the original current sampling sequence to obtain the remaining components, or by further decomposing the remaining components into segments according to the second, third and higher order periodic characteristics.

[0096] Those skilled in the art will understand that the fundamental frequency extraction need not be limited to a specific algorithm. As long as the fundamental frequency component of the input current synchronized with the line frequency can be separated from the overall waveform under a time coordinate consistent with the voltage sequence, the requirements for phase deviation determination and distortion analysis in this step can be met. The reason for adopting this approach is that the phase relationship between the fundamental frequency component and the input voltage is the main determinant of the power factor in the input current. If high-frequency switching ripple, local noise, and non-fundamental frequency distortion are not separated from the analysis object first, it is easy to cause non-power transfer components to be mixed into the phase determination, thereby distorting the direction of subsequent reference waveform correction.

[0097] In this embodiment, the phase deviation information is obtained by comparing the phase positions of the fundamental component of the input current and the reference component of the input voltage. Specifically, the phase angles of the voltage reference component and the fundamental component of the current can be determined separately within the same analysis window, and the difference in angle or time between the two can be converted into a phase deviation. When the zero-crossing time of the fundamental input current is later than the zero-crossing time of the reference input voltage, it is determined to be current lag; when the zero-crossing time of the fundamental input current is earlier than the zero-crossing time of the reference input voltage, it is determined to be current lead. To avoid interference from local waveform distortion in the single zero-crossing determination, in actual processing, it is preferable not to directly use the instantaneous zero-crossing point of the original current waveform, but to use the phase position corresponding to the extracted fundamental current component as the comparison object. The phase deviation information obtained in this way better reflects the true power transmission relationship. The harmonic distortion information is obtained by proportionally comparing the remaining components (excluding the fundamental) in the current sampling sequence with the fundamental component. It can be expressed as the overall harmonic distortion level or as the local distortion level of a phase segment. Specifically, the combined intensity of non-fundamental components within a complete analysis window can be calculated first, and then normalized and compared with the intensity of the fundamental component to obtain overall harmonic distortion information. Simultaneously, to identify which phase regions of the current waveform are more prone to local distortion, the same analysis window can be divided into several sub-segments according to phase, such as 8 segments, 16 segments, or more segments corresponding to the control resolution. The proportion of the remaining components in each sub-segment relative to the fundamental component of that segment can be calculated to obtain local harmonic distortion information. This approach is necessary because input current distortion in charging scenarios does not always appear as uniform distortion throughout the entire cycle. In many cases, local waveform deterioration only occurs near zero crossing, in light-load phase regions, or in phase switching regions. If only the overall distortion index is retained, it is difficult to provide a sufficiently precise basis for subsequent local waveform correction.

[0098] Furthermore, the effective value information is obtained by performing energy equivalence calculations on the time-aligned current sampling sequence within the analysis window. Specifically, each current sampling value within the window is squared, the average of all squared results is calculated, and finally, the square root of the average result is taken. The result is the effective value of the input current corresponding to the analysis window. To avoid instability in the effective value judgment caused by random fluctuations in a single cycle, the effective value of the current window can be weighted and fused with the effective values ​​of the previous window or several previous windows to form rolling updated effective value information; for example, the weight of the current window can be set to 0.5 to 0.7, and the remaining weights can be allocated to the previous one or two windows to balance response speed and stability. The role of the effective value information is not only to characterize the magnitude of the input current, but more importantly, to provide a basis for subsequent amplitude constraints, because during power factor adjustment, even if the phase relationship is correct, if the overall effective value of the input current is too high or too low, it will still lead to a mismatch between the input power and the actual charging demand.

[0099] S2.3: Construct a reference current waveform that is in phase with the AC input voltage based on the voltage phase information, the voltage amplitude envelope information, and the phase deviation information;

[0100] Specifically, this step does not directly copy the input voltage waveform as the current target. Instead, after clarifying the current AC input's time-domain position, amplitude boundaries, and the degree of input current deviation, it establishes a suitable current reference framework as the basis for subsequent corrections. The reason for constructing the reference current waveform first instead of directly providing the final control waveform is that the final control waveform is also affected by harmonic states, RMS constraints, bus power regulation results, and stage switching conditions. Coupled with all constraints simultaneously in the first-level reference generation process, the control structure becomes complex, and it is also difficult to clarify the order of action of various state variables in the formation of the reference waveform. Dividing the reference waveform into two stages—reference construction and subsequent correction—allows for the initial establishment of a basic in-phase framework using voltage phase and voltage amplitude. Then, the input current deviation information is used to perform initial calibration of this framework, ensuring that subsequent corrections are based on a fundamental waveform with correct direction, consistent phase, and reasonable amplitude.

[0101] In this embodiment, the reference current waveform is constructed as follows: First, the voltage phase information is mapped into a continuously changing phase sequence, which is used as the reference time axis. Then, the allowable current reference distribution trend for each current phase position is determined based on the voltage amplitude envelope information. Specifically, a complete linear cycle can be divided into several phase intervals, such as 128, 256, or higher resolution phase positions according to the sampling point sequence. At each phase position, an ideal current profile that changes in phase with the input voltage is determined based on the relationship between the current phase value and amplitude envelope of the input voltage. "In phase" means that the constructed reference current waveform maintains the same zero-crossing moment and the same phase advancement direction as the input voltage in the fundamental sense, rather than simply requiring each instantaneous value to be in a fixed proportion to the voltage sampling value. Subsequently, phase deviation information is introduced to perform phase compensation correction on the ideal current profile. Specifically, the measured input current phase deviation can be converted into a correction amount for the starting position or local advance position of the reference current waveform. When the current input current is detected to lag behind the input voltage, the phase reference of the reference current waveform is shifted forward for compensation; when the input current is detected to lead, it is shifted backward for compensation. To avoid reference jumps caused by excessively rapid phase compensation, a gradual update mechanism can be set for the phase compensation amount, that is, only a portion of the total compensation amount is released in each line cycle, for example, 20% to 50% of the total compensation amount is released in one line cycle. The specific proportion can be set according to the control bandwidth and dynamic response requirements. At the same time, the voltage amplitude envelope information can also be used to constrain the basic amplitude distribution of the reference current waveform in different voltage amplitude ranges, so that it has a more complete waveform expansion capability in the phase range with higher input voltage, and maintains a smoother amplitude change trend in the range close to zero crossover, thereby reducing the probability of subsequent large corrections near zero crossover.

[0102] S2.4: Based on the harmonic distortion information and the effective value information, perform waveform correction and amplitude constraint on the reference current waveform to generate the target input current reference waveform;

[0103] Specifically, in input current control, phase consistency and waveform quality consistency are not control tasks at the same level. The former addresses whether the general direction of the current reference is correct, i.e., whether the fundamental current wave maintains the desired relationship with the input voltage; the latter addresses whether the reference waveform is too coarse in its local shape, whether it is prone to distortion in specific sections, and whether its overall amplitude is consistent with the current input power requirement. Without this layer of correction and constraint, although the reference current waveform constructed solely based on the voltage phase and envelope may be directionally correct, in actual operation, it may still be less smooth in certain phase sections or deviate from the current actual requirement in overall amplitude due to existing local distortions in the input current, differences in the operating range of switching devices, light-load zero-crossing sensitivity, and local changes introduced by the aforementioned phase compensation.

[0104] In one example, waveform correction and amplitude constraint are performed on the reference current waveform based on the harmonic distortion information and the effective value information, including:

[0105] S2.4.1: Determine the distortion-sensitive segment of the input current within the current sampling period based on the harmonic distortion information, and determine the target amplitude upper limit corresponding to the reference current waveform based on the effective value information, wherein the distortion-sensitive segment is determined by segmenting the harmonic distortion information by comparison of thresholds.

[0106] Specifically, for charging-type energy conversion processes, abnormal changes in input current often occur concentrated in specific phase segments, such as the region near the zero-crossing of the AC input voltage, the interval where bus power changes have just entered the response phase, and waveform transition points where local errors remain from the previous control cycle. If uniform peak clipping, amplitude limiting, or smoothing is applied throughout the entire sampling cycle, local problems can easily be amplified into global conservative control, suppressing waveform segments that originally did not require correction, causing the overall energy distribution of the input current reference to deviate from the current actual charging demand. Therefore, before performing waveform correction, segmental analysis of the local waveform quality within the current sampling cycle should be performed using harmonic distortion information. Then, segments prone to amplifying local distortion should be identified, allowing subsequent correction actions to focus on the segments that truly require intervention. Simultaneously, by providing the target amplitude upper limit that the entire reference current waveform can achieve within the current control cycle using RMS information, overall amplitude loss of control can be avoided after local correction. This processing logic does not simply involve segmenting and then limiting the amplitude; rather, it treats local distortion mitigation and overall energy level constraints in a layered manner, so that the reference waveform correction retains both directionality and boundary characteristics.

[0107] In this embodiment, the determination of the distortion-sensitive segment can be performed using a segmented evaluation method synchronized with the phase. Specifically, based on the current sampling sequence within the current sampling period, a complete line cycle or half-line cycle is first uniformly divided into multiple analysis segments according to phase, such as 8, 12, 16, or 32 segments. For cases with high sampling frequencies and a large number of line cycle sampling points, a local analysis window can also be constructed using 8, 16, or 32 sampling points. Subsequently, the local harmonic distortion characterization value is calculated for each analysis segment. This local harmonic distortion characterization value can be determined comprehensively based on the deviation of the current sampling value within the segment from the reference current waveform, the intensity of the non-fundamental residual component of the segment, or the degree of non-smoothness of the waveform change between adjacent sampling points. A more robust implementation method is as follows: First, use the reference value of the benchmark current waveform within the corresponding segment as the baseline. Then, use the difference sequence between the actual input current sample value and this baseline as the residual sequence. Next, perform local statistical analysis on this residual sequence to obtain the residual intensity index for that segment. Then, combine this with the proportion of extracted local harmonic components from the input current within that segment to form a comprehensive distortion index characterizing the degree of waveform anomaly in that segment. After forming the comprehensive distortion index for each segment, perform segmented threshold comparisons on the harmonic distortion information. That is, compare the comprehensive distortion index of each segment with a preset distortion threshold one by one, and mark segments exceeding the preset distortion threshold as distortion-sensitive segments. The preset distortion threshold is not fixed but can be predetermined based on normal operating samples under rated operating conditions. For example, during factory calibration or commissioning, the average comprehensive distortion index of each phase segment under light load, medium load, and rated load conditions can be recorded, and a safety margin can be added as the segment threshold. For instance, if the average comprehensive distortion index of a certain segment is 0.12 during normal operation under medium load, its operating threshold can be set between 0.15 and 0.18. When the real-time detected value exceeds the operating threshold, the segment is considered to have entered a distortion-sensitive state. Meanwhile, the upper limit of the target amplitude can be determined based on the current effective value information combined with the input voltage amplitude envelope and the current power level constraint. Specifically, the overall amplitude of the input current can be determined based on the current effective value information to be in the high, moderate, or low range, and then, combined with the allowable input power range under the current charging stage, the upper limit of the overall amplitude that the reference current waveform can be increased is limited. For example, when the effective value of the target input current is around 10 amps, the upper limit of the allowable amplitude in the current control cycle can be corresponding to an equivalent reference level of 10.3 amps to 10.6 amps, so that a reasonable compensation margin can still be left after subsequent local corrections.

[0108] S2.4.2: Limit the local rate of change of the reference current waveform in the distortion-sensitive section to suppress abrupt changes in the reference current waveform in the distortion-sensitive section;

[0109] Specifically, the previous stage identified which segments are more prone to local distortion amplification within the current sampling period. This means that even if the reference current waveform in these segments is correct in its overall trend, it may still induce excessive current loop response during actual execution due to excessively steep local slopes, rapid changes in adjacent sampling points, or sudden changes in curvature. This, in turn, causes new distortions in the input current within the same segment. Therefore, simply identifying sensitive segments is insufficient to solve the problem; it is also necessary to impose restrictions on the rate of change of the reference waveform itself within these segments, transforming the reference update process from direct following to a constrained, gradual change.

[0110] Understandably, the approach taken in this application stems from the understanding that, within sensitive sections, the real cause of distortion is not necessarily the magnitude of the reference value itself, but rather the rapid change of the reference value between adjacent moments. This leads to the superposition of power device duty cycle updates, sampling error amplification, and closed-loop regulation response. Therefore, limiting the local rate of change essentially mitigates the sharp changes that will be amplified by the execution link at the reference source level, rather than trying to remedy the situation after the actual input current has already become distorted.

[0111] In this embodiment, the calculation of the local rate of change can be based on the change in reference values ​​between adjacent sampling points within the distortion-sensitive segment and the sampling time interval. Specifically, the reference value sequence corresponding to each distortion-sensitive segment is first extracted from the reference current waveform. The difference between each sampling point and its predecessor is calculated to obtain a discrete change sequence within the segment. This change sequence is then compared with the sampling time interval corresponding to the current sampling period to obtain the local rate of change for each sampling step. For cases where the sampling frequency is fixed, the sampling time interval can be considered constant, and the comparison of the local rate of change can be directly completed through the difference between adjacent reference values. For cases where the sampling time fluctuates slightly, it is preferable to use the actual timestamp for conversion to ensure the accuracy of the rate of change determination. After obtaining the local rate of change, it is compared point-by-point with a preset rate of change threshold. When the local rate of change corresponding to a certain sampling point exceeds the preset rate of change threshold, the original reference update is not immediately retained; instead, the reference slope of that point and several subsequent points is limited. The amplitude limiting process can be implemented using a recursive update method. Starting with the last valid reference value before exceeding the threshold, subsequent reference values ​​are progressively calculated according to the maximum allowable rate of change until the waveform returns to the allowable range of the original reference current waveform. The preset rate of change threshold is preferably associated with the load level and segment location to avoid using the same fixed value under all operating conditions. For example, near the rated load, due to the large amplitude of the input current and the high tracking capability of the current loop, the allowable preset rate of change threshold can be set to 1.4 to 1.8 times the average change of adjacent sampling points. Under light load conditions, to reduce ineffective high-frequency regulation near zero crossover, the preset rate of change threshold can be reduced to 1.1 to 1.3 times the average change of adjacent sampling points. For distortion-sensitive segments located in the zero crossover neighborhood, an additional segment correction coefficient can be added, for example, between 0.8 and 0.9, to make the slope limitation in this region more stringent. This setting is not intended to make all segments flat, but rather to match the reference update speed within the distortion-sensitive segment with the controllability of the current operating condition.

[0112] In one optional implementation, limiting the local rate of change of the reference current waveform within the distortion-sensitive section includes:

[0113] The waveform change between adjacent sampling points in the distortion-sensitive section of the reference current waveform is obtained, and the local rate of change of the reference current waveform is determined according to the sampling time interval corresponding to the adjacent sampling points.

[0114] The local rate of change is compared with a preset rate of change threshold. When the local rate of change is greater than the preset rate of change threshold, the waveform slope of the corresponding sampling point is limited to obtain the limited waveform change amount.

[0115] Based on the restricted waveform change, the reference current value of the reference current waveform in the distortion-sensitive section is recursively corrected to generate a corrected waveform.

[0116] The preset rate of change threshold is determined jointly based on the harmonic distortion information and the effective value information.

[0117] S2.4.3: Based on the deviation between the limited reference current waveform and the target amplitude upper limit, compensate and allocate the waveform amplitude of the reference current waveform in the non-distortion sensitive section;

[0118] The distortion-sensitive section is the waveform section in which the input current is prone to local distortion increase, as determined based on the harmonic distortion information; the non-distortion-sensitive section is the remaining waveform section other than the distortion-sensitive section.

[0119] Specifically, the previous step of locally reducing and compressing the slope of the sensitive section, while resulting in a more stable local waveform, may also cause the total energy level of the entire reference waveform within one sampling period to be lower than the original target range. Without subsequent compensation, the overall effective value of the input current may be too low, leading to insufficient energy absorption on the input side and inconsistency with the power demand corresponding to the current charging stage. If all the reduction is simply concentrated and compensated at a certain peak position, it will introduce new local peak problems and even create new distortion risks in the originally stable section. Therefore, after the local limitation is completed, the amplitude margin that has not yet reached the target amplitude upper limit is redistributed to the non-distortion sensitive section in order to restore the overall effective value and energy level without destroying the stability of the sensitive section. The compensation distribution is not simply adding back the original value that was cut off, but a constrained redistribution based on the phase position of the non-sensitive section, the current reference value margin, the continuity of adjacent sections, and the overall amplitude boundary, thereby achieving the adjustment logic of less movement in the sensitive section and moderate compensation in the non-sensitive section.

[0120] In this embodiment, compensation allocation can be performed by calculating the amplitude deficit, determining the compensable segment, and allocating the increment according to weights. Specifically, the equivalent amplitude level or equivalent effective value level corresponding to the current control cycle is first re-estimated based on the limited reference current waveform. This level is then compared with the aforementioned target amplitude upper limit to obtain the compensable amplitude deficit within the current cycle. When the amplitude deficit is less than a preset minimum compensation threshold, compensation is not performed to avoid introducing unnecessary reference adjustments to correct minute deviations; the minimum compensation threshold can be set to 1% to 3% of the target amplitude upper limit. When the amplitude deficit reaches or exceeds this threshold, the compensable region in the non-distortion-sensitive segment is determined. The compensable region specifically refers to a segment that is neither a distortion-sensitive segment nor close to the current reference waveform peak upper limit, while the changes in adjacent sampling points remain stable. After determining the compensable region, compensation weights are assigned to each compensable segment. The compensation weights can comprehensively consider three factors: First, how much margin the current reference value of the segment has from the upper limit of the target amplitude; the larger the margin, the more suitable it is to undertake compensation. Second, the phase position of the segment in the line cycle; segments with higher voltage amplitudes and better control adjustability are generally more suitable for compensation. Third, the distance between the segment and the already limited amplitude segment; the farther away from the sensitive segment, the lower the risk of boundary linkage caused by compensation. Based on the above weights, the total amplitude deficit is distributed among multiple compensable segments, and within each segment, it is smoothly distributed to several sampling points. For example, if there are three compensable segments in a line cycle, with compensation weights of 0.5, 0.3, and 0.2 respectively, and the current equivalent amplitude deficit is converted into a total increment of 0.9 amps, then the total compensation amounts of 0.45 amps, 0.27 amps, and 0.18 amps can be allocated to the three segments respectively, and then gradually distributed by the sampling points within each segment in a way that the center is high and the boundary is low, so as to maintain waveform continuity. The compensation thus formed is not concentrated on a single point, but is carried out in a controlled manner in multiple non-sensitive sections, thereby reducing the possibility of new peaks forming.

[0121] Next, we will further elaborate on the technical aspects of the coordination and adjustment method in this application.

[0122] In one example, the target charging power requirement includes at least one of the target charging voltage, target charging current, and target charging power upper limit corresponding to the current charging stage; the bus power adjustment command includes at least one of the bus target voltage command, bus target current command, bus target power command, and bus power change slope limit command.

[0123] It is understood that the target charging power requirement is not a pre-fixed single-value parameter that remains unchanged throughout the charging process, but rather a phased power request that is dynamically determined by combining the current charging stage, the real-time status of the output side, and the feedback status of the object to be charged.

[0124] Specifically, when the object to be charged is in the pre-charging state, the target charging power demand can be determined as a low power build-up value under current-constrained conditions. At this time, the upper limit of the target charging current is constrained first, and the power request is gradually relaxed according to the actual rise of the output side charging voltage. When the object to be charged enters the constant current charging state, the target charging power demand can be determined together with the preset constant current target value and the current output side charging voltage. That is, the target charging current is the main constraint, and the current output side charging voltage is the power conversion basis to form the target charging power level of the current stage. When the object to be charged enters the constant voltage charging state, the target charging voltage is used as the main constraint, and the upper limit of the target charging power demand is determined in combination with the actual decline trend of the output side charging current, so that the power request decreases synchronously with the current decay. For the equalization charging state, time-sharing power limit or pulsed power limit can be superimposed on the target charging voltage constraint to form a more refined stage power demand. In the charging cut-off state, the target charging power demand is reduced to zero power or maintained at an extremely low detection sustaining power.

[0125] In this embodiment, the bus power adjustment command is an intermediate adjustment amount obtained by further calculation and constraint based on bus parameter information after obtaining the target charging power demand. Specifically, the desired output power level can be obtained first based on the current target charging voltage and target charging current. Then, combined with the current DC bus voltage and DC bus current information, it can be determined whether the bus is currently in a power build-up, power maintenance, or power decline process. If the target charging power demand is higher than the current power level already carried by the bus, a target bus power command is generated, along with a corresponding bus power change slope limit command, so that the bus power approaches the target value in a controlled climbing manner. If the target charging power demand is lower than the current bus power carrying capacity, a downward adjustment target bus power command is generated, and the bus power decline slope is determined based on the bus voltage decline capability and the allowable power reduction rhythm on the output side. When the output side is currently more suitable for coordination via voltage constraints, a target bus voltage command can also be directly generated to maintain the bus voltage within a voltage range compatible with the charging power demand at that stage. When current limiting of the bus circuit is required, a target bus current command can also be further generated. Therefore, the bus power adjustment command is not a single command value, but a set of optional constraint quantities formed according to the matching relationship between the target charging power demand and the current state of the bus. In essence, it transforms the phased power request of the output side into the bus-side control basis that can be directly used by the upstream input current coordination.

[0126] For example, the following numerical example is provided to illustrate how to convert the target charging power demand and bus power adjustment command. This example is only used to explain the relationship between the calculation link and the dimensions. The selected parameters and values ​​are illustrative values ​​and do not represent the actual calibration results or engineering recommended values.

[0127] The current charging object is assumed to be in the constant current charging stage, with the target charging current as the main control variable. The output-side operating data collected during the current control cycle is: output-side charging voltage 50.8 volts, output-side charging current 18.5 amps; the stage setting is a target charging current of 20 amps, an allowable upper limit for the target charging voltage of 58.4 volts, and an allowable upper limit for the target charging power of 1200 watts. Simultaneously, the operating data collected on the bus side is: DC bus voltage 390 volts, DC bus current 2.55 amps, thus the current actual bus power is 994.5 watts. Further, the equivalent efficiency of the downstream charging converter near the current load point is set to 0.96. This efficiency value can be derived from measured efficiency tables, segmented lookup table results, or estimated by the controller based on the current power range. In this example, a fixed value is used only for illustrative purposes.

[0128] During the constant current charging phase, the target charging power demand is not directly determined by the phase's upper limit of 1200 watts. Instead, it is calculated based on the target charging current and the current output charging voltage to obtain the phase power demand value corresponding to the current control cycle. Specifically, the target charging current of 20 amps is multiplied by the current output charging voltage of 50.8 volts to obtain 1016 watts. This result is then compared with the phase's allowed upper limit of 1200 watts. Since 1016 watts does not exceed 1200 watts, the target charging power demand for the current control cycle is set at 1016 watts, rather than the upper limit of 1200 watts. This is because, although the constant current phase uses current as the primary control target, the output voltage continuously changes under different states of charge. If the upper limit is always used as the phase power request, the actual power request in some control cycles will deviate from the true power receiving state of the current phase. Based on the current example, the target charging power demand has been calculated from the target charging current of 20 amps and the current output charging voltage of 50.8 volts, with the unit being watts and the value being 1016 watts.

[0129] After obtaining the target charging power requirement of 1016 watts, it is further necessary to convert this output-side power requirement into the target power level that the bus side needs to bear. Since the output-side power is not directly equal to the bus-side power, the efficiency loss of the downstream charging converter stage also needs to be considered during the energy transfer process. Therefore, the bus target power command can be obtained by dividing the target charging power requirement by the equivalent efficiency of the downstream converter stage. In this example, the bus target power command is equal to 1016 watts divided by 0.96, and the result is 1058.33 watts. This value indicates that in order to continuously provide 1016 watts of charging power to the output side under the current efficiency conditions, the bus side should provide at least 1058.33 watts of input power. Subsequently, this bus target power command is compared with the current actual bus power of 994.5 watts, and the bus power deviation is 1058.33 minus 994.5, which is 63.83 watts. Since this deviation is positive, it indicates that the bus power needs to be adjusted upward from the current level, so the direction of the bus power change is determined to be an upward process.

[0130] To further develop controllable bus power regulation commands, it is necessary to determine the bus target voltage command, bus target current command, and bus power change slope limit command. For the bus target voltage command, this example sets the normal bus regulation window to 395V to 405V, and selects 400V as the bus target voltage command under the current operating conditions. This value can be understood as an intermediate target value set to reserve sufficient regulation margin for the downstream charging converter stage under the current charging stage and power level. Therefore, given that the bus target power command is known to be 1058.33W and the bus target voltage command is 400V, the bus target current command can be further converted to 1058.33W divided by 400V, yielding 2.646A. At this point, the bus target power command, bus target voltage command, and bus target current command have all been obtained, which are 1058.33W, 400V, and 2.646A, respectively.

[0131] Next, we calculate the bus power change slope limit command. This command cannot be set based solely on experience; it should be calculated in conjunction with the allowable voltage fluctuation of the bus energy storage element. In this example, the DC bus capacitance is set to 2200 microfarads, the control period is 1 millisecond, and the allowable bus voltage change within a single control period is no more than 0.5 volts. We can first calculate the maximum energy change that the bus capacitor can absorb or release within this control period. The energy storage change is determined by the energy difference before and after the voltage change across the capacitor. For example, taking a voltage change from 390 volts to 390.5 volts, the allowable energy change is equal to half multiplied by the capacitance value, then multiplied by "390.5 volts squared minus 390 volts squared". Substituting the values, we get: half multiplied by 0.0022, then multiplied by 152490.25 minus 152100, resulting in approximately 0.429 joules. Since this energy change occurs within a 1-millisecond control cycle, the corresponding allowable power difference is approximately 0.429 joules divided by 0.001 seconds, resulting in 429 watts. In other words, under the current bus capacitance and allowable voltage fluctuation constraints, the maximum allowable change in the bus power regulation command within a single 1-millisecond control cycle is approximately 429 watts. This value can be used as the base value for the bus power change slope limit command, which can be expressed as 429 watts per millisecond in slope form.

[0132] Comparing the aforementioned power deviation of 63.83 watts with the bus power change slope limit of 429 watts per millisecond, it can be found that the required power increment of 63.83 watts within this control cycle is less than the allowable change of 429 watts per cycle. Therefore, in this example, the target bus power command can be directly updated from 994.5 watts to 1058.33 watts within one control cycle, without needing to climb step by step across multiple control cycles. Accordingly, the bus power adjustment command can be expressed as: target bus power command 1058.33 watts, target bus voltage command 400 volts, target bus current command 2.646 amps, and bus power change slope limit command 429 watts per millisecond, with the current power change direction being upward. If the calculated power deviation in another control cycle exceeds 429 watts, for example, reaching 600 watts, this difference cannot be released all at once. Instead, it should be gradually approached to the target value in two or more control cycles, increasing by a maximum of 429 watts every 1 millisecond. In this case, the bus power target updated in the first control cycle can only reach the allowable portion of the current actual power of 994.5 watts plus 429 watts, i.e., 1423.5 watts; the remaining portion will be released in subsequent control cycles. This approach ensures that the bus voltage fluctuation does not exceed the preset boundary and avoids excessively steep updates to the input current reference waveform due to sudden changes in power commands.

[0133] For ease of overall understanding, the computational chain of this example can be summarized as follows: First, based on the target charging current of 20 amps in the constant current stage and the current output charging voltage of 50.8 volts, the stage power demand of 1016 watts is calculated; then, combined with the equivalent efficiency of the charging converter stage of 0.96, 1016 watts is converted into a target bus power of 1058.33 watts; next, based on the target bus voltage command of 400 volts, the target bus power of 1058.33 watts is converted into a target bus current command of 2.646 amps; finally, based on the bus capacitance of 2200 microfarads, the current bus voltage of 390 volts, the control cycle of 1 millisecond, and the allowable voltage change of 0.5 volts, the bus power change slope limit command of 429 watts per millisecond is calculated. Through this calculation process, the source relationship, conversion path, and dimension conversion process between the target charging power demand and the bus power adjustment command are fully revealed. Those skilled in the art can use this to convert the stage charging demand into a bus-side adjustment quantity that can be used for coordinated control of the front-end input current.

[0134] In one example, the coordination includes:

[0135] Obtain the switching status information of the current charging stage, and perform trend analysis on the bus power adjustment command to obtain the change direction information of the target bus power;

[0136] Based on the bus parameter information, the actual bus power change information is determined, and based on the change direction information of the target bus power and the actual bus power change information, the bus power change trend information is determined.

[0137] When a switch in the current charging phase is detected, and the bus power change trend information indicates that the bus power is in an upward or downward process, the amplitude update rate and waveform switching boundary of the target input current reference waveform are controlled in stages.

[0138] The updated target input current reference waveform is generated based on the amplitude update rate and waveform switching boundary after phased control.

[0139] The phased control includes:

[0140] When the bus power changes from low to high, the amplitude update rate of the target input current reference waveform is limited according to the rate of change of the bus power command, and the reference amplitude of the target input current reference waveform is gradually increased according to the preset ramp function.

[0141] Specifically, the setting of the preset ramp function is usually determined by considering the following factors:

[0142] Firstly, the bus energy storage and power ramp-up capabilities. Since the output power increase ultimately requires energy build-up through the bus, if the bus capacitance is small and the allowable voltage fluctuation range is narrow, the bus's buffering capacity for sudden power increases is weak. In this case, the ramp function should be set more gently. Conversely, if the bus energy storage margin is large and the allowable short-term power ramp-up capability is strong, the ramp function can be appropriately steepened. In other words, the initial slope of the ramp function should not exceed the equivalent input current increase rate corresponding to the bus power change slope limit command.

[0143] Secondly, the waveform tracking capability on the AC input side. Although the target input current reference waveform is a reference quantity, it still needs to be tracked by the upstream switching devices and current loop. If the ramp function is set too steep, even if the bus theoretically allows it, input current tracking lag may occur in actual control, resulting in spikes or distortions in local sections. Therefore, the rate of change of the ramp function should also take into account the current loop bandwidth, sampling frequency, and PWM update cycle to ensure that the reference increment between adjacent control cycles is within a stable tracking range.

[0144] Thirdly, the engineering characteristics of charging phase switching. When switching from pre-charging to constant current, or from low-power maintenance to higher-power replenishment, the output power demand often has the characteristic of being "directional but not suitable for instantaneous release". Therefore, the ramp function should generally not adopt an ideal step, but rather a linear increasing, piecewise linear increasing, or a smooth increasing form with a slow start and fast finish, so that the input power build-up process is consistent with the output phase switching rhythm.

[0145] Fourth, input power quality constraints. The ramp function should also avoid the sensitive region near the zero-crossing of the AC input voltage. Because in the zero-crossing neighborhood, the input voltage amplitude is relatively low; if the current reference amplitude increases too quickly, it can easily cause local waveform distortion. Therefore, in engineering implementation, the ramp function can be designed not to release at a completely uniform rate within one line cycle, but rather to release more increments in the phase region with higher voltage amplitudes and less increments near the zero-crossing.

[0146] In one optional implementation, the preset ramp function can be set as a linear ramp function, that is, as the bus power changes from low to high, the reference amplitude of the target input current reference waveform increases periodically according to a fixed increase rate until it reaches the target reference amplitude corresponding to the target bus power.

[0147] When the bus power changes from high to low, the phase synchronization relationship of the target input current reference waveform remains unchanged, and the reference amplitude of the target input current reference waveform is gradually reduced according to the preset attenuation function.

[0148] In one example, this application embodiment provides a high power factor energy conversion charging system, the system comprising:

[0149] The parameter acquisition module is used to acquire input voltage information, input current information, and bus parameter information of the energy conversion bus at the AC input terminal, and to acquire charging status information and output side parameter information corresponding to the object to be charged.

[0150] The reference waveform generation module is used to perform phase tracking and power factor state characterization based on the input voltage information and the input current information to generate a target input current reference waveform;

[0151] The coordination control module is used to determine the target charging power demand corresponding to the current charging stage based on the charging status information and the output side parameter information, and to generate a bus power adjustment command based on the target charging power demand and the bus parameter information; and to coordinately adjust the waveform amplitude of the target input current reference waveform based on the bus power adjustment command to obtain the target current control quantity for driving the AC input terminal.

[0152] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A high power factor energy conversion charging method, applied to a charging energy conversion device, characterized in that, The high power factor is greater than or equal to 0.999, the charging energy conversion device is connected between the AC input terminal and the object to be charged, and the method includes: Acquire the input voltage information, input current information, and bus parameter information of the energy conversion bus at the AC input terminal, and acquire the charging status information and output side parameter information corresponding to the object to be charged; Phase tracking and power factor state characterization are performed based on the input voltage information and the input current information to generate a target input current reference waveform; The target charging power demand corresponding to the current charging stage is determined based on the charging status information and the output side parameter information, and a bus power adjustment command is generated based on the target charging power demand and the bus parameter information. Based on the bus power regulation command, the waveform amplitude of the target input current reference waveform is coordinated and adjusted to obtain the target current control quantity used to drive the AC input terminal. The coordination and adjustment include: Obtain the switching status information of the current charging stage, and perform trend analysis on the bus power adjustment command to obtain the change direction information of the target bus power; Based on the bus parameter information, the actual bus power change information is determined, and based on the change direction information of the target bus power and the actual bus power change information, the bus power change trend information is determined. When a switch in the current charging phase is detected, and the bus power change trend information indicates that the bus power is in an upward or downward process, the amplitude update rate and waveform switching boundary of the target input current reference waveform are controlled in stages, wherein the staged control includes: When the bus power changes from low to high, the amplitude update rate of the target input current reference waveform is limited according to the rate of change of the bus power command, and the reference amplitude of the target input current reference waveform is increased according to a preset ramp function. When the bus power changes from high to low, the phase synchronization relationship of the target input current reference waveform remains unchanged, and the reference amplitude of the target input current reference waveform is reduced according to a preset attenuation function; The updated target input current reference waveform is generated based on the amplitude update rate and waveform switching boundary after phased control.

2. The high power factor energy conversion charging method according to claim 1, characterized in that, The bus parameter information includes DC bus voltage information and DC bus current information. The DC bus voltage information is acquired through a voltage sampling circuit installed in the energy conversion bus, and the DC bus current information is acquired through a current sampling circuit installed in the energy conversion bus. The charging status information includes at least one of the following states corresponding to the object to be charged: pre-charge state, constant current charging state, constant voltage charging state, equalization charging state, and charging cutoff state. The charging status information is determined by detecting the output side charging voltage, output side charging current, and the status signal fed back by the object to be charged. The output side parameter information is used to characterize the current output side operating state of the object to be charged, and the output side parameter information includes at least the output side charging voltage and the output side charging current.

3. The high power factor energy conversion charging method according to claim 1, characterized in that, The method for generating the target input current reference waveform includes: The input voltage information is subjected to periodic detection, zero-crossing identification, and phase extraction to determine the voltage phase information and voltage amplitude envelope information at the AC input terminal; The input current information is synchronously sampled and waveform analyzed to determine the phase deviation information, harmonic distortion information, and effective value information of the input current; A reference current waveform in phase with the AC input voltage is constructed based on the voltage phase information, the voltage amplitude envelope information, and the phase deviation information. Based on the harmonic distortion information and the effective value information, the reference current waveform is corrected and its amplitude is constrained to generate the target input current reference waveform.

4. The high power factor energy conversion charging method according to claim 3, characterized in that, The zero-crossing identification uses a zero-crossing detection circuit, which monitors the alternation time of the positive and negative values ​​of the input voltage signal to determine the zero-crossing position. The phase extraction uses phase-locked loop technology to determine the real-time phase of the AC input voltage based on the zero-crossing position, generating voltage phase information synchronized with the phase of the input voltage signal.

5. The high power factor energy conversion charging method according to claim 3, characterized in that, The synchronous sampling includes: acquiring data at corresponding times for the input voltage information and the input current information within the same sampling period, and performing time alignment processing on the acquired input voltage data and input current data based on a unified time base to obtain mutually corresponding voltage sampling sequences and current sampling sequences; the waveform analysis includes: extracting the fundamental and harmonic components of the input current based on the current sampling sequence, and determining the phase deviation information, harmonic distortion information, and effective value information of the input current by combining the phase relationship between the voltage sampling sequence and the current sampling sequence.

6. The high power factor energy conversion charging method according to claim 5, characterized in that, Based on the harmonic distortion information and the effective value information, waveform correction and amplitude constraint are performed on the reference current waveform, including: The distortion-sensitive segment of the input current within the current sampling period is determined based on the harmonic distortion information, and the target amplitude upper limit corresponding to the reference current waveform is determined based on the effective value information, wherein the distortion-sensitive segment is determined by segmenting the harmonic distortion information by comparison of thresholds. The local rate of change of the reference current waveform within the distortion-sensitive section is limited to suppress abrupt changes in the reference current waveform within the distortion-sensitive section. Based on the deviation between the limited reference current waveform and the target amplitude upper limit, the waveform amplitude of the reference current waveform in the non-distortion sensitive section is compensated and allocated. The distortion-sensitive section is a waveform section where the input current is prone to local distortion increase, as determined based on the harmonic distortion information. The non-distortion-sensitive section is the remaining waveform section other than the distortion-sensitive section.

7. The high power factor energy conversion charging method according to claim 6, characterized in that, Limiting the local rate of change of the reference current waveform within the distortion-sensitive section includes: The waveform change between adjacent sampling points in the distortion-sensitive section of the reference current waveform is obtained, and the local rate of change of the reference current waveform is determined according to the sampling time interval corresponding to the adjacent sampling points. The local rate of change is compared with a preset rate of change threshold. When the local rate of change is greater than the preset rate of change threshold, the waveform slope of the corresponding sampling point is limited to obtain the limited waveform change amount. Based on the restricted waveform change, the reference current value of the reference current waveform in the distortion-sensitive section is recursively corrected to generate a corrected waveform. The preset rate of change threshold is determined jointly based on the harmonic distortion information and the effective value information.

8. The high power factor energy conversion charging method according to claim 1, characterized in that, The target charging power requirement includes at least one of the target charging voltage, target charging current, and target charging power upper limit corresponding to the current charging stage; the bus power adjustment command includes at least one of the bus target voltage command, bus target current command, bus target power command, and bus power change slope limit command.

9. A high power factor energy conversion charging system, used to implement the high power factor energy conversion charging method as described in any one of claims 1-8, characterized in that, The system includes: The parameter acquisition module is used to acquire input voltage information, input current information, and bus parameter information of the energy conversion bus at the AC input terminal, and to acquire charging status information and output side parameter information corresponding to the object to be charged. The reference waveform generation module is used to perform phase tracking and power factor state characterization based on the input voltage information and the input current information to generate a target input current reference waveform; The coordination control module is used to determine the target charging power demand corresponding to the current charging stage based on the charging status information and the output side parameter information, and to generate a bus power adjustment command based on the target charging power demand and the bus parameter information; and to coordinately adjust the waveform amplitude of the target input current reference waveform based on the bus power adjustment command to obtain the target current control quantity for driving the AC input terminal.

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