Balancing control method and system for reducing voltage fluctuation difference of hybrid MMC half-bridge full-bridge module

Abstract

The application discloses a kind of balancing control methods and systems for reducing the voltage fluctuation difference of hybrid MMC half-bridge-full-bridge module, belong to multilevel converter field, specifically: according to the total number of module input as needed to generate half-bridge and full-bridge module input number candidate combination;Calculate all predicted values of the average voltage of half-bridge and full-bridge module capacitor inside bridge arm;Calculate the cost function of capacitor voltage fluctuation corresponding to all candidate combinations, obtain the optimal input number of half-bridge and full-bridge module;According to the optimal input number and the direction of bridge arm current, respectively, the capacitor voltage sequencing control method is used to half-bridge and full-bridge module, to obtain the driving signal of half-bridge and full-bridge module.The application generates the optimal input number of half-bridge and full-bridge module inside bridge arm through model predictive control, can control the capacitor voltage of half-bridge and full-bridge module can track reference value with minimum error when normal operation and over-modulation operation, capacitor voltage keeps balance and voltage fluctuation difference is small.

Description

Technical Field

[0001] This invention relates to the field of multilevel converter control technology, specifically to a balance control method and system for reducing the voltage fluctuation difference between the half-bridge and full-bridge modules of a hybrid modular multilevel converter. Background Technology

[0002] Modular multilevel converters (MMCs) offer a high number of output levels, high efficiency, and low AC output harmonics, making them ideal for medium- and high-voltage, high-power power electronic conversion applications. Hybrid MMC bridge arms are configured with several series-connected half-bridge and full-bridge modules in a specific ratio. Compared to traditional half-bridge MMCs, hybrid MMCs have the ability to interrupt DC short-circuit fault currents and can operate under overmodulation. They offer greater flexibility in design and control, are suitable for various complex operating conditions, and have broad application prospects in flexible DC transmission, AC / DC distribution networks, and new energy storage.

[0003] Existing capacitor voltage control schemes for hybrid MMCs are similar to those for traditional half-bridge MMCs. First, the bridge arm reference wave is modulated to obtain the number of output levels for each bridge arm. Then, based on the number of output levels, their signs, the direction of the bridge arm current, and the capacitor voltages of all modules in the bridge arm, a sorted capacitor voltage balance control is used to obtain the drive signals for all modules within the bridge arm. However, during overmodulation operation, the charging and discharging characteristics of the half-bridge and full-bridge modules differ, resulting in an inherent capacitor voltage imbalance. Existing capacitor voltage control schemes cannot control the voltage difference between the half-bridge and full-bridge modules, potentially leading to excessively large voltage differences. Furthermore, the voltage fluctuation difference between the half-bridge and full-bridge modules further affects the selection of active and passive components, thermal stress distribution, and reliability within these modules. Therefore, it is necessary to develop a new control method to address this problem, enabling the hybrid MMC to maintain capacitor voltage balance with minimal error tracking of the reference value during both normal and overmodulation operation, while minimizing the voltage fluctuation difference between the half-bridge and full-bridge modules. Summary of the Invention

[0004] The technical problem this invention aims to solve is to address the shortcomings of existing technologies by proposing a balanced control method to reduce the voltage fluctuation differences between the capacitors of hybrid MMC half-bridge and full-bridge modules. This method ensures that during normal operation and overmodulation, the capacitor voltages of both the half-bridge and full-bridge modules track the reference value with minimal error and remain balanced, while minimizing voltage fluctuation differences. Simultaneously, the method limits the variation in the number of half-bridge and full-bridge modules in operation within adjacent control cycles to the maximum allowable range, thereby preventing an increase in the switching frequency.

[0005] To solve the above technical problems, the present invention adopts the following technical solution:

[0006] First, this invention proposes a balance control method to reduce the voltage fluctuation difference between the capacitors of hybrid MMC half-bridge and full-bridge modules, wherein the hybrid MMC bridge arm includes N H One half-bridge module and N F A full-bridge module, the method includes the following steps:

[0007] Bridge arm reference wave y xj (Subscripts x = u, l, representing the upper and lower bridge arms respectively; subscripts j = a, b, c, representing phases A, B, and C respectively) The total number n of modules required for this bridge arm is obtained after modulation. xj The range is -N F ~N H +N F ;-N F This represents the number of full-bridge modules with negative input.

[0008] According to n xj The value of generates candidate combinations of the number of half-bridge and full-bridge modules to be deployed;

[0009] Calculate all predicted values ​​of the average voltage of the capacitors in the half-bridge and full-bridge modules inside the bridge arm;

[0010] Calculate the cost function for all candidate combinations to determine the optimal number n of half-bridge and full-bridge modules. H_xj and n F_xj ;

[0011] Based on the optimal number of inputs and the direction of the bridge arm current, the capacitor voltage sorting control method is applied to the half-bridge and full-bridge modules respectively to obtain the driving signals of the half-bridge and full-bridge modules.

[0012] Furthermore, in the control method proposed in this invention, the modulation method of the bridge arm reference wave includes nearest-level approximation modulation (NLM), carrier phase-shift modulation (CPS-PWM), carrier stacking modulation (PD-PWM), etc.

[0013] Furthermore, in the control method proposed in this invention, the candidate combination of the number of half-bridge and full-bridge modules is generated as follows:

[0014] Case 1: If N H >2N F Then there is

[0015] When -N F ≤n xj <N F Then n H_xj The value range is 0 to n xj +N F Correspondingly, n F_xj The value range is -N F ~nxj ;

[0016] When N F ≤n xj <N H -N F Then n H_xj The range of values ​​is n xj -N F ~n xj +N F Correspondingly, n F_xj The value range is -N F ~N F ;

[0017] When N H -N F ≤n xj <N H +N F Then n H_xj The range of values ​​is n xj -N F ~N H Correspondingly, n F_xj The range of values ​​is n xj -N H ~N F .

[0018] Case 2: If N H ≤2N F Then there is

[0019] When -N F ≤n xj <N H -N F Then n H_xj The value range is 0 to n xj +N F Correspondingly, n F_xj The value range is -N F ~n xj ;

[0020] When N H -N F ≤n xj < N F Then n H_xj The value range is 0~N H Correspondingly, n F_xj The range of values ​​is n xj -N H ~n xj ;

[0021] When N F ≤n xj <N H +NF Then n H_xj The range of values ​​is n xj -N F ~N H Correspondingly, n F_xj The range of values ​​is n xj -N H ~N F .

[0022] Where n H_xj and n F_xj These represent the candidate values ​​for the number of half-bridge and full-bridge modules to be deployed, respectively.

[0023] Furthermore, in the control method proposed in this invention, the predicted value of the average capacitor voltage of the half-bridge and full-bridge modules at time k+1 is:

[0024] ,

[0025] Among them, u CH_xj_h (k) is the capacitor voltage value of the h-th half-bridge module inside the bridge arm at time k, where h ranges from 1 to N. H ;u CF_xj_q (k) is the capacitor voltage value of the q-th full-bridge module inside the bridge arm at time k, where q ranges from 1 to N. F i xj It is the bridge arm current; T s It is the control cycle; C H and C F These are the capacitance values ​​for the half-bridge and full-bridge modules, respectively.

[0026] Furthermore, in the control method proposed in this invention, the cost function is calculated using the following formula:

[0027] ,

[0028] Among them, U Cref This is a reference value for the capacitor voltage, equal to the average capacitor voltage of all modules within the bridge arm during the power frequency cycle, or it can be set according to system operating requirements. CH_xj (k+1), U CF_xj (k+1) represents the predicted average capacitor voltage of the half-bridge and full-bridge modules at time k+1, respectively. K is an additional term, and its value is determined according to the following principle:

[0029] ,

[0030] Here, E is set to a very large positive real number, such as E≥U cref N th It is a positive integer representing the maximum number of modules that can change within adjacent control cycles, designed according to system operating requirements.H_xj (k-1) and n F_xj (k-1) represents the actual number of half-bridge and full-bridge modules deployed at time k-1, respectively. The additional term K is used to determine the number of half-bridge or full-bridge modules deployed when the number of modules changes more than the maximum allowable value N between adjacent control cycles. th The corresponding cost function value is dominated by the additional term K. Therefore, limiting the variation in the number of half-bridge and full-bridge modules in adjacent control cycles to within an allowable range can reduce the overall switching frequency.

[0031] Furthermore, in the control method proposed in this invention, the optimal number n of half-bridge and full-bridge modules to be engaged is... H_xj and n F_xj The method for determining n is as follows: calculate the cost function values ​​corresponding to the candidate combinations of all half-bridge and full-bridge module inputs, find the candidate combination corresponding to the smallest cost function value, and thus determine n. H_xj and n F_xj .

[0032] Furthermore, in the control method proposed in this invention, the capacitor voltage sorting control method for the half-bridge and full-bridge modules is as follows: if the product of the reference wave and the arm current of the half-bridge (or full-bridge) module is greater than or equal to zero, then n is activated. H_xj (or n) F_xj Use the half-bridge (or full-bridge) module with the lowest capacitor voltage; otherwise, use n. H_xj (or n) F_xj The half-bridge (or full-bridge) module with the highest capacitor voltage. A modulation level number greater than zero indicates positive input, and a modulation level number less than zero indicates negative input.

[0033] Meanwhile, the present invention proposes an electronic system comprising a memory, a processor, and program instructions stored in the memory that can be executed by the processor to implement the various steps of the control method proposed in the present invention.

[0034] Compared with the prior art, the present invention, employing the above technical solution, has the following technical effects:

[0035] The method proposed in this invention can adjust the number of half-bridge and full-bridge modules in operation during normal and overmodulated operation of a hybrid MMC, so that the capacitor voltages of both half-bridge and full-bridge modules can track the reference value with minimal error, maintain capacitor voltage balance, and minimize the difference in capacitor voltage fluctuations between the half-bridge and full-bridge modules. Simultaneously, the variation in the number of half-bridge and full-bridge modules in adjacent control cycles is limited to the maximum allowable range, thereby reducing the difference in capacitor voltage fluctuations between the half-bridge and full-bridge modules while minimizing the additional switching frequency, resulting in excellent dynamic performance. Attached Figure Description

[0036] Figure 1This is a topology diagram of the three-phase hybrid MMC and its sub-modules of the present invention;

[0037] Figure 2 This is a schematic diagram of the overall control method of the present invention.

[0038] Figure 3 The simulation waveforms show the total number of bridge arm modules and the number of half-bridge and full-bridge modules in the control method proposed in this invention.

[0039] Figure 4 These are simulation waveforms of the capacitor voltages of the half-bridge and full-bridge modules in the control method proposed in this invention.

[0040] Figure 5 This is a simulation waveform of the bridge arm voltage of the control method proposed in this invention. Detailed Implementation

[0041] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0042] like Figure 1 The diagram shows a three-phase hybrid MMC topology. Each phase consists of upper and lower arms, and each arm includes N... H One half-bridge module and N F One full-bridge module.

[0043] Example 1: As Figure 2 The diagram shown is an overall schematic of the control method proposed in this invention. It includes the following steps:

[0044] 1) Use the bridge arm reference wave y xj (Subscripts x = u, l, representing the upper and lower bridge arms respectively; subscripts j = a, b, c, representing phases A, B, and C respectively) The total number n of modules required for this bridge arm is obtained after modulation. xj The range is -N F ~N H +N F ;

[0045] 2) Based on n xj The value of generates candidate combinations of the number of half-bridge and full-bridge modules to be deployed;

[0046] 3) Calculate all predicted values ​​of the average voltage of the capacitors in the half-bridge and full-bridge modules inside the bridge arm;

[0047] 4) Calculate the cost function for all candidate combinations and determine the optimal number n of half-bridge and full-bridge modules to be deployed.H_xj and n F_xj ;

[0048] 5) Based on the optimal number of inputs and the direction of the bridge arm current, the capacitor voltage sorting control method is applied to the half-bridge and full-bridge modules respectively to obtain the driving signals of the half-bridge and full-bridge modules.

[0049] In step 1) of the proposed method, the modulation method of the bridge arm reference wave includes nearest level approximation modulation (NLM), carrier phase shift modulation (CPS-PWM), carrier stacking modulation (PD-PWM), etc.

[0050] In step 2 of the proposed method, the number of candidate combinations (n) of half-bridge and full-bridge modules is introduced. H_xj , n F_xj The generated combinations are shown in Table 1. All candidate combinations satisfy n H_xj With n F_xj The sum equals n xj .

[0051] Table 1 n xj_H and n xj_F Possible values

[0052]

[0053] In step 3) of the proposed method, the predicted average voltage of the capacitors of the half-bridge and full-bridge modules at time k+1 is:

[0054] ,

[0055] Among them, u CH_xj_h (k) is the capacitor voltage value of the h-th half-bridge module inside the bridge arm at time k, where h ranges from 1 to N. H ;u CF_xj_q (k) is the capacitor voltage value of the q-th full-bridge module inside the bridge arm at time k, where q ranges from 1 to N. F i xj It is the bridge arm current; T s It is the control cycle; C H and C F These are the capacitance values ​​for the half-bridge and full-bridge modules, respectively.

[0056] In step 4) of the proposed method, the cost function is calculated as follows:

[0057] ,

[0058] Among them, U Cref This is a reference value for the capacitor voltage, equal to the average capacitor voltage of all modules within the bridge arm during the power frequency cycle, or it can be set manually according to system operating requirements. CH_xj (k+1), UCF_xj (k+1) represents the predicted average capacitor voltage of the half-bridge and full-bridge modules at time k+1, respectively.

[0059] K is an additional term, and its value is determined according to the following principle:

[0060] ,

[0061] Here, E is set to a very large positive real number, such as E≥U cref N th It is a positive integer representing the maximum number of modules that can change within adjacent control cycles, designed according to system operating requirements. H_xj (k-1) and n F_xj (k-1) represents the actual number of half-bridge and full-bridge modules deployed at time k-1, respectively. The additional term K in the cost function formula serves to account for changes in the number of half-bridge or full-bridge modules between adjacent control cycles that exceed the maximum allowable value N. th The calculated cost function value is dominated by this additional term K. Therefore, limiting the variation in the number of half-bridge and full-bridge modules in adjacent control cycles to within an allowable range can reduce the overall switching frequency.

[0062] In step 4) of the proposed method, the optimal number of half-bridge and full-bridge modules, n, is determined. H_xj and n F_xj The method for determining n is as follows: calculate the cost function values ​​corresponding to the candidate combinations of all half-bridge and full-bridge module inputs, find the candidate combination corresponding to the smallest cost function value, and thus determine n. H_xj and n F_xj .

[0063] In step 5) of the proposed method, the capacitor voltage sequencing control method for the half-bridge module is as follows: if the product of the half-bridge module reference wave and the bridge arm current is greater than or equal to zero, then n is input. H_xj The half-bridge module with the lowest capacitor voltage; otherwise, n H_xj The half-bridge module with the highest capacitor voltage.

[0064] In step 5) of the proposed method, the capacitor voltage sequencing control method for the full-bridge module is as follows: if the product of the full-bridge module reference wave and the bridge arm current is greater than or equal to zero, then n is input. F_xj The full-bridge module with the lowest capacitor voltage is selected; otherwise, n are used. F_xj The full-bridge module with the highest capacitor voltage. A modulation level count greater than zero indicates positive input, and a modulation level count less than zero indicates negative input.

[0065] To verify the balanced control method proposed in this invention for reducing the voltage fluctuation difference between the capacitors of the hybrid MMC half-bridge and full-bridge modules, the following simulation examples further illustrate the method. The simulation parameters of the three-phase hybrid MMC grid-connected circuit are shown in Table 2.

[0066] Table 2 Simulation parameters of hybrid MMC circuit

[0067]

[0068] In this simulation example, carrier stacked modulation (PD-PWM) is used to obtain the total number n of modules that need to be engaged in the bridge arm within each control cycle. xj According to the circuit parameters in Table 2, n xj The range is between -6 and 12. The system satisfies N. H ≤2N F This situation generates candidate combinations (n) of the number of half-bridge and full-bridge modules to be deployed. H_xj , n F_xj (as described below).

[0069] For type I, the candidate combinations of the number of inputs are: (0, n) xj ), (1, n xj -1), …, (n xj +6, -6);

[0070] For type II, the candidate combinations of input numbers are: (0, n) xj ), (1, n xj -1), …, (6, n xj -6);

[0071] For type III, the candidate combinations of input numbers are: (n xj -6, 6), (n xj -5, 5), …, (6, n xj -6).

[0072] The sum of the number of half-bridge and full-bridge modules always equals n. xj Therefore, the predicted average capacitor voltage of the half-bridge and full-bridge modules at time k+1 is calculated as follows:

[0073] ,

[0074] Furthermore, in each control cycle, the type is determined, and then the candidate combinations of input numbers (n) are selected. H_xj , n F_xj Substituting all possible values ​​into the above formula, we calculate the corresponding total cost function value J. Here, the capacitor voltage reference value U is used. CrefSet to 2 kV, and also set the parameter E of the additional term K to 2000, N th Setting it to 2 indicates that the maximum number of half-bridge and full-bridge modules allowed to change in adjacent control cycles does not exceed 2. Find the minimum cost function value to determine the optimal number n of half-bridge and full-bridge modules to be deployed. H_xj and n F_xj Finally, based on the optimal number of inputs and the direction of the bridge arm current, the capacitor voltage sorting control method is applied to the half-bridge and full-bridge modules respectively to obtain the drive signals for the half-bridge and full-bridge modules.

[0075] like Figure 3 The diagram shows the simulation waveforms of the total number of bridge arm modules and the number of half-bridge and full-bridge modules required for the balance control method proposed in this invention to reduce the voltage fluctuation difference between half-bridge and full-bridge modules. The initial power of the hybrid MMC is 10 MW. At simulation time t = 1.8 s, the power jumps to 20 MW. According to the capacitor voltage model predictive control method proposed in this invention, the total number n of modules required for the upper bridge arm of phase A is determined by... ua The number of half-bridge modules n is obtained. H_ua The number of bridge modules deployed (n) F_ua And n H_ua With n F_ua The sum always equals n ua .

[0076] like Figure 4 The figure shown is a simulated capacitor voltage waveform of the balance control method for reducing the difference in capacitor voltage fluctuation between half-bridge and full-bridge modules proposed in this invention. Cua1 ~u Cua6 It is the capacitor voltage of the upper bridge arm half-bridge module in phase A, u Cua7 ~u Cua12 This refers to the capacitor voltage of the full-bridge module in phase A. The initial power of the hybrid MMC is 10 MW. At simulation time t=1.8 s, the power jumps to 20 MW. Under the model predictive control method proposed in this invention, the capacitor voltages of the half-bridge and full-bridge modules remain stable and balanced, and the dynamic performance is good.

[0077] like Figure 5 The figure shown is a simulated waveform of the bridge arm voltage of the balance control method for reducing the voltage fluctuation difference between the capacitors of the half-bridge and full-bridge modules proposed in this invention. ua and u la These are the voltages of the upper and lower arms of phase A, respectively. A negative output voltage on the arm indicates that, under the control method proposed in this invention, the hybrid MMC can operate stably under overmodulation conditions, i.e., a modulation index greater than 1.

[0078] Figure 3 , Figure 4 and Figure 5The simulation results verify the feasibility and effectiveness of the balance control method proposed in this invention for reducing the voltage fluctuation difference between the capacitors of the hybrid MMC half-bridge and full-bridge modules.

[0079] Example 2: This application also discloses an electronic system, which includes a memory, a processor, and program instructions stored in the memory that can be executed by the processor to implement the various steps of the control method proposed in this invention.

[0080] It should be noted that the electronic system can use terminal devices such as desktop computers, laptops, or cloud servers. Furthermore, terminal devices include, but are not limited to, processors and memory. For example, terminal devices can also include input / output devices, network access devices, and buses.

[0081] Furthermore, the processor can be a central processing unit (CPU). Of course, depending on the actual use, other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), off-the-shelf programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. can also be used. The general-purpose processor can be a microprocessor or any conventional processor, etc., and this application does not limit it in this regard.

[0082] Furthermore, the memory can be an internal storage unit of the terminal device, such as the hard disk or RAM of the terminal device, or an external storage device of the terminal device, such as a plug-in hard disk, smart memory card (SMC), secure digital card (SD), or flash memory card (FC) equipped on the terminal device. In addition, the memory can also be a combination of the internal storage unit and the external storage device of the terminal device. The memory is used to store computer programs and other programs and data required by the terminal device. The memory can also be used to temporarily store data that has been output or will be output. This application does not limit this.

[0083] Furthermore, through this electronic system, any one of the methods described in the above embodiments can be stored in the memory of the electronic system and loaded and executed on the processor of the terminal device for convenient use.

[0084] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claimed invention.

Claims

1. A balance control method for reducing voltage fluctuation differences between a hybrid MMC half-bridge and full-bridge module, wherein the bridge arm of the hybrid MMC includes N H One half-bridge module and N F A full-bridge module, characterized in that... The control method includes the following steps: Bridge arm reference wave y xj The total number of modules required for this bridge arm is obtained through modulation; Generate candidate combinations of the number of half-bridge and full-bridge modules, and calculate all predicted values ​​of the average capacitor voltage of the half-bridge and full-bridge modules. Calculate the cost function values ​​for all candidate combinations and determine the optimal number of half-bridge and full-bridge modules to be deployed; Based on the optimal number of inputs and the direction of the bridge arm current, the capacitor voltage sorting control method is applied to the half-bridge and full-bridge modules respectively to obtain the drive signals of all modules in the bridge arm. Let the total number of modules required for the bridge arm be... n xj The candidate combinations for the number of half-bridge and full-bridge modules are generated as follows: Scenario 1: If N H >2 N F Then there is when- N F ≤ n xj < N F ,but n H_xj The value is [0, n xj + N F ], n F_xj The value is [- N F , n xj ]; when N F ≤ n xj < N H -N F ,but n H_xj The value is [ n xj - N F , n xj + N F ], n F_xj The value is [- N F , N F ]; when N H -N F ≤ n xj < N H +N F ,but n H_xj The value is [ n xj - N F , N H ], n F_xj The value is [ n xj - N H , N F ]; Scenario 2: If N H ≤2 N F Then there is when- N F ≤ n xj < N H - N F ,but n H_xj The value is [0, n xj + N F ], n F_xj The value is [- N F , n xj ]; when N H - N F ≤ n xj < N F ,but n H_xj The value is [0, N H ], n F_xj The value is [ n xj - N H , n xj ]; when N F ≤ n xj < N H +N F ,but n H_xj The value is [ n xj - N F , N H ], n F_xj The value is [ n xj - N H , N F ]; in n H_xj and n F_xj These represent the candidate values ​​for the number of half-bridge and full-bridge modules to be deployed, respectively. n xj ∈[- N F , N H + N F ], x = u , l , respectively representing the upper and lower bridge arms; j = a , b , c , respectively representing phases A, B, and C.

2. The method according to claim 1, characterized in that, The modulation methods for the bridge arm reference wave include: nearest level approximation modulation (NLM), carrier phase shift modulation (CPS-PWM), and carrier stacking modulation (PD-PWM).

3. The method according to claim 1, characterized in that, The average capacitor voltage of the half-bridge and full-bridge modules is at k The predicted value at time +1 is: , in, u CH_xj_h ( k )yes k The first time inside the bridge arm h The capacitor voltage values ​​of each half-bridge module h The value range is 1~ N H ; u CF_xj_q ( k )yes k The first time inside the bridge arm q The capacitor voltage values ​​of each full-bridge module. q The value range is 1~ N F ; i xj It is the bridge arm current; T s It is the control cycle; C H and C F These are the capacitance values ​​for the half-bridge and full-bridge modules, respectively. n H_xj and n F_xj These represent the candidate values ​​for the number of half-bridge and full-bridge modules to be deployed, respectively.

4. The method according to claim 3, characterized in that, The formula for calculating the cost function is: ， in, U Cref This is the reference value for capacitor voltage. U CH_xj ( k +1) U CF_xj ( k +1) represents the average capacitor voltage of the half-bridge and full-bridge modules, respectively. k The predicted value at time +1, K It is an additional item.

5. The method according to claim 4, characterized in that, Capacitor voltage reference value U Cref It is equal to the average value of the capacitor voltage of all modules inside the bridge arm during the power frequency cycle, or it can be set according to the system operation requirements.

6. The method according to claim 4, characterized in that, Additional items K The principle for determining the value is as follows: ， in, E Set to positive real numbers, E ≥ U cref ; N th It is a positive integer, representing the maximum number of modules that can vary within adjacent control cycles, and is designed according to system operation requirements; n H_xj ( k -1) and n F_xj ( k -1) respectively represent k -1 is the actual number of half-bridge and full-bridge modules put into operation.

7. The method according to claim 1, characterized in that, Optimal number of half-bridge and full-bridge modules deployed n H_xj and n F_xj The method for determining the optimal combination is as follows: calculate the cost function values ​​corresponding to all candidate combinations of half-bridge and full-bridge module inputs, find the candidate combination corresponding to the smallest cost function value, and thus determine the optimal combination. n H_xj and n F_xj .

8. The method according to claim 1, characterized in that, The capacitor voltage sequencing control method for half-bridge and full-bridge modules is as follows: (1) Capacitor voltage sequencing control of half-bridge module: If the product of the reference wave and the arm current of the half-bridge module is greater than or equal to zero, then the half-bridge module is activated. n H_xj The half-bridge module with the lowest capacitor voltage; otherwise, put in the... n H_xj The half-bridge module with the highest capacitor voltage; (2) Capacitor voltage sequencing control of the full-bridge module: If the product of the reference wave and the arm current of the full-bridge module is greater than or equal to zero, then the capacitor voltage sequencing control is activated. n F_xj The full-bridge module with the lowest capacitor voltage; otherwise, put in the... n F_xj For the full-bridge module with the highest capacitor voltage, a modulation level greater than zero indicates positive input, while a modulation level less than zero indicates negative input.

9. An electronic system comprising a memory, a processor, and program instructions stored in the memory and executable by the processor, characterized in that, The processor executes the program instructions to implement the steps of the control method according to any one of claims 1-8.

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