Signal processing method, apparatus, device, medium, and product

Abstract

The application provides a signal processing method, device, equipment, medium and product, and belongs to the technical field of signal processing. Data flow of a digital baseband signal is separated into a first signal and a second signal, then a first modulation signal and a second modulation signal are respectively generated by combining a first digital carrier and a second digital carrier which are strictly orthogonal through a multiplier in a digital domain, signal synthesis operation is performed by a digital adder to output a first complex signal, and finally the synthesized single data flow is sent into a single digital-to-analog converter to be converted into a first analog signal. In this process, the link which is prone to defects in the orthogonal modulation process is all transferred to the digital domain which is composed of absolute accurate 0 and 1. Since there is no physical direct current bias in the digital domain, and the digital multiplication operation eliminates the parasitic capacitance crosstalk under the high-frequency electromagnetic field, the local oscillator leakage generated when operating with the carrier is directly avoided in the data bottom logic, and the radio frequency signal distortion is avoided.

Description

Technical Field

[0001] This invention relates to the field of signal processing technology, and more particularly to a signal processing method, apparatus, device, medium, and product. Background Technology

[0002] For signal acquisition and playback equipment, when performing signal playback, it converts the digital baseband signal into two signals, namely in-phase signal and quadrature signal, and sends the in-phase signal and quadrature signal to the upconversion module. The upconversion module performs quadrature modulation and upconversion processing on the in-phase signal and quadrature signal to finally obtain the radio frequency signal.

[0003] In the above signal processing, quadrature modulation will cause local oscillator leakage, resulting in distortion of the output radio frequency signal. Summary of the Invention

[0004] This invention provides a signal processing method, apparatus, device, medium, and product to solve the problem of radio frequency signal distortion caused by local oscillator leakage in the prior art, and avoids local oscillator leakage during carrier operation, thereby preventing radio frequency signal distortion.

[0005] This invention provides a signal processing method, comprising the following steps.

[0006] In response to a signal playback command, the digital baseband signal is processed by signal separation to obtain a first signal and a second signal. The first signal is an in-phase signal and the second signal is a quadrature signal. A first modulation signal is determined based on the first signal and the first digital carrier, and a second modulation signal is determined based on the second signal and the second digital carrier, wherein the first digital carrier and the second digital carrier are orthogonal digital carriers; The first modulation signal and the second modulation signal are input to an adder to synthesize the signals and obtain the first complex signal. The first complex signal is input to a digital-to-analog converter for signal conversion to obtain a first analog signal; The control upconversion module performs secondary frequency conversion and filtering on the first analog signal to obtain the frequency conversion and filtering result, and sends the radio frequency signal corresponding to the frequency conversion and filtering result to the actual test environment based on the directional antenna.

[0007] According to a signal processing method provided by the present invention, the step of inputting the first modulation signal and the second modulation signal into an adder for signal synthesis to obtain a first complex signal includes: The first modulation signal and the second modulation signal are input to the amplitude and phase calibration module for amplitude and phase calibration to obtain the first calibration signal corresponding to the first modulation signal and the second calibration signal corresponding to the second modulation signal. The first calibration signal and the second calibration signal are input to an adder for signal synthesis to obtain a first complex signal.

[0008] According to a signal processing method provided by the present invention, the step of inputting the first complex signal to a digital-to-analog converter for signal conversion to obtain a first analog signal includes: The first complex signal is input to the amplitude adjustment module for amplitude adjustment to obtain the amplitude adjustment result; The amplitude adjustment result is input to a digital-to-analog converter for signal conversion to obtain a first analog signal.

[0009] According to a signal processing method provided by the present invention, the step of inputting the first complex signal to an amplitude adjustment module for amplitude adjustment to obtain an amplitude adjustment result includes: The first complex signal is input to the first digital filter for filtering to obtain the filtering result. The filtering result is input to the amplitude adjustment module for amplitude adjustment to obtain the amplitude adjustment result.

[0010] According to a signal processing method provided by the present invention, the first digital carrier is a cosine function corresponding to the instantaneous phase angle determined based on the frequency of the first complex signal, and the second digital carrier is a sine function corresponding to the instantaneous phase angle determined based on the frequency of the first complex signal.

[0011] According to a signal processing method provided by the present invention, before performing signal separation processing on a digital baseband signal in response to a signal playback command to obtain a first signal and a second signal, the method further includes: In response to a signal acquisition command, the second analog signal output by the downconversion module is acquired. The second analog signal is an analog signal obtained by downconverting the acquired radio frequency signal. The second analog signal is input to an analog-to-digital converter for sampling to obtain the second complex signal; The second complex signal is digitally down-converted to obtain the first signal and the second signal. The first signal and the second signal are stored in a storage array to form the digital baseband signal.

[0012] The present invention also provides a signal processing apparatus, comprising the following modules: The response module is used to respond to the signal playback command, perform signal separation processing on the digital baseband signal to obtain a first signal and a second signal. The first signal is an in-phase signal and the second signal is a quadrature signal. A modulation module is used to determine a first modulation signal based on the first signal and a first digital carrier, and to determine a second modulation signal based on the second signal and a second digital carrier, wherein the first digital carrier and the second digital carrier are orthogonal digital carriers; A synthesis module is used to input the first modulation signal and the second modulation signal into an adder to synthesize the signal and obtain a first complex signal; The conversion module is used to input the first complex signal to the digital-to-analog converter for signal conversion to obtain the first analog signal; The processing module is used to control the upconversion module to perform secondary frequency conversion and filtering on the first analog signal to obtain the frequency conversion and filtering result, and to send the radio frequency signal corresponding to the frequency conversion and filtering result to the actual test environment based on the directional antenna.

[0013] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the signal processing method described above.

[0014] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the signal processing method as described above.

[0015] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the signal processing method as described above.

[0016] This invention provides a signal processing method, apparatus, device, medium, and product that, in the initial response to instructions during the data processing flow, separates the digital baseband signal data stream into a first signal and a second signal. Then, a digital multiplier combines strictly orthogonal first and second digital carriers to generate first and second modulated signals, respectively. A digital adder then performs signal synthesis operations to output a first complex signal. Finally, the synthesized single-channel data stream is sent to a single digital-to-analog converter to be converted into a first analog signal. This data pre-combining and digital modulation processing architecture transfers all the defect-prone steps in the orthogonal modulation process to the digital domain, which consists of absolutely precise 0s and 1s. In this design, the digital domain has no physical DC bias, and the digital multiplication operation eliminates parasitic capacitance crosstalk under high-frequency electromagnetic fields. This directly avoids local oscillator leakage during carrier operations at the underlying data logic level, thus preventing RF signal distortion. This processing flow, which first synthesizes complex signals at the digital end and then performs digital-to-analog conversion, requires only a single-channel digital-to-analog converter in terms of physical hardware. This not only reduces the hardware cost of the RF link but also avoids the hardware mismatch problem that inevitably occurs when two digital-to-analog converters are connected in parallel. Ultimately, this ensures that the device can stably send high-quality RF signals with extremely low local oscillator leakage and no image frequency interference to the test environment. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0018] Figure 1 This is one of the flowcharts of the signal processing method provided by the present invention.

[0019] Figure 2 This is a schematic diagram of the process provided by the present invention, in which a first modulation signal and a second modulation signal are input to an adder for signal synthesis to obtain a first complex signal.

[0020] Figure 3 This is a schematic diagram of the process provided by the present invention, in which a first complex signal is input to a digital-to-analog converter for signal conversion to obtain a first analog signal.

[0021] Figure 4 This is a schematic diagram of the process provided by the present invention, in which a first complex signal is input to an amplitude adjustment module for amplitude adjustment to obtain an amplitude adjustment result.

[0022] Figure 5 This is the second flowchart of the signal processing method provided by the present invention.

[0023] Figure 6 This is a schematic block diagram of the signal acquisition and playback device provided by the present invention.

[0024] Figure 7 This is a schematic block diagram of the signal processing device provided by the present invention.

[0025] Figure 8 This is a schematic diagram of the structure of the electronic device provided by the present invention.

[0026] Figure label: 601: Downconversion module; 602: Baseband processing module; 603: Upconversion module; 701: Response module; 702: Modulation module; 703: Synthesis module; 704: Conversion module; 705: Processing module; 810: Processor; 820: Communication interface; 830: Memory; 840: Communication bus. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0028] The embodiments of the present invention provide a signal processing method. The execution subject of the method can be a signal processing device. The control device can be configured independently or integrated into an electronic device. For example, it can be implemented by hardware processing units with logic operation capabilities, such as field-programmable gate arrays, digital signal processors, and central processing units, and their supporting circuits.

[0029] The following is combined with Figures 1 to 8 The present invention describes signal processing methods, apparatus, devices, media, and products.

[0030] Figure 1 This is one of the flowcharts illustrating the signal processing method provided by the present invention, such as... Figure 1 As shown, the method includes the following: Step 101: In response to the signal playback command, perform signal separation processing on the digital baseband signal to obtain a first signal and a second signal. The first signal is an in-phase signal and the second signal is a quadrature signal.

[0031] In some embodiments, the signal playback command can be a control command triggered by the tester through the host computer interface, or it can be a trigger level automatically generated by the system according to a preset automated test script.

[0032] Upon receiving the instruction, the control device acquires the digital baseband signal to be transmitted. This digital baseband signal typically refers to a pure digital sequence (i.e., discrete data composed of binary values) containing only raw information data and not carrying a high-frequency carrier. Next, the control device performs signal separation processing on the digital baseband signal according to predetermined data parsing rules. Specific extraction or separation methods can include splitting by data bits, parsing by frame structure, or channel separation using a digital demultiplexer. This precisely divides the original digital code stream into two parallel independent data streams: the first signal (in-phase signal, commonly called the I-channel signal) and the second signal (quadrature signal, commonly called the Q-channel signal). Because this separation process is entirely completed in the digital domain through logic gates and registers, processing precise discrete values, it fundamentally eliminates the DC offset phenomenon caused by imperfections in physical components such as capacitors and resistors in traditional analog links.

[0033] Step 102: Determine the first modulation signal based on the first signal and the first digital carrier, and determine the second modulation signal based on the second signal and the second digital carrier, wherein the first digital carrier and the second digital carrier are orthogonal digital carriers.

[0034] In the digital domain, the first and second digital carriers refer to discrete sine and cosine wave sequences precisely generated by a digital frequency synthesis algorithm. To ensure the effect of quadrature modulation, they maintain an absolutely precise 90-degree phase difference (i.e., strict orthogonality) in their mathematical characteristics. The control device sends the separated first signal (in-phase signal) and the first digital carrier to a digital multiplier for multiplication. The result of this digital multiplication is determined as the first modulated signal. Similarly, the second signal (quadrature signal) and the second digital carrier are multiplied in another digital multiplier, and the result is the second modulated signal. This method of moving the modulation process forward to the digital domain utilizes the absolute precision of the digital algorithm to generate carriers and complete multiplication, completely avoiding the physical parasitic coupling problem caused by the close proximity of the RF port and local oscillator port inside a traditional analog mixer.

[0035] Step 103: Input the first modulation signal and the second modulation signal into the adder to synthesize the signal and obtain the first complex signal.

[0036] Specifically, the control device synchronously inputs the first and second modulation signals output from the digital multiplier into the digital adder for addition. In the digital adder, the two digital signals are accumulated point-by-point according to the clock cycle, thereby achieving signal merging and synthesis, outputting a first complex signal containing complete modulation information. In this synthesis step, since all multiplication operations performed on the I and Q signals before entering the adder are based on the same digital bit width and mathematical logic, their signal transmission gains in the digital domain are absolutely consistent, with no channel amplitude mismatch. Therefore, in this purely mathematical merging space, unwanted mirror frequencies are almost perfectly canceled out based on the trigonometric function cancellation principle.

[0037] Step 104: Input the first complex signal into the digital-to-analog converter for signal conversion to obtain the first analog signal.

[0038] After the digital domain synthesis is completed, the control device needs to send the discrete first complex signal to the digital-to-analog converter (DAC) via the data bus. The DAC then converts the input discrete binary numerical stream into a continuously changing voltage or current waveform in real time according to the corresponding reference voltage step, thus obtaining the first analog signal (usually a low-IF analog signal). Because the I and Q channels' data have already been synthesized into a composite digital stream by the adder in the digital space in the previous steps, only a single physical digital-to-analog conversion link is needed here to complete the conversion. This directly breaks the hardware limitation of traditional analog quadrature architectures, which must rely on dual-channel DACs to process the I and Q channels separately.

[0039] Step 105: Control the upconversion module to perform secondary frequency conversion and filtering on the first analog signal to obtain the frequency conversion and filtering result, and send the radio frequency signal corresponding to the frequency conversion and filtering result to the actual test environment based on the directional antenna.

[0040] To meet the requirements for radio radiation in specific high-frequency bands, the control device drives subsequent analog up-conversion modules (such as RF mixers, voltage-controlled oscillators, and other analog front-end circuits) to perform a second frequency shift on the first analog signal, boosting it to the target transmission frequency band (i.e., secondary frequency conversion). A bandpass filter is then used to remove out-of-band noise such as harmonics and spurious signals generated during the frequency conversion process, resulting in a clean frequency conversion and filtering result. Finally, a power amplifier drives a directional antenna to convert the frequency conversion and filtering result into spatial electromagnetic waves, which are then directionally radiated into the actual test environment, completing the entire high-fidelity signal playback process.

[0041] In this process, by responding to instructions in the initial stage of the data processing flow, the digital baseband signal data stream is separated into a first signal and a second signal. Then, a multiplier in the digital domain combines the strictly orthogonal first and second digital carriers to generate the first and second modulation signals, respectively. A digital adder then performs signal synthesis operations to output the first complex signal. Finally, the synthesized single data stream is sent to a single digital-to-analog converter to be converted into the first analog signal. This data pre-combining and digital modulation processing architecture transfers all the steps that are prone to defects in the orthogonal modulation process to the digital domain, which consists of absolutely precise 0s and 1s. In this design, the digital domain has no physical DC bias, and the digital multiplication operation eliminates parasitic capacitance crosstalk under high-frequency electromagnetic fields. This directly avoids local oscillator leakage during carrier operations at the underlying data logic level. This processing flow, which first synthesizes complex signals at the digital end and then performs digital-to-analog conversion, means that only a single digital-to-analog converter is needed in terms of physical hardware. This not only reduces the hardware cost of the RF link but also avoids the hardware mismatch problem that is inevitably caused by connecting two digital-to-analog converters in parallel. Ultimately, this ensures that the device can stably send high-quality RF signals with extremely low local oscillator leakage and no image frequency interference to the test environment.

[0042] In some embodiments, such as Figure 2 As shown, the first modulation signal and the second modulation signal are input to an adder for signal synthesis to obtain a first complex signal, including: Step 201: Input the first modulation signal and the second modulation signal into the amplitude and phase calibration module to perform amplitude and phase calibration, and obtain the first calibration signal corresponding to the first modulation signal and the second calibration signal corresponding to the second modulation signal.

[0043] In practical signal processing scenarios, although moving quadrature modulation to the digital domain has fundamentally eliminated most of the channel amplitude and quadrature phase errors caused by the physical asymmetry of analog circuits, in order to pre-compensate for the minor non-ideal characteristics that may be introduced by subsequent analog links (such as analog upconversion modules, filters, amplifiers, etc.) due to factors such as ambient temperature drift and device aging, the control device will call the internally configured amplitude and phase calibration module to perform fine mathematical adjustments on the two modulation signals before signal synthesis.

[0044] Specifically, the amplitude and phase calibration module is essentially a digital signal processing unit constructed from digital multipliers, adders, and phase-shifting logic. The specific amplitude and phase calibration process involves the control device acquiring the data streams of the first and second modulation signals. First, it multiplies these two signals by a preset amplitude gain calibration coefficient using digital multipliers, adjusting the magnitude of their discrete values ​​to ensure absolute energy balance between the two signals before they enter the synthesis stage. Simultaneously, it fine-tunes and compensates the phase values ​​of the two data sequences using digital phase-shifting algorithms or complex number operations, ensuring they maintain a more rigorous mathematical orthogonality. After the aforementioned digital compensation operations on amplitude and phase, the original first modulation signal is converted into a first calibration signal with higher data precision, while the second modulation signal is converted into a second calibration signal with the same high precision.

[0045] Step 202: Input the first calibration signal and the second calibration signal into the adder to synthesize the signals and obtain the first complex signal.

[0046] After receiving the two finely tuned calibration signals, the control device synchronously inputs the first and second calibration signals into the adder. Inside the adder, these two discrete digital sequences are mathematically added point-by-point according to a unified clock beat, completing the merging of the digital signals. Since the two input signals have already undergone dual amplitude and phase calibration in the previous stage, their amplitudes are absolutely consistent and their phases are absolutely orthogonal. Therefore, during the mathematical merging in the adder, unwanted image frequency components satisfy the perfect trigonometric function cancellation condition. Finally, the adder outputs a first complex signal with extremely high orthogonality and anti-interference capability.

[0047] In this embodiment, before the two signals enter the adder for synthesis, a data processing step is introduced whereby the first and second modulation signals are input to an amplitude and phase calibration module for amplitude and phase calibration, generating the first and second calibration signals. This feature serves to provide fine-grained compensation and fallback adjustment of the amplitude and phase values ​​of the two data streams across channels at the pure digital calculation level. This data pre-compensation, combined with the subsequent accumulation and synthesis feature of the adder, ensures that the two digital sequences participating in the final addition operation achieve near-perfect absolute balance and strict orthogonality at the data source. Through this digital fine-tuning data processing, not only are all potential small numerical calculation errors further eliminated, but also the unavoidable non-ideal characteristics of the subsequent analog link are preemptively canceled at the data level. This optimizes the mathematical cancellation conditions of the image frequency at the underlying logic of data processing, achieving deep suppression of image frequency residue, and ultimately ensuring that the generated first complex signal has extremely high signal fidelity.

[0048] In some embodiments, such as Figure 3As shown, the first complex signal is input to a digital-to-analog converter for signal conversion to obtain a first analog signal, including: Step 301: Input the first complex signal into the amplitude adjustment module to adjust the amplitude and obtain the amplitude adjustment result.

[0049] In this step, the amplitude adjustment module can be a digital gain control unit built inside a field-programmable gate array or digital signal processor via a hardware multiplier or shift register.

[0050] Specifically, when the control device receives the first complex signal synthesized by the adder, it does not immediately send it to the subsequent hardware, but first sends it to the amplitude adjustment module. The amplitude adjustment module performs digital amplitude adjustment on the discrete digital sequence of the first complex signal, that is, by multiplying or shifting each value in the digital sequence with a preset digital gain coefficient, it amplifies or reduces the overall amplitude of the signal. For example, since the first complex signal is synthesized by adding two signals, the peak value of the synthesized discrete value has a high probability of exceeding the maximum bit width allowed by the input interface of the subsequent digital-to-analog converter. In this case, the amplitude adjustment module will obtain a scaling factor less than 1 and multiply each value in the data stream by this scaling factor for digital attenuation; conversely, if the signal amplitude is detected to be too small, it will be multiplied by a factor greater than 1 for digital amplification. The discrete data stream after the above multiplication or shift logic operation is determined as the required amplitude adjustment result.

[0051] Step 302: Input the amplitude adjustment result into the digital-to-analog converter for signal conversion to obtain the first analog signal.

[0052] After receiving the data stream with its numerical range optimized, the control device precisely transmits the amplitude adjustment result to the digital-to-analog converter (DAC) via a digital interface bus. The DAC then receives a scaled, non-overflowing discrete binary code stream. Following its own sampling rate and reference voltage step, the DAC smoothly converts this discrete numerical stream into a first analog signal that is both time-continuous and has a continuous voltage amplitude. Because the input data has already undergone dynamic range amplitude matching in the digital domain, this conversion process ensures that the DAC always operates within its optimal linear conversion range.

[0053] In this embodiment, the amplitude adjustment module performs scaling data processing operations on the digital sequence of the complex signal by multiplying or shifting with the gain coefficient, outputting an amplitude adjustment result that matches the target quantization range. This adjusted data stream is then sent to the digital-to-analog converter (DAC). This digital pre-scaling data processing mechanism cleverly uses digital calculations to match the digital bit width after the addition of the front-end complex signals with the physical quantization range of the back-end DAC. This avoids truncation and overflow distortion caused by excessive amplitude due to digital addition at the data link boundary, while also preventing the degradation of the quantization signal-to-noise ratio due to excessively small amplitude. Through precise coordination between the digital amplitude data and the analog quantization range, the dynamic range of the digital-to-analog conversion process is maximized, further ensuring the waveform integrity of the first analog signal and significantly improving the linearity and fidelity of the playback signal.

[0054] In some embodiments, such as Figure 4 As shown, the first complex signal is input to the amplitude adjustment module for amplitude adjustment, and the amplitude adjustment result is obtained, including: Step 401: Input the first complex signal into the first digital filter for filtering to obtain the filtering result.

[0055] In some embodiments, the first digital filter refers to a logic operation unit configured in the digital domain for frequency selection characteristics of a discrete data stream. Specifically, it may be a digital filter such as a finite-length unit impulse response filter, an infinite-length unit impulse response filter, or a half-band filter.

[0056] Specifically, after the current stage adder outputs the synthesized first complex signal, the control device guides the data stream of this first complex signal and inputs it into the first digital filter. The first digital filter performs filtering processing on the input first complex signal. This filtering processing is essentially a data convolution operation in the digital domain, that is, using pre-designed digital filter tap coefficients to perform sliding multiplication and addition operations with the data points of the input first complex signal, thereby filtering out out-of-band quantization noise or unwanted high-frequency digital spurious components that may have been generated during the previous digital modulation and signal synthesis calculations. The clean discrete data sequence output after the above convolution operation is determined as the filtering result.

[0057] For example, in one specific embodiment, the control device uses a finite-length unit impulse response digital filter with low-pass characteristics as the first digital filter, inputs the synthesized first complex signal into it, and removes out-of-band high-frequency digital spurious signals by convolving the signal data points with the low-pass filter coefficients, thus obtaining a smooth and pure filtering result.

[0058] Step 402: Input the filtering result into the amplitude adjustment module for amplitude adjustment to obtain the amplitude adjustment result.

[0059] After acquiring the clean data through digital filtering, the control device inputs the filtering result to the amplitude adjustment module. This amplitude adjustment module is typically a digital logic circuit composed of digital multipliers or shift registers, used to uniformly scale the numerical value of the digital signal. Specifically, amplitude adjustment refers to the control device multiplying each discrete data value in the filtering result by a preset digital gain factor in the digital domain, or by logically shifting the data bits left or right, to amplify or reduce the overall numerical envelope of the signal. Since the filtered data often changes its overall energy due to the removal of some frequency components, it is necessary to re-match the digital amplitude here to generate the amplitude adjustment result. This operation ensures that the final discrete digital value output to the digital-to-analog converter falls precisely within the optimal quantization input voltage range of the digital-to-analog converter.

[0060] In this embodiment, a first digital filter is introduced to filter the first complex signal. Through convolution operations in the digital domain, out-of-band quantization noise and high-frequency digital spurious signals in the synthesized signal data stream are filtered out in advance. The resulting clean filtering result is then input to the amplitude adjustment module, where amplitude adjustment is performed by multiplying it by a digital gain factor. This data processing mechanism, which filters out spurious data before performing overall numerical scaling, effectively prevents invalid noise data from being amplified during amplitude adjustment, thus avoiding it from occupying the effective dynamic range of the digital-to-analog converter. It ensures that only clean, useful signal data is scaled to the full-scale input range of the digital-to-analog converter, maximizing the signal-to-noise ratio in the subsequent digital-to-analog conversion process and preventing digital overflow and truncation distortion caused by sudden noise peaks in the data link, further improving the accuracy of the final generated RF signal.

[0061] In some embodiments, the first digital carrier is a cosine function corresponding to the instantaneous phase angle determined based on the frequency of the first complex signal, and the second digital carrier is a sine function corresponding to the instantaneous phase angle determined based on the frequency of the first complex signal.

[0062] In some embodiments, the function formula for the first digital carrier is cosY, and the function formula for the second digital carrier is sinY, where Y is expressed as: Y = 2πf t; Where π is the mathematical constant pi, f is the frequency of the first complex signal, and t is time.

[0063] To accurately shift the separated digital baseband signal to a specific frequency point, digital multiplication using the local oscillator carrier signal is required. In the control device, this is typically accomplished through an internally configured digitally controlled oscillator or a direct digital frequency synthesis algorithm. Specifically, the system pre-sets a target frequency f, which is the frequency of the first complex signal. This target frequency f is the center carrier frequency that the final synthesized output first complex signal should possess. Simultaneously, the control device relies on a high-precision sampling clock within the system to measure time t, ensuring that time t is represented in the digital data stream as a series of uniformly discrete time sampling moments that increase with the clock tick.

[0064] In actual data processing, the control device first uses internal mathematical operation units such as multipliers and accumulators to calculate the phase value at the current sampling time in real time according to the formula Y = 2πft. That is, the constant π, the set target frequency f, and the discrete sampling time point t are mathematically multiplied to obtain the instantaneous phase angle Y at the current time (i.e., the phase accumulation result).

[0065] Subsequently, the control device uses the instantaneous phase angle Y as an index value or input variable, inputting it into an internal lookup table or a computation module based on a coordinate rotation digital computer algorithm. Through purely mathematical analytical calculation, it accurately outputs the cosine function data sequence and sine function data sequence corresponding to this phase. The calculated cosine function data sequence (cosY) is established as the first digital carrier, and the system sends it to a digital multiplier for mixing and multiplication with the first signal (in-phase signal). Simultaneously, the calculated sine function data sequence (sinY) is established as the second digital carrier, and sent to another digital multiplier for mixing and multiplication with the second signal (quadrature signal).

[0066] For example, if the actual test scenario requires the playback device to generate a first complex signal with a center frequency of 10MHz, the control device sets the value of f to 10MHz. With each digital clock tick (t), the calculation unit continuously accumulates and generates the corresponding instantaneous phase angle Y, and in real time looks up and outputs two strictly orthogonal discrete waveform values, cosY and sinY, as the absolutely ideal digital local oscillator signal provided to the modulation module. Since the sine function (sin) and cosine function (cos) have a natural and absolutely precise 90-degree phase difference in their fundamental mathematical definitions, this ensures from the outset that the first and second digital carriers always remain absolutely orthogonal.

[0067] In this embodiment, the carrier data mechanism, generated through pure mathematical operations, ensures that the two digital carriers participating in the modulation of the first and second signals are mathematically absolutely orthogonal at a 90-degree phase. This data processing step completely overcomes the phase mismatch caused by physical defects in traditional analog RF architectures, such as manufacturing tolerances of analog phase shifters, ambient temperature drift, and operating frequency variations. By utilizing this absolutely perfect digital quadrature carrier, combined with the amplitude- and phase-error-free characteristics of digital multiplication and addition units, the first complex signal synthesized from the I and Q signals can cancel out useless image frequencies in the spectral domain through extremely precise trigonometric function relationships, achieving image frequency cancellation without any residue. This greatly improves the image rejection capability and overall spectral purity of the playback signal.

[0068] In some embodiments, such as Figure 5 As shown, before performing signal separation processing on the digital baseband signal in response to the signal playback command to obtain the first signal and the second signal, the process further includes: Step 501: In response to the signal acquisition command, acquire the second analog signal output by the downconversion module. The second analog signal is the analog signal obtained by downconverting the acquired radio frequency signal.

[0069] Specifically, during the acquisition phase, the control device first receives a signal acquisition command. This command can be a trigger signal sent by an external control terminal when the test starts, or it can be an acquisition task automatically woken up by the device based on a preset timestamp. In response to this command, the control device controls the antenna to receive high-frequency radio frequency signals from the external space and acquires the second analog signal output by the front-end analog down-conversion module. This acquisition is typically achieved through hardware traces or an internal analog bus to receive level signals. The down-conversion module usually contains low-noise amplifiers and analog mixers, which perform preliminary frequency shifting on the high-frequency radio frequency signal captured by the antenna, reducing its frequency to a suitable intermediate frequency (IF) or low-IF band. The acquired second analog signal is still physically a continuously changing analog voltage or current signal. Furthermore, to avoid the defects of traditional analog quadrature demodulation, a single-channel analog down-conversion link is used here, rather than a dual-channel analog demodulation link.

[0070] Step 502: Input the second analog signal into the analog-to-digital converter for sampling to obtain the second complex signal.

[0071] To enable subsequent signal processing to overcome the limitations of analog devices, the control unit transmits and inputs the aforementioned continuous second analog signal into the analog-to-digital converter (ADC). At this stage, the ADC acts as a bridge between the analog and digital domains. Following a set high-frequency sampling clock, it discretizes and quantizes the continuously changing second analog signal, converting it into a discrete digital sequence that can be recognized and processed by a computer or field-programmable gate array (FPGA). This discrete data stream, composed of purely binary values, is thus identified as the second complex signal. Because this step involves direct sampling of a single intermediate frequency (IF) analog signal, only a single ADC is needed in terms of physical hardware, completely avoiding the hardware bottlenecks such as inconsistent channel gain and phase mismatch that arise from using dual ADCs at the acquisition end.

[0072] Step 503: Perform digital down-conversion processing on the second complex signal to obtain the first signal and the second signal.

[0073] After obtaining the discrete second complex signal, the control device performs digital down-conversion processing within the digital domain. Specifically, the extraction and processing method is as follows: the control device uses a digital frequency synthesizer to generate a pair of absolutely precise and strictly orthogonal (90-degree phase difference) digital local oscillator carriers in the digital domain. Then, a digital multiplier multiplies the second complex signal with each of these two digital local oscillator carriers, followed by filtering and downsampling through a digital low-pass filter. Through this series of purely mathematical operations, the originally single data stream is precisely demultiplexed and separated, resulting in in-phase and quadrature data streams in the baseband frequency band, namely the aforementioned first and second signals. Because this digital down-conversion process is performed entirely within the digital algorithm space, the digital multiplier is free from physical parasitic capacitance crosstalk, and the digitally generated carriers possess absolute symmetry and orthogonality. Therefore, it completely eliminates the underlying hardware imperfections in traditional analog acquisition architectures, such as image frequency interference and local oscillator leakage caused by inaccurate phase shifters or device asymmetry.

[0074] Step 504: Store the first signal and the second signal in the storage array to form a digital baseband signal.

[0075] After digital down-conversion and separation of the signals, the control device sequentially writes the generated first and second signals into and stores them in the device's storage array via a high-speed data bus. The storage array can range from large to small and can be a hard disk array, solid-state drive, random access memory, or internal static random access memory (SRAM) or other data buffer media. These two discrete data streams stored in the array together constitute a complete and high-fidelity digital baseband signal. This zero-error digital bitstream, securely frozen in the storage medium, will serve as the clean data source for subsequent signal playback, awaiting retrieval when the system responds to a signal playback command.

[0076] In this embodiment, a second analog signal is acquired by controlling a single-channel down-conversion module at the initial stage of signal acquisition. Then, a single analog-to-digital converter (ADC) quantizes and samples this continuous signal, converting it into a discrete second complex signal. Subsequently, precise multiplication and filtering are performed in the digital logic domain to perform digital down-conversion processing, separating the first and second signals. Finally, these two lossless digital streams are stored in a storage array to construct a digital baseband signal. This data processing architecture, which first performs high-speed sampling through a single ADC and then postpones the demodulation separation process to the digital domain, requires only a single-channel hardware on the analog end of the entire receiving link. This directly avoids the channel amplitude error and quadrature phase error caused by the mismatch between the two physical components in traditional analog demodulation architectures. Simultaneously, the digital down-conversion process is performed in a mathematical space composed of precise values, eliminating the physical conditions for parasitic coupling and DC bias at the data source. This ensures that the digital baseband signal written to the storage array is protected from local oscillator leakage and image frequency residue, providing the most fundamental data fidelity support for subsequent high-quality signal playback.

[0077] In some embodiments, such as Figure 6 As shown, the signal acquisition and playback device includes three modules: a downconversion module 601, a baseband processing module 602, and an upconversion module 603.

[0078] Specifically, the downconversion module 601 performs downconversion processing on the acquired radio frequency signal to obtain a second analog signal, and sends the second analog signal to the baseband processing module 602.

[0079] The baseband processing module 602 inputs the second analog signal to the analog-to-digital converter for sampling to obtain the second complex signal; performs digital down-conversion processing on the second complex signal to obtain the first signal and the second signal; and stores the first signal and the second signal in a storage array to form a digital baseband signal.

[0080] Specifically, the digital downconversion process uses cosX and sinX to multiply with the second complex signal to obtain the first signal DATA_I and the second signal DATA_Q. CosX and sinX are generated by a combination chip DDS_DDC, which is a direct digital synthesizer (DDS) and a digital downconverter (DDC).

[0081] In response to a signal playback command, the baseband processing module 602 performs signal separation processing on the digital baseband signal to obtain a first signal and a second signal. The first signal is an in-phase signal, and the second signal is a quadrature signal. Based on the first signal and the first digital carrier, a first modulation signal is determined, and based on the second signal and the second digital carrier, a second modulation signal is determined. The first digital carrier and the second digital carrier are quadrature digital carriers. The first modulation signal and the second modulation signal are input to an adder for signal synthesis to obtain a first complex signal. The first complex signal is input to a digital-to-analog converter for signal conversion to obtain a first analog signal, and the first analog signal is sent to the up-conversion module 603.

[0082] Specifically, the first signal DATA_I and the second signal DATA_Q are multiplied by the first digital carrier cosY and the second digital carrier sinY, respectively, and then input to the amplitude and phase calibration module to obtain the first modulation signal and the second calibration signal. The first modulation signal and the second calibration signal are added to obtain the first complex signal, and then passed through the first digital filter, the amplitude adjustment module and the digital-to-analog converter to obtain the first analog signal.

[0083] The first digital carrier cosY and the second digital carrier sinY are generated by a combination chip DDS_DUC, which combines a direct digital synthesizer (DDS) and a digital upconverter (DUC).

[0084] The upconversion module 603 performs secondary frequency conversion and filtering on the first analog signal to obtain the frequency conversion and filtering result, and sends the corresponding radio frequency signal of the frequency conversion and filtering result to the actual test environment based on the directional antenna.

[0085] The signal processing apparatus provided by the present invention will be described below. The signal processing apparatus described below can be referred to in correspondence with the signal processing method described above.

[0086] In some embodiments, such as Figure 7 As shown, the present invention provides a signal processing apparatus, comprising the following modules: The response module 701 is used to respond to the signal playback command, perform signal separation processing on the digital baseband signal to obtain a first signal and a second signal. The first signal is an in-phase signal and the second signal is a quadrature signal. The modulation module 702 is used to determine a first modulation signal based on a first signal and a first digital carrier, and to determine a second modulation signal based on a second signal and a second digital carrier, wherein the first digital carrier and the second digital carrier are orthogonal digital carriers; The synthesis module 703 is used to input the first modulation signal and the second modulation signal to the adder to synthesize the signal and obtain the first complex signal. Conversion module 704 is used to input the first complex signal to the digital-to-analog converter for signal conversion to obtain the first analog signal; The processing module 705 is used to control the upconversion module to perform secondary frequency conversion and filtering on the first analog signal to obtain the frequency conversion and filtering result, and to send the radio frequency signal corresponding to the frequency conversion and filtering result to the actual test environment based on the directional antenna.

[0087] Figure 8 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 8 As shown, the electronic device may include: a processor 810, a communication interface 820, a memory 830, and a communication bus 840, wherein the processor 810, the communication interface 820, and the memory 830 communicate with each other through the communication bus 840. The processor 810 can call logic instructions in the memory 830 to execute a signal processing method, which includes: in response to a signal playback instruction, performing signal separation processing on a digital baseband signal to obtain a first signal and a second signal, wherein the first signal is an in-phase signal and the second signal is a quadrature signal; determining a first modulation signal based on the first signal and a first digital carrier, and determining a second modulation signal based on the second signal and a second digital carrier, wherein the first digital carrier and the second digital carrier are quadrature digital carriers; inputting the first modulation signal and the second modulation signal to an adder for signal synthesis to obtain a first complex signal; inputting the first complex signal to a digital-to-analog converter for signal conversion to obtain a first analog signal; controlling an up-conversion module to perform secondary frequency conversion and filtering on the first analog signal to obtain a frequency conversion and filtering result; and transmitting the radio frequency signal corresponding to the frequency conversion and filtering result to an actual test environment based on a directional antenna.

[0088] Furthermore, the logical instructions in the aforementioned memory 830 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0089] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the signal processing methods provided by the above methods. The method includes: in response to a signal playback instruction, performing signal separation processing on a digital baseband signal to obtain a first signal and a second signal, wherein the first signal is an in-phase signal and the second signal is a quadrature signal; determining a first modulation signal based on the first signal and a first digital carrier, and determining a second modulation signal based on the second signal and a second digital carrier, wherein the first digital carrier and the second digital carrier are quadrature digital carriers; inputting the first modulation signal and the second modulation signal to an adder for signal synthesis to obtain a first complex signal; inputting the first complex signal to a digital-to-analog converter for signal conversion to obtain a first analog signal; controlling an up-conversion module to perform secondary frequency conversion and filtering on the first analog signal to obtain a frequency conversion and filtering result; and transmitting the radio frequency signal corresponding to the frequency conversion and filtering result to an actual test environment based on a directional antenna.

[0090] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the signal processing method provided by the above methods. The method includes: in response to a signal playback instruction, performing signal separation processing on a digital baseband signal to obtain a first signal and a second signal, wherein the first signal is an in-phase signal and the second signal is a quadrature signal; determining a first modulation signal based on the first signal and a first digital carrier, and determining a second modulation signal based on the second signal and a second digital carrier, wherein the first digital carrier and the second digital carrier are quadrature digital carriers; inputting the first modulation signal and the second modulation signal to an adder for signal synthesis to obtain a first complex signal; inputting the first complex signal to a digital-to-analog converter for signal conversion to obtain a first analog signal; controlling an up-conversion module to perform secondary frequency conversion and filtering on the first analog signal to obtain a frequency conversion and filtering result; and transmitting the radio frequency signal corresponding to the frequency conversion and filtering result to an actual test environment based on a directional antenna.

[0091] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0092] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods of various embodiments or some parts of embodiments.

[0093] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A signal processing method, characterized in that, include: In the baseband processing module, in response to the signal playback command, the digital baseband signal is processed by signal separation to obtain a first signal and a second signal. The first signal is an in-phase signal and the second signal is a quadrature signal. In the baseband processing module, a first modulation signal is determined based on the first signal and the first digital carrier, and a second modulation signal is determined based on the second signal and the second digital carrier, wherein the first digital carrier and the second digital carrier are orthogonal digital carriers; In the baseband processing module, the first modulation signal and the second modulation signal are input to an adder for signal synthesis to obtain a first complex signal; In the baseband processing module, the first complex signal is input to a single digital-to-analog converter for signal conversion to obtain a first analog signal; In the upconversion module, the upconversion module is controlled to perform secondary frequency conversion and filtering on the first analog signal to obtain the frequency conversion and filtering result, and to send the radio frequency signal corresponding to the frequency conversion and filtering result to the actual test environment based on the directional antenna; The step of inputting the first modulation signal and the second modulation signal into an adder for signal synthesis to obtain a first complex signal includes: The first modulation signal and the second modulation signal are input to the amplitude and phase calibration module for amplitude and phase calibration to obtain the first calibration signal corresponding to the first modulation signal and the second calibration signal corresponding to the second modulation signal. Specifically, a preset amplitude gain calibration coefficient is multiplied by a digital multiplier on the first modulation signal and the second modulation signal respectively, and the phase values ​​of the two data sequences are fine-tuned and compensated by a digital phase-shifting algorithm or complex number operations to pre-compensate for the non-ideal characteristics introduced by the subsequent up-conversion module. The first calibration signal and the second calibration signal are input to an adder for signal synthesis to obtain a first complex signal.

2. The signal processing method according to claim 1, characterized in that, The step of inputting the first complex signal to a digital-to-analog converter for signal conversion to obtain a first analog signal includes: The first complex signal is input to the amplitude adjustment module for amplitude adjustment to obtain the amplitude adjustment result; The amplitude adjustment result is input to a digital-to-analog converter for signal conversion to obtain a first analog signal.

3. The signal processing method according to claim 2, characterized in that, The step of inputting the first complex signal to the amplitude adjustment module for amplitude adjustment to obtain the amplitude adjustment result includes: The first complex signal is input to the first digital filter for filtering to obtain the filtering result. The filtering result is input to the amplitude adjustment module for amplitude adjustment to obtain the amplitude adjustment result.

4. The signal processing method according to any one of claims 1 to 3, characterized in that, The first digital carrier is a cosine function corresponding to the instantaneous phase angle determined based on the frequency of the first complex signal, and the second digital carrier is a sine function corresponding to the instantaneous phase angle determined based on the frequency of the first complex signal.

5. The signal processing method according to any one of claims 1 to 3, characterized in that, Before performing signal separation processing on the digital baseband signal in response to the signal playback command to obtain the first signal and the second signal, the process also includes: In response to a signal acquisition command, the second analog signal output by the downconversion module is acquired. The second analog signal is an analog signal obtained by downconverting the acquired radio frequency signal. The second analog signal is input to an analog-to-digital converter for sampling to obtain the second complex signal; The second complex signal is digitally down-converted to obtain the first signal and the second signal. The first signal and the second signal are stored in a storage array to form the digital baseband signal.

6. A signal processing apparatus, characterized in that, include: The response module is used in the baseband processing module to perform signal separation processing on the digital baseband signal in response to the signal playback command, to obtain a first signal and a second signal, wherein the first signal is an in-phase signal and the second signal is a quadrature signal; A modulation module is configured to determine a first modulation signal based on the first signal and a first digital carrier, and to determine a second modulation signal based on the second signal and a second digital carrier, wherein the first digital carrier and the second digital carrier are orthogonal digital carriers; A synthesis module is used in the baseband processing module to input the first modulation signal and the second modulation signal to an adder for signal synthesis to obtain a first complex signal; The conversion module is used in the baseband processing module to input the first complex signal to a single digital-to-analog converter for signal conversion to obtain a first analog signal; The processing module is used to control the upconversion module to perform secondary frequency conversion and filtering on the first analog signal to obtain the frequency conversion and filtering result, and to send the radio frequency signal corresponding to the frequency conversion and filtering result to the actual test environment based on the directional antenna; The step of inputting the first modulation signal and the second modulation signal into an adder for signal synthesis to obtain a first complex signal includes: The first modulation signal and the second modulation signal are input to the amplitude and phase calibration module for amplitude and phase calibration to obtain the first calibration signal corresponding to the first modulation signal and the second calibration signal corresponding to the second modulation signal. Specifically, a preset amplitude gain calibration coefficient is multiplied by a digital multiplier on the first modulation signal and the second modulation signal respectively, and the phase values ​​of the two data sequences are fine-tuned and compensated by a digital phase-shifting algorithm or complex number operations to pre-compensate for the non-ideal characteristics introduced by the subsequent up-conversion module. The first calibration signal and the second calibration signal are input to an adder for signal synthesis to obtain a first complex signal.

7. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the signal processing method as described in any one of claims 1 to 5.

8. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the signal processing method as described in any one of claims 1 to 5.

9. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the signal processing method as described in any one of claims 1 to 5.

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