Method for manufacturing a glass substrate

Abstract

The application provides a preparation method of a glass substrate, comprising the following steps: preparing a glass core layer, which is divided into multiple substrate units by a cutting path; forming a stacked multilayer redistribution layer unit on the substrate units, and when each layer of the redistribution layer unit is formed, the redistribution layer units on adjacent substrate units are all or partially cut off; wherein the redistribution layer unit comprises an insulating layer unit and a conductive circuit layer unit arranged on the insulating layer unit; and cutting the remaining area between the glass core layer and the redistribution layer unit along the cutting path to form independent glass substrates. The preparation method can avoid glass substrate fragmentation, reduce the fragmentation rate of the glass substrate, and improve the cutting yield of the glass substrate.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit packaging, and more particularly to a method for preparing a glass substrate. Background Technology

[0002] As a new type of substrate, glass substrates are gradually replacing resin substrates due to their excellent thermal stability, fast signal transmission speed, low loss, and high strength, and are very likely to become the mainstream substrate material in the future.

[0003] like Figure 1 The diagram shows a conventional glass substrate, which includes a glass core layer 100 and a resin layer 200 covering the upper and lower surfaces of the glass core layer 100. The resin layer 200, such as an ABF layer (Ajinomoto Build-up Film), is a key functional insulating layer in glass substrate encapsulation. Through-holes are formed in the resin layer 200 using laser drilling, followed by chemical copper plating and electroplating to fill the holes, thus constructing a vertical interconnect structure. The vertical interconnect structure located on the upper surface of the glass core layer 100 and the vertical interconnect structure located on the lower surface of the glass chip are electrically connected through through-glass vias (TGVs) 101 that penetrate the glass core layer 100.

[0004] In the field of glass substrate processing, the mainstream technologies for cutting large-size substrates (panels) into single chips can be divided into the following two categories: The first approach: composite tool cutting process. First, a metal tool is used to cut the resin layer 200 on the upper and lower surfaces of the glass core layer 100; then, a resin tool is used to cut the glass core layer 100. This technical solution has the following drawbacks: Figure 2 The diagram shows a conventional method of cutting the resin layer 200 on the upper and lower surfaces of the glass core layer 100 with a metal blade. The resin layer 200 is formed by multiple layers of sub-layers 201 through repeated pressing and baking. Residual stress accumulates within it. When the resin layer 200 is cut with a metal blade, this stress is released instantaneously, causing microcracks at the interface between the resin layer 200 and the glass core layer 100, resulting in delamination. Furthermore, due to the mismatch in thermal expansion coefficients between the resin layer 200 and the glass core layer 100, the delamination area extends to the edge of the through-glass via (TGV) under the cutting stress. Figure 3The diagram illustrates the result of cutting the glass core layer 100 using a resin cutter. Due to the delamination between the resin layer 200 and the glass core layer 100, the cutting pressure is concentrated in the glass via area during the cutting process. This delamination weakens the glass's mechanical strength, causing cracks to propagate along the via walls into the glass core layer 100, forming a radial crack network and ultimately rendering the glass substrate unusable. Furthermore, in this cutting process, the glass substrate fragmentation rate increases significantly with the increase in the number of resin layer 200 stacks. The second approach: laser-mechanical composite cutting process. First, the resin layer 200 is ablated using a laser, then the glass core layer 100 is cut using a resin blade. This technical solution has the following drawbacks: Figure 4 As shown, this is a schematic diagram of the existing laser ablation of resin layer 200. During laser ablation of resin layer 200, the pulse energy density easily induces resin carbonization, forming a stepped microporous structure. The size of the stepped microporous structure is larger than the size of the resin ablation blade. Figure 5 The diagram shows a conventional method of cutting the glass core layer 100 using a resin cutter. The glass core layer 100 is cut using a resin cutter at the stepped microporous structure 202. Because the size of the stepped microporous structure 202 is larger than the size of the resin cutter, some glass will be exposed at the glass edge after cutting the glass core layer 100. To avoid damage to the edge of the glass core layer 100, the exposed area needs to be protected with a protective adhesive, such as... Figure 6 The diagram shows an existing method using protective adhesive 300 to protect the edge of the glass core layer 100. The Young's modulus of the protective adhesive 300 does not match the Young's modulus of the glass, resulting in the glass core layer 100 still cracking at high temperatures.

[0005] Therefore, how to prepare glass substrates that meet the requirements, reduce the breakage rate of glass substrates, and improve the cutting yield of glass substrates have become urgent technical problems to be solved. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to provide a method for preparing a glass substrate, which can avoid glass substrate breakage, reduce the glass substrate fragmentation rate, and improve the glass substrate cutting yield.

[0007] To address the aforementioned problems, the present invention provides a method for preparing a glass substrate, comprising the following steps: fabricating a glass core layer, wherein the glass core layer is divided into multiple substrate units by dicing channels; forming stacked multilayer redistribution layer units on the substrate units, wherein, when forming each redistribution layer unit, the redistribution layer units on adjacent substrate units are completely or partially cut off, wherein the redistribution layer unit includes an insulating layer unit and a conductive line layer unit disposed on the insulating layer unit; and cutting the remaining area between the glass core layer and the redistribution layer units along the dicing channels to form an independent glass substrate.

[0008] In one specific embodiment, the method for fabricating the glass core layer further includes the following steps: providing a glass plate; forming a glass through-hole penetrating the glass plate, an upper conductive layer located on the upper surface of the glass plate, and a lower conductive layer located on the lower surface of the glass plate, wherein the upper conductive layer is electrically connected to the lower conductive layer through the glass through-hole; and in the step of forming a stacked multilayer redistribution layer unit on the substrate unit, the redistribution layer unit is formed on the upper conductive layer and / or the lower conductive layer.

[0009] In one specific embodiment, the step of forming a glass through-hole, an upper conductive layer on the upper surface of the glass plate, and a lower conductive layer on the lower surface of the glass plate further includes: forming a through-hole; forming a metal layer in the through-hole, on the upper surface and the lower surface of the glass plate; patterning the metal layer on the upper surface and the lower surface of the glass plate to form the upper conductive layer and the lower conductive layer, wherein the metal layer in the through-hole serves as the glass through-hole, and the glass through-hole is electrically connected to the upper conductive layer and the lower conductive layer.

[0010] In one specific embodiment, the step of forming a through-hole through the glass plate further includes: modifying the area of ​​the glass plate where the through-hole needs to be formed; etching the modified area to form the through-hole.

[0011] In one specific embodiment, the step of modifying the area of ​​the glass plate where the via needs to be formed further includes: using laser modification on the area of ​​the glass plate where the via needs to be formed.

[0012] In one specific embodiment, the step of etching the modified area further includes immersing the modified glass plate in an etching solution to etch the modified area.

[0013] In one specific embodiment, the step of forming a metal layer in the via, on the upper and lower surfaces of the glass plate, further includes: forming a seed layer in the via, on the upper and lower surfaces of the glass plate; performing an electroplating process to form the metal layer on the seed layer; and simultaneously patterning the seed layer in the step of patterning the metal layer on the upper and lower surfaces of the glass plate.

[0014] In one specific embodiment, the step of performing an electroplating process to form the metal layer on the seed layer further includes performing a baking process after electroplating.

[0015] In one specific embodiment, prior to the step of forming a seed layer in the via, on the upper and lower surfaces of the glass plate, the method further includes: performing interface optimization treatment on the upper and lower surfaces of the glass plate.

[0016] In one specific embodiment, the step of patterning the metal layers on the upper and lower surfaces of the glass plate further includes: forming a patterned mask layer on the surface of the metal layer, the mask layer having an opening that exposes the area of ​​the metal layer to be removed; removing the metal layer along the opening, the remaining metal layer serving as the upper conductive layer and the lower conductive layer; and removing the mask layer.

[0017] In one specific embodiment, the step of patterning the metal layer on the upper and lower surfaces of the glass plate further includes: thinning the metal layer.

[0018] In one specific embodiment, after the step of patterning the metal layers on the upper and lower surfaces of the glass plate, the method further includes: forming an upper dielectric layer on the upper surface of the glass plate, forming a lower dielectric layer on the lower surface of the glass plate, wherein the upper dielectric layer fills the gaps in the upper conductive layer, and the lower dielectric layer fills the gaps in the lower conductive layer.

[0019] In one specific embodiment, the step of forming an upper dielectric layer on the upper surface of the glass plate and a lower dielectric layer on the lower surface of the glass plate further includes: forming a dielectric material layer, the dielectric material layer covering the upper surface of the glass plate and the upper conductive layer, the lower surface of the glass plate and the lower conductive layer; thinning the dielectric material layer, using the upper conductive layer and the lower conductive layer as stop layers, to form the upper dielectric layer and the lower dielectric layer.

[0020] In one specific embodiment, the step of forming a glass through-hole, an upper conductive layer on the upper surface of the glass plate, and a lower conductive layer on the lower surface of the glass plate further includes: forming a through-hole; forming a seed layer in the through-hole, on the upper surface and the lower surface of the glass plate; patterning the seed layer, retaining the areas where the upper and lower conductive layers need to be formed, and the seed layer in the through-hole; performing an electroplating process to form the glass through-hole, the upper conductive layer, and the lower conductive layer on the seed layer, wherein the glass through-hole is electrically connected to the upper conductive layer and the lower conductive layer.

[0021] In one specific embodiment, the step of forming each of the redistribution layer units further includes: forming an insulating layer unit on the substrate unit, wherein adjacent insulating layer units are completely or partially cut off; and forming a conductive line layer unit on the insulating layer unit, wherein adjacent conductive line layer units are completely or partially cut off.

[0022] In one specific embodiment, the step of forming an insulating layer unit on the substrate unit further includes: providing a whole insulating material layer; dividing the insulating material layer into a plurality of insulating layer units along a cutting trajectory, wherein adjacent insulating layer units are completely or partially cut off, and the cutting trajectory is the same as the cutting path trajectory; and pressing the insulating layer units onto the substrate unit.

[0023] In one specific embodiment, the step of forming an insulating layer unit on the substrate unit further includes: providing a whole insulating material layer; pressing the insulating material layer onto the glass core layer; dividing the insulating material layer into a plurality of insulating layer units along a cutting trajectory, wherein adjacent insulating layer units are completely or partially cut off, and the cutting trajectory is the same as the cutting path trajectory.

[0024] In one specific embodiment, a method for dividing the insulating material layer into a plurality of insulating layer units along a cutting trajectory, such that adjacent insulating layer units are completely cut off, includes: dividing the insulating material layer along the cutting trajectory until the insulating material layer is completely broken.

[0025] In one specific embodiment, a method for dividing the insulating material layer into a plurality of insulating layer units along a cutting trajectory, such that there is a partially cut area between adjacent insulating layer units, includes: cutting the insulating material layer along the cutting trajectory to a preset depth, so that the insulating material layer is partially broken.

[0026] In one specific embodiment, a method for dividing the insulating material layer into a plurality of insulating layer units along a cutting trajectory, such that there is a partially cut area between adjacent insulating layer units, includes: intermittently cutting the insulating material layer along the cutting trajectory to partially break the insulating material layer in the direction of extension of the cutting trajectory.

[0027] In one specific embodiment, in the step of intermittently cutting the insulating material layer along the cutting trajectory, the depth to which the insulating material layer is cut is the full thickness of the insulating material layer.

[0028] In one specific embodiment, in the step of intermittently cutting the insulating material layer along the cutting trajectory, the depth to which the insulating material layer is cut is a portion of the thickness of the insulating material layer.

[0029] In one specific embodiment, when the insulating layer unit is pressed onto the substrate unit, the pressing method is hot pressing; when the insulating material layer is pressed onto the glass core layer, the pressing method is hot pressing.

[0030] In one specific embodiment, the step of forming a conductive line layer unit on the insulating layer unit further includes: forming a conductive material layer on the insulating layer unit; patterning the conductive material layer to form a conductive line; dividing the conductive line into a plurality of conductive line layer units along a cutting trajectory, wherein adjacent conductive line layer units are completely or partially cut off, and the cutting trajectory is the same as the trajectory of the cutting path.

[0031] In one specific embodiment, before the step of forming a conductive material layer on the insulating layer unit, the method further includes: forming a via on the insulating layer unit; in the step of forming a conductive material layer on the insulating layer unit, the conductive material layer is also deposited in the via.

[0032] In one specific embodiment, before the step of forming a conductive material layer on the insulating layer unit, the method further includes: forming a seed layer on the insulating layer unit; the step of forming a conductive material layer on the insulating layer unit further includes: performing an electroplating process to form the conductive material layer on the seed layer; the step of dividing the conductive line into a plurality of conductive line layer units along a cutting trajectory further includes: removing the seed layer in the region corresponding to the cutting path along the cutting trajectory.

[0033] In one specific embodiment, a method for dividing the conductive line into multiple conductive line layer units along a cutting trajectory, such that adjacent conductive line layer units are completely cut off, includes: dividing the conductive line along the cutting trajectory until the conductive line is completely disconnected.

[0034] In one specific embodiment, a method for dividing the conductive line into multiple conductive line layer units along a cutting trajectory, such that adjacent conductive line layer units are partially cut off, includes: cutting the conductive line along the cutting trajectory to a preset depth to partially disconnect the conductive line.

[0035] In one specific embodiment, a method for dividing the conductive line into a plurality of conductive line layer units along a cutting trajectory, such that there is a partially cut-off region between adjacent conductive line layer units, includes: the cutting trajectory intermittently cutting the conductive line so that the conductive line is partially disconnected in the direction of extension of the cutting trajectory.

[0036] In one specific embodiment, the conductive line is cut to the full thickness of the conductive line.

[0037] In one specific embodiment, the conductive line is cut to a depth equal to a portion of the thickness of the conductive line.

[0038] In one specific embodiment, the step of forming a stacked multilayer redistribution layer unit on the substrate unit of the glass core layer further includes: forming a stacked multilayer redistribution layer unit on both the upper and lower surfaces of the substrate unit of the glass core layer.

[0039] In one specific embodiment, the step of forming a stacked multilayer redistribution layer unit on the substrate unit of the glass core layer further includes: the multilayer redistribution layer units formed on the upper and lower surfaces of the same substrate unit are arranged symmetrically with the plane of the substrate unit as the plane.

[0040] In one specific embodiment, the step of cutting the glass core layer along the cutting path further includes: cutting the glass core layer using mechanical cutting or laser cutting processes.

[0041] In one specific embodiment, in the step of using a mechanical cutting process to cut the remaining area between the glass core layer and the redistribution layer unit, the cutting blade is a resin blade.

[0042] In one specific embodiment, in the step of forming a stacked multilayer redistribution layer unit on the substrate unit, the insulating layer unit is an organic resin film layer unit.

[0043] In the glass substrate preparation method provided by the specific embodiments of the present invention, when forming each redistribution layer unit, the redistribution layer units on adjacent substrate units are completely or partially cut off. These completely or partially cut off areas correspond to the cutting paths of the glass core layer. Finally, after forming stacked multi-layer redistribution layer units, all redistribution layers above the cutting paths are cut off, or partially cut off. In the cutting step, only the glass core layer is cut, or only the glass core layer and a portion of the redistribution layers are cut. This method avoids the cracking of the glass core layer caused by stress release from simultaneously cutting multiple complete redistribution layers, as is common in existing composite tool cutting processes. It also avoids the need for protective adhesive due to exposed glass edges in existing laser-mechanical composite cutting processes. The glass substrate preparation method provided by the specific embodiments of the present invention avoids the breakage of the glass core layer, thereby reducing the breakage rate of the glass substrate and improving the cutting yield of the glass substrate. Attached Figure Description

[0044] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0045] Figure 1 This is a schematic diagram of an existing glass substrate; Figure 2 This is a schematic diagram of the resin layer after the upper and lower surfaces of the glass core are cut using a metal blade. Figure 3 This is a schematic diagram of the glass core layer after it has been cut using a resin cutter. Figure 4 This is a schematic diagram of the existing resin layer after laser ablation; Figure 5 This is another schematic diagram of the glass core layer after it has been cut using a resin knife; Figure 6 This is a schematic diagram of an existing method of using protective adhesive to protect the edges of the glass core layer; Figure 7 This is a schematic diagram of the steps of a glass substrate preparation method provided in a specific embodiment of the present invention; Figure 8 This is a cross-sectional schematic diagram of the glass plate in the glass substrate preparation method provided by a specific embodiment of the present invention; Figure 9 This is a cross-sectional schematic diagram of the glass substrate after modification of the area where through holes need to be formed in the glass substrate preparation method provided in a specific embodiment of the present invention. Figure 10This is a cross-sectional schematic diagram of the glass substrate preparation method provided in a specific embodiment of the present invention after the formation of vias; Figure 11 This is a cross-sectional schematic diagram of the glass substrate preparation method provided in a specific embodiment of the present invention after the formation of the metal layer; Figure 12 This is a cross-sectional schematic diagram of the glass core layer in a glass substrate preparation method provided by a specific embodiment of the present invention; Figure 13 This is a top view schematic diagram of the glass core layer in the glass substrate preparation method provided by a specific embodiment of the present invention; Figure 14 This is a top view schematic diagram of the entire insulating material layer in the glass substrate preparation method provided by a specific embodiment of the present invention. Figure 15 This is a top view schematic diagram of the glass substrate preparation method provided by a specific embodiment of the present invention, in which the insulating material layer is divided into multiple insulating layer units; Figure 16 This is a cross-sectional schematic diagram of the glass substrate preparation method provided in a specific embodiment of the present invention after the bottom insulating layer unit is formed on the upper and lower surfaces of the substrate unit. Figure 17 This is a top view schematic diagram of the glass substrate preparation method provided in a specific embodiment of the present invention after the bottom insulating layer unit is formed on the upper and lower surfaces of the substrate unit; Figure 18 This is a cross-sectional schematic diagram of the glass substrate preparation method provided by a specific embodiment of the present invention after the bottommost conductive line layer unit is formed on the bottommost insulating layer unit. Figure 19 This is a top view schematic diagram of the glass substrate preparation method provided in a specific embodiment of the present invention after the bottom insulating layer unit is formed on the bottom conductive line layer unit. Figure 20 This is a cross-sectional schematic diagram of the glass substrate preparation method provided by a specific embodiment of the present invention after the second insulating layer unit is formed on the bottommost redistribution layer unit; Figure 21 This is a top view schematic diagram of the glass substrate preparation method provided by a specific embodiment of the present invention after the second insulating layer unit is formed on the bottommost redistribution layer unit; Figure 22 This is a cross-sectional schematic diagram of the glass substrate preparation method provided by a specific embodiment of the present invention after the second conductive line layer unit is formed on the second insulating layer unit. Figure 23 This is a top view schematic diagram of the glass substrate preparation method provided by a specific embodiment of the present invention after the second conductive line layer unit is formed on the second insulating layer unit. Figure 24 This is a cross-sectional schematic diagram of the glass substrate preparation method provided in a specific embodiment of the present invention after forming stacked multilayer redistribution layer units. Figure 25 This is a top view schematic diagram of the glass substrate preparation method provided in a specific embodiment of the present invention after forming stacked multilayer redistribution layer units. Figure 26 This is a cross-sectional schematic diagram of a glass substrate formed in a glass substrate preparation method provided in a specific embodiment of the present invention; Figure 27 This is a cross-sectional schematic diagram of the method for preparing a glass substrate according to another specific embodiment of the present invention, in which an insulating material layer is laminated onto the upper and lower surfaces of a glass core layer. Figure 28 This is a cross-sectional schematic diagram of the glass substrate preparation method provided in another specific embodiment of the present invention after the bottom insulating layer unit is formed on the upper and lower surfaces of the substrate unit. Figure 29 This is a cross-sectional schematic diagram of the glass substrate preparation method provided in another specific embodiment of the present invention after the bottom insulating layer unit is formed on the bottom conductive line layer unit; Figure 30 This is a cross-sectional schematic diagram of the glass substrate preparation method provided in another specific embodiment of the present invention after the second insulating layer unit is formed on the bottommost redistribution layer unit; Figure 31 This is a cross-sectional schematic diagram of the glass substrate preparation method provided in another specific embodiment of the present invention after the second conductive line layer unit is formed on the second insulating layer unit; Figure 32 This is a cross-sectional schematic diagram of the glass substrate preparation method provided in another specific embodiment of the present invention after forming stacked multilayer redistribution layer units. Figure 33 This is a cross-sectional schematic diagram of the glass substrate preparation method provided in another specific embodiment of the present invention after the bottom insulating layer unit is formed on the upper and lower surfaces of the substrate unit. Figure 34 This is a top view schematic diagram of the glass substrate preparation method provided in another specific embodiment of the present invention after the bottom insulating layer unit is formed on the upper and lower surfaces of the substrate unit; Figure 35 This is a cross-sectional schematic diagram of the glass substrate preparation method provided in another specific embodiment of the present invention after the bottom insulating layer unit is formed on the bottom conductive line layer unit. Figure 36This is a cross-sectional schematic diagram of the glass substrate preparation method provided in another specific embodiment of the present invention after the second insulating layer unit is formed on the bottommost redistribution layer unit; Figure 37 This is a cross-sectional schematic diagram of the glass substrate preparation method provided in another specific embodiment of the present invention after the second conductive line layer unit is formed on the second insulating layer unit.

[0046] Explanation of reference numerals in the attached figures: 100. Glass core layer; 101. Glass through-hole; 200. Resin layer; 201. Sublayer; 202. Stepped microporous structure; 300. Protective adhesive; 700, Glass core layer; 701, Cutting track; 702, Substrate unit; 703, Glass plate; 704, Glass via; 705, Upper conductive layer; 706, Lower conductive layer; 707, Via; 708, Modified area; 709, Metal layer; 710, Seed layer; 711, Upper dielectric layer; 712, Lower dielectric layer; 800, Redundancy layer unit; 801, Insulating layer unit; 802, Conductive circuit layer unit; 803, Cut channel; 810, Bottom redundancy layer unit; 811, Bottom insulating layer unit; 812, Bottom conductive circuit layer unit; 813, Conductive connection structure; 820, Second redundancy layer unit; 821, Second insulating layer unit; 822, Second conductive circuit layer unit; 830, Glass substrate; 900, Insulation material layer; 910, 911, 920, 921, Complete cut area; 930, 931, 940, 941, 950, Partial cut area; 951, 961, 971, 981, Hole; 952, Connecting block; 990, Cutting trajectory. Detailed Implementation

[0047] The specific embodiments of the glass substrate preparation method provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0048] Please see Figure 7 The preparation method includes the following steps: Step S70, fabricating a glass core layer, wherein the glass core layer is divided into multiple substrate units by a dicing channel; Step S71, forming stacked multilayer redistribution layer units on the substrate units, wherein when forming each layer of the redistribution layer unit, the redistribution layer units on adjacent substrate units are completely or partially cut off, wherein the redistribution layer unit includes an insulating layer unit and a conductive line layer unit disposed on the insulating layer unit; Step S72, cutting the glass core layer along the dicing channel to form an independent glass substrate.

[0049] Figures 8-26 This is a process flow diagram of a glass substrate preparation method provided in a specific embodiment of the present invention.

[0050] Please see Figure 7 , Figure 12 and Figure 13 In step S70, a glass core layer 700 is fabricated, which is divided into multiple substrate units 702 by a cutting channel 701. The scribe line 701 is a preset cutting path marker, not a structure that physically separates the glass core layer 700. It can be a scribing line or a shallow groove. Its core function is to form a guide line through a specific process, providing a precise cutting reference for the cutting equipment. The width of the scribe line 701 can be set according to the required width for subsequent cutting processes. In one specific embodiment, the width of the scribe line 701 is the same as, or within the tolerance range of, the width of the cutting blade used in the subsequent cutting process.

[0051] The dicing groove 701 divides the glass core layer 700 into multiple substrate units 702, with the dicing groove 701 separating adjacent substrate units 702. The substrate units 702 are arranged in an array parallel to the surface of the glass core layer 700, such as... Figure 13 As shown, the substrate units 702 are arranged in an array along the X and Y directions.

[0052] As an example, a specific embodiment of the present invention provides a method for fabricating the glass core layer 700. The method for fabricating the glass core layer 700 includes the following steps: Please see Figure 8 , providing glass plate 703. The glass plate 703 can be a plain glass substrate without surface coating or a glass substrate with a coating. In this specific embodiment, an uncoated plain glass plate is taken as an example. The glass plate 703 is a large-size glass plate, which can be cut into multiple units in a subsequent cutting process to form a single independent glass substrate. The glass plate 703 includes an upper surface and a lower surface that are disposed opposite to each other.

[0053] Please see Figure 12 and Figure 13A glass through-hole 704 penetrating the glass plate 703, an upper conductive layer 705 located on the upper surface of the glass plate 703, and a lower conductive layer 706 located on the lower surface of the glass plate 703 are formed on the glass plate 703. The upper conductive layer 705 is electrically connected to the lower conductive layer 706 through the glass through-hole 704. In some specific embodiments, a blind hole (not shown in the figures) is also formed in this step, which has a conductive structure to realize interconnection within the upper conductive layer 705 and the lower conductive layer 706.

[0054] The through-glass via (TGV) 704 is a vertical conductive structure penetrating the glass plate 703. Its upper end is connected to the upper conductive layer 705, and its lower end is connected to the lower conductive layer 706, thereby realizing the electrical connection between the upper conductive layer 705 and the lower conductive layer 706. The upper conductive layer 705 includes a plurality of upper conductive pads (not shown in the figures) formed on the upper surface of the glass plate 703. The upper conductive pads can be electrically connected to the redistribution layer units 800 subsequently formed on the upper conductive layer 705 to realize the interconnection between different redistribution layer units 800. The upper conductive pads can also be connected to the upper end of the through-glass via 704. The lower conductive layer 706 includes a plurality of lower conductive pads (not shown in the figures) formed on the lower surface of the glass plate 703. The lower conductive pads can be electrically connected to the redistribution layer units 800 subsequently formed on the lower conductive layer 706 to realize the interconnection between different redistribution layer units 800. The lower conductive pads can also be connected to the lower end of the glass through hole 704.

[0055] In one specific embodiment, the step of forming a glass through-hole 704 penetrating the glass plate 703, an upper conductive layer 705 located on the upper surface of the glass plate 703, and a lower conductive layer 706 located on the lower surface of the glass plate 703 further includes: Please see Figure 10 A via 707 is formed through the glass plate 703. The via 707 penetrates the glass plate 703, and multiple vias 707 are arranged in the glass plate 703 as required. In one specific embodiment, the via 707 can be formed in the glass plate 703 by laser etching, chemical etching, or a combination of both. In this step, blind holes (not shown in the figures) that do not penetrate the glass plate 703 can also be formed on the upper and lower surfaces of the glass plate 703 by laser etching, chemical etching, or a combination of both. The method for forming the blind holes is the same as the method for forming the via 707; the following description uses the formation of the via 707 as an example.

[0056] In some embodiments of this invention, the via 707 is formed using a combination of laser processing and chemical etching. Specifically, the step of forming the via 707 penetrating the glass plate 703 further includes: Please see Figure 9 The area of ​​the glass plate 703 where the via 707 needs to be formed is modified. In this specific embodiment, the area of ​​the glass plate 703 where the via 707 needs to be formed is laser-modified to form a modified area 708, which is shown as a dashed line in the figure. Laser irradiation changes the chemical activity and physical morphology of the laser-irradiated area through nonlinear absorption, thermal effects, and structural reorganization, thereby forming a selectively etched modified area. Please refer to... Figure 10 The modified region 708 is etched to form the via 707. The modified region 708 of the glass plate 703 has different chemical activity and physical morphology from the unmodified region. An etching solution with a high selectivity for both regions can be selected to etch the glass plate 703. The etching solution only etches the modified region 708 and not the unmodified region, thus forming a via 707 penetrating the glass plate 703 in the modified region 708. In this specific embodiment, the modified glass plate 703 is immersed in the etching solution to etch the modified region 708. Immersion treatment allows the etching solution to fully contact the glass plate 703, avoiding edge effects and effectively controlling etching uniformity.

[0057] In some embodiments, laser irradiation can be used to directly ablate the area of ​​the glass plate 703 where the via 707 needs to be formed, removing the glass in that area to form the via 707. In other embodiments, chemical etching can be used directly to form the via 707. Specifically, a patterned mask layer is formed on the upper surface of the glass plate 703, exposing the area of ​​the glass plate 703 where the via 707 needs to be formed; using the patterned mask layer as a shield, the glass plate 703 is etched to form the via 707.

[0058] After forming the via 707, the preparation method includes: Please refer to Figure 11 A metal layer 709 is formed in the via 707, on the upper and lower surfaces of the glass plate 703. Specifically, this step further includes: A seed layer 710 is formed in the via 707, on the upper and lower surfaces of the glass plate 703. The seed layer 710 covers the inner wall of the via 707, the upper and lower surfaces of the glass plate 703.

[0059] The methods for forming the seed layer 710 mainly include physical vapor deposition (PVD), chemical vapor deposition (CVD), and atomic layer deposition (ALD). The material of the seed layer 710 can be selected from copper-based alloys, titanium / titanium nitride, nickel / tungsten alloys, etc.

[0060] The seed layer 710 serves as the initial conductive layer for electroplating, providing a uniform current distribution and preventing dendritic crystal formation caused by excessively high local current density in the electroplating solution. Furthermore, through mechanical interlocking and chemical bonding, it firmly bonds the subsequently electroplated metal layer 709 to the glass plate 703. In some specific embodiments, the seed layer 710 can also prevent metal atoms from diffusing into the glass plate 703, avoiding the formation of a brittle metal-glass interface layer and improving the reliability of the glass substrate.

[0061] In one specific embodiment, before the step of forming the seed layer 710 on the upper and lower surfaces of the glass plate 703 in the via 707, the method further includes: performing interface optimization treatment on the upper and lower surfaces of the glass plate 703. For example, plasma cleaning is performed on the upper and lower surfaces of the glass plate 703 to remove hydroxyl groups on the glass surface and improve the affinity of the interface; chemical passivation is performed on the upper and lower surfaces of the glass plate 703 to improve the wettability of the interface, thereby facilitating the deposition of the seed layer 710.

[0062] Please see Figure 11 An electroplating process is performed to form the metal layer 709 on the seed layer 710. This step uses the seed layer 710 as the initial conductive layer for electroplating, thereby forming the metal layer 709 on the seed layer 710. The selection of the material for the metal layer 709 needs to comprehensively consider conductivity, corrosion resistance, mechanical strength, and process compatibility. In some specific embodiments, the material of the metal layer 709 may be copper, alloy materials, composite metal materials, etc.

[0063] In one specific embodiment, before performing the electroplating process, the seed layer 710 is first surface-cleaned, for example, by plasma cleaning, to improve the adhesion between the seed layer 710 and the metal layer 709. In another specific embodiment, the step of performing the electroplating process to form the metal layer 709 on the seed layer 710 further includes performing a baking process after electroplating. The advantages of the baking process are that it removes residual solvents and moisture; hydrogen evolution during electroplating can cause metal lattice distortion, and baking promotes the diffusion of hydrogen atoms to the surface to escape, eliminating the risk of hydrogen embrittlement; it promotes the interfacial diffusion reaction between the plating layer and the seed layer 710, forming a metallurgical bond and optimizing the adhesion between the metal layer 709 and the seed layer 710; and at high temperatures, the internal stress of the metal layer 709 is released, the porosity is reduced, and the density of the metal layer 709 is improved.

[0064] After forming a metal layer 709 on the upper and lower surfaces of the glass plate 703 in the via 707, the metal layer 709 on the upper and lower surfaces of the glass plate 703 is patterned to form the upper conductive layer 705 and the lower conductive layer 706. The metal layer 709 located in the via 707 serves as the glass through-hole 704. The glass through-hole 704 is electrically connected to the upper conductive layer 705 and the lower conductive layer 706. Please refer to [link to previous text]. Figure 12 and Figure 13 In one specific embodiment, during the step of patterning the metal layer 709 on the upper and lower surfaces of the glass plate 703, the seed layer 710 is patterned simultaneously, and the seed layer 710 overlaps with the metal layer 709 in a direction perpendicular to the upper and lower surfaces of the glass plate 703.

[0065] As an example, the step of patterning the metal layer 709 on the upper and lower surfaces of the glass plate 703 further includes: forming a patterned mask layer on the surface of the metal layer 709, the mask layer having an opening that exposes the area of ​​the metal layer 709 to be removed; removing the metal layer 709 along the opening, the remaining metal layer 709 serving as the upper conductive layer 705 and the lower conductive layer 706; and removing the mask layer.

[0066] Specifically, the steps of patterning the metal layer 709 on the upper and lower surfaces of the glass plate 703 include: firstly, spin-coating or sputtering photoresist on the surface of the metal layer 709 to form a mask layer; the mask layer forms openings through exposure and development to expose the wiring areas of the metal layer 709 that need to be removed; then, selectively removing the metal layer 709 along the openings using dry etching or wet etching, and the remaining metal layer 709 forms the upper conductive layer 705 and the lower conductive layer 706; finally, thoroughly removing the residual mask layer by acetone immersion or plasma cleaning.

[0067] In one specific embodiment, before the step of patterning the metal layer 709 on the upper and lower surfaces of the glass plate 703, the method further includes: thinning the metal layer 709. This step thins the metal layer 709 to a preset thickness before patterning, so that the thicknesses of the formed upper conductive layer 705 and lower conductive layer 706 meet preset requirements. Methods for thinning the metal layer 709 include processes such as mechanical polishing and chemical mechanical polishing.

[0068] In one specific embodiment, after the step of patterning the metal layer 709 on the upper and lower surfaces of the glass plate 703, the method further includes: forming an upper dielectric layer 711 on the upper surface of the glass plate 703 and forming a lower dielectric layer 712 on the lower surface of the glass plate 703. The upper dielectric layer 711 fills the gaps in the upper conductive layer 705, and the lower dielectric layer 712 fills the gaps in the lower conductive layer 705. (See also...) Figure 12 and Figure 13 The materials of the upper dielectric layer 711 and the lower dielectric layer 712 can be selected from silicon oxide, silicon nitride, silicon oxynitride, high dielectric constant materials, organic materials, etc. The methods for forming the upper dielectric layer 711 and the lower dielectric layer 712 include physical vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD), etc.

[0069] In one specific embodiment, the step of forming an upper dielectric layer 711 on the upper surface of the glass plate 703 and a lower dielectric layer 712 on the lower surface of the glass plate 703 further includes: forming a dielectric material layer, the dielectric material layer covering the upper surface of the glass plate 703 and the upper conductive layer, the lower surface of the glass plate 703 and the lower conductive layer; thinning the dielectric material layer, using the upper conductive layer and the lower conductive layer as stop layers, to form the upper dielectric layer 711 and the lower dielectric layer 712.

[0070] In one specific embodiment, after forming a metal layer 709 on a seed layer 710, the metal layer 709 and the seed layer 710 are simultaneously patterned to form the upper conductive layer 705 and the lower conductive layer 706.

[0071] In another specific embodiment, after the seed layer 710 is formed, the seed layer 710 is first patterned to form the required conductive area, and then a metal layer 709 is formed on the patterned seed layer 710. The formed metal layer 709 does not need to be patterned again and directly forms the upper conductive layer 705 and the lower conductive layer 706. Specifically, the step of forming a glass through-hole 704 penetrating the glass plate 703, an upper conductive layer 705 located on the upper surface of the glass plate 703, and a lower conductive layer 706 located on the lower surface of the glass plate 703 further includes: forming a via 707 penetrating the glass plate 703; forming a seed layer 710 in the via 707, on the upper surface and the lower surface of the glass plate 703; patterning the seed layer 710, retaining the areas where the upper conductive layer 705 and the lower conductive layer 706 need to be formed, and the seed layer 710 in the via 707; performing an electroplating process to form the glass through-hole 704, the upper conductive layer 705, and the lower conductive layer 706 on the seed layer 710, wherein the glass through-hole 704 is electrically connected to the upper conductive layer 705 and the lower conductive layer 706.

[0072] The above specific embodiments illustrate a method for forming a glass through-hole 704 penetrating the glass plate 703, an upper conductive layer 705 located on the upper surface of the glass plate 703, and a lower conductive layer 706 located on the lower surface of the glass plate 703. In another specific embodiment, after forming the through-hole 707, a metal layer can be deposited, and then the glass through-hole 704, the upper conductive layer 705, and the lower conductive layer 706 can be directly formed by laser ablation. In another specific embodiment, after forming the through-hole 707, the glass through-hole 704, the upper conductive layer 705, and the lower conductive layer 706 can be directly formed by printing. In yet another specific embodiment, after forming the glass through-hole 704, the upper conductive layer 705 and the lower conductive layer 706 can be formed by bonding and debonding processes.

[0073] Please see Figure 7 In step S71, multiple stacked redistribution layer units 800 are formed on the substrate unit 702. When forming each redistribution layer unit 800, adjacent redistribution layer units 800 on the substrate unit 702 are completely or partially cut off. Each redistribution layer unit 800 includes an insulating layer unit 801 and conductive line layer units 802 disposed on the insulating layer unit 801. (See also...) Figure 24 and Figure 25 .

[0074] This step, in the process of preparing the stacked redistribution layer unit 800, adopts a layer-by-layer construction process, specifically including: a first-layer formation step: forming the bottommost redistribution layer unit on the surface of the substrate unit 702, wherein there is a complete or partial cut-off area between adjacent bottommost redistribution layer units, and this area is directly opposite to the cut-off track 701; an interlayer stacking step: sequentially stacking the second to Nth layers of redistribution layer units on the bottommost redistribution layer unit, wherein there is a complete or partial cut-off area between the redistribution layer units on adjacent substrate units in each layer, and the complete or partial cut-off areas between the redistribution layer units of adjacent layers are directly opposite; so that after the final stacked multi-layer redistribution layer unit 800 is formed, all redistribution layers above the cut-off track 701 are cut off, or all are partially cut off.

[0075] The glass substrate fabrication method provided in the specific embodiments of the present invention, through the above-described interlayer stacking process, ensures that after forming a stacked multilayer redistribution layer unit, all redistribution layers above the dicing track are cut off, or partially cut off. When all redistribution layers above the dicing track are cut off, the dicing track 701 is fully exposed. When all redistribution layers above the dicing track are partially cut off, the thickness of all redistribution layers above the dicing track 701 is reduced, or the connection strength of all redistribution layers is reduced. In contrast, in conventional processes, after forming a stacked multilayer redistribution layer unit, all redistribution layers above the dicing track 701 of the glass core layer 700 maintain their original thickness and connection strength.

[0076] In some specific embodiments, the step of forming a stacked multilayer redistribution layer unit 800 on the substrate unit 702 of the glass core layer 700 further includes: forming a stacked multilayer redistribution layer unit 800 on both the upper and lower surfaces of the substrate unit 702 of the glass core layer 700, wherein the redistribution layer unit 800 is formed on the upper conductive layer 705 and / or the lower conductive layer 706. Specifically, in one specific embodiment, as... Figure 24 As shown, the redistribution layer unit 800 is formed on the upper conductive layer 705 and the lower conductive layer 706; in another specific embodiment, the redistribution layer unit 800 is formed only on the upper conductive layer 705; in yet another specific embodiment, the redistribution layer unit 800 is formed only on the upper and lower conductive layers 706; the position of the redistribution unit can be set according to the requirements of the final glass substrate.

[0077] In one specific embodiment, the multiple redistribution layer units 800 formed on the upper and lower surfaces of the same substrate unit 702 are symmetrically arranged with the plane where the substrate unit 702 is located as the symmetrical plane. The exposed area of ​​the cleavage path between two adjacent redistribution layer units 800 extends along the cutting direction of the cleavage path 701 on both sides of the symmetrical plane and is symmetrically arranged with the plane where the substrate unit 702 is located as the symmetrical plane. This ensures that when cutting along the cutting direction in subsequent cutting steps, the redistribution layer units 800 that have been misaligned will not be cut, further improving the glass substrate cutting yield.

[0078] The redistribution layer unit 800 serves as an intermediate dielectric structure for interconnecting the glass core layer 700 with external chips. Each redistribution layer unit 800 includes an insulating layer unit 801 and a conductive line layer unit 802 disposed on the insulating layer unit 801. The insulating layer unit 801 acts as a dielectric isolation, forming an insulating barrier to effectively suppress signal crosstalk and alleviate the thermal expansion coefficient mismatch between the glass core layer 700 and the metal lines. The conductive line layer unit 802 provides conductive lines to achieve electrical interconnection between the glass core layer 700 and external chips. In one specific embodiment, the insulating layer unit 801 is an organic resin film layer unit, including but not limited to polyimide and electronic-grade resin-based film materials (such as ABF layers). The conductive line layer unit is made of copper, alloy materials, composite metal materials, etc.

[0079] A specific embodiment of the present invention provides a method for forming each of the redistribution layer units 800. Specifically, the step of forming each of the redistribution layer units 800 further includes: forming an insulating layer unit 801 on the substrate unit 702, wherein adjacent insulating layer units 801 are completely or partially cut off; forming a conductive line layer unit 802 on the insulating layer unit 801, wherein adjacent conductive line layer units 802 are completely or partially cut off. In each of the redistribution layer units 800, the redistribution layer above the cut path 701 of the glass core layer 700 is cut off, or is partially cut off.

[0080] As an example, a specific embodiment of the present invention provides a method for forming multiple layers of the redistribution layer unit 800. When forming each layer of the redistribution layer unit, the redistribution layer units on adjacent substrate units are completely cut off. The width of the completely cut off region is less than or equal to the width of the cut track 701. In this specific embodiment, the width of the completely cut off region being equal to the width of the cut track 701 is taken as an example. The method for forming multiple layers of the redistribution layer unit 800 includes: The bottom redistribution layer unit 810 (marked as) is formed on the upper and lower surfaces of the substrate unit 702. Figure 18 In this specific embodiment, the area between the bottommost redistribution layer units 810 on adjacent substrate units 702 is a completely cut-off region. This step includes: Please see Figure 16 and Figure 17A bottom insulating layer unit 811 is formed on the upper and lower surfaces of the substrate unit 702, and the entire cut area 910 between adjacent bottom insulating layer units 811 exposes the cut path 701. In this step, the bottom insulating layer unit 811 does not cover the surface of the glass core layer 700 in a large size, but rather in a small size, thus exposing the cut path 701.

[0081] As an example, in one specific embodiment, the entire insulating material layer is first divided into multiple bottom insulating layer units 811, and then the bottom insulating layer units 811 are pressed onto the upper and lower surfaces of the substrate unit 702. Specifically, the step of forming the bottom insulating layer units 811 on the substrate unit 702 further includes: Please see Figure 14 A single insulating material layer 900 is provided. The dimensions of the insulating material layer 900 may be the same as those of the glass plate 703. The insulating material layer 900 is an organic resin material layer.

[0082] Please see Figure 15 The insulating material layer 900 is divided into multiple bottom insulating layer units 811 along a cutting trajectory 990. Adjacent bottom insulating layer units 811 are completely cut off within a cut area 910. The cutting trajectory 990 is the same as the trajectory of the cutting path 701. In this step, the insulating material layer 900 is divided along the cutting trajectory 990 until the insulating material layer 900 is completely severed in the cutting direction.

[0083] In this step, before pressing the insulating material layer 900 onto the glass core layer 700, the insulating material layer 900 is divided along the cutting trajectory 990 according to the required size of the bottom insulating layer unit 811, forming a plurality of independent bottom insulating layer units 811. In one specific embodiment, the method for dividing the insulating material layer 900 into a plurality of bottom insulating layer units 811 is mechanical cutting or laser cutting. In another specific embodiment, the method for dividing the insulating material layer 900 into a plurality of bottom insulating layer units 811 is as follows: forming a mask layer on the upper surface of the insulating material layer 900, the mask layer having an opening in the area of ​​the insulating material layer 900 to be divided, the opening exposing the insulating material layer 900; etching the insulating material layer 900 along the opening to form the bottom insulating layer unit 811; and removing the mask layer.

[0084] Please see Figure 16 and Figure 17The bottom insulating layer unit 811 is pressed onto the upper and lower surfaces of the substrate unit 702. In this step, multiple independent bottom insulating layer units 811 are pressed onto the corresponding upper and lower surfaces of the substrate unit 702. Between two adjacent bottom insulating layer units 811 in a direction parallel to the surface of the glass core layer 700, there is a fully cut area 910, which exposes the cut lines 701 of the glass core layer 700. In one specific embodiment, when the bottom insulating layer unit 811 is pressed onto the upper and lower surfaces of the substrate unit 702, the pressing method is hot pressing. The bottom insulating layer unit 811 is softened by heating while mechanical pressure is applied, utilizing intermolecular forces (van der Waals forces) or chemical bonds (such as epoxy resin crosslinking) to achieve adhesion to the underlying structure.

[0085] As an example, in another specific embodiment, the entire insulating material layer is first laminated to the upper and lower surfaces of the glass core layer 700, and then the insulating material layer is divided into multiple bottom insulating layer units 811 along the cutting trajectory 990, with a completely cut area 910 between adjacent bottom insulating layer units 811. This method can avoid displacement of the bottom insulating layer units 811 and achieve higher positioning accuracy. Specifically, the step of forming the bottom insulating layer units 811 on the substrate unit 702 further includes: Please see Figure 14 A single insulating material layer 900 is provided. The dimensions of the insulating material layer 900 may be the same as those of the glass plate 703. The insulating material layer 900 is an organic resin material layer.

[0086] Please see Figure 27 The insulating material layer 900 is pressed onto the upper and lower surfaces of the glass core layer 700. In one specific embodiment, when the insulating material layer 900 is pressed onto the upper and lower surfaces of the glass core layer 700, the pressing method is hot pressing.

[0087] Please see Figure 16The insulating material layer 900 is divided into multiple bottom insulating layer units 811 along the cutting trajectory 990. The area between adjacent bottom insulating layer units 811 is a completely cut region 910. The cutting trajectory 990 is the same as the trajectory of the cutting path 701. In this step, the entire insulating material layer 900 is divided into multiple independent bottom insulating layer units 811 along the cutting trajectory 990. In a specific embodiment, the step of dividing the insulating material layer 900 into multiple bottom insulating layer units 811 along the cutting trajectory 990 further includes: forming a mask layer on the upper surface of the insulating material layer 900, the mask layer having an opening (i.e., the cutting trajectory 990) in the area corresponding to the cutting path 701, the opening exposing the insulating material layer 900; etching the insulating material layer 900 along the opening, using the glass core layer 700 as an etching stop layer, to form the bottom insulating layer units 811; and removing the mask layer. In this step, the insulating material layer 900 is divided along the cutting trajectory 990 until the insulating material layer 900 is completely broken in the cutting direction.

[0088] After the bottom insulating layer unit 811 is formed on the upper and lower surfaces of the substrate unit 702, the fabrication method further includes: Please refer to Figure 18 and Figure 19 A bottom layer conductive line unit 812 is formed on the bottom layer insulating layer unit 811. The bottom layer conductive line unit 812 is a completely cut-off area 911 between adjacent bottom layer conductive line unit 812. The completely cut-off area 910 between the bottom layer conductive line unit 812 overlaps with the completely cut-off area 911 between the bottom layer insulating layer unit 811, and together they constitute the completely cut-off area between the bottom layer redistribution layer unit 810.

[0089] In one specific embodiment, the step of forming the bottommost conductive line layer unit 812 on the bottommost insulating layer unit 811 further includes: forming a conductive material layer on the bottommost insulating layer unit 811; patterning the conductive material layer to form conductive lines; and cutting along a cutting trajectory 990 (see...). Figure 15 The conductive lines are divided into multiple bottom-level conductive line layer units 812, with a complete cut-off area 911 between adjacent bottom-level conductive line layer units 812. The cutting trajectory 990 is the same as the trajectory of the cutting path 701. In this specific embodiment, the conductive lines are divided along the cutting trajectory 990 until the conductive lines are completely broken, so that the area between adjacent bottom-level conductive line layer units 812 is a complete cut-off area 911.

[0090] In one specific embodiment, the step of dividing the conductive line into a plurality of the bottommost conductive line layer units 812 along a cutting trajectory 990 further includes: forming a patterned mask layer on the conductive line, the mask layer having an opening (i.e., cutting trajectory 990) that exposes the area corresponding to the cutting path 701; removing the conductive line along the opening to form the bottommost conductive line layer unit 812; and removing the mask layer.

[0091] In one specific embodiment, before the step of forming a conductive material layer on the lowest insulating layer unit 801, the method further includes: forming a via on the bottommost insulating layer unit 811; in the step of forming a conductive material layer on the bottommost insulating layer unit 811, the conductive material layer is also deposited in the via to form a conductive connection structure 813. After the step of patterning the conductive material layer to form a conductive line, the conductive line is electrically connected to the upper conductive layer 705 or the lower conductive layer 706 of the glass core layer 700 through the conductive connection structure 813.

[0092] In one specific embodiment, before the step of forming a conductive material layer on the bottommost insulating layer unit 811, the method further includes: forming a seed layer on the bottommost insulating layer unit 811; the step of forming a conductive material layer on the bottommost insulating layer unit 811 further includes: performing an electroplating process to form the conductive material layer on the seed layer; the step of dividing the conductive line into a plurality of bottommost conductive line layer units 812 along a cutting trajectory 990 further includes: removing the seed layer in the region corresponding to the cutting path 701 along the cutting trajectory 990.

[0093] The above steps are only one example of forming the bottommost conductive line layer unit 812 on the bottommost insulating layer unit 811. In other specific embodiments, other processes may be used to form the bottommost conductive line layer unit 812.

[0094] After forming the bottommost redistribution layer unit 810, a second redistribution layer unit 820 (shown in...) is formed on the bottommost redistribution layer unit 810. Figure 22 (in the middle), this step includes: Please see Figure 20 and Figure 21 A second insulating layer unit 821 is formed on the bottommost redistribution layer unit 810, with a complete cut-off region 920 between adjacent second insulating layer units 821. The method for forming the second insulating layer unit 821 in this step is the same as the method for forming the bottommost insulating layer unit 811. The complete cut-off region 920 overlaps with the complete cut-off region 911 and corresponds to the position of the cutting path 701.

[0095] Please see Figure 22 and Figure 23 A second conductive line layer unit 822 is formed on the second insulating layer unit 821, with a complete cut-off region 921 between adjacent second conductive line layer units 822. In this step, the method for forming the second conductive line layer unit 822 is the same as the method for forming the bottommost conductive line layer unit 812. The complete cut-off region 920 between the second insulating layer units 821 overlaps with the complete cut-off region 921 between the second conductive line layer units 822, and together they constitute the complete cut-off region between the second redistribution layer units 820.

[0096] Please see Figure 24 and Figure 25 Repeat the steps described above to form the second redistribution layer unit 820 to form the third to Nth redistribution layer units 800. The entire cut area of ​​the stacked multi-layer redistribution layer units 800 forms a continuous through-cut channel 803 in three-dimensional space, exposing the cut channel 701 of the glass core layer 700.

[0097] Please see Figure 7 and Figure 26 In step S72, the glass core layer 700 is cut along the cutting path 701 to form an independent glass substrate 830.

[0098] The cutting channel 803 of the stacked multilayer redistribution layer unit 800 exposes the cutting path 701. Therefore, when performing the cutting process, it is only necessary to go deep into the cutting channel 803 in the cutting direction and cut the glass core layer 700 along the cutting path 701, which effectively reduces the breakage rate of the glass substrate and significantly improves the cutting yield of the glass substrate.

[0099] In one specific embodiment, the step of cutting the glass core layer 700 along the cutting path 701 further includes: cutting the glass core layer 700 using mechanical cutting or laser cutting processes. In one specific embodiment, in the step of cutting the glass core layer 700 using mechanical cutting processes, the cutting blade is a resin blade. Resin blades have excellent elasticity, absorbing cutting stress through elastic deformation, reducing the roughness of the cut surface of the glass core layer 700, and effectively reducing the density of microcracks.

[0100] Compared to traditional processes that require cutting redistribution layers and glass core layer 700 after multi-layer stacking, the glass substrate preparation method provided in this invention forms cutting channels 803 simultaneously during layer-by-layer construction. This effectively avoids the problems of cracks in the glass core layer 700 and the need for protective adhesive to be applied to exposed glass edges after cutting, effectively reducing the breakage rate of the glass substrate and significantly improving the glass substrate cutting yield.

[0101] In other specific embodiments, when forming each of the redistribution layer units, there is a partial cut-off region between the redistribution layer units on adjacent substrate units. By setting the partial cut-off region, the stress of the redistribution layer is released layer by layer, effectively avoiding the problems of cracking in the glass core layer 700 and the need to apply protective adhesive to the exposed glass edges after cutting. This effectively reduces the breakage rate of the glass substrate and significantly improves the glass substrate cutting yield.

[0102] As an example, another specific embodiment of the present invention provides a method for forming multiple layers of the redistribution layer unit 800, wherein when forming each layer of the redistribution layer unit, there is a partially cut-off region between the redistribution layer units on adjacent substrate units. In this specific embodiment, the method for creating a partially cut-off region between the redistribution layer units on adjacent substrate units includes: cutting the redistribution layer along the cutting trajectory 990 to a predetermined depth, so that the redistribution layer is partially broken, thereby forming the redistribution layer unit 800. Specifically, the method for forming multiple layers of the redistribution layer unit 800 provided in this specific embodiment includes the following steps: The bottom redistribution layer unit 810 (marked as) is formed on the upper and lower surfaces of the substrate unit 702. Figure 29 In this specific embodiment, a partial cut-off region is formed between the bottommost redistribution layer units 810 on adjacent substrate units 702. This step includes: Please see Figure 28 A bottom insulating layer unit 811 is formed on the upper and lower surfaces of the substrate unit 702, and a partially cut region 930 is formed between adjacent bottom insulating layer units 811. The thickness of the partially cut region 930 is less than the thickness of the bottom insulating layer unit 811.

[0103] A method for forming a bottom insulating layer unit 811 on the upper and lower surfaces of the substrate unit 702 includes: providing a single sheet of insulating material 900, such as... Figure 14 As shown; then the insulating material layer 900 is cut to a preset depth along the cutting trajectory 990 to form a plurality of the bottom insulating layer units 811, with a partially cut area 930 between adjacent bottom insulating layer units 811; then the plurality of bottom insulating layer units 811 are pressed together on the upper and lower surfaces of the substrate unit 702.

[0104] Another method for forming the bottom insulating layer unit 811 on the upper and lower surfaces of the substrate unit 702 includes providing a single sheet of insulating material 900, such as... Figure 14As shown, the entire insulating material layer 900 is pressed onto the upper and lower surfaces of the glass core layer 700, and then the insulating material layer 900 is cut to a preset depth along the cutting trajectory 990 to form a plurality of the bottom layer insulating unit 811, with a partially cut area 930 between adjacent bottom layer insulating unit 811.

[0105] Please see Figure 29 A bottom layer conductive line unit 812 is formed on the bottom insulating layer unit 811, and a partial cut-off region 931 is formed between adjacent bottom conductive line unit 812. The partial cut-off region 931 between the bottom conductive line unit 812 overlaps with the partial cut-off region 930 between the bottom insulating layer units 811, and together they form the partial cut-off region between the bottom redistribution layer units 810, corresponding to the position of the cutting path 701.

[0106] In one specific embodiment, the step of forming a bottom conductive line layer unit 812 on the bottom insulating layer unit 811 further includes: forming a conductive material layer on the bottom insulating layer unit 811; patterning the conductive material layer to form a conductive line; cutting the conductive line along the cutting trajectory 990 to a preset depth, thereby partially breaking the conductive line and forming a plurality of bottom conductive line layer units 812, with a partially cut area 931 between adjacent bottom conductive line layer units 812.

[0107] After forming the bottommost redistribution layer unit 810, a second redistribution layer unit 820 (shown in...) is formed on the bottommost redistribution layer unit 810. Figure 31 (in the middle), this step includes: Please see Figure 30 A second insulating layer unit 821 is formed on the bottommost redistribution layer unit 810, with a partially cut region 940 between adjacent second insulating layer units 821. The method for forming the second insulating layer unit 821 in this step is the same as the method for forming the bottommost insulating layer unit 811. The partially cut region 940 overlaps with the partially cut region 931 and corresponds to the position of the cutting path 701.

[0108] Please see Figure 31A second conductive line layer unit 822 is formed on the second insulating layer unit 821, with a partial cut-off region 941 between adjacent second conductive line layer units 822. In this step, the method for forming the second conductive line layer unit 822 is the same as the method for forming the bottommost conductive line layer unit 812. The partial cut-off region 940 between the second insulating layer units 821 overlaps with the partial cut-off region 941 between the second conductive line layer units 822, and together they form the partial cut-off region between the second redistribution layer units 820.

[0109] Please see Figure 32 Repeat the steps described above to form the second rewiring layer unit 820 to form the third to Nth rewiring layer units 800. The total thickness of the partially cut-off area of ​​the finally formed stacked multi-layer rewiring layer units 800 is less than the total thickness of the stacked area of ​​the multi-layer rewiring layer units 800.

[0110] Please see Figure 26 After forming a stacked multilayer redistribution layer unit 800, the glass core layer 700 and the portion of the cut area between adjacent redistribution layer units 800 are cut along the cutting trajectory 990 and the cutting channel 701 to form an independent glass substrate 830.

[0111] In this specific embodiment, through an interlayer stacking process, after forming a stacked multi-layer redistribution layer unit, all redistribution layers above the cutting path 701 are partially cut layer by layer. On the one hand, the thickness of all redistribution layers above the cutting path 701 is reduced; on the other hand, the stress of each redistribution layer is reduced by partial cutting, thereby reducing stress accumulation. This ensures that, in the final cutting step, there is no cracking of the glass core layer caused by the complete stress release from simultaneously cutting multiple complete redistribution layers, as is the case in existing composite tool cutting processes. It also avoids the need for protective adhesive due to exposed glass edges in existing laser-mechanical composite cutting processes. This invention effectively avoids the problems of cracking in the glass core layer 700 and the need for protective adhesive after cutting, effectively reducing the breakage rate of the glass substrate and significantly improving the glass substrate cutting yield.

[0112] As an example, another specific embodiment of the present invention provides a method for forming multiple layers of redistribution layer units 800. When forming each layer of redistribution layer units, there is a partially cut-off region between the redistribution layer units on adjacent substrate units. In this specific embodiment, the method for creating a partially cut-off region between the redistribution layer units on adjacent substrate units includes: intermittently cutting the redistribution layer along the cutting trajectory 990, so that the redistribution layer is partially broken in the extension direction of the cutting trajectory 990, forming the redistribution layer unit 800. The partially cut-off region in the extension direction of the cutting trajectory 990 includes holes and connecting blocks. The holes and connecting blocks are arranged alternately. The arrangement of the holes releases the stress of the redistribution layer and reduces the connection strength of the redistribution layer, thereby preventing the glass core layer from breaking in subsequent cutting steps, thus reducing the breakage rate of the glass substrate and improving the cutting yield of the glass substrate. The holes may penetrate the redistribution layer or only extend partially into the redistribution layer; that is, the cutting depth of the holes is the entire thickness or a portion of the thickness of the redistribution layer. The shape of the hole can be circular, square, serrated, or irregular.

[0113] Specifically, the method for forming the multilayer redistribution layer unit 800 provided in this embodiment includes the following steps: The bottom redistribution layer unit 810 (marked as) is formed on the upper and lower surfaces of the substrate unit 702. Figure 35 In this specific embodiment, a partial cut-off region is formed between the bottommost redistribution layer units 810 on adjacent substrate units 702. This step includes: Please see Figure 33 and Figure 34A bottom layer insulating layer unit 811 is formed on the upper and lower surfaces of the substrate unit 702, with a partially cut region 950 between adjacent bottom layer insulating layer units 811. In this specific embodiment, the method for creating a partially cut region 950 between adjacent bottom layer insulating layer units 811 includes: intermittently cutting the insulating material layer along the cutting trajectory 990, so that the insulating material layer is partially broken in the direction of extension of the cutting trajectory 990. As an example, the partially cut region 950 between adjacent bottom layer insulating layer units 811 in the direction of extension of the cutting trajectory 990 consists of alternating holes 951 and connecting blocks 952, forming a postage stamp-like structure to reduce the connection strength and stress between two adjacent bottom layer insulating layer units 811. In this specific embodiment, the hole 951 penetrates the bottom layer insulating layer, meaning the depth to which the insulating material layer 900 is cut is the entire thickness of the insulating material layer 900. In some other embodiments, the hole 951 does not penetrate the bottom layer of insulation. The hole 951 extends downward from the surface of the bottom layer of insulation to a predetermined depth of the bottom layer of insulation, that is, the depth to which the insulation material layer 900 is cut is a portion of the thickness of the insulation material layer 900.

[0114] Please see Figure 35 A bottommost conductive line layer unit 812 is formed on the bottommost insulating layer unit 811. Adjacent bottommost conductive line layer units 812 are partially cut off. These partially cut off areas consist of alternating holes 961 and connecting blocks (not shown in the figures). The partially cut off areas between the bottommost conductive line layer units 812 overlap with the partially cut off areas 950 between the bottommost insulating layer units 811, and together they form the partially cut off areas between the bottommost redistribution layer units 810, corresponding to the position of the cutting path 701. In this specific embodiment, holes 961 and 951 overlap. In another specific embodiment, holes 961 and 951 are staggered to further reduce the stress and connection strength between the bottommost redistribution layer units 810, thus reducing the difficulty of subsequent cutting processes. In one specific embodiment, the hole 951 in the partially cut region 950 has the same shape as the hole 961 to simplify the manufacturing process. In another specific embodiment, the hole 951 in the partially cut region 950 has a different shape than the hole 961 to adapt to the process flow and improve the flexibility of the manufacturing method.

[0115] In one specific embodiment, the step of forming the bottommost conductive line layer unit 812 on the bottommost insulating layer unit 811 further includes: forming a conductive material layer on the bottommost insulating layer unit 811; patterning the conductive material layer to form conductive lines; and intermittently cutting the conductive lines along the cutting trajectory 990 to partially break the conductive lines in the extension direction of the cutting trajectory 990, forming a plurality of bottommost conductive line layer units 812. The partially cut area between adjacent bottommost conductive line layer units 812 in the extension direction of the cutting trajectory 990 consists of alternating holes 961 and connecting blocks, forming a postage stamp-like structure to reduce the connection strength and stress between two adjacent bottommost conductive line layer units 812. In this specific embodiment, the hole 961 penetrates the bottommost conductive line, meaning the depth to which the conductive line is cut is the entire thickness of the conductive line. In some other embodiments, the hole 961 does not penetrate the bottom layer of conductive lines. The hole 961 extends downward from the surface of the bottom layer of conductive lines to a predetermined depth of the bottom layer of conductive lines, that is, the depth to which the conductive lines are cut is a portion of the thickness of the conductive lines.

[0116] After forming the bottommost redistribution layer unit 810, a second redistribution layer unit 820 (shown in...) is formed on the bottommost redistribution layer unit 810. Figure 37 (in the middle), this step includes: Please see Figure 36 A second insulating layer unit 821 is formed on the bottommost redistribution layer unit 810. A partially cut-off region exists between adjacent second insulating layer units 821, where holes 971 and connecting blocks (not shown in the figures) are alternately arranged. The method for forming the second insulating layer unit 821 in this step is the same as the method for forming the bottommost insulating layer unit 811. The partially cut-off regions between the second insulating layer units 821 overlap with the partially cut-off regions between the bottommost redistribution layer units 810 and correspond to the position of the cutting path 701. The holes 971 between adjacent second insulating layer units 821 overlap or are staggered with the holes 961 between adjacent bottommost conductive line layer units 812.

[0117] Please see Figure 37A second conductive line layer unit 822 is formed on the second insulating layer unit 821. A partial cut-off region exists between adjacent second conductive line layer units 822, where holes 981 and connecting blocks (not shown in the figures) are alternately arranged. In this step, the method for forming the second conductive line layer unit 822 is the same as the method for forming the bottommost conductive line layer unit 812. The partial cut-off regions between the second insulating layer units 821 overlap with the partial cut-off regions between the second conductive line layer units 822, and together they form the partial cut-off regions between the second redistribution layer units 820. In this specific embodiment, holes 971 and 981 overlap; in another specific embodiment, holes 971 and 981 are staggered to further reduce the stress and connection strength between the second redistribution layer units 820, reducing the difficulty of subsequent cutting processes. In one specific embodiment, the hole 971 and the hole 981 have the same shape to simplify the manufacturing process. In another specific embodiment, the hole 971 and the hole 981 have different shapes to adapt to the process flow and improve the flexibility of the manufacturing method.

[0118] Repeat the steps described above to form the second redistribution layer unit 820 to form the third to Nth redistribution layer units 800. In the final stacked multi-layer redistribution layer units 800, the holes in the partial cut-off areas of adjacent layers overlap or are staggered, which releases the stress of the redistribution layer and reduces the connection strength of the redistribution layer.

[0119] Please see Figure 26 After forming a stacked multilayer redistribution layer unit 800, the glass core layer 700 and a portion of the redistribution layer are cut along the cutting trajectory 990 and the cutting path 701 to form an independent glass substrate 830.

[0120] In this specific embodiment, through an interlayer stacking process, the redistribution layer above the cutting path is intermittently cut layer by layer into alternating arrangements of holes and connecting blocks during the formation of each redistribution layer unit. The holes release stress in the redistribution layer, thereby reducing stress accumulation and decreasing the connection strength of the redistribution layer. This eliminates the cracking of the glass core layer caused by the complete stress release from simultaneously cutting multiple complete redistribution layers, as seen in existing composite tool cutting processes. It also avoids the need for protective adhesive due to exposed glass edges in existing laser-mechanical composite cutting processes. This invention effectively avoids the problems of glass core layer cracking and the need for protective adhesive after glass edge exposure, effectively reducing the glass substrate breakage rate and significantly improving the glass substrate cutting yield.

[0121] The glass substrate preparation method provided by the specific embodiments of the present invention ingeniously utilizes process changes to effectively avoid the risk of glass substrate breakage, reduce the breakage rate of glass substrate, and improve the cutting yield of glass substrate.

[0122] It should be noted that the terms "comprising" and "having," and their variations, used in this invention document are intended to cover non-exclusive inclusion. The terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence, unless explicitly indicated by the context; it should be understood that such use of data can be interchanged where appropriate. The term "one or more" depends at least in part on the context and can be used to describe features, structures, or characteristics in a singular sense, or in a plural sense to describe combinations of features, structures, or characteristics. The term "based on" can be understood as not necessarily intended to express an exclusive set of factors, but can instead, also at least in part on the context, allow for the presence of other factors that are not necessarily explicitly described. Furthermore, embodiments and features in embodiments of this invention can be combined with each other without conflict. In addition, descriptions of well-known components and technologies have been omitted in the above description to avoid unnecessarily obscuring the concepts of this invention. In the various embodiments described above, each embodiment focuses on its differences from other embodiments; similar / identical parts between embodiments can be referred to mutually.

[0123] The above description is only a preferred embodiment of the present invention. It should be noted that those skilled in the art can make several improvements and modifications without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for preparing a glass substrate, characterized in that, Includes the following steps: A glass core layer is fabricated, wherein the glass core layer is divided into multiple substrate units by cleaving lines; A stacked multilayer redistribution layer unit is formed on the substrate unit. When forming each layer of the redistribution layer unit, there is a complete or partial cut-off area between the redistribution layer units on adjacent substrate units. The redistribution layer unit includes an insulating layer unit and a conductive line layer unit disposed on the insulating layer unit. The remaining area between the glass core layer and the redistribution layer unit is cut along the cutting path to form an independent glass substrate.

2. The method for preparing a glass substrate according to claim 1, characterized in that, The method for fabricating the glass core layer further includes the following steps: Provide glass plates; A glass through-hole is formed through the glass plate, an upper conductive layer is located on the upper surface of the glass plate, and a lower conductive layer is located on the lower surface of the glass plate. The upper conductive layer is electrically connected to the lower conductive layer through the glass through-hole. In the step of forming a stacked multilayer redistribution layer unit on the substrate unit, the redistribution layer unit is formed on the upper conductive layer and / or the lower conductive layer.

3. The method for preparing a glass substrate according to claim 2, characterized in that, The step of forming a glass through-hole, an upper conductive layer on the upper surface of the glass plate, and a lower conductive layer on the lower surface of the glass plate further includes: Forming a through hole through the glass plate; A metal layer is formed in the via, on the upper and lower surfaces of the glass plate; The metal layers on the upper and lower surfaces of the glass plate are patterned to form the upper conductive layer and the lower conductive layer. The metal layer located in the via serves as the glass via, and the glass via is electrically connected to the upper conductive layer and the lower conductive layer.

4. The method for preparing a glass substrate according to claim 3, characterized in that, The step of forming a through-hole through the glass plate further includes: The area of ​​the glass plate where the via needs to be formed is modified. The modified area is etched to form the via.

5. The method for preparing a glass substrate according to claim 4, characterized in that, The step of modifying the area of ​​the glass plate where the via needs to be formed further includes: using laser modification on the area of ​​the glass plate where the via needs to be formed.

6. The method for preparing a glass substrate according to claim 4, characterized in that, The step of etching the modified area further includes immersing the modified glass plate in an etching solution to etch the modified area.

7. The method for preparing a glass substrate according to claim 3, characterized in that, The step of forming a metal layer in the via, on the upper and lower surfaces of the glass plate, further includes: A seed layer is formed in the via, on the upper and lower surfaces of the glass plate; An electroplating process is performed to form the metal layer on the seed layer; In the step of patterning the metal layers on the upper and lower surfaces of the glass plate, the seed layer is patterned simultaneously.

8. The method for preparing a glass substrate according to claim 7, characterized in that, The step of performing an electroplating process to form the metal layer on the seed layer further includes performing a baking process after electroplating.

9. The method for preparing a glass substrate according to claim 7, characterized in that, Before the step of forming a seed layer in the via, on the upper and lower surfaces of the glass plate, the method further includes: performing interface optimization treatment on the upper and lower surfaces of the glass plate.

10. The method for preparing a glass substrate according to claim 3, characterized in that, The step of patterning the metal layers on the upper and lower surfaces of the glass plate further includes: A patterned mask layer is formed on the surface of the metal layer, the mask layer having openings that expose the areas of the metal layer that need to be removed; The metal layer is removed along the opening, and the remaining metal layer serves as the upper conductive layer and the lower conductive layer; Remove the mask layer.

11. The method for preparing a glass substrate according to claim 3, characterized in that, The step of patterning the metal layer on the upper and lower surfaces of the glass plate further includes: thinning the metal layer.

12. The method for preparing a glass substrate according to claim 3, characterized in that, The step of graphically representing the metal layers on the upper and lower surfaces of the glass plate further includes: An upper dielectric layer is formed on the upper surface of the glass plate, and a lower dielectric layer is formed on the lower surface of the glass plate. The upper dielectric layer fills the gaps in the upper conductive layer, and the lower dielectric layer fills the gaps in the lower conductive layer.

13. The method for preparing a glass substrate according to claim 12, characterized in that, The step of forming an upper dielectric layer on the upper surface of the glass plate and forming a lower dielectric layer on the lower surface of the glass plate further includes: A dielectric material layer is formed, which covers the upper surface of the glass plate and the upper conductive layer, the lower surface of the glass plate and the lower conductive layer; The dielectric material layer is thinned, and the upper conductive layer and the lower conductive layer are used as stop layers to form the upper dielectric layer and the lower dielectric layer.

14. The method for preparing a glass substrate according to claim 2, characterized in that, The step of forming a glass through-hole, an upper conductive layer on the upper surface of the glass plate, and a lower conductive layer on the lower surface of the glass plate further includes: Forming a through hole through the glass plate; A seed layer is formed in the via, on the upper and lower surfaces of the glass plate; The seed layer is graphically represented, retaining the areas where the upper and lower conductive layers need to be formed, as well as the seed layer in the via; An electroplating process is performed to form the glass via, the upper conductive layer, and the lower conductive layer on the seed layer, wherein the glass via is electrically connected to the upper conductive layer and the lower conductive layer.

15. The method for preparing a glass substrate according to claim 1, characterized in that, The step of forming each of the rewiring layer units further includes: An insulating layer unit is formed on the substrate unit, and there is a completely or partially cut-off area between adjacent insulating layer units; Conductive circuit layer units are formed on the insulating layer unit, and there are completely or partially cut-off areas between adjacent conductive circuit layer units.

16. The method for preparing a glass substrate according to claim 15, characterized in that, The step of forming an insulating layer unit on the substrate unit further includes: Provide a single layer of insulation material; The insulating material layer is divided into multiple insulating layer units along a cutting trajectory, with adjacent insulating layer units being completely or partially cut off. The cutting trajectory is the same as the trajectory of the cutting path. The insulating layer unit is pressed onto the substrate unit.

17. The method for preparing a glass substrate according to claim 15, characterized in that, The step of forming an insulating layer unit on the substrate unit further includes: Provide a single layer of insulation material; The insulating material layer is laminated onto the glass core layer; The insulating material layer is divided into multiple insulating layer units along a cutting trajectory, with adjacent insulating layer units forming a completely or partially cut area, and the cutting trajectory is the same as the cutting path trajectory.

18. The method for preparing a glass substrate according to claim 16 or 17, characterized in that, A method for dividing an insulating material layer into multiple insulating layer units along a cutting trajectory, such that adjacent insulating layer units are completely cut off, includes: dividing the insulating material layer along the cutting trajectory until the insulating material layer is completely broken.

19. The method for preparing a glass substrate according to claim 16 or 17, characterized in that, A method for dividing an insulating material layer into multiple insulating layer units along a cutting trajectory, such that adjacent insulating layer units are partially cut off, includes cutting the insulating material layer along the cutting trajectory to a predetermined depth to partially break the insulating material layer.

20. The method for preparing a glass substrate according to claim 16 or 17, characterized in that, A method for dividing an insulating material layer into a plurality of insulating layer units along a cutting trajectory, such that adjacent insulating layer units are partially cut off, includes: intermittently cutting the insulating material layer along the cutting trajectory to partially break the insulating material layer in the direction of extension of the cutting trajectory.

21. The method for preparing a glass substrate according to claim 20, characterized in that, In the step of intermittently cutting the insulating material layer along the cutting trajectory, the depth to which the insulating material layer is cut is the full thickness of the insulating material layer.

22. The method for preparing a glass substrate according to claim 20, characterized in that, In the step of intermittently cutting the insulating material layer along the cutting trajectory, the depth to which the insulating material layer is cut is a portion of the thickness of the insulating material layer.

23. The method for preparing a glass substrate according to claim 16 or 17, characterized in that, When the insulating layer unit is pressed onto the substrate unit, the pressing method is hot pressing; when the insulating material layer is pressed onto the glass core layer, the pressing method is hot pressing.

24. The method for preparing a glass substrate according to claim 15, characterized in that, The step of forming a conductive line layer unit on the insulating layer unit further includes: A conductive material layer is formed on the insulating layer unit; The conductive material layer is patterned to form conductive circuits; The conductive line is divided into multiple conductive line layer units along a cutting trajectory, with adjacent conductive line layer units forming a completely or partially cut area, and the cutting trajectory is the same as the cutting path trajectory.

25. The method for preparing a glass substrate according to claim 24, characterized in that, Prior to the step of forming a conductive material layer on the insulating layer unit, the method further includes: forming a via on the insulating layer unit; In the step of forming a conductive material layer on the insulating layer unit, the conductive material layer is also deposited in the via.

26. The method for preparing a glass substrate according to claim 24, characterized in that, Prior to the step of forming a conductive material layer on the insulating layer unit, the method further includes: forming a seed layer on the insulating layer unit; The step of forming a conductive material layer on the insulating layer unit further includes: performing an electroplating process to form the conductive material layer on the seed layer; The step of dividing the conductive line into multiple conductive line layer units along a cutting trajectory further includes: removing the seed layer in the region corresponding to the cutting path along the cutting trajectory.

27. The method for preparing a glass substrate according to claim 24, characterized in that, A method for dividing a conductive line into multiple conductive line layer units along a cutting trajectory, such that adjacent conductive line layer units are completely cut off, includes: dividing the conductive line along the cutting trajectory until the conductive line is completely disconnected.

28. The method for preparing a glass substrate according to claim 24, characterized in that, A method for dividing a conductive line into multiple conductive line layer units along a cutting trajectory, such that adjacent conductive line layer units are partially cut off, includes: cutting the conductive line along the cutting trajectory to a preset depth to partially disconnect the conductive line.

29. The method for preparing a glass substrate according to claim 24, characterized in that, A method for dividing a conductive line into multiple conductive line layer units along a cutting trajectory, such that adjacent conductive line layer units are partially cut off, includes: the cutting trajectory intermittently cuts the conductive line so that the conductive line is partially disconnected in the direction of extension of the cutting trajectory.

30. The method for preparing a glass substrate according to claim 29, characterized in that, The conductive line is cut to the full thickness of the conductive line.

31. The method for preparing a glass substrate according to claim 29, characterized in that, The conductive line is cut to a depth equal to a portion of the thickness of the conductive line.

32. The method for preparing a glass substrate according to claim 1, characterized in that, The step of forming a stacked multilayer redistribution layer unit on the substrate unit of the glass core layer further includes: forming a stacked multilayer redistribution layer unit on both the upper and lower surfaces of the substrate unit of the glass core layer.

33. The method for preparing a glass substrate according to claim 32, characterized in that, The step of forming a stacked multilayer redistribution layer unit on the substrate unit of the glass core layer further includes: the multilayer redistribution layer units formed on the upper and lower surfaces of the same substrate unit are arranged symmetrically with the plane of the substrate unit as the plane.

34. The method for preparing a glass substrate according to claim 1, characterized in that, The step of cutting the remaining area between the glass core layer and the redistribution layer unit along the cutting path further includes: cutting the remaining area between the glass core layer and the redistribution layer unit using mechanical cutting or laser cutting processes.

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