Memory temperature detection and dynamic calibration method based on aging test

Abstract

The application relates to the technical field of aging test, and particularly discloses a memory temperature chamber temperature detection and dynamic calibration method based on aging test, which comprises the following steps: calibration system initialization: placing a simulation load board into a temperature chamber, powering on the system, and checking whether the communication and performance indexes of each component are normal; temperature uniformity calibration: setting multiple groups of output powers for the simulation load board through a power supply / signal board, collecting and saving parameter mapping relationships after the system reaches a steady state under different output powers; and actual aging test dynamic regulation: in the actual memory aging test process, a workstation calls the above-calibrated mapping relationship model to dynamically adjust air speed parameters and heating parameters, so that the temperature field uniformity is always controlled within 1 DEG C. The simulation load board is used to replace actual memory chips for temperature chamber calibration, the use of expensive chips is avoided, the calibration cost is greatly reduced, and the calibration efficiency is effectively improved.

Description

Technical Field

[0001] This invention relates to the field of aging test technology, and more specifically to a method for detecting and dynamically calibrating the temperature of a memory cavity based on aging tests. Background Technology

[0002] As semiconductor process nodes continue to evolve, the integration and complexity of memory chips such as DRAM have increased significantly. These chips are prone to potential early failures during their initial operation, defects that may not surface under normal operating conditions for months or even years. Therefore, memory chips must undergo burn-in testing before mass production and shipment. This involves accelerated stress testing under high temperature, high pressure, and dynamic operating conditions to screen out chips with potential defects in advance, thereby improving product reliability.

[0003] Aging tests typically last for tens to thousands of hours at high temperatures. The temperature uniformity of the aging chamber directly affects the reliability of the test results, chip yield determination, and lifespan prediction. Therefore, the temperature control performance of the aging chamber must be calibrated and verified before actual aging tests. In existing technologies, aging chamber calibration usually uses actual memory chips as thermal characteristic verification samples, but this method has many drawbacks: First, memory chips are expensive, and using them in large quantities will significantly increase calibration costs; second, aging chambers can test tens of thousands of chips simultaneously, and manual chip loading and unloading is too time-consuming, resulting in extremely low calibration efficiency; third, the chamber verification process requires repeated adjustments to temperature and power distribution, which can easily damage the actual chips, making it unsuitable for using actual chips.

[0004] To solve the above problems, there is an urgent need to develop a method that can achieve high-precision and high-efficiency calibration and dynamic control of the temperature cavity without using actual memory chips. Summary of the Invention

[0005] The purpose of this invention is to provide a method for detecting and dynamically calibrating the temperature of a memory cavity based on aging tests, so as to solve the above-mentioned technical problems.

[0006] The objective of this invention can be achieved through the following technical solutions: A method for temperature detection and dynamic calibration of memory cavity based on aging tests is proposed. A simulated load board is used to replace the actual memory chip. A calibration system is constructed by combining a power / signal board, an adapter board, a temperature cavity, and a workstation. The specific steps are as follows: Calibration system initialization: Place the simulated load board into the temperature cavity, power on the system, and check whether the communication and performance indicators of each component are normal. Temperature uniformity calibration: Set the cavity temperature to Tw, and set multiple output powers for the analog load board through the power / signal board. When the system reaches steady state under different output powers, collect the temperature TAI of each reference temperature sensor in the cavity and the temperature TBi of each power channel of the analog load board, and calculate the temperature deviation ΔT before and after calibration of all monitoring points. If |ΔT|≥1℃, the workstation automatically adjusts the wind speed parameters and heating parameters of the corresponding slot in the cavity, and re-collects and calculates the temperature difference after reaching steady state until |ΔT|<1℃. Record the current output power P, the average cavity temperature Ta, the wind speed parameter Fi, and the heating parameter Hi, and establish and save the mapping relationship: (Ta,ΔT)=f(P,Fi,Hi). Dynamic control during actual aging test: During the actual aging test of the memory, the workstation collects the average temperature Ta of the cavity and the real-time power P of each channel in real time, calls the above-mentioned calibrated mapping relationship model, and dynamically adjusts the wind speed parameter Fi and the heating parameter Hi to keep the temperature field uniformity within 1℃.

[0007] As a further aspect of the present invention, it also includes: Closed-loop verification and parameter archiving: After completing temperature uniformity calibration for all set output powers, retest under the recorded parameter mapping relationship, and verify whether the system satisfies |ΔT|<1℃ after reaching steady state.

[0008] As a further aspect of the present invention: the connector interface of the simulated load board and the aging board is consistent, each temperature chamber is configured with 24 simulated load boards of the same specifications, each simulated load board is provided with 16 power channels, each power channel is equipped with 22 power resistors, and the 22 power resistors of the same power supply adopt a square layout; each power channel is configured with a 680μF capacitor, each power resistor is configured with a 22μF capacitor, and the simulated load board is provided with sufficient GND plane.

[0009] As a further aspect of the present invention: each power supply area of ​​the analog load board is provided with an analog temperature sensor and a digital temperature sensor. The digital temperature sensor communicates with the power / signal board via an I²C bus, and the output voltage of the analog temperature sensor is connected to the ADC module of the power / signal board via a connector.

[0010] As a further aspect of the present invention: the number of power supply / signal boards corresponds one-to-one with the number of analog load boards, and each power supply / signal board integrates an MCU, an HCPPS module, an ADC module, a timing generator (TG), and a pattern generator (PG); the HCPPS module provides 16 programmable power supplies with a maximum output voltage of 2.5V and a maximum output current of 18A, and its power output is controlled by the MCU; the MCU communicates with the workstation via Ethernet for command and data transmission, acquires digital temperature sensor data via I²C, and acquires analog temperature sensor data via the ADC module; the TG and PG are only used for providing timing and logic for actual aging tests and do not participate in cavity temperature calibration.

[0011] As a further aspect of the present invention: the adapter board is disposed between the power / signal board and the analog load board for the transmission of power and signals, and can reallocate power and signal resources according to the BIB interface without changing the power / signal board and the analog load board.

[0012] As a further aspect of the present invention: there are two temperature chambers, each with 8 built-in reference temperature sensors, and the functions of adjustable wind speed and heating power in different zones, which can provide a controlled hot air circulation environment. Each temperature chamber can simultaneously accommodate 24 aging boards or simulated load boards, and is configured with 24 power / signal boards.

[0013] As a further aspect of the present invention: the workstation is used to collect temperature matrix data of the simulated load plate and the temperature cavity, calculate the temperature deviation ΔT, analyze the heat distribution and adjust the wind speed and heating parameters of the temperature cavity, save the calibration parameters, and call the mapping relationship model in actual testing.

[0014] The beneficial effects of this invention are as follows: This invention uses a simulated load board to replace the actual memory chip for cavity calibration, avoiding the use of expensive chips and significantly reducing calibration costs. It also eliminates the need for manual loading and unloading of tens of thousands of chips, effectively improving calibration efficiency. The simulated load board uses a power resistor matrix to simulate chip heating, combined with a square-layout resistor design, capacitor filtering, and ample GND plane, making the simulated heating closer to the heating characteristics of the actual chip, thus improving calibration accuracy. Furthermore, dual temperature sensors are set in each power supply area of ​​the simulated load board, combined with the cavity's reference temperature sensor, achieving high-precision temperature acquisition and providing a reliable data foundation for temperature uniformity calibration. Moreover, by establishing a mapping relationship between cavity temperature, output power, and cavity adjustment parameters through a workstation, the model can be called in real time during actual aging tests, and the wind speed and heating parameters can be dynamically adjusted to keep the temperature difference within 1℃. The system can also adapt to power changes, resulting in minimal temperature distribution fluctuations. Attached Figure Description

[0015] The invention will now be further described with reference to the accompanying drawings.

[0016] Figure 1 This is a schematic diagram of the structure of an aging test system according to the present invention; Figure 2 This is a schematic diagram of the structure of a simulated load aging test system according to the present invention; Figure 3 This is a schematic diagram of the structure of a power supply / signal board in this invention; Figure 4 This is a schematic diagram of the structure of an adapter plate in this invention; Figure 5 This is a schematic diagram of a simulated load board layout in this invention; Figure 6 This is a schematic diagram of a temperature mapping and calibration process in this invention; Figure 7 This is a schematic diagram of an actual aging test process in this invention. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] As semiconductor process nodes continue to evolve, the integration and complexity of memory chips (such as DRAM) are rapidly increasing during the manufacturing process. Chips are more prone to potential early failures in the initial operation stage. These early defects may not be exposed for months or even years under normal use conditions. Therefore, they must be screened out in advance through burn-in testing before mass production and shipment.

[0019] Aging testing is an accelerated stress test that operates chips under high temperature, high pressure, and dynamic operating conditions. Its purpose is to accelerate the exposure of potential defects through thermal and electrical stress, thereby improving product reliability before shipment. This test is typically conducted at high temperatures and can last from tens to thousands of hours.

[0020] In aging tests, uneven temperature distribution can severely impact the reliability of test results, yield assessment, and lifespan prediction. Therefore, the aging chamber must be calibrated and verified before actual aging tests to validate the temperature control performance of the aging equipment.

[0021] However, using actual chips directly presents the following problems: 1. The chip is expensive and unsuitable as a sample for thermal characteristic verification; 2. The aging temperature chamber can simultaneously measure tens of thousands of chips, and manual chip loading and unloading takes too long; 3. The cavity verification process requires repeated adjustments to temperature and power distribution, so it is not advisable to use actual chips.

[0022] To address this, the present invention proposes a load board with an interface compatible with the aging board interface. It replaces the actual memory chip with a power resistor, achieves different output powers by adjusting the output voltage, and obtains the temperature of the cavity and the board through a temperature sensor. It accurately establishes the correspondence between the cavity ambient temperature (Ta), the aging board output power P, the surface temperature (TB), the cavity wind speed Fi, and the heating parameter Fi, providing a high-precision temperature control method for aging equipment.

[0023] In the aging test system of this invention, the tester has two temperature chambers, each capable of simultaneously accommodating 24 aging test boards, and correspondingly 24 power / signal boards, such as... Figure 1 As shown, the aging board is used to mount actual memory chips for aging tests. The simulated load board of this invention has the same location and connector interface as the aging board, as shown below. Figure 2 As shown.

[0024] The analog load board system includes: Power / Signal Boards: 24 identical power / signal boards, each with identical resources, such as... Figure 3 As shown; 1. The microcontroller controls the output power of the HCPPS, and simultaneously through I... 2 C can acquire data from the digital temperature sensor on the load board.

[0025] 2. The HCPPS module provides 16 programmable power supplies with a maximum voltage of 2.5V and a maximum current of 18A.

[0026] 3. ADC module: Collects data from the analog temperature sensor on the analog load board and transmits it to the MCU.

[0027] 4. The MCU is a microcontroller that connects to the workstation via Ethernet to send and receive commands and data, and communicates with the PG module via PCIe to collect temperature sensor data.

[0028] 5. TG / PG is a timing / code generator that provides timing and logic for actual aging tests. It is not used for cavity temperature calibration.

[0029] Adapter board: such as Figure 4 As shown; 1. Functions of power supply and signal transmission.

[0030] 2. The size of the adapter plate can be flexibly changed according to the needs of the equipment structure.

[0031] 3. Improved compatibility: Power and signal resources can be redistributed on the adapter board according to the customer's BIB interface without changing the power / signal board and burn-in board.

[0032] Simulated load boards: 24 identical simulated load boards, such as... Figure 5 As shown.

[0033] Power resistor matrix: 1. The power / signal board provides 16 variable power supplies via connectors, with 22 power resistors in each power supply.

[0034] 2. The 22-resistor square layout of the same power supply results in more uniform current distribution on the power supply plane and more consistent heat generation in different areas of the PCB.

[0035] 3. Each power supply is equipped with a 680uF capacitor, and each resistor is equipped with a 22uF capacitor to reduce power ripple and make the power supply more stable.

[0036] 4. Sufficient GND plane is required to ensure that the impedance of the 16 high-current return paths is small enough to reduce power supply voltage drop and plane power consumption.

[0037] Temperature sensing: Each power supply area is equipped with one analog temperature sensor and one digital temperature sensor, using dual temperature sensors to obtain a more accurate board temperature TBi. (TB represents the board temperature sensor, and i represents the power supply channel i=1,2…16); 1. Digital temperature sensor: I²C bus connection, communicates with the power / signal board via a connector.

[0038] 2. Analog temperature sensor: The output voltage is connected to the ADC on the power / signal board via a connector.

[0039] Warm cavity: 1. Provide a controlled hot air circulation environment; 2. Features adjustable fan speed and heating power for different zones; 3. Built-in multiple reference temperature sensors (TAi). TA represents temperature cavity sensor, and i represents the number of sensors (i=1,2…8).

[0040] workstation: 1. Collect temperature matrix data from the simulated load board and the temperature cavity; 2. Calculate the temperature difference ΔT at each monitoring point; 3. Automatically analyze heat distribution and adjust the wind speed Fi / heating parameter Hi (i represents the slot, i=1,2…24); 4. Save the calibrated parameters for use in actual aging tests.

[0041] Temperature mapping algorithm and calibration process: See Figure 6 ,include: Initialization phase: 1. Place the simulated load board into the temperature chamber and power on the system.

[0042] 2. All indicators are normal, and communication is normal.

[0043] Temperature uniformity calibration: 1. Set the cavity temperature to 85℃ 2. Set multiple power outputs (P). 3. Under steady state, record TBi and TAI at each position.

[0044] 4. Calculate the temperature deviation ΔT: ΔT = max(T) - min(T); If ΔT exceeds the specified range (1℃), the system adjusts the cavity wind speed parameter Fi and heating power Hi, retests until the specifications are met, and records the cavity parameter information Fi and Hi under different power levels.

[0045] Closed-loop verification and archiving: The system was retested and its stability was recorded under optimized parameters to determine the mapping relationship between the average cavity temperature Ta, chip power P, and cavity adjustment parameters (wind speed Fi, heating power Hi) under different power conditions: (Ta,ΔT)=f(P,Fi,Hi); Satisfy: |ΔT|<1℃; The calibration is now complete; save the data.

[0046] Actual operation phase: In actual aging tests, refer to Figure 7 ,include: Real-time data collection: 1. Average temperature Ta of the cavity temperature sensor; 2. Real-time power P of each channel; 3. Current temperature cavity control parameters Fi,Hi.

[0047] Model invocation and optimization: The host computer calls the calibrated parameters: (Ta,ΔT)=f(P,Fi,Hi) To ensure that the temperature field uniformity is controlled to be less than 1℃.

[0048] The foregoing has provided a detailed description of one embodiment of the present invention, but this description is merely a preferred embodiment and should not be construed as limiting the scope of the invention. All equivalent variations and modifications made within the scope of the present invention should still fall within the scope of the present invention.

Claims

1. A method for detecting and dynamically calibrating the temperature of a memory cavity based on aging tests, characterized in that, A calibration system is constructed by replacing the actual memory chip with a simulated load board, and combining it with a power / signal board, adapter board, temperature cavity, and workstation. The specific steps are as follows: Calibration system initialization: Place the simulated load board into the temperature cavity, power on the system, and check whether the communication and performance indicators of each component are normal. Temperature uniformity calibration: Set the cavity temperature to Tw, and set multiple output powers for the analog load board through the power / signal board. When the system reaches steady state under different output powers, collect the temperature TAI of each reference temperature sensor in the cavity and the temperature TBi of each power channel of the analog load board, and calculate the temperature deviation ΔT before and after calibration of all monitoring points. If |ΔT|≥1℃, the workstation automatically adjusts the wind speed parameters and heating parameters of the corresponding slot in the cavity, and re-collects and calculates the temperature difference after reaching steady state until |ΔT|<1℃. Record the current output power P, the average cavity temperature Ta, the wind speed parameter Fi, and the heating parameter Hi, and establish and save the mapping relationship: (Ta,ΔT)=f(P,Fi,Hi). Dynamic control during actual aging test: During the actual aging test of the memory, the workstation collects the average temperature Ta of the cavity and the real-time power P of each channel in real time, calls the calibrated mapping relationship model, and dynamically adjusts the wind speed parameter Fi and the heating parameter Hi to keep the temperature field uniformity within 1℃.

2. The memory cavity temperature detection and dynamic calibration method based on aging test according to claim 1, characterized in that, Also includes: Closed-loop verification and parameter archiving: After completing temperature uniformity calibration for all set output powers, retest under the recorded parameter mapping relationship, and verify whether the system satisfies |ΔT|<1℃ after reaching steady state.

3. The memory cavity temperature detection and dynamic calibration method based on aging test according to claim 1, characterized in that, The connector interface of the simulated load board and the aging board is the same. Each temperature chamber is equipped with 24 simulated load boards of the same specifications. Each simulated load board is equipped with 16 power channels. Each power channel is equipped with 22 power resistors. The 22 power resistors of the same power supply adopt a square layout. Each power channel is equipped with a 680μF capacitor. Each power resistor is equipped with a 22μF capacitor. At the same time, the simulated load board is equipped with sufficient GND plane.

4. The memory cavity temperature detection and dynamic calibration method based on aging test according to claim 1, characterized in that, Each power supply area of ​​the analog load board is equipped with an analog temperature sensor and a digital temperature sensor. The digital temperature sensor communicates with the power / signal board via an I²C bus, and the output voltage of the analog temperature sensor is connected to the ADC module of the power / signal board via a connector.

5. The memory cavity temperature detection and dynamic calibration method based on aging test according to claim 1, characterized in that, The number of power / signal boards corresponds one-to-one with the number of analog load boards. Each power / signal board integrates an MCU, an HCPPS module, an ADC module, a timing generator (TG), and a pattern generator (PG). The HCPPS module provides 16 programmable power supplies with a maximum output voltage of 2.5V and a maximum output current of 18A, and its power output is controlled by the MCU. The MCU communicates with the workstation via Ethernet for command and data transmission, acquires digital temperature sensor data via I²C, and acquires analog temperature sensor data via the ADC module. The TG and PG are only used to provide timing and logic for actual aging tests and do not participate in cavity temperature calibration.

6. The memory cavity temperature detection and dynamic calibration method based on aging test according to claim 1, characterized in that, The adapter board is positioned between the power / signal board and the analog load board for power and signal transmission. It can also reallocate power and signal resources according to the BIB interface without requiring changes to the power / signal board and the analog load board.

7. The memory cavity temperature detection and dynamic calibration method based on aging test according to claim 1, characterized in that, There are two temperature chambers, each with 8 built-in reference temperature sensors. They have adjustable wind speed and heating power in different zones, providing a controlled hot air circulation environment. Each temperature chamber can simultaneously accommodate 24 aging boards or simulated load boards, corresponding to 24 power / signal boards.

8. The memory cavity temperature detection and dynamic calibration method based on aging test according to claim 1, characterized in that, The workstation is used to collect temperature matrix data of the simulated load plate and the temperature cavity, calculate the temperature deviation ΔT, analyze the heat distribution and adjust the wind speed and heating parameters of the temperature cavity, save the calibration parameters, and call the mapping relationship model in actual tests.

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