PCB processing optimization method and device based on process parameters, and medium

Abstract

This invention relates to the field of PCB manufacturing technology, and proposes a method, apparatus, and medium for optimizing PCB circuit board processing based on process parameters. The method includes: first, acquiring surface image data of the PCB circuit board, identifying defect types, and extracting corresponding process feature parameters; then, calculating the deviation between process setpoints and standard values, and constructing a defect feature vector based on defect distribution density; subsequently, analyzing the process setpoints at each processing stage based on this vector, and simultaneously optimizing the weights of each process step; finally, when the weights exceed a preset threshold or when major defects match key processes, generating a linkage adjustment command to complete the process parameter optimization. This invention achieves precise correlation between defects and process parameters in PCB circuit boards and multi-stage quantitative collaborative optimization, thereby improving PCB processing quality and the ability to achieve closed-loop control throughout the entire process.

Description

Technical Field

[0001] This invention relates to a method, apparatus, and medium for optimizing PCB circuit board processing based on process parameters, belonging to the field of PCB processing technology. Background Technology

[0002] PCB manufacturing optimization based on process parameters is an important technology for improving the quality and efficiency of electronic manufacturing. By monitoring and adjusting various process parameters during the production process, it aims to achieve high-precision and high-consistency manufacturing of PCB products.

[0003] Currently, the optimization of PCB manufacturing quality mainly relies on offline inspection and single-stage parameter adjustment. However, in modern production lines with multiple processes and continuous operation, existing methods have significant limitations: on the one hand, traditional inspections are mostly used to determine single defects, making it difficult to systematically correlate the influence between defect types and specific process parameters; on the other hand, parameter adjustment often relies on human experience and lacks the ability to quantitatively analyze the distribution of defects, process deviations, and the linkage effects of multiple stages, resulting in insufficient synergy in process optimization and difficulty in achieving closed-loop quality control throughout the entire process. Summary of the Invention

[0004] This invention provides a PCB circuit board processing optimization method, device, and medium based on process parameters. It mainly realizes the accurate correlation between defects and process parameters in PCB circuit boards and the quantitative collaborative optimization of multiple links, so as to improve PCB processing quality and the closed-loop control capability of the whole process.

[0005] To achieve the above objectives, the present invention provides a PCB circuit board processing optimization method based on process parameters, comprising:

[0006] Acquire surface image data of PCB circuit boards on the PCB manufacturing production line;

[0007] Based on the surface image data, the defect types on the PCB circuit board are identified, and the corresponding process feature parameters are extracted.

[0008] Based on the process characteristic parameters, the process deviation between the set value and the standard value of the process parameters in the PCB circuit board is calculated, and the defect feature vector of the PCB circuit board is constructed by combining the distribution density of the defect type.

[0009] Based on the defect feature vector, analyze the process setting value of the processing stage of the PCB processing production line, and synchronize the process optimization weight of different process links on the PCB circuit board.

[0010] When the process optimization weight exceeds a preset threshold, and the main defect type in the PCB circuit board matches the key process step, a linkage adjustment instruction corresponding to the PCB processing production line is generated to execute the process parameter optimization of the PCB circuit board.

[0011] Optionally, acquiring the surface image data corresponding to the PCB circuit board on the PCB processing production line includes:

[0012] The original integrated image of the PCB circuit board on the PCB processing production line is acquired, and the distortion correction of the original integrated image is performed based on a preset calibration board to obtain a distortion-corrected image.

[0013] After transforming the pixel coordinates in the distortion-corrected image, the transformed pixel coordinates are unified to the reference coordinate system of the PCB processing production line.

[0014] Based on the line contour features in the reference coordinate system, the surface image data corresponding to the effective image region in the distortion-corrected image is identified.

[0015] Optionally, the reference coordinate system represents a unified spatial reference system pre-established in the PCB manufacturing line, which defines the origin, axis, and scale of the coordinates through fixed calibration points or standard calibration boards in the physical layout of the production line.

[0016] Optionally, identifying the defect type on the PCB circuit board based on the surface image data includes:

[0017] After performing edge enhancement on the surface image data, the edge-enhanced image is binarized to obtain a binarized image;

[0018] The binarized image is compared with the standard design file of the PCB circuit board to obtain a set of differences in elements.

[0019] Based on the morphological features and connectivity features in the set of difference elements, the defect type on the PCB circuit board is determined, wherein the defect type includes short circuit defects, open circuit defects, and dimensional deviation defects.

[0020] Optionally, calculating the process deviation between the set value and the standard value of the process parameters in the PCB circuit board based on the process characteristic parameters includes:

[0021] The process identifier in the process feature parameters is parsed, and based on the process identifier, the set value and standard value in the preset process specification table are retrieved to form a set-standard parameter queue.

[0022] Perform a difference analysis on the setpoint group and the standard value group in the setpoint-standard parameter queue to obtain the deviation data group;

[0023] The process deviation degree corresponding to the deviation data set is calculated using the following formula:

[0024]

[0025] in, Indicates the degree of process deviation. This represents the total number of process parameter pairs in the deviation data set. Indicates the quantity index of process parameter pairs. Indicates the first The weighting coefficients of each pair of process parameters. Indicates the first Deviation values ​​of each process parameter pair Indicates the first Tolerance limits for each pair of process parameters.

[0026] Optionally, constructing the defect feature vector of the PCB circuit board by combining the distribution density of the defect types includes:

[0027] Based on the defect locations within the distribution density range, the PCB circuit board is divided into statistical units, and the occurrence frequency of different defect types within the statistical units is queried.

[0028] Based on the occurrence frequency and the routing layout diagram of the PCB circuit board, a defect distribution sequence corresponding to the PCB circuit board is generated.

[0029] The defect distribution sequence is mapped to the process deviation to obtain a defect-process dimension matrix. After converting the defect-process dimension matrix into an ordered dimension array, the ordered dimension array is used as the defect feature vector.

[0030] Optionally, the synchronization of process optimization weights for different process stages on the PCB circuit board includes:

[0031] Extract the defect association features of the defect feature vector in the preset process classification stage, and generate the process-defect association group corresponding to the defect association features;

[0032] Aggregate the set of influencing factors corresponding to each process step for each correlation group in the process-defect correlation group column;

[0033] Based on the set of influencing factors and the process setting values, analyze the weight allocation ratio among the different process steps;

[0034] According to the weight allocation ratio, the process optimization weights of different process stages on the PCB circuit board are synchronized.

[0035] Optionally, when the process optimization weight exceeds a preset threshold, and the main defect type in the PCB circuit board matches the key process step, a linkage adjustment instruction corresponding to the PCB processing production line is generated, including:

[0036] Filter out specific process steps whose process optimization weights are greater than the preset threshold, and generate an adjustment step list;

[0037] After extracting the high-percentage links from the adjustment link list, the high-percentage links are matched in a preset defect-process mapping table to obtain a set of matching relationships;

[0038] The standard adjustment process of each matching pair in the historical process record is queried in the matching relationship set, and combined with the real-time acquired process setting value, the adjustment parameter group corresponding to the PCB circuit board is generated.

[0039] Based on the process constraints between the equipment in the PCB processing production line, a linkage adjustment command corresponding to the PCB processing production line is generated.

[0040] To address the above problems, the present invention also provides a PCB circuit board processing optimization device based on process parameters, the device comprising:

[0041] The image data module is used to acquire surface image data of PCB circuit boards on the PCB processing production line.

[0042] The feature parameter module is used to identify the defect type on the PCB circuit board based on the surface image data, and extract the process feature parameters corresponding to the defect type.

[0043] The vector construction module is used to calculate the process deviation between the set value and the standard value of the process parameters in the PCB circuit board based on the process feature parameters, and to construct the defect feature vector of the PCB circuit board by combining the distribution density of the defect type.

[0044] The optimization weight module is used to analyze the process setting value of the PCB processing production line at the processing stage based on the defect feature vector, and synchronize the process optimization weight of different process links on the PCB circuit board.

[0045] The parameter optimization module is used to generate a linkage adjustment instruction corresponding to the PCB processing production line when the process optimization weight exceeds a preset threshold and the main defect type in the PCB circuit board matches the key process link, so as to execute the process parameter optimization of the PCB circuit board.

[0046] A storage medium includes a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that the processor, when executing the computer program, implements a PCB circuit board processing optimization apparatus based on process parameters as described in any one of claims 1 to 8.

[0047] Compared to the problems described in the background art, the embodiments of the present invention can intuitively capture various state information of the circuit board surface, accurately identify whether there are various defects on the surface, and, with the real-time acquisition of image data, can promptly grasp the actual processing situation of the circuit board, providing an intuitive and effective basis for state control of the processing stage. Furthermore, the embodiments of the present invention can accurately grasp various defects on the circuit board surface, clarify the specific manifestations of various defects, and establish a direct correlation between the defects on the circuit board surface and processing technology-related indicators, providing precise directional data for process-related analysis. Finally, the embodiments of the present invention can accurately quantify the actual deviation of processing process parameters, clearly present the actual state of process execution, and intuitively reflect various defects. The distribution of defects on the circuit board ultimately forms a unified data carrier characterizing the poor state of the circuit board processing. Furthermore, this invention analyzes the process settings at each processing stage of the PCB production line, accurately assessing the compatibility between the current process settings and the circuit board processing state, clearly presenting the actual execution effect of the process settings at each processing stage, and ensuring that the control of the processing process closely aligns with the actual processing state of the circuit board. Moreover, this invention combines the matching relationship between the main defect types of the PCB circuit board and key process links, accurately determining the implementation conditions for process parameter optimization, clarifying the initiation node for process adjustment, and ensuring that process adjustments precisely target core problem areas, aligning the processing process adjustments with the actual processing needs of the circuit board. Therefore, this invention achieves precise correlation between defects and process parameters in PCB circuit boards and quantitative collaborative optimization across multiple stages, improving PCB processing quality and the ability to control the entire process in a closed loop. Attached Figure Description

[0048] Figure 1 This is a flowchart illustrating a PCB circuit board processing optimization method based on process parameters, provided in an embodiment of the present invention.

[0049] Figure 2 A schematic diagram of a module for implementing a PCB circuit board processing optimization device based on process parameters, provided in an embodiment of the present invention;

[0050] Figure 3 This is a schematic diagram of the structure of a storage medium for a PCB circuit board processing optimization method based on process parameters, provided in an embodiment of the present invention.

[0051] The objectives, features, and advantages of this invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0052] It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0053] This application provides a PCB manufacturing optimization method based on process parameters. The execution entity of this PCB manufacturing optimization method based on process parameters includes, but is not limited to, at least one of the following electronic devices that can be configured to execute the method provided in this application: a server, a terminal, etc. In other words, the PCB manufacturing optimization method based on process parameters can be executed by software or hardware installed on a terminal device or a server device. The server includes, but is not limited to, a single server, a server cluster, a cloud server, or a cloud server cluster.

[0054] Reference Figure 1 The diagram shown is a flowchart illustrating a PCB circuit board processing optimization method based on process parameters according to an embodiment of the present invention. In this embodiment, the PCB circuit board processing optimization method based on process parameters includes:

[0055] S1. Obtain the surface image data of the PCB circuit board on the PCB processing production line.

[0056] The embodiments of the present invention can intuitively capture various status information of the circuit board surface, accurately identify whether there are various defects on the surface, and, with the real-time acquisition of image data, can promptly grasp the actual processing situation of the circuit board, providing an intuitive and effective basis for status control in the processing stage.

[0057] The PCB processing production line refers to a complete production system that realizes the entire process of PCB circuit board manufacturing. It integrates specialized equipment for multiple processing steps such as substrate treatment, circuit fabrication, hole processing, and surface treatment, and is equipped with auxiliary devices for material transfer, process connection, and status monitoring. It is an overall production carrier that continuously completes all processing operations of PCB circuit boards from substrate to finished product according to preset processing flow and process requirements. The PCB circuit board refers to an electronic substrate with an insulating substrate as the basic carrier. Through processing processes such as printing, etching, and electroplating, conductive interconnection structures such as conductive lines, pads, and vias are formed on the surface and inside of the substrate. It is composed of insulating substrate, conductive line layer, and surface protective layer, and is the basic electronic component that carries electronic components and realizes electrical connection and signal transmission between components. The surface image data refers to the digital image information obtained by taking pictures and scanning the appearance of the PCB circuit board through professional image acquisition equipment. It is stored in the form of pixel array and includes visually related digital information such as geometric shape, texture features, regional color, and appearance structure of the circuit board surface, which directly reflects the actual appearance state of the PCB circuit board surface.

[0058] As an embodiment of the present invention, the step of acquiring surface image data corresponding to the PCB circuit board on the PCB processing production line includes: acquiring the original integrated image of the PCB circuit board on the PCB processing production line, and performing distortion correction on the original integrated image based on a preset calibration board to obtain a distortion-corrected image; after converting the pixel coordinates in the distortion-corrected image, unifying the converted pixel coordinates to the reference coordinate system of the PCB processing production line; and identifying the surface image data corresponding to the effective image area in the distortion-corrected image based on the line contour features in the reference coordinate system.

[0059] The original integrated image refers to a digital image obtained directly from the surface of the circuit board (including the PCB) on the production line of the device by an image acquisition device, without any post-processing. It integrates all the surface morphology information of each area of ​​the circuit board and retains the original image features caused by factors such as equipment and angle during the acquisition process. The preset calibration board refers to a pre-set and configured standard reference board for image distortion correction, with fixed geometric calibration patterns and feature markings of known size parameters. Its pattern specifications are adapted to the parameters of the acquisition device for the surface image of the circuit board (including the PCB). The distortion-corrected image refers to the image obtained after correcting geometric deformation problems in the original integrated image using the preset calibration board as a reference and applying a corresponding distortion correction algorithm. The obtained image; the pixel coordinates refer to the two-dimensional coordinate information used to identify the specific position of each pixel in the digital image within the image plane. A coordinate system is established with the preset pixel point of the image as the origin, and it consists of horizontal and vertical pixel values; the line contour features refer to the edge contours and geometric features of the conductive lines, pads, vias, and other structures on the surface of the PCB device in the image, including information such as the shape, direction, size ratio, and edge continuity of the contour; the effective image area refers to the image area containing the effective appearance information of the device, including the PCB device, including the PCB surface, identified based on the line contour features in the distortion-corrected image unified to the reference coordinate system. Meaningless areas such as the background and blind spots in the image are excluded, and the image information in this area directly corresponds to the actual surface morphology of the PCB.

[0060] Furthermore, as another embodiment of the present invention, the reference coordinate system represents a unified spatial reference system pre-established in the PCB processing production line, which defines the origin, axis and scale of the coordinates through fixed calibration points or standard calibration boards in the physical layout of the production line.

[0061] S2. Based on the surface image data, identify the defect type on the PCB circuit board and extract the process feature parameters corresponding to the defect type.

[0062] The embodiments of the present invention can accurately grasp various defects on the surface of circuit boards, clarify the specific manifestations of various defects, establish a direct correlation between the defects on the surface of circuit boards and the relevant indicators of the processing technology, and provide accurate directional data for process-related analysis.

[0063] The defect type refers to various defect categories classified according to the surface image data of the PCB circuit board and the apparent abnormal characteristics of the circuit board surface, covering the apparent defect forms of structures such as circuits, pads, and vias; the process characteristic parameter refers to the process quantitative index that is directly related to each process of PCB processing and has a corresponding correlation with various defect types of the circuit board. It is extracted from the process operation data and parameter setting values ​​during the processing and is the core parameter that characterizes the specific state of process execution of each process.

[0064] As an embodiment of the present invention, identifying the defect type on the PCB circuit board based on the surface image data includes: performing edge enhancement on the surface image data, binarizing the edge-enhanced image to obtain a binarized image; comparing the binarized image with the standard design file of the PCB circuit board to obtain a set of differences; and determining the defect type on the PCB circuit board based on the morphological features and connectivity features in the set of differences, wherein the defect type includes short-circuit defects, open-circuit defects, and dimensional deviation defects.

[0065] The binarized image refers to the image obtained after performing binarization processing on the surface image data that has undergone edge enhancement. This process unifies the grayscale values ​​of all pixels in the image into two fixed values, thereby distinguishing the target area from the background area in the image, eliminating irrelevant visual interference such as grayscale gradients and noise, and highlighting the outline and visual characteristics of abnormal areas on the circuit board surface. The standard design file refers to a digital design document pre-prepared according to processing requirements before PCB circuit board processing, containing core design elements such as the standard dimensions, positions, outlines, and overall layout of all structures including circuits, pads, and vias. The set of discrepancies refers to the set of all elements in the image that are inconsistent with the standard design elements after comparing the binarized image with the standard design file of the PCB circuit board, covering position, size, outline, and layout. The set of differential elements includes various differential elements in dimensions such as the overall structure and the morphological features. The morphological features refer to the geometric morphological attributes of each independent differential element in the differential element set, including specific features such as the shape, size, edge direction, contour regularity, and geometric structure of the element. These are the core attributes that characterize the appearance of a single differential element. The connected elements refer to the overall element units formed by aggregating discrete differential elements in the differential element set based on the spatial connectivity of image pixels. These units are composed of multiple differential elements with spatial connectivity relationships and can intuitively reflect the spatial distribution and interrelationships of the differential elements. The defect types refer to the categories of surface defects on the circuit board classified according to the morphological features and connected elements in the differential element set, combined with the quality judgment criteria for PCB circuit board processing. These can be specifically defined as short circuit defects, open circuit defects, and dimensional deviation defects, etc.

[0066] Optionally, the extraction of process feature parameters corresponding to the defect type can be achieved through feature mapping matching. By triggering a retrieval command in a pre-built association mapping library of defect types and process feature parameters, the precise identification information of the identified defect types such as short circuits, open circuits, and dimensional deviations is retrieved simultaneously. Then, based on the defect type identifier, a precise retrieval is performed in the mapping library to match the candidate process feature parameter set corresponding to each defect type, and process parameters that are not directly related to the defect type are eliminated. Next, the candidate process feature parameter set is dimensionally filtered to retain the core process feature parameters that are strongly related to PCB processing processes such as etching, electroplating, and exposure, while also marking the process process belonging to each parameter. Finally, the filtered process feature parameters are digitally extracted and structured for storage, ultimately achieving the precise extraction of process feature parameters corresponding to the defect type.

[0067] S3. Based on the process characteristic parameters, calculate the process deviation between the set value and the standard value of the process parameters in the PCB circuit board, and construct the defect feature vector of the PCB circuit board by combining the distribution density of the defect type.

[0068] The embodiments of the present invention can accurately quantify the actual deviation of the processing parameters, clearly present the actual state of process execution, intuitively reflect the distribution of various defects on the circuit board, and finally form a unified data carrier characterizing the poor state of circuit board processing.

[0069] The process parameters refer to various quantitative indicators used to control the processing and define the execution standards in each step of PCB manufacturing. These include core control values ​​for each step such as etching time, electroplating current, exposure power, and developing temperature. These parameters are clearly defined by the processing specifications and serve as the fundamental quantitative basis for guiding each processing step and controlling the process. The setpoints refer to the specific values ​​of the process parameters pre-input and set in the processing equipment of each step of the PCB production line for specific processing operations. These values ​​are determined based on the circuit board specifications and processing requirements, directly affecting the operation and control of the processing equipment. They are the direct numerical basis for the equipment to perform processing actions and can be adjusted as needed during processing. The standard values ​​refer to the benchmark values ​​of the process parameters established based on PCB processing specifications, circuit board design requirements, and industry processing standards. These are the core reference benchmarks for setting and adjusting process parameters, uniformly defined by the processing technical documents, and applicable to PCBs of the same specifications and process requirements. PCB manufacturing; the process deviation refers to a quantitative index calculated based on process characteristic parameters, characterizing the degree of deviation of the set value of the process parameter from the standard value. It is derived by combining the numerical difference between the set value and the standard value with the corresponding calculation logic, and the deviation is presented as a specific quantitative value; the distribution density refers to the frequency and number of various defect types on the surface of the PCB circuit board within a unit area. It is calculated by statistically analyzing the location and number of defects in different areas of the circuit board, combined with the area of ​​the corresponding area, and the spatial distribution of defects is represented by a quantitative value, reflecting the degree of concentration of defects on the circuit board; the defect feature vector is a multi-dimensional numerical vector constructed by combining the process deviation and the defect type distribution density, characterizing the poor state of PCB circuit board manufacturing. Each dimension corresponds to different process deviation and defect distribution density values, and the quantitative data of process parameters and defect distribution are integrated in a dimensional way, realizing the structured expression of relevant data in vector form.

[0070] As an embodiment of the present invention, the step of calculating the process deviation between the set value and the standard value of the process parameters in the PCB circuit board based on the process characteristic parameters includes:

[0071] The process identifier in the process feature parameters is parsed, and based on the process identifier, the set value and standard value in the preset process specification table are retrieved to form a set-standard parameter queue.

[0072] Perform a difference analysis on the setpoint group and the standard value group in the setpoint-standard parameter queue to obtain the deviation data group;

[0073] The process deviation degree corresponding to the deviation data set is calculated using the following formula:

[0074]

[0075] in, Indicates the degree of process deviation. This represents the total number of process parameter pairs in the deviation data set. Indicates the quantity index of process parameter pairs. Indicates the first The weighting coefficients of each pair of process parameters. Indicates the first Deviation values ​​of each process parameter pair Indicates the first Tolerance limits for each pair of process parameters.

[0076] In detail, the process identifier refers to the unique identification information embedded in the process feature parameters, containing associated attributes such as the process to which the corresponding process parameter belongs, parameter type, and specification code. It is used to accurately locate and retrieve the setpoint and standard value of the corresponding process parameter in the preset process specification table. The preset process specification table is a pre-constructed structured process parameter reference table that stores core data such as the setpoint, standard value, and tolerance limits of all process parameters for each process step in PCB manufacturing. The setpoint-standard parameter queue refers to an ordered data set formed by retrieving the setpoint and standard values ​​of the corresponding process parameters from the preset process specification table after parsing the process identifier, and arranging them according to the association order of the process parameter pairs. Each queue element contains a one-to-one corresponding setpoint and standard value, which is used for subsequent... The basic data carrier for difference analysis; the setpoint group refers to the set of values ​​extracted from the setpoint-standard parameter queue in the original index order, corresponding to the actual preset control value of each process parameter in the processing equipment; the standard value group refers to the set of values ​​extracted from the standard values ​​of all process parameter pairs in the setpoint-standard parameter queue in the original index order, corresponding to the benchmark reference value determined by the processing specifications for each process parameter, and is the reference benchmark data for determining the degree of deviation of the setpoint; the deviation data group refers to the set of values ​​obtained by performing element-by-element difference analysis on the setpoint group and the standard value group, in the original order, where each element is the difference between the setpoint value and the standard value of the corresponding process parameter.

[0077] Specifically, the process deviation degree represents a quantitative index obtained by weighting and summing the deviations of all process parameter pairs, reflecting the overall deviation level of process parameters from standard requirements; the process parameter pair represents a pair of one-to-one matching process parameter set values ​​and standard values, representing the actual control value and benchmark requirement of a single process dimension; the weight coefficient represents the importance ratio of the i-th process parameter pair in the overall process deviation, with a value range typically from 0 to 1, and the sum of the weight coefficients of all process parameter pairs is 1, with the weight set according to the degree of influence of the parameter on PCB processing quality; the deviation value represents the difference between the set value and the standard value in the i-th process parameter pair, reflecting the actual deviation magnitude and direction of a single process parameter, with a positive deviation indicating that the set value is higher than the standard value, and a negative deviation indicating that the set value is lower than the standard value; the tolerance limit represents the maximum allowable deviation range of the i-th process parameter pair, clearly defined by PCB processing specifications or industry standards (such as IPC standards), and is the benchmark for determining whether the process deviation exceeds the allowable range.

[0078] Furthermore, as another embodiment of the present invention, the step of constructing the defect feature vector of the PCB circuit board by combining the distribution density of the defect types includes: dividing the PCB circuit board into statistical units based on the defect locations within the distribution density range, and querying the occurrence frequency of different defect types within the statistical units; generating a defect distribution sequence corresponding to the PCB circuit board based on the occurrence frequency and the routing layout diagram of the PCB circuit board; performing a dimension mapping between the defect distribution sequence and the process deviation to obtain a defect-process dimension matrix, and after converting the defect-process dimension matrix into an ordered dimension array, using the ordered dimension array as the defect feature vector.

[0079] The defect location refers to the specific spatial location of various defects on the PCB board surface identified through surface image data. Using the PCB manufacturing line's reference coordinate system, it is typically presented as coordinate points or area ranges. For example, a short-circuit defect is located in the pad area at coordinates (120mm, 85mm), and an open-circuit defect is located in the line segment at coordinates (60mm, 150mm). The statistical unit refers to a regularized statistical area divided from the board based on the distribution range of defect locations, combined with the PCB board's size and wiring layout characteristics. It is usually a uniformly sized grid unit, such as a 20mm × 20mm rectangular unit. Each unit serves as an independent defect statistical carrier, used to uniformly determine the frequency of defect occurrence within the statistical area. The occurrence frequency refers to the number of times the same defect type appears within a single statistical unit. It is the core data for quantifying defect distribution density. For example, if a short-circuit defect appears 3 times, an open-circuit defect appears 1 time, and a dimensional deviation defect appears 2 times within a statistical unit, this value directly reflects the concentration of defects in a local area. The wiring layout... A layout diagram refers to a digital design file of a PCB circuit board, containing design information such as the location, direction, size, density, and interlayer connections of all conductive lines, pads, vias, and protective layers on the board. The defect distribution sequence refers to an ordered numerical sequence arranged in a preset order, combining the frequency of defects in statistical units with the routing layout diagram. For example, following the statistical unit order from the top left to the bottom right of the board, the frequency of short circuits, open circuits, and dimensional deviations in each unit is recorded sequentially, forming an ordered data chain containing multi-dimensional defect information. The defect-process dimension matrix refers to a two-dimensional structured data set obtained by mapping the defect distribution sequence to process deviations. Row dimensions correspond to statistical units or defect types, column dimensions correspond to process parameters or process deviations, and matrix elements are associated quantitative values ​​under the corresponding dimensions. It serves as an intermediate carrier integrating defect distribution and process deviation data. The ordered dimension array refers to a one-dimensional numerical array obtained by flattening the defect-process dimension matrix according to a preset dimensional order. The order of array elements is consistent with the matrix's dimensional mapping rules, and it is the direct data form of the defect feature vector.

[0080] S4. Based on the defect feature vector, analyze the process setting value of the processing stage of the PCB processing production line, and synchronize the process optimization weight of different process links on the PCB circuit board.

[0081] This invention analyzes the process settings of the PCB manufacturing line at each processing stage, accurately assesses the compatibility between the current process settings and the circuit board processing status, clearly presents the actual execution effect of the process settings at each processing stage, and ensures that the control of the processing process is closely aligned with the actual processing status of the circuit board.

[0082] The processing stage refers to the continuous processing stages of a PCB production line divided according to process logic and processing objectives. These stages encompass substrate processing, circuit fabrication, hole processing, and surface treatment. Each stage includes multiple related processes, with clear process boundaries and core processing tasks, representing a phased division of the entire production line's processing flow. The process setting value refers to the pre-input process parameter values ​​in the equipment of each processing stage of the PCB production line for executing specific processes, such as the etching time setting value in the etching stage and the current setting value in the electroplating stage. Different process steps refer to the independent process operation units subdivided under each processing stage of the PCB production line, such as the exposure, development, and etching steps in the circuit fabrication stage, and the drilling and copper plating steps in the hole processing stage. Each step has its own specific process parameters and operational requirements, constituting the basic process execution unit of the processing stage. The process optimization weight refers to a numerical indicator used to quantify the degree of influence of different process steps on the PCB processing status. The weight value is determined based on the correlation between the process step and the defect type, and the impact of process parameter fluctuations on processing quality.

[0083] Optionally, the analysis of the process setting values ​​of the PCB processing production line at the processing stage based on the defect feature vector can be achieved through feature dimension correlation analysis. First, the defect feature vector is parsed to extract core dimension data such as process deviation and defect distribution. Then, the process setting value datasets of each processing stage of the production line are retrieved, and the core dimensions are matched with the datasets. Subsequently, the correlation degree between the vector features and the setting values ​​of each stage is calculated to locate the processing stage with the highest correlation. Finally, the numerical characteristics of the process setting values ​​of this stage are analyzed to achieve accurate analysis of the process setting values ​​of the PCB processing production line at the processing stage.

[0084] As an embodiment of the present invention, the process optimization weights of different process stages on the PCB circuit board are synchronized as follows: extracting defect association features of the defect feature vector in a preset process classification stage, and generating process-defect association groups corresponding to the defect association features; aggregating the influence factor set corresponding to each association group in the process-defect association group in each process stage; analyzing the weight allocation ratio between the different process stages based on the influence factor set and the process setting value; and synchronizing the process optimization weights of different process stages on the PCB circuit board according to the weight allocation ratio.

[0085] The pre-defined process classification refers to the standardized classification of all PCB processing steps based on the process attributes, operational functions, and processing flow, covering core processes such as etching, electroplating, exposure, development, and drilling. The defect correlation features refer to feature dimension data extracted from defect feature vectors that are directly related to the pre-defined process classification steps, including core information related to process steps such as process deviation and defect distribution density. The process-defect correlation group refers to an ordered data group formed by precisely matching the extracted defect correlation features with the corresponding pre-defined process classification steps and arranging them according to pre-defined rules. Each group unit contains a set of defect correlation features and a corresponding process classification step. The influencing factor set is... This refers to the set of all quantitative influencing factors corresponding to each process category after the polymerization process-defect correlation grouping. Each factor is used to characterize the dimension and degree of correlation of the corresponding process category on defect formation. The process setpoint refers to the specific values ​​of process parameters that are pre-inputted and set in the processing equipment of each process category in PCB processing to execute specific processing operations. These values ​​are determined according to the PCB circuit board specifications and processing requirements and directly affect the equipment operation control. The weight allocation ratio refers to the proportion of process optimization weights among different process categories calculated through quantitative analysis based on the set of influencing factors and process setpoints of each process category. The proportion of each process category is determined according to the degree of influence, and its weight allocation logic is adapted to the actual analysis needs of process optimization.

[0086] S5. When the process optimization weight exceeds the preset threshold, and the main defect type in the PCB circuit board matches the key process step, a linkage adjustment instruction corresponding to the PCB processing production line is generated to execute the process parameter optimization of the PCB circuit board.

[0087] The embodiments of the present invention combine the matching relationship between the main defect types of PCB circuit boards and key process links, which can accurately determine the implementation conditions for process parameter optimization, clarify the starting point of process adjustment, and enable process adjustment to accurately target the core problem links, so that the adjustment of the processing process fits the actual processing needs of the circuit board.

[0088] The preset threshold refers to a critical value for process optimization weights pre-set based on PCB processing specifications, quality control standards, and historical production line data. This threshold can be set for different process stages or for the entire process as a whole. This value is stored in the PCB processing production line's control system and serves as the core numerical benchmark for determining whether to initiate process parameter adjustments. The primary defect type refers to the defect category with the highest frequency and distribution density among all defect types on the PCB board surface. It is determined by filtering core data such as defect distribution and frequency in the statistical defect feature vector, distinguishing it from secondary defects that occur less frequently and have a smaller distribution range. The key defect categories that need to be targeted in process parameter adjustments; the key process links refer to those that are directly related to the main defect types of PCB circuit boards and play a core role in the formation of these defects. Based on the correlation analysis results of process-defect association groups and influencing factor sets, they are determined to be the core implementation links for process parameter optimization and have a clear direction for process adjustment; the linkage adjustment command refers to the digital control command generated for the key process links of the PCB processing production line, which is used to guide the coordinated adjustment of process parameters of multiple process links on the production line. The command contains core information such as the process link to be adjusted, the parameter modification value, the adjustment execution sequence, and equipment operation requirements.

[0089] As an embodiment of the present invention, when the process optimization weight exceeds a preset threshold and the main defect type in the PCB circuit board matches the key process step, generating a linkage adjustment instruction corresponding to the PCB processing production line includes: filtering out specific process steps with process optimization weights greater than the preset threshold and generating an adjustment step list; extracting high-proportion steps from the adjustment step list and matching the high-proportion steps in a preset defect-process mapping table to obtain a matching relationship set; querying the standard adjustment process of each matching pair in the matching relationship set in the historical process record and combining it with the real-time acquired process setting value to generate an adjustment parameter group corresponding to the PCB circuit board; and generating a linkage adjustment instruction corresponding to the PCB processing production line based on the process constraint relationship between the equipment in the PCB processing production line.

[0090] The specific process steps refer to process steps in the PCB manufacturing line where the process optimization weight value is greater than a preset threshold. These steps are selected from all process steps by comparing their weight values ​​and are all process execution units directly related to the formation of circuit board defects. The adjustment step list is a structured list formed by arranging all the selected specific process steps in an orderly manner according to preset rules (such as process optimization weight from high to low). The list contains basic information such as the unique identifier of each specific process step, the actual weight value, and the corresponding associated defect type. The high-proportion steps refer to specific process steps extracted from the adjustment step list that have a high proportion of process optimization weight. The proportion is determined based on a preset ratio threshold. These steps have a higher impact on the formation of the main defect types of PCB circuit boards and are the core implementation steps for process parameter adjustment. The preset defect-process mapping table is a structured data reference table pre-built for PCB manufacturing. The table stores the corresponding relationship between various defect types and all process steps, and also includes auxiliary quantitative information such as the correlation degree and influence factor between the two. The matching relationship set refers to the set of high-proportion steps extracted from the process steps. The comparison process is a set of all valid matching pairs obtained after the process completes the association matching in the preset defect-process mapping table. Each matching pair includes a high-proportion process and the corresponding main defect type of the PCB circuit board, along with the association attribute information of the two. The historical process record refers to the continuous record of the entire process operation and adjustment data of the PCB processing production line in the past processing and production process. It includes parameter adjustment records of each process step, handling records of various defects, operation details of adjustment execution, etc., and is stored in categories according to processing time and circuit board specifications. The standard adjustment process refers to the mature and standardized process parameter adjustment process extracted from the historical process record for the matching pair of specific defect types and process steps. The process clearly includes parameter adjustment steps, value modification range, operation execution sequence, and operation requirements of corresponding equipment. The process set value refers to the actual preset process parameter value of each process step in the PCB processing production line for the equipment to perform specific processing operations in the current processing process. This value can be obtained and updated in real time through the production line control system, directly reflecting the actual process execution status of each process step.

[0091] In detail, the generation of linkage adjustment instructions corresponding to the PCB processing production line to optimize the process parameters of the PCB circuit board can be achieved through a process constraint collaborative configuration method. First, the process constraint relationship between the adjustment parameter group and the production line equipment is analyzed, and the parameter adjustment thresholds and execution timing requirements of each equipment are sorted out. Then, according to the linkage rules of the process links, the execution priority of each adjustment link is allocated, and a parameter modification timing table is formulated. Next, it is verified whether the adjustment parameters meet the equipment operation specifications and the production line process collaboration requirements. Then, the verified parameters, timing, and execution nodes are encapsulated into digital linkage adjustment instructions and issued, ultimately realizing the optimization of the process parameters of the PCB circuit board.

[0092] Compared to the problems described in the background art, the embodiments of the present invention can intuitively capture various state information of the circuit board surface, accurately identify whether there are various defects on the surface, and, with the real-time acquisition of image data, can promptly grasp the actual processing situation of the circuit board, providing an intuitive and effective basis for state control of the processing stage. Furthermore, the embodiments of the present invention can accurately grasp various defects on the circuit board surface, clarify the specific manifestations of various defects, and establish a direct correlation between the defects on the circuit board surface and processing technology-related indicators, providing precise directional data for process-related analysis. Finally, the embodiments of the present invention can accurately quantify the actual deviation of processing process parameters, clearly present the actual state of process execution, and intuitively reflect various defects. The distribution of defects on the circuit board ultimately forms a unified data carrier characterizing the poor state of the circuit board processing. Furthermore, this invention analyzes the process settings at each processing stage of the PCB production line, accurately assessing the compatibility between the current process settings and the circuit board processing state, clearly presenting the actual execution effect of the process settings at each processing stage, and ensuring that the control of the processing process closely aligns with the actual processing state of the circuit board. Moreover, this invention combines the matching relationship between the main defect types of the PCB circuit board and key process links, accurately determining the implementation conditions for process parameter optimization, clarifying the initiation node for process adjustment, and ensuring that process adjustments precisely target core problem areas, aligning the processing process adjustments with the actual processing needs of the circuit board. Therefore, this invention achieves precise correlation between defects and process parameters in PCB circuit boards and quantitative collaborative optimization across multiple stages, improving PCB processing quality and the ability to control the entire process in a closed loop.

[0093] like Figure 3 The diagram shown is a functional block diagram of a PCB circuit board processing optimization device based on process parameters according to the present invention.

[0094] The PCB circuit board processing optimization device 300 based on process parameters described in this invention can be installed in electronic devices. Depending on the functions implemented, the PCB circuit board processing optimization device based on process parameters includes an image data module 301, a feature parameter module 302, a vector construction module 303, an optimization weight module 304, and a parameter optimization module 305. The module described in this invention can also be called a unit, which refers to a series of computer program segments that can be executed by the processor of an electronic device and can perform a fixed function, and is stored in the memory of the electronic device.

[0095] In this embodiment of the invention, the functions of each module / unit are as follows:

[0096] The image data module 301 is used to acquire surface image data of the PCB circuit board on the PCB processing production line.

[0097] The feature parameter module 302 is used to identify the defect type on the PCB circuit board based on the surface image data, and extract the process feature parameters corresponding to the defect type.

[0098] The vector construction module 303 is used to calculate the process deviation between the set value and the standard value of the process parameters in the PCB circuit board based on the process feature parameters, and to construct the defect feature vector of the PCB circuit board in combination with the distribution density of the defect type.

[0099] The optimization weight module 304 is used to analyze the process setting value of the processing stage of the PCB processing production line based on the defect feature vector, and synchronize the process optimization weight of different process links on the PCB circuit board.

[0100] The parameter optimization module 305 is used to generate a linkage adjustment instruction corresponding to the PCB processing production line when the process optimization weight exceeds a preset threshold and the main defect type in the PCB circuit board matches the key process link, so as to execute the process parameter optimization of the PCB circuit board.

[0101] In detail, the modules in the PCB circuit board processing optimization device 300 based on process parameters described in this embodiment of the invention employ the same methods as described above during use. Figure 1 This method employs the same technical means as the PCB circuit board processing optimization method based on process parameters described above, and can produce the same technical effect, so it will not be elaborated here.

[0102] In one embodiment, a storage medium is provided, which may be a server, and its internal structure diagram may be as follows: Figure 3As shown, the computer device includes a processor, memory, network interface, and database connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile and / or volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and database. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The network interface is used to communicate with external clients via a network connection. When the computer program is executed by the processor, it implements functions or steps on the server or client side of a PCB circuit board processing optimization method based on process parameters.

[0103] In one embodiment, a storage medium is provided, including a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor executes the computer program to perform the following steps:

[0104] Acquire surface image data of PCB circuit boards on the PCB manufacturing production line;

[0105] Based on the surface image data, the defect types on the PCB circuit board are identified, and the corresponding process feature parameters are extracted.

[0106] Based on the process characteristic parameters, the process deviation between the set value and the standard value of the process parameters in the PCB circuit board is calculated, and the defect feature vector of the PCB circuit board is constructed by combining the distribution density of the defect type.

[0107] Based on the defect feature vector, analyze the process setting value of the processing stage of the PCB processing production line, and synchronize the process optimization weight of different process links on the PCB circuit board.

[0108] When the process optimization weight exceeds a preset threshold, and the main defect type in the PCB circuit board matches the key process step, a linkage adjustment instruction corresponding to the PCB processing production line is generated to execute the process parameter optimization of the PCB circuit board.

[0109] It should be noted that the above-mentioned computer-readable storage medium or the functions or steps that the storage medium can achieve can be referred to the relevant descriptions on the server side and client side in the foregoing method embodiments. To avoid repetition, they will not be described one by one here.

[0110] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0111] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is used as an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0112] The above-described embodiments are merely illustrative of the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention. It should be noted that if any software tools or components not belonging to this company appear in the embodiments of this application, they are merely illustrative examples and do not represent actual use.

[0113] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. In the above multiple embodiments, each embodiment can be combined with each other or independent. Deleting any one of them will not affect the technical implementation of other embodiments. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.

Claims

1. The apparatus comprising a PCB line board processing optimization method based on process parameters, characterized in that, The method includes: Acquire surface image data of PCB circuit boards on the PCB manufacturing production line; Based on the surface image data, the defect types on the PCB circuit board are identified, and the corresponding process feature parameters are extracted. Based on the process characteristic parameters, the process deviation between the set value and the standard value of the process parameters in the PCB circuit board is calculated, and the defect feature vector of the PCB circuit board is constructed by combining the distribution density of the defect type. Based on the defect feature vector, analyze the process setting value of the processing stage of the PCB processing production line, and synchronize the process optimization weight of different process links on the PCB circuit board. When the process optimization weight exceeds a preset threshold, and the main defect type in the PCB circuit board matches the key process step, a linkage adjustment instruction corresponding to the PCB processing production line is generated to execute the process parameter optimization of the PCB circuit board.

2. The method for PCB process parameter based process optimization of claim 1, wherein, The acquisition of surface image data corresponding to PCB circuit boards on the PCB manufacturing production line includes: The original integrated image of the PCB circuit board on the PCB processing production line is acquired, and the distortion correction of the original integrated image is performed based on a preset calibration board to obtain a distortion-corrected image. After transforming the pixel coordinates in the distortion-corrected image, the transformed pixel coordinates are unified to the reference coordinate system of the PCB processing production line. Based on the line contour features in the reference coordinate system, the surface image data corresponding to the effective image region in the distortion-corrected image is identified.

3. The method for PCB process parameter based process optimization of claim 2, wherein, The reference coordinate system represents a unified spatial reference system pre-established in the PCB manufacturing line, which defines the origin, axis, and scale of the coordinates through fixed calibration points or standard calibration boards in the physical layout of the production line.

4. The PCB circuit board processing optimization method based on process parameters as described in claim 1, characterized in that, The step of identifying the defect type on the PCB circuit board based on the surface image data includes: After performing edge enhancement on the surface image data, the edge-enhanced image is binarized to obtain a binarized image; The binarized image is compared with the standard design file of the PCB circuit board to obtain a set of differences in elements. Based on the morphological features and connectivity features in the set of difference elements, the defect type on the PCB circuit board is determined, wherein the defect type includes short circuit defects, open circuit defects, and dimensional deviation defects.

5. The PCB circuit board processing optimization method based on process parameters as described in claim 1, characterized in that, The step of calculating the process deviation between the set value and the standard value of the process parameters in the PCB circuit board based on the process characteristic parameters includes: The process identifier in the process feature parameters is parsed, and based on the process identifier, the set value and standard value in the preset process specification table are retrieved to form a set-standard parameter queue. Perform a difference analysis on the setpoint group and the standard value group in the setpoint-standard parameter queue to obtain the deviation data group; The process deviation degree corresponding to the deviation data set is calculated using the following formula: in, Indicates the degree of process deviation. This represents the total number of process parameter pairs in the deviation data set. Indicates the quantity index of process parameter pairs. Indicates the first The weighting coefficients of each pair of process parameters. Indicates the first Deviation values ​​of each process parameter pair Indicates the first Tolerance limits for each pair of process parameters.

6. The PCB circuit board processing optimization method based on process parameters as described in claim 1, characterized in that, The step of constructing the defect feature vector of the PCB circuit board by combining the distribution density of the defect types includes: Based on the defect locations within the distribution density range, the PCB circuit board is divided into statistical units, and the occurrence frequency of different defect types within the statistical units is queried. Based on the occurrence frequency and the routing layout diagram of the PCB circuit board, a defect distribution sequence corresponding to the PCB circuit board is generated. The defect distribution sequence is mapped to the process deviation to obtain a defect-process dimension matrix. After converting the defect-process dimension matrix into an ordered dimension array, the ordered dimension array is used as the defect feature vector.

7. The PCB circuit board processing optimization method based on process parameters as described in claim 1, characterized in that, The process optimization weights for different process stages on the PCB circuit board are synchronized, including: Extract the defect association features of the defect feature vector in the preset process classification stage, and generate the process-defect association group corresponding to the defect association features; Aggregate the set of influencing factors corresponding to each process step for each correlation group in the process-defect correlation group column; Based on the set of influencing factors and the process setting values, analyze the weight allocation ratio among the different process steps; According to the weight allocation ratio, the process optimization weights of different process stages on the PCB circuit board are synchronized.

8. The PCB circuit board processing optimization method based on process parameters as described in claim 1, characterized in that, When the process optimization weight exceeds a preset threshold, and the main defect type in the PCB circuit board matches the key process step, a linkage adjustment instruction corresponding to the PCB processing production line is generated, including: Filter out specific process steps whose process optimization weights are greater than the preset threshold, and generate an adjustment step list; After extracting the high-percentage links from the adjustment link list, the high-percentage links are matched in a preset defect-process mapping table to obtain a set of matching relationships; The standard adjustment process of each matching pair in the historical process record is queried in the matching relationship set, and combined with the real-time acquired process setting value, the adjustment parameter group corresponding to the PCB circuit board is generated. Based on the process constraints between the equipment in the PCB processing production line, a linkage adjustment command corresponding to the PCB processing production line is generated.

9. A PCB circuit board processing optimization device based on process parameters, characterized in that, The device includes: The image data module is used to acquire surface image data of PCB circuit boards on the PCB processing production line. The feature parameter module is used to identify the defect type on the PCB circuit board based on the surface image data, and extract the process feature parameters corresponding to the defect type. The vector construction module is used to calculate the process deviation between the set value and the standard value of the process parameters in the PCB circuit board based on the process feature parameters, and to construct the defect feature vector of the PCB circuit board by combining the distribution density of the defect type. The optimization weight module is used to analyze the process setting value of the PCB processing production line at the processing stage based on the defect feature vector, and synchronize the process optimization weight of different process links on the PCB circuit board. The parameter optimization module is used to generate a linkage adjustment instruction corresponding to the PCB processing production line when the process optimization weight exceeds a preset threshold and the main defect type in the PCB circuit board matches the key process link, so as to execute the process parameter optimization of the PCB circuit board.

10. A storage medium comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements a PCB circuit board processing optimization device based on process parameters as described in any one of claims 1 to 8.

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