Mainboard system and traffic control cabinet

Abstract

This invention discloses a motherboard system and a traffic control cabinet, including a chassis, a first main control board, a second main control board, a first I / O interface board, a second I / O interface board, a first communication control board, and a second communication control board. The first I / O interface board and the second I / O interface board are arranged side by side, and the interfaces of the first I / O interface board and the second I / O interface board are mirrored. Both the first and second I / O interface boards have a first slot and a MINI-PCIE slot. A connector is connected to the first slot. The first main control board is pluggable to the first I / O interface board via a connector, and the second main control board is pluggable to the second I / O interface board via another connector. A MINI-PCIE connector is connected to the MINI-PCIE slot. The first communication control board is connected to the first I / O interface board via the MINI-PCIE connector of the first I / O interface board. The second communication control board is connected to the second I / O interface board via the MINI-PCIE connector of the second I / O interface board. This invention aims to reduce the difficulty of hardware upgrades and improve maintainability.

Description

Technical Field

[0001] This invention relates to the field of control technology, and in particular to a motherboard system and a traffic control cabinet. Background Technology

[0002] In existing outdoor traffic control cabinet systems, the core control motherboard generally adopts an integrated design with highly coupled computing units and I / O functions. This results in the core computing modules (such as processors and memory) being integrated with peripheral circuits such as network, serial ports, and power management on the same circuit board. While this architecture simplifies wiring initially, it makes hardware upgrades and maintenance extremely difficult. Summary of the Invention

[0003] The main objective of this invention is to propose a motherboard system and traffic control cabinet, which aims to reduce the difficulty of hardware upgrades and improve maintainability.

[0004] To achieve the above objectives, the present invention proposes a motherboard system, the motherboard system comprising: Chassis; A first I / O interface board and a second I / O interface board are both located in the chassis. The first I / O interface board and the second I / O interface board are arranged side by side, and the interfaces of the first I / O interface board and the interfaces of the second I / O interface board are mirrored. First main control board and second main control board; Both the first I / O interface board and the second I / O interface board have a first slot and a MINI-PCIE slot. Each first slot is connected to a connector. The first main control board is pluggable to the first I / O interface board via one of the connectors. The second main control board is pluggable to the second I / O interface board via another connector. Each MINI-PCIE slot is connected to a MINI-PCIE connector. A first communication control board and a second communication control board, wherein the first communication control board is electrically connected to the first I / O interface board via a MINI-PCIE connector; and the second communication control board is electrically connected to the second I / O interface board via a MINI-PCIE connector. The first communication control board is used to receive the first PCIe channel signal from the first main control board via the first I / O interface board, and output the first PCIe channel signal to the external optical module after signal processing, so as to drive the external optical module to work. The second communication control board is used to receive the second PCIe channel signal from the second main control board via the second I / O interface board, and output the second PCIe channel signal to the external optical module after signal processing, so as to drive the external optical module to work.

[0005] In one embodiment, both the first communication control board and the second communication control board are SFP interface expansion circuit boards, and the SFP interface expansion circuit board includes: An SFP optical port is used to connect to an SFP optical module, and the SFP optical port and the SFP optical module are hot-swappable.

[0006] In one embodiment, the first I / O interface board further includes a first power supply circuit and a first power interface that are electrically connected in sequence, and the second I / O interface board further includes a second power supply circuit and a second power interface that are electrically connected in sequence. The output terminal of the second power supply circuit, the second power interface, the first power interface, and the input terminal of the first power supply circuit are connected in sequence. The input terminal of the second power supply circuit is used to connect to the power supply, and the first power supply circuit is used to receive the power supply voltage output by the second power supply circuit through the first power interface and the second power interface.

[0007] In one embodiment, the second I / O interface board further includes a power input terminal for connecting to a power supply.

[0008] In one embodiment, both the first I / O interface board and the second I / O interface board further include any one or more combinations of the following: Two network interfaces, including two Ethernet physical layer chips and two RJ45 interfaces. The Ethernet physical layer chips are connected to the main control board via RGMII interfaces. The Ethernet physical layer chips are used to receive network control signals and output the network control signals to the RJ45 interfaces. The RS232 serial port, the first I / O interface board and the second I / O interface board are used to interact with external terminals via the RS232 serial port; The USB Type-C interface supports the USB 3.0 / 2.0 OTG protocol. The first I / O interface board and the second I / O interface board are used for at least one of the following: system firmware burning, device debugging, and peripheral data interaction via the USB Type-C interface. The status indicator group includes four dual-color light-emitting diodes, which are used to display at least one of the following: power supply and operation status, network link status, alarm and fault status, and data transmission and reception status.

[0009] In one embodiment, both the first I / O interface board and the second I / O interface board further include any one or more combinations of the following: SIM card slot, used to insert a SIM card; Storage expansion interfaces, including an mSATA interface, are used to connect storage modules; The encryption module interface includes two SPI interface connectors for connecting the encryption module; Display interfaces, including an HDMI 1.4 interface, for connecting display components; Thermal control interface, including 4-pin Wafer interface; Management auxiliary interface, including at least one of the following: real-time clock battery holder, front panel power switch and reset button connection terminal, and power function configuration jumper group.

[0010] In one embodiment, both the first main control board and the second main control board include a reset pin, and both the first I / O interface board and the second I / O interface board include: A reset button, which is electrically connected to the reset pin; The reset button is used to output a corresponding reset signal to the reset pin when it is triggered, so that the corresponding first main control board or second main control board is in the initial operating state.

[0011] In one embodiment, both the first main control board and the second main control board include: processor; The running memory is electrically connected to the processor, and the storage capacity of the running memory is not less than 4GB; The main storage chip is electrically connected to the processor, and the storage capacity of the storage chip is 32GB.

[0012] The present invention also proposes a traffic control cabinet, including the motherboard system described in any one of the above.

[0013] The motherboard system proposed in this application achieves physical decoupling between computing power and peripheral interfaces by adopting a pluggable and separable architecture for the main control board and I / O interface board. When processor performance needs to be upgraded or repaired, only the corresponding main control board needs to be replaced, without modifying the I / O interface board and chassis structure, thus reducing the difficulty of hardware upgrades and improving maintainability. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0015] Figure 1 This is a schematic diagram of a module of an embodiment of the motherboard system of the present invention; Figure 2 This is a schematic diagram of a module in another embodiment of the motherboard system of the present invention; Figure 3 This is a schematic diagram of a module of another embodiment of the motherboard system of the present invention; Figure 4 This is a schematic diagram of a module in another embodiment of the motherboard system of the present invention; Figure 5 This is a schematic diagram of a module in another embodiment of the motherboard system of the present invention; Figure 6 This is a schematic diagram of another embodiment of the motherboard system of the present invention.

[0016] Explanation of icon numbers: 11. First main control board; 12. Second main control board; 20. First I / O interface board; 30. Second I / O interface board; 40. Chassis; 51. First communication control board; 52. Second communication control board; 60. Reset button; 110. Processor; 120. Running memory; 130. Main memory chip; 21. First slot; 22. First power supply circuit; 23. First power supply interface; 31. Power input terminal; 32. Second power supply interface; 33. Second power supply circuit.

[0017] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0019] In existing outdoor traffic control cabinet systems, the core control motherboard generally adopts an integrated design with highly coupled computing units and I / O functions. This results in the core computing modules (such as processors and memory) being integrated with peripheral circuits such as network, serial ports, and power management on the same circuit board. While this architecture simplifies wiring initially, it makes hardware upgrades and maintenance extremely difficult.

[0020] Therefore, refer to Figure 1 This invention proposes a motherboard system, the motherboard system comprising: Chassis 40; A first I / O interface board 20 and a second I / O interface board 30 are both disposed in the chassis 40. The first I / O interface board 20 and the second I / O interface board 30 are arranged side by side, and the interfaces of the first I / O interface board 20 and the second I / O interface board 30 are mirror images of each other. First main control board 11 and second main control board 12; Both the first I / O interface board 20 and the second I / O interface board 30 have a first slot 21 and a MINI-PCIE slot. Each first slot 21 is connected to a connector. The first main control board 11 is pluggable to the first I / O interface board 20 via one of the connectors. The second main control board 12 is pluggable to the second I / O interface board 30 via another connector. Each MINI-PCIE slot is connected to a MINI-PCIE connector. A first communication control board 51 and a second communication control board 52 are connected. The first communication control board 51 is electrically connected to the first I / O interface board 20 via a MINI-PCIE connector. The second communication control board 52 is electrically connected to the second I / O interface board 30 via a MINI-PCIE connector. The first communication control board 51 is used to receive the first PCIe channel signal of the first main control board 11 via the first I / O interface board 20 and / or the second I / O interface board 30, and output the first PCIe channel signal to the external optical module after signal processing to drive the external optical module to work. The second communication control board 52 is used to receive the second PCIe channel signal of the second main control board 12 via the second I / O interface board 20, and output the second PCIe channel signal to the external optical module after signal processing, so as to drive the external optical module to work.

[0021] In this embodiment, the chassis 40 is used to house and protect the internal electronic components, and may be equipped with heat dissipation ducts and electromagnetic shielding structures. For example, in a fanless passive cooling scenario, heat-conducting fins or heat pipes can be added to conduct heat from the main control board to the chassis 40 shell.

[0022] In this embodiment, the first main control board 11 and the second main control board 12 serve as pluggable wide-temperature SAM core boards, which are used to decouple the computing unit from the I / O platform, making it easier to independently upgrade computing power or replace faulty modules.

[0023] In this embodiment, the first I / O interface board 20 and the second I / O interface board 30 are mounted side-by-side on the chassis 40, and each can be connected to the corresponding main control board through an independent first slot 21. The first I / O interface board 20 and the second I / O interface board 30 can integrate circuits such as a network PHY, serial transceiver, power management, and status indicator lights. Optionally, their panel interface layout is mirror-symmetrical (e.g., LAN1 of the first I / O interface board 20 is on the left, and LAN1 of the second I / O interface board 30 is on the right), facilitating unified openings and cable routing. Thus, using two electrically mirror-symmetrical and physically symmetrical carrier boards (the first I / O interface board 20 and the second I / O interface board 30) not only facilitates panel openings and cable management on the chassis 40, but also supports the operation of two independent operating systems, such as one for internal network traffic signal control and the other for external network data broadcasting, forming a hardware-level network gateway architecture that complies with security specifications. This design achieves the dual goals of service redundancy and security isolation without adding additional isolation devices.

[0024] In this embodiment, each I / O interface board may also be provided with a high-reliability board-to-board slot. For example, matching connectors are provided at the interfaces of the first main control board 11 and the second main control board 12 to realize pluggable electrical connection. The connectors support high-speed signal transmission and power supply.

[0025] In this embodiment, in order to achieve modular expansion, enhanced isolation protection and centralized layout of lightning protection components, a high-speed optical communication module can be provided for each of the two independent operating systems or shared by one. For this purpose, the application sets up a first communication control board 51 and a second communication control board 52 in the chassis 40 to provide a dedicated channel for receiving and sending data from internal and external networks with physical isolation. Users can flexibly select or upgrade the optical port module as needed.

[0026] Optionally, refer to Figure 6Both the first I / O interface board 20 and the second I / O interface board 30 are equipped with Mini-PCIe slots (also known as MINI-PCIE slots). In this embodiment, because the PCIe traces on the carrier board are relatively long, the initial female connectors would exacerbate signal attenuation. Therefore, the connection interface between the first communication control board 51 and the second communication control board 52 is optimized to a Mini-PCIe interface. This provides a standardized high-speed expansion interface compatible with various communication modules. The Mini-PCIe slot supports PCIe 3.0 x1 signals and reserves USB 2.0 signals, making it compatible with Wi-Fi / Bluetooth modules or 4G / 5G cellular network modules.

[0027] In this embodiment, the network links are as follows: First main control board 11 → First I / O interface board → (Mini-PCIe) → First communication control board 51 → (SFP) → External fiber optic network; Second main control board 12 → Second I / O interface board → (Mini-PCIe) → Second communication control board 52 → (SFP) → External fiber optic network. The entire link can employ end-to-end impedance matching and shielding design to ensure gigabit signal integrity. Even with long I / O board traces, the excellent high-frequency characteristics of Mini-PCIe can still guarantee a low bit error rate.

[0028] The motherboard system proposed in this application achieves physical decoupling between computing power and peripheral interfaces by adopting a pluggable and separable architecture for the main control board and I / O interface board. When processor performance needs to be upgraded or repaired, only the corresponding main control board needs to be replaced, without modifying the I / O interface board and chassis structure, thus reducing the difficulty of hardware upgrades and improving maintainability.

[0029] Based on the above embodiments, this application provides a modular industrial control motherboard system specifically designed for wide-temperature, high-reliability rail transit and outdoor traffic control scenarios. It is suitable for deployment in intersection control cabinets as a "network gate" device, thereby enabling safe and reliable transmission of traffic signal information to unmanned vehicles. Its core concept lies in adopting a "dual-core, dual-board, dual-card" distributed architecture, namely two pluggable wide-temperature SAM core boards (first main control board 11 and second main control board 12), two mirror-designed carrier boards (A / B boards), and independent SFP optical port daughter cards on each carrier board (first communication control board 51 / second communication control board 52). This achieves physical separation and logical coordination of computing, I / O, and high-speed expansion, and comprehensively improves environmental adaptability and protection levels.

[0030] Understandably, the two wide-temperature SAM core boards are vertically mounted on the standard interfaces of carrier boards A and B, respectively, providing each carrier board with all system resources, including PCIe, USB, HDMI, GPIO, and SPI. Each carrier board (I / O interface board), paired with its independent core board, can run a completely independent operating system (e.g., board A runs a Linux intranet system, and board B runs an RTOS extranet system). There is no shared memory, no shared bus, and no software dependency between the two computing units, reducing the risk of cross-domain data leakage or attack penetration. For example, the A core board processes sensitive intranet data such as local traffic light status and pedestrian requests; the B core board is only responsible for transmitting the desensitized signal phase information to the roadside RSU via an encrypted SFP optical port for reception by autonomous vehicles. The data flow between the two is unidirectional and hardware isolated. Meanwhile, if one system shuts down due to power fluctuations, software crashes, or hardware failures, the other system can still independently maintain critical functions. For example, if board B fails, board A can still report device status or maintain local signal control through its own network interface. It supports a "degraded operation" mode to ensure basic traffic safety in the event of partial failure. Furthermore, one system can be upgraded independently without affecting the other; for example, during nighttime maintenance, only board B can be restarted to update the V2X firmware, while board A continues to control the traffic lights. During troubleshooting, each board can be isolated for testing, significantly shortening repair time. Thus, developers can set the number of core control boards according to actual needs. For example, for low-cost and simple intersection scenarios, one integrated core board can be set up; for high-safety scenarios such as main roads and highway ramps, two core boards can be inserted.

[0031] Optionally, both the first communication control board 51 and the second communication control board 52 are SFP interface expansion circuit boards, and the SFP interface expansion circuit board includes: An SFP optical port is used to connect to an SFP optical module, and the SFP optical port and the SFP optical module are hot-swappable.

[0032] In this embodiment, the first communication control board 51 and the second communication control board 52 are both independent SFP interface expansion circuit boards (also known as SFP daughter cards), whose main function is to provide the main control system with standardized, hot-swappable, and highly reliable gigabit fiber optic access capabilities.

[0033] Optionally, the SFP interface expansion circuit board is provided with a standard SFP module mounting cage (i.e., SFP optical port). The cage strictly follows the SFP Multi-Source Protocol (MSA) specification. The SFP optical port is used to connect any SFP optical transceiver module that conforms to the MSA standard (such as 1000BASE-SX multimode module, 1000BASE-LX single-mode module or industrial-grade wide-temperature optical module), and supports hot-swapping operation, so that users can insert or remove SFP optical modules while the system is running without causing the main control board to reset or the data bus to malfunction.

[0034] Understandably, when an SFP optical module is inserted into an SFP optical port, its internal laser driver and transimpedance amplifier establish an electrical connection via the gold fingers of the cage to the corresponding Gigabit Ethernet physical layer chip (PHY, such as Microchip LAN7430 or Marvell 88E1512) on the communication control board. This PHY chip receives PCIe signals from the corresponding main control board via the Mini-PCIe interface and converts them into optical signal drive commands conforming to the 1000BASE-X standard. This drives the SFP optical module to complete the electro-optical conversion and transmit data outwards via optical fiber.

[0035] In this embodiment, the SFP interface itself provides electrical isolation. Combined with the centralized protection circuitry on the SFP daughter card, it enhances the system's resistance to external surges, meeting the stringent lightning protection requirements of outdoor traffic control cabinets. Furthermore, considering the harsh environment of outdoor traffic control cabinets (commonly found near highway traffic lights)—high temperature and humidity, and susceptibility to lightning strikes—the motherboard system can be specifically reinforced. For example, from the CPU and memory chips on the core board (main control board) to various capacitors and connectors on the substrate, all components can be selected according to a wide temperature range of -40℃ to +70℃. All components, PCB materials, and manufacturing processes have undergone special selection and verification to ensure the system can stably start and continuously operate in extreme ambient temperatures ranging from -40℃ to +70℃. Simultaneously, the network ports and the entire system meet the national standard GB17626 series Level 3 (compatible with Level 4) surge protection requirements and are compatible with Level 4, conforming to Class B standards and effectively resisting outdoor lightning-induced surges. All interfaces are designed to be waterproof and dustproof, ensuring long-term stable operation in outdoor cabinets.

[0036] In one embodiment, reference Figure 2 The first I / O interface board 20 further includes a first power circuit 22 and a first power interface 23 that are electrically connected in sequence, and the second I / O interface board 30 further includes a second power circuit 33 and a second power interface 32 that are electrically connected in sequence. The output terminal of the second power circuit 33, the second power interface 32, the first power interface 23, and the input terminal of the first power circuit 22 are connected in sequence. The input terminal of the second power circuit 33 is used to connect to the power supply, and the first power circuit 22 is used to receive the power supply voltage output by the second power circuit 33 through the first power interface 23 and the second power interface 32.

[0037] The second I / O interface board 30 further includes a power input terminal 31, which is used to connect to a power supply.

[0038] Based on the above embodiments, assuming the first I / O interface board 20 is board A and the second I / O interface board 30 is board B, boards A and B adopt a design with mirrored electrical functions and symmetrical physical layout, both integrating complete I / O resources such as a network PHY, serial transceiver, status indicator lights, and Mini-PCIe expansion interface. In this embodiment, boards A and B each have independent power management units, forming a dual-channel I / O platform for the system.

[0039] In this embodiment, the second I / O interface board 30 is provided with a second power supply circuit 33 and a power input terminal 31 (such as a 2-pin Phoenix terminal) for connecting an external 12V / 60W DC adapter. Optionally, the second power supply circuit 33 may include an input reverse polarity protection diode, a fuse, an EMI filter, a wide-voltage DC-DC regulator module, and an output overcurrent protection circuit, etc., to ensure a stable 12V power supply voltage output in an environment of -40℃ to +70℃.

[0040] In this embodiment, the first I / O interface board 20 (Board A) is equipped with a first power supply circuit 22 and a first power interface 23 (DC_IN1, 4-pin Wafer connector); the second I / O interface board 30 (Board B) is also equipped with a second power interface 32 (DC_OUT1, 4-pin Wafer connector). Therefore, the power supply chain is as follows: external 12V / 60W adapter → 2-pin Phoenix terminal (power input terminal 31) on the rear I / O panel of Board B → second power circuit 33 (conditioning and protection) inside Board B → DC_OUT1 (4-pin Wafer) on Board B, serving as the power output interface → DC_IN1 (4-pin Wafer, serving as the power input interface) on Board A → first power circuit 22 (secondary filtering and distribution) inside Board A. Thus, the first power circuit 22 receives the power supply voltage output from the second power circuit 33 via the first power interface 23 and the second power interface 32 to power the loads on Board A, such as the PHY chip, serial transceiver, and LED indicators.

[0041] In this embodiment, the inter-board cascaded power supply scheme realizes a "single power input, dual-board collaborative power supply" architecture, simplifying the external power wiring of the chassis 40. Only one 12V input is needed to drive the entire dual I / O motherboard system. Meanwhile, although the system defaults to powering board A from board B, board A still retains an independent auxiliary power input terminal 31 (e.g., another 2-pin Phoenix terminal) as an offline maintenance interface. When the system is running normally, this terminal is left floating; when board B needs to be repaired or replaced, an external 12V power supply can be temporarily connected to the auxiliary power terminal of board A, allowing board A to power on independently and maintain basic communication functions (such as serial port debugging and network heartbeat), achieving non-stop hot maintenance. Furthermore, since the I / O interfaces of board A and board B are functionally mirrored (e.g., board A's LAN1 corresponds to board B's LAN1, and board A's COM1 corresponds to board B's COM1), when a local interface of one carrier board fails due to lightning strikes, short circuits, or component aging, the upper-layer software can automatically switch to the corresponding mirrored interface of the other carrier board to continue working. For example, if LAN2 on board B is damaged due to a surge, V2X data can be sent through LAN2 on board A; if the RS232 serial port on board A fails, the signal light controller can be reconnected to the corresponding serial port on board B. In this way, a service-level redundancy mechanism is established, requiring no additional redundant hardware; the availability and reliability of the core communication link are achieved simply through a dual-board mirror layout.

[0042] In another embodiment, both the first I / O interface board 20 and the second I / O interface board 30 include any one or more combinations of the following: Two network interfaces, including two Ethernet physical layer chips and two RJ45 interfaces. The Ethernet physical layer chips are connected to the main control board via RGMII interfaces. The Ethernet physical layer chips are used to receive network control signals from the corresponding main control board and output the network control signals to the RJ45 interfaces. refer to Figure 5 Optionally, the two RJ45 interfaces are designated LAN1 RJ45 and LAN2 RJ45, and the two Ethernet physical layer chips are RTL8211F Gigabit Ethernet physical layer chips (PHY). The PHY is connected to the corresponding main control board via the RGMII interface, receives MAC layer control signals, and outputs them to the two 10 / 100 / 1000BASE-T adaptive RJ45 interfaces. Each RJ45 interface can also integrate a dual-color LED (such as green / yellow), directly driven by the PHY chip; for example, in this embodiment, a solid green LED indicates that the link has been established, and a flashing yellow LED indicates data activity.

[0043] The RS232 serial port, the first I / O interface board 20 and the second I / O interface board 30 are used to interact with external terminals via the RS232 serial port; Optionally, the RS232 serial port is Figure 5The COM1 Hader RJ45 is shown. In this embodiment, the RS232 serial port can be implemented using an RJ45 connector, with four signal lines (TXD, RXD, GND, VCC) leading out internally. These lines are connected to the UART0 of the main control board via a MAX3232 equal-level converter chip. In this embodiment, the RS232 serial port can be used to connect to lower-level devices such as traditional traffic signal controllers, countdown displays, and PLCs; it can also be connected to a field debugging terminal (such as a serial-to-USB adapter) for log capture and parameter configuration.

[0044] The USB Type-C interface supports the USB 3.0 / 2.0 OTG protocol. The first I / O interface board 20 and the second I / O interface board 30 are used for at least one of the following: system firmware burning, device debugging, and peripheral data interaction via the USB Type-C interface. Optionally, the USB Type-C interface is Figure 5 The TYPEC_OTG interface shown is a USB 3.0 / 2.0 OTG interface, compatible with USB 3.0 SuperSpeed ​​(5Gbps) and USB 2.0 High-Speed ​​(480Mbps) OTG modes. It supports reversible insertion and has built-in CC logic for direction detection. In this embodiment, the USB Type-C interface can be used for system firmware flashing, such as updating Linux images via USB flash drive or PC tools; it can also be used for device debugging, such as as an ADB or CDC serial port channel for real-time monitoring of kernel logs; in addition, the USB Type-C interface can connect peripherals, including but not limited to connecting keyboards, memory cards, etc.

[0045] The status indicator group includes four dual-color light-emitting diodes, which are used to display at least one of the following: power supply and operation status, network link status, alarm and fault status, and data transmission and reception status.

[0046] In this embodiment, the status indicator light groups are as follows: Figure 5The LEDs 1-2, 3-4, 5-6, and 7-8 (a total of 4 sets of dual-color LEDs) shown can be driven by the corresponding GPIO pins of the main control board, and their colors and flashing frequencies can be controlled by software. Optionally, LEDs 1-2 can serve as power / operation indicators to show power and operating status. For example, green on the top (LED1) indicates normal power; green on the bottom (LED2) indicates system operation, and flashing indicates busy. LEDs 3-4 can serve as dual-path network link indicators to show network link status, corresponding to the networking status of LAN1 and LAN2 respectively. For example, solid green indicates link connectivity. LEDs 5-6 can serve as alarm / fault indicators to show alarm and fault status. For example, red on the top (LED5) indicates system warning (e.g., high temperature); red on the bottom (LED6) indicates hardware fault (e.g., PHY failure), and fault codes can be reported via software. LEDs 7-8 can serve as receive / transmit indicators to show receive and transmit status. For example, green on the top (LED7) indicates receiving data; yellow on the bottom (LED8) indicates transmitting data, thus facilitating staff monitoring of communication status.

[0047] In another embodiment, both the first I / O interface board 20 and the second I / O interface board 30 include any one or more combinations of the following: SIM card slot, used to insert a SIM card; refer to Figure 5 and Figure 6 The SIM card slot is a Nano-SIM, compatible with standard Nano-SIM cards. Data is transmitted via the USB 2.0 H1 signal line in the MINI_PCIE interface, supporting the USB CDC ACM protocol. It can be used with 4G / 5G cellular communication modules to achieve remote data backhaul. For example, in environments without wired networks, it can upload traffic event logs or perform OTA firmware updates and remote maintenance via the cellular network, thus achieving reliable communication even when the network is down.

[0048] Storage expansion interfaces, including an mSATA interface, are used to connect storage modules; In this embodiment, the storage expansion interface is Figure 5 The MINI_SATA interface shown is an mSATA 2.0 interface, compatible with the SATA Gen3 6Gbps protocol. It connects to the corresponding main control board via the SATA1 signal cable, providing an independent storage channel. It is used to expand large-capacity SSDs (e.g., 128GB~512GB) to store video recordings, historical logs, AI models, etc. For example, in a smart traffic analysis system deployed in a server rack, long-term storage of intersection monitoring data is required; in this case, the storage expansion interface can be used to expand the storage capacity.

[0049] The encryption module interface includes two SPI interface connectors for connecting the encryption module; In this embodiment, the encryption module interface is: Figure 5 The J_SPI interface shown has two independent SPI interface pin headers (i.e., SPI interface connectors), namely 6Pin and 7Pin, which support the access of hardware encryption modules and can be connected to the main control board via the SPI bus to enhance data security.

[0050] Display interfaces, including an HDMI 1.4 interface, for connecting display components; In this embodiment, Figure 5 The HDMI1 interface shown is a display interface, with an HDMI 1.4 specification, supporting 1920×1080@60Hz resolution output. The HDMI1 signal cable leads from the corresponding main control board and can connect to an internal monitoring display screen in the cabinet, including but not limited to a small LCD screen. This allows for displaying system operating status, alarm information, network topology diagrams, and provides a local debugging interface for on-site personnel to view logs and configuration parameters. It also supports multi-screen output (optional) for split-screen display of different service views. For example, a "local monitoring screen" can be installed in the traffic control cabinet, connected to the first main control board 11 and / or the second main control board 12 via the HDMI1 interface, for real-time feedback of traffic light phases and vehicle detection results.

[0051] Thermal control interface, including 4-pin Wafer interface; In this embodiment, the heat dissipation control interface includes a fan interface that supports PWM speed regulation (0~100% duty cycle) and can connect to a DC fan (12V / 0.5A). Thus, the fan speed is dynamically adjusted by the ADC sampling temperature sensor (such as DS18B20) value on the main control board (including the first main control board 11 and the second main control board 12). The fan automatically starts and stops based on the main control board temperature, reducing noise and preventing overheating due to prolonged high-load operation, thereby meeting the heat dissipation requirements in a wide outdoor temperature environment (-40℃ to +70℃).

[0052] The management auxiliary interface includes at least one of the following: real-time clock battery holder, front panel power switch and reset button 60 connection terminal, and power function configuration jumper group.

[0053] In this embodiment, the real-time clock battery holder can house a CR2032 button cell battery to maintain power to the RTC (Real-Time Clock) chip, ensuring accurate timekeeping even after power failure, for use in log timestamps and scheduled task triggering. The front panel power switch and reset button 60 connection terminals can be used to start / stop the system, allowing on-site maintenance personnel to restart or restore the system via panel operation. The power function configuration jumper group can be implemented using a set of dual in-line jumper caps (DIP switches) or surface mount jumpers; used to achieve one or more of the following functions: configuring the power startup mode (e.g., cold start / warm start); selecting the default network interface priority; enabling / disabling specific functional modules (e.g., encryption modules).

[0054] In one embodiment, reference Figure 3 Both the first main control board 11 and the second main control board 12 include a reset pin, and both the first I / O interface board 20 and the second I / O interface board 30 include: A reset button 60 is electrically connected to the reset pin. The reset button 60 is used to output a corresponding reset signal to the reset pin when it is triggered, so that the corresponding first main control board 11 or second main control board 12 is in the initial running state.

[0055] In this embodiment, both the first main control board 11 and the second main control board 12 are provided with reset pins, and both the first I / O interface board 20 and the second I / O interface board 30 are provided with reset buttons 60. Optionally, the reset button 60 can be a normally open physical button, with one end grounded and the other end directly connected to the reset pin of the corresponding main control board through a printed circuit trace. When the user needs to restore the system to the factory default state, the following operation can be performed: with the device powered off, press and hold any reset button 60, and then turn on the power; after the main control board is powered on and started, its bootloader detects that the reset pin is in a low level state and maintains it for more than a preset threshold time (e.g., 3 seconds), which means that the user has triggered a recovery command. The system then enters recovery mode and automatically executes the factory reset process, including clearing all user configurations, application data and log files, reloading the read-only factory system image, and resetting network parameters, security policies, service status, etc. to their initial default values. After completing the above operations, the system will be restarted in its factory state, ensuring that the device can quickly and reliably return to its trusted initial state through a single physical operation in the event of configuration errors, software anomalies, or security policy failures.

[0056] Since both the first I / O interface board 20 and the second I / O interface board 30 are equipped with the reset button 60, maintenance personnel can operate it nearby regardless of which carrier board is currently running the system, thus achieving efficient on-site maintenance and improving the system's recoverability and ease of maintenance.

[0057] In another embodiment, reference Figure 4 , Figure 4 This is an example diagram of the internal modules of the first main control board 11. Both the first main control board 11 and the second main control board 12 include: Processor 110; The running memory 120 is electrically connected to the processor 110, and the storage capacity of the running memory 120 is not less than 4GB; The main storage chip 130 is electrically connected to the processor 110, and the storage capacity of the storage chip is 32GB.

[0058] In this embodiment, the processor 110 may be a Rockchip RK3568 series processor, which supports industrial-grade wide temperature operation from -40℃ to +70℃ and has low power consumption and high energy efficiency. It is suitable for edge computing scenarios that work continuously for a long time, such as traffic signal optimization, V2X message processing or video structured analysis.

[0059] In this embodiment, the RAM 120 is a surface-mount LPDDR4X chip, which can be directly soldered onto the PCB of the main control board via a high-speed BGA package and electrically connected to the processor 110 via a 64-bit data bus. Optionally, the storage capacity of the RAM 120 can be configured in the range of 4GB to 8GB, with a default configuration of 4GB and an operating speed of 2133MT / s, meeting the memory requirements of basic traffic control tasks (such as traffic light scheduling and serial port device management). It is understood that by replacing the LPDDR4X chip with one of the same package (such as upgrading from K4F8E304HA-MGCH to K4F6E304HB-MGCH), the capacity can be increased to 8GB to support more complex AI inference, multi-channel video stream caching, or containerized application deployment.

[0060] In this embodiment, the main storage chip 130 can be a board-mount eMMC 5.1 chip with a capacity of 32GB. This chip is not only small in size, which can save PCB space, but also has low power consumption.

[0061] The three components work together to form a highly integrated, highly reliable, and evolvable edge computing platform. For example, when deploying vehicle-road cooperative gateway equipment, 4GB of memory can support lightweight operation of both systems (internal network / external network); when more complex models are needed for intersection vehicle detection in the future, it can be upgraded to 8GB of memory without replacing the entire main control board. Meanwhile, the 32GB main storage chip 130 is sufficient to store multiple firmware versions, long-term operation logs, and encrypted communication keys, meeting the data persistence requirements of industrial sites.

[0062] This application also proposes a traffic control cabinet, including the motherboard system described above.

[0063] It is worth noting that since the traffic control cabinet of the present invention includes the motherboard system described above, the embodiments of the traffic control cabinet of the present invention include all the technical solutions of all embodiments of the motherboard system described above, and the technical effects achieved are exactly the same, so they will not be repeated here.

[0064] The above description is merely an optional embodiment of the present invention and does not limit the patent scope of the present invention. All equivalent structural transformations made using the contents of the present invention's specification and drawings under the inventive concept of the present invention, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present invention.

Claims

1. A motherboard system, characterized in that, The motherboard system includes: Chassis; A first I / O interface board and a second I / O interface board are both located in the chassis. The first I / O interface board and the second I / O interface board are arranged side by side, and the interfaces of the first I / O interface board and the interfaces of the second I / O interface board are mirrored. First main control board and second main control board; Both the first I / O interface board and the second I / O interface board have a first slot and a MINI-PCIE slot. Each first slot is connected to a connector. The first main control board is pluggable to the first I / O interface board via one of the connectors. The second main control board is pluggable to the second I / O interface board via another connector. Each MINI-PCIE slot is connected to a MINI-PCIE connector. A first communication control board and a second communication control board, wherein the first communication control board is electrically connected to the first I / O interface board via a MINI-PCIE connector; and the second communication control board is electrically connected to the second I / O interface board via a MINI-PCIE connector. The first communication control board is used to receive the first PCIe channel signal from the first main control board via the first I / O interface board, and output the first PCIe channel signal to the external optical module after signal processing, so as to drive the external optical module to work. The second communication control board is used to receive the second PCIe channel signal from the second main control board via the second I / O interface board, and output the second PCIe channel signal to the external optical module after signal processing, so as to drive the external optical module to work.

2. The motherboard system as described in claim 1, characterized in that, Both the first communication control board and the second communication control board are SFP interface expansion circuit boards, and the SFP interface expansion circuit board includes: An SFP optical port is used to connect to an SFP optical module, and the SFP optical port and the SFP optical module are hot-swappable.

3. The motherboard system as described in claim 1, characterized in that, The first I / O interface board further includes a first power supply circuit and a first power interface that are electrically connected in sequence, and the second I / O interface board further includes a second power supply circuit and a second power interface that are electrically connected in sequence. The output terminal of the second power supply circuit, the second power interface, the first power interface, and the input terminal of the first power supply circuit are connected in sequence. The input terminal of the second power supply circuit is used to connect to the power supply, and the first power supply circuit is used to receive the power supply voltage output by the second power supply circuit through the first power interface and the second power interface.

4. The motherboard system as described in claim 3, characterized in that, The second I / O interface board also includes a power input terminal for connecting to a power supply.

5. The motherboard system as described in claim 1, characterized in that, Both the first I / O interface board and the second I / O interface board further include any one or more combinations of the following: Two network interfaces, including two Ethernet physical layer chips and two RJ45 interfaces. The Ethernet physical layer chips are connected to the main control board via RGMII interfaces. The Ethernet physical layer chips are used to receive network control signals and output the network control signals to the RJ45 interfaces. The RS232 serial port, the first I / O interface board and the second I / O interface board are used to interact with external terminals via the RS232 serial port; The USB Type-C interface supports the USB 3.0 / 2.0 OTG protocol. The first I / O interface board and the second I / O interface board are used for at least one of the following: system firmware burning, device debugging, and peripheral data interaction via the USB Type-C interface. The status indicator group includes four dual-color light-emitting diodes, which are used to display at least one of the following: power supply and operation status, network link status, alarm and fault status, and data transmission and reception status.

6. The motherboard system as described in claim 1, characterized in that, Both the first I / O interface board and the second I / O interface board further include any one or more combinations of the following: SIM card slot, used to insert a SIM card; Storage expansion interfaces, including an mSATA interface, are used to connect storage modules; The encryption module interface includes two SPI interface connectors for connecting the encryption module; Display interfaces, including an HDMI 1.4 interface, for connecting display components; Thermal control interface, including 4-pin Wafer interface; Management auxiliary interface, including at least one of the following: real-time clock battery holder, front panel power switch and reset button connection terminal, and power function configuration jumper group.

7. The motherboard system as described in any one of claims 1 to 6, characterized in that, Both the first main control board and the second main control board include a reset pin, and both the first I / O interface board and the second I / O interface board include: A reset button, which is electrically connected to the reset pin; The reset button is used to output a corresponding reset signal to the reset pin when it is triggered, so that the corresponding first main control board or second main control board is in the initial operating state.

8. The motherboard system as described in any one of claims 1 to 6, characterized in that, Both the first main control board and the second main control board include: processor; The running memory is electrically connected to the processor, and the storage capacity of the running memory is not less than 4GB; The main storage chip is electrically connected to the processor, and the storage capacity of the storage chip is 32GB.

9. A traffic control cabinet, characterized in that, Includes the motherboard system as described in any one of claims 1 to 8.

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