A chopper current feedback instrumentation amplifier

Abstract

This invention relates to the field of electronic circuit technology, and more particularly to a chopper current feedback instrumentation amplifier, comprising: a chopper current feedback amplifier body; a ripple suppression calibration module, which includes a redundant segmented current steering DAC and a digital control logic module; and a dynamic comparator, whose two input terminals are respectively connected to the positive and negative output terminals of the chopper current feedback amplifier body, and whose output terminal is connected to the digital control logic module. During the ripple suppression calibration stage, the digital control logic module outputs a DAC control code based on the logic signal output by the dynamic comparator, and the redundant segmented current steering DAC outputs a compensation current to a preset node of the chopper current feedback amplifier body based on the DAC control code to suppress ripple. This invention at least provides a front-end instrumentation amplifier with low noise, high gain, high input impedance, and low power consumption.

Description

Technical Field

[0001] This invention belongs to the field of electronic circuit technology, and particularly relates to a chopper current feedback instrumentation amplifier. Background Technology

[0002] In large-scale terahertz detector arrays, the detector output signal is extremely weak. Therefore, the readout link needs to amplify, filter, and perform analog-to-digital conversion before the digitized data is processed by an off-chip system. A typical terahertz readout link consists of a front-end instrumentation amplifier, a variable gain amplifier, and an analog-to-digital converter. The front-end instrumentation amplifier, which directly contacts the detector output, is the most critical module in the entire link. It must provide sufficient gain to effectively increase the signal amplitude while maintaining extremely low noise levels to avoid significantly reducing the signal-to-noise ratio of the input signal.

[0003] The output signal of a terahertz detector is mainly concentrated in the low-frequency band. Therefore, the front-end instrumentation amplifier usually uses chopping technology to modulate the inherent flicker noise of the amplifier to a high frequency, which is then suppressed by the subsequent incremental analog-to-digital converter and its cascaded integrator comb filter. In addition, chopping technology can also effectively reduce DC offset. However, the inherent offset of the amplifier will introduce ripple under chopping. Under high gain conditions, the amplitude of this ripple will cause the amplifier to saturate, thereby affecting the stability of the readout link.

[0004] In large-scale arrays, the amplifier area is also strictly limited. Due to the high pixel density and limited area of ​​a single pixel, the lateral dimension of the amplifier must be consistent with the pixel width for column readout structures. Although the lateral dimension of the amplifier is less restricted, excessive length will increase the signal transmission path and introduce additional distortion. In addition, the array is composed of a large number of parallel channels. Even if the power consumption of a single channel is low, the total power consumption is still high. Therefore, the front-end amplifier must have extremely low power consumption characteristics. At the same time, in order to avoid attenuation of the detector output signal, its input impedance must also be high enough.

[0005] Therefore, achieving performance indicators such as low noise, high gain, low ripple, small area, low power consumption, and high input impedance simultaneously in the same circuit poses an extremely high challenge to the design of dedicated front-end instrumentation amplifiers for large-scale terahertz detection arrays. Summary of the Invention

[0006] In view of this, the present invention aims to provide a chopper current feedback instrumentation amplifier, which at least provides a front-end instrumentation amplifier with low noise, high gain, high input impedance and low power consumption.

[0007] To achieve the above objectives, the technical solution created by this invention is implemented as follows: This invention provides a chopper current feedback instrumentation amplifier, which is applied to the readout link of a large-scale terahertz detection array. The chopper current feedback instrumentation amplifier includes: a chopper current feedback amplifier body; a ripple suppression calibration module, which includes a redundant segmented current rudder DAC and a digital control logic module; and a dynamic comparator, whose two input terminals are respectively connected to the positive and negative output terminals of the chopper current feedback amplifier body. The output terminal of the dynamic comparator is connected to the digital control logic module. During the ripple suppression calibration stage, the digital control logic module outputs a DAC control code based on the logic signal output by the dynamic comparator. The redundant segmented current rudder DAC outputs a compensation current to a preset node of the chopper current feedback amplifier body based on the DAC control code to suppress ripple.

[0008] Compared with the prior art, the present invention can achieve the following beneficial effects: The chopper current feedback instrumentation amplifier provided by the present invention for large-scale terahertz detection arrays has advantages such as low noise, high gain, high input impedance and low power consumption. In order to reduce the ripple of the chopper current feedback instrumentation amplifier, a redundant segmented current rudder DAC (digital-to-analog converter) is introduced to achieve ripple suppression. The redundant segmented current rudder DAC has a very small area, low dependence on device matching accuracy, and strong anti-mismatch capability. Combined with the binary search mechanism, ripple suppression can be completed quickly. During the ripple suppression process, the chopper current feedback amplifier body operates in an open-loop manner, and only a simple and small dynamic comparator is needed to achieve high-precision comparison.

[0009] Furthermore, to avoid common-mode stability issues caused by two-stage common-mode feedback, two independent common-mode feedback circuits are used. The first stage, with a smaller swing, adopts a common-mode feedback structure based on differential pairs, i.e., the first-stage common-mode feedback circuit. The second stage, with a larger swing, uses a flip-source follower to achieve large-swing common-mode feedback, i.e., the second-stage common-mode feedback circuit, thus avoiding the load effect caused by detecting the common-mode level through resistors. At the same time, in the second-stage common-mode feedback circuit, MOS transistors with deep linear regions are used to replace polysilicon resistors to further reduce the area. By combining appropriate bias strategies with detector output characteristics, the output common-mode level (Voutp+Voutp) / 2 does not change with the differential-mode signal (Voutp-Voutp). Attached Figure Description

[0010] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments and descriptions of the invention are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings: Figure 1 A schematic diagram of the structure of the chopper current feedback amplifier body as described in the embodiment of the present invention; Figure 2 A schematic diagram of the specific structure of the chopper current feedback amplifier body described in the embodiment of the present invention; Figure 3 A schematic diagram of a ripple suppression calibration stage as described in an embodiment of the present invention; Figure 4 A schematic diagram of the first part of another ripple suppression calibration stage as described in an embodiment of the present invention; Figure 5 A schematic diagram of the Monte Carlo simulation results of the output ripple of the chopper current feedback instrumentation amplifier after calibration, as described in the embodiment of the present invention. Figure 6 A schematic diagram of the input equivalent offset simulation results of the chopper current feedback instrumentation amplifier described in the embodiment of the present invention; Figure 7 A schematic diagram of the semi-LSB optimization process for the second part of another ripple suppression calibration stage as described in an embodiment of the present invention; Figure 8 A schematic diagram of the redundant segmented current steering DAC structure described in the embodiment of the present invention; Figure 9 A schematic diagram illustrating the input-output characteristics of the redundant segmented DAC described in the embodiments of the present invention; Figure 10 A schematic diagram of the DNL characteristics of the redundant segmented DAC described in the embodiments of the present invention; Figure 11 The curve diagram corresponding to the redundant segmented DAC after rearranging all analog outputs in ascending order of amplitude, as described in the embodiment of the present invention; Figure 12 A waveform diagram illustrating the negative ripple suppression calibration process based on binary search and redundant segmented DAC as described in the embodiment of the present invention; Figure 13 A waveform diagram illustrating the positive ripple suppression calibration process based on binary search and redundant segmented DAC as described in the embodiment of the present invention; Figure 14 This is a schematic diagram of the input and output characteristics of a typical segmented current-controlled DAC. Figure 15 This is a schematic diagram of the calibration error distribution when a standard segmented DAC is used for ripple suppression. Figure 16 This is a schematic diagram of the ripple suppression calibration error distribution of the redundant DAC described in the embodiment of the present invention; Figure 17 This is a schematic diagram of the calibration error results when performing ripple calibration using the redundant DAC described in the embodiment of the present invention; Figure 18 The circuit diagram of the first-stage common-mode feedback circuit described in the embodiment of the present invention; Figure 19 A circuit diagram of a second-stage common-mode feedback circuit as described in an embodiment of the present invention; Figure 20 A circuit diagram of another second-stage common-mode feedback circuit described in an embodiment of the present invention. Detailed Implementation

[0011] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not constitute a limitation thereof.

[0012] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other.

[0013] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this invention. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0014] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art will understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0015] The invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0016] refer to Figures 1 to 20 This invention provides a chopper current feedback instrumentation amplifier, which is applied to the readout link of a large-scale terahertz detection array. The chopper current feedback instrumentation amplifier includes: a chopper current feedback amplifier body; and a ripple suppression calibration module, which includes a redundant segmented current rudder DAC (DAC). Figure 1 and Figure 2 The amplifier consists of a CS DAC and a digital control logic module; a dynamic comparator, whose two input terminals are connected to the positive and negative output terminals of the chopper current feedback amplifier body, respectively; and the output terminal of the dynamic comparator is connected to the digital control logic module. During the ripple suppression calibration stage, the digital control logic module outputs a DAC control code based on the logic signal output by the dynamic comparator. The redundant segmented current steering DAC outputs a compensation current to the preset node of the chopper current feedback amplifier body based on the DAC control code to suppress ripple.

[0017] In some embodiments, the digital control logic module includes a sar_count counter and a control code register.

[0018] It should be noted that because the signal output by the terahertz detector is extremely weak, at the UV level, the gain of the entire system of this invention is several thousand times. If the total gain of the system is 2000 times and the offset of the front-end instrumentation amplifier is 2mV, then the final amplification voltage is 4V. Such a large voltage will cause a huge chopping ripple, saturating the entire system. Therefore, before officially entering the chopping amplification stage, it is necessary to eliminate the chopping ripple of the system, that is, to perform the ripple suppression calibration stage.

[0019] In some embodiments, the ripple suppression calibration stage includes an initialization and a binary search process. Initialization includes: the digital control logic module clears the DAC control code, the chopper current feedback amplifier switches to open-loop mode, amplifies the initial ripple using open-loop high gain, and the dynamic comparator makes a polarity decision on the amplified initial ripple and outputs a logic signal representing the decision result to the digital control logic module. The binary search process includes: the digital control logic module iteratively updates the DAC control code based on the logic signal from high to low bits, with the number of iterations equal to the number of bits in the DAC control code. The DAC control code is dynamically updated by retaining valid bits and backing up excess bits. The compensation current output by the redundant segmented current-ruler DAC gradually approaches the target value for canceling the ripple, and finally the target DAC control code is obtained. After the ripple suppression calibration stage is completed, the chopper current feedback instrumentation amplifier enters normal operating mode. In normal operating mode, the digital control logic module outputs the target DAC control code, and the redundant segmented current-ruler DAC outputs a compensation current to the preset node of the chopper current feedback amplifier based on the target DAC control code to reduce chopper ripple.

[0020] In some embodiments, the chopper current feedback amplifier body includes a first chopper switch CH1, a second chopper switch CH2, a third chopper switch CH3, an input stage transconductance Gm1, a feedback stage transconductance Gm2, and a high-gain amplification unit. The high-gain amplification unit includes a first-stage gain and a second-stage gain. The third chopper switch CH3 is located between the first-stage gain and the second-stage gain. The second-stage gain outputs a positive output voltage Voutp and a negative output voltage Voutn. The first input terminal of the first chopper switch CH1 is connected to a reference common-mode voltage VCM through a first switch S1. The first input terminal of the first chopper switch CH1 is also connected to a positive input voltage Vinp through a second switch S2. The second input terminal of the first chopper switch CH1 is connected to a negative input voltage Vinn through a third switch S3. The second input terminal of the first chopper switch CH1 is also connected to a fourth switch S4. The first chopper switch CH1 is connected to the reference common-mode voltage VCM. The two outputs of the first chopper switch CH1 are connected to the two inputs of the input stage transconductance Gm1. The first input of the second chopper switch CH2 is connected to the reference common-mode voltage VCM via the fifth switch S5. The first input of the second chopper switch CH2 is also connected to the positive feedback voltage Vfbp via the sixth switch S6. The second input of the second chopper switch CH2 is connected to the negative feedback voltage Vfbn via the seventh switch S7. The second input of the second chopper switch CH2 is also connected to the reference common-mode voltage VCM via the eighth switch S8. The two outputs of the second chopper switch CH2 are connected to the two inputs of the feedback stage transconductance Gm2. The two outputs of the feedback stage transconductance Gm2 are connected to the two inputs of the first stage gain. The two outputs of the input stage transconductance Gm1 are also connected to the two inputs of the first stage gain.The first-stage gain includes transistors M7 (7th), M8 (8th), M9 (9th), M10 (10th), M11 (11th), M12 (12th), M13 (13th), and M14 (14th). The sources of both transistors M7 and M8 are connected to ground. M7 and M8 share a common gate. The drain of M7 is connected to the source of M9, and the drain of M8 is connected to the source of M10. M10 and M9 share a common gate. The sources of M9 and M10 serve as the two input terminals of the first-stage gain. The drain of M9... The drain of the tenth transistor M10 and the drain of the thirteenth transistor M13 serve as the two output terminals of the first-stage gain. The sources of the thirteenth transistor M13 and the fourteenth transistor M14 are both connected to the power supply voltage. The thirteenth transistor M13 and the fourteenth transistor M14 share a common gate. The drain of the thirteenth transistor M13 is connected to the source of the eleventh transistor M11. The drain of the fourteenth transistor M14 is connected to the source of the twelfth transistor M12. The eleventh transistor M11 and the twelfth transistor M12 share a common gate. The drain of the ninth transistor M9 is connected to the drain of the eleventh transistor M11. The drain of the tenth transistor M10 is connected to the drain of the twelfth transistor M12. The preset node is the drain of the thirteenth transistor M13 or the drain of the fourteenth transistor M14.

[0021] It should be noted that in the application of terahertz CMOS (Complementary Metal Oxide Semiconductor) readout circuits, the instrumentation amplifier needs to meet several key performance requirements simultaneously: its area and power consumption must be low enough to meet the integration requirements of high-density, large-scale terahertz detector arrays; its noise performance should be as excellent as possible to amplify the weak terahertz signal output by the detector with low noise; it must have a high common-mode rejection ratio to adapt to the variable common-mode operating conditions of the terahertz detector; and it must also have a sufficiently high input impedance to avoid additional attenuation of the weak terahertz signal.

[0022] The chopper current feedback amplifier provided by this invention adopts a current feedback instrumentation amplifier architecture to meet the comprehensive requirements of terahertz CMOS readout circuits for high gain, low noise, low power consumption, and small area. Compared with other instrumentation amplifier architectures, the current feedback structure processes signals in the current domain, which has unique advantages. Compared with traditional three-op-amp instrumentation amplifiers, the current feedback architecture can significantly improve common-mode rejection capability by isolating the input stage. At the same time, its overall structure contains only one amplifier unit (i.e., a high-gain amplifier unit), resulting in a smaller circuit area and lower power consumption, making it suitable for integration into large-scale terahertz focal plane arrays. In addition, unlike capacitively coupled instrumentation amplifiers, this architecture does not rely on a large number of capacitors, thereby avoiding the area overhead caused by an excessive number of capacitors.

[0023] In some embodiments, the input stage transconductance Gm1 includes a first transistor M1, a second transistor M2, and a third transistor M3. The second transistor M2 and the third transistor M3 form a differential pair. The first transistor M1 serves as a current source. The connection configuration of the first transistor M1, the second transistor M2, and the third transistor M3 is referenced. Figure 2 This will not be elaborated upon here; the feedback stage transconductance Gm2 includes the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6. The fifth transistor M5 and the sixth transistor M6 form a differential pair. The fourth transistor M4 serves as a current source. The connection method of the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 is referenced. Figure 2 The details are omitted here; the second-stage gain includes the first resistor R1, the second resistor R2, the third transistor, the fourth resistor R4, the fifth resistor R5, the first capacitor C1, the second capacitor C2, the fifteenth transistor M15, the sixteenth transistor M16, the seventeenth transistor M17, the eighteenth transistor M18, and the nineteenth transistor M19. The connection methods of the capacitors, resistors, and transistors in the second-stage gain can be found in [reference needed]. Figure 1 and Figure 2 This will not be elaborated upon here.

[0024] refer to Figure 1 and Figure 2 The input stage transconductance Gm1 and the feedback stage transconductance Gm2 are connected to the output stage (high-gain amplifier unit Gm3) as the input stage and feedback stage, respectively. The input stage transconductance Gm1 converts the input voltage Vin into an input current, and the feedback stage transconductance Gm2 converts the feedback voltage Vfb into a feedback current. The difference in current between the two is suppressed by the high-gain amplifier unit Gm3 to ensure precise current matching between the input and feedback paths. Under high open-loop gain conditions, the closed-loop gain of the current feedback instrumentation amplifier is: ; in, Represents the differential output voltage. Represents differential input voltage. , This represents the resistance value of the first resistor, R1. This represents the resistance value of the third resistor, R3. This represents the resistance value of the second resistor, R2. The transconductance parameter representing the feedback stage transconductance Gm2, The transconductance parameter Gm1 represents the input stage transconductance. Therefore, by adjusting the value of the second resistor R2, the chopper current feedback amplifier can achieve adjustable gain, thus adapting to diverse application requirements under different terahertz detection conditions. Since the output signal of the terahertz detector is mainly concentrated in the low-frequency region, the flicker noise of the amplifier input stage will dominate in this frequency band and significantly reduce the system's signal-to-noise ratio. To effectively suppress this low-frequency noise source, chopper modulation technology is introduced into the circuit to shift the flicker noise to a higher frequency and filter it out in the subsequent stage, thereby achieving low-noise amplification.

[0025] The third chopper switch CH3 of this invention is located between the first-stage gain and the second-stage gain. In conventional designs, demodulation chopper switches are usually arranged between common-source and common-gate current mirrors. By chopping the current mirrors, a higher chopping frequency can be achieved, and the chopping speed can be higher than the operating speed of the amplifier itself. However, this type of current mirror chopping structure cannot effectively eliminate the offset and low-frequency noise introduced by the ninth transistor M9, the tenth transistor M1, the eleventh transistor M11, and the twelfth transistor M12. To address this problem, this invention moves the demodulation chopper switch (the third chopper switch CH3) forward to between the first-stage gain and the second-stage gain, thereby suppressing the offset and noise of the aforementioned devices during the chopping and demodulation process. In addition, since the signal swing is small at this node, this structure can ensure a high chopping speed without introducing additional dynamic performance degradation, thus balancing noise suppression and high-speed operation.

[0026] The gates of the first transistor M1 and the fourth transistor M4 are connected to the bias voltage node generated by the on-chip bias circuit, serving as the tail current source for the differential pair of the input and feedback stages. The seventh transistor M7 and the eighth transistor M8 also serve as tail current sources, with their gates provided with corresponding bias voltages by the bias circuit to set the bias current of the subsequent circuits. The ninth transistor M9 and the tenth transistor M10 are common-gate transistors, with their gates connected to the same bias voltage node to improve the output impedance and mirroring accuracy of the current mirror. The eleventh transistor M11 and the twelfth transistor M12 are also biased by the bias circuit, forming a high-output-impedance common-source common-gate current mirror together with the thirteenth transistor M13 and the fourteenth transistor M14.

[0027] The nineteenth transistor M19 is used as a tail current source. Its gate is also connected to the bias voltage node generated by the on-chip bias circuit to set the bias current of the corresponding branch. Under normal conditions, the second-stage gain does not have the nineteenth transistor M19 as a tail current source. However, since this amplifier is a two-stage common-mode feedback amplifier, the instability of the common-mode level inside the first-stage gain can easily cause the operating current of the fifteenth transistor M15, the sixteenth transistor M16, the seventeenth transistor M17 and the eighteenth transistor in the second-stage gain to not conform to the set current, thus causing the output common-mode level to deviate from the expected value. Therefore, a tail current source is added here to set the operating current of the fifteenth transistor M15 and the seventeenth transistor M17. As long as the common-mode level of the first-stage gain is within a certain range, the operating current of the second-stage gain will not be affected by the common-mode level of the first-stage gain.

[0028] In some embodiments, the dynamic comparator performs polarity determination on the amplified initial ripple and outputs a logic signal characterizing the determination result, including: if the amplified initial ripple is a positive ripple, the dynamic comparator outputs a high level, and the control logic sets the compensation current to be injected into the drain of the fourteenth transistor M14 to offset the positive offset; if the amplified initial ripple is a negative ripple, the dynamic comparator outputs a low level, and the control logic sets the compensation current to be injected into the drain of the thirteenth transistor M13 to offset the negative offset.

[0029] In some embodiments, the digital control logic module iteratively updates the DAC control code based on the logic signal from high bit to low bit. The dynamic update of the DAC control code by retaining valid bits and backing up excessive bits includes: starting from the highest bit, setting the current bit to 1, generating a DAC control code and sending it to the redundant segmented current steering DAC, the redundant segmented current steering DAC activates the current unit with the corresponding weight to adjust the magnitude of the compensation current; after waiting for the analog node to stabilize, the dynamic comparator outputs a logic signal representing the new decision result. If the polarity of the current decision result is the same as the polarity of the initial decision result, the current bit is retained as 1; if the polarity of the current decision result is different from the polarity of the initial decision result, the current bit is backed up to 0; the next bit is updated until all bits of the DAC control code are updated.

[0030] This invention employs a redundant segmented current-controlled DAC for ripple elimination. To further reduce the area, only one redundant segmented current-controlled DAC is used. A switching mechanism selects between branches M13 and M14, injecting current into one branch to eliminate ripple. This invention uses a binary search calibration logic. In some embodiments, the redundant segmented current-controlled DAC is a 9-bit DAC; in this case, ripple suppression can be achieved in just 10 cycles.

[0031] Specifically, under negative feedback, the system establishes a steady-state operating point by adjusting the voltage of the feedback stage. The equivalent current mismatch introduced by input stage device mismatch is absorbed by the feedback loop under closed-loop conditions and converted into the steady-state voltage offset required by the feedback stage to compensate for the input stage mismatch effect. Therefore, without the introduction of a redundant segmented current rudder DAC, the input stage offset is mainly manifested as a DC voltage offset on the feedback stage, which corresponds to the system's equivalent input offset. After introducing a redundant segmented current rudder DAC, the offset compensation mechanism shifts from feedback voltage regulation to the current domain. The redundant segmented current rudder DAC directly corrects the equivalent current mismatch introduced by input stage mismatch by injecting controllable compensation current into critical nodes, thereby reducing the steady-state voltage offset required by the feedback stage to maintain closed-loop balance. This method weakens the impact of input mismatch on the system's operating point before feedback regulation.

[0032] From the perspective of the equivalent model, the input offset voltage of the system can be approximated as: ; in, Represents the offset voltage. The equivalent current offset introduced by the input differential pair To ensure effective transconductance of the feedback stage, the redundant segmented current rudder DAC minimizes the injected current by adjusting the current. This allows for the correction of input mismatch.

[0033] It should be noted that system offset does not originate solely from input stage component mismatch. Parameter mismatches in each stage of the amplifier circuit can introduce offset components. Under negative feedback, these offset sources collectively determine the system's steady-state operating point under closed-loop conditions. Their impact ultimately manifests as an output voltage shift under zero-input conditions, i.e., the system's equivalent offset voltage. By introducing a redundant segmented current-controlled DAC and adjusting its injection current, these various offset effects can be uniformly compensated at the system level, minimizing the output voltage under zero-input conditions and effectively reducing the overall system offset level. This calibration process does not rely on the distinction of specific offset sources but rather uses minimizing the overall output offset as the optimization objective, thus simultaneously compensating for offset components from different circuit stages.

[0034] Under chopping conditions, the DC offset in the system is modulated to the chopping frequency and its harmonics, and the DC component is converted into chopping ripple. Therefore, under non-chopping conditions, the system offset is effectively suppressed, which is equivalent to reducing the ripple amplitude generated after chopping modulation.

[0035] Because terahertz readout circuits have strict area limitations, the self-zeroing high-precision comparators traditionally used in binary search ripple calibration logic are not suitable. To avoid using self-zeroing high-precision comparators that occupy a large area, this solution will briefly operate the amplifier in open-loop mode before entering the comparison stage. Figure 1 In this circuit, clk1 controls the second switch S2, the third switch S3, the sixth switch S6, and the seventh switch S7 to open, while clk2 controls the first switch S1, the fourth switch S4, the fifth switch S5, and the eighth switch S8 to close. The inputs of Gm1 and Gm2 are simultaneously connected to VCM, thus entering open-loop mode. In open-loop mode, any small offset of the amplifier will be amplified to near full swing. Under these conditions, only a dynamic comparator with a very small footprint is needed to achieve high-precision comparison operation.

[0036] Figure 3The figure shows a partial ripple suppression process. The ripple suppression process starts from the initialization stage. The system enters the open-loop working mode to avoid the interference of closed-loop feedback on the ripple judgment. In the open-loop state, since the amplifier is not restricted by feedback, any tiny offset at its input terminal will be significantly amplified, and a voltage change close to the full swing will be presented at the output terminal, so that the ripple information is highly distinguishable in both amplitude and polarity. Under such working conditions, the comparison task is transformed from high-precision amplitude comparison to polarity judgment, and only a dynamic comparator with a simple structure and extremely small area can achieve reliable and high-precision comparison operations. During the initialization process, the control code of the redundant segmented current steering DAC is cleared, and at the same time, the injection direction of the compensation current is set to the default state. Among them, when the logic signal output by the dynamic comparator is 0, it means that the compensation current is injected into the M13 branch, and when the control signal is 1, it means that the compensation current is injected into the M14 branch. Subsequently, this initial state is sent to the analog circuit and waits for the amplifier output and related analog nodes to be fully stable. After the system is stable, an initial judgment on the current residual ripple is made by the comparator, the polarity direction of the ripple is determined according to the comparison result, and the injection branch of the compensation current is selected accordingly. At the same time, the control code is set to the initial trial value with the highest weight bit being "1". After the ripple direction is determined, the system enters the binary search-based ripple suppression search process. In this process, in each iteration, the current control code is first transmitted to the redundant segmented current steering DAC, and the corresponding amplitude of the compensation current is injected into the selected branch. Subsequently, wait for the analog quantity to be stable, and then the comparator judges the polarity change of the residual ripple under the current compensation condition. According to the comparison result, the control code of the current weight bit is retained or rolled back, and the search for the next weight bit is entered while keeping the injection direction of the compensation current unchanged. After each comparison and codeword update, the binary search counter is incremented, and the system continuously refines and adjusts the compensation current with lower weights until the binary search process of all preset bits is completed. Since the injection direction of the compensation current has been determined in the initialization stage, the judgment logic of the comparator in the subsequent search process is always consistent with the adjustment direction of the compensation current, thus ensuring the stability and rapid convergence of the search process. When the binary search process ends, the finally obtained ripple suppression control code is sent and latched, and the system exits the open-loop calibration state and switches back to the normal working mode.

[0037] Figure 3 Here, sar_count = sar_count + 1 means that the counter increments by 1, indicating that the calibration judgment of the current weight bit is completed and the search for the next weight bit is entered. Sar_count < 9 means that the value of the counter is less than 9. Comp == 1 means that the output of the dynamic comparator is at a high level (logic 1). Code represents the digital control code of the DAC; BITS represents the total number of bits of the DAC; 1 << M represents the left shift operation in the digital circuit.

[0038] Figure 5The Monte Carlo simulation results of the output ripple of the current feedback instrumentation amplifier after calibration are presented. It can be seen that the output ripple amplitude after calibration is limited to approximately -3.5mV to 3.5mV, effectively preventing the current feedback instrumentation amplifier from entering saturation. This ripple amplitude is mainly determined by the resolution of the DAC; the higher the DAC accuracy, the smaller the residual ripple, but this also leads to a larger circuit area overhead. This invention uses a 9-bit DAC, achieving a reasonable balance between ripple suppression capability and chip area.

[0039] Input offset of the current feedback instrumentation amplifier is also one of the key performance indicators in the terahertz readout circuit. The offset voltage will be directly amplified in the high-gain link and ultimately reflected in the output of the final stage ADC. Figure 6 The simulation results of the input equivalent offset of the current feedback chopper instrumentation amplifier are presented. It can be seen that the input offset is distributed in the range of approximately -6μV to 4μV, which is on the same order of magnitude as the output signal of the terahertz detector. Since this offset is a static offset, it can be canceled by calibration before the terahertz readout circuit enters normal operating mode, and therefore will not have an adverse effect on the final terahertz imaging performance.

[0040] In some embodiments, the digital control logic module further includes a half-LSB decision unit for implementing half-LSB (least significant bit) optimization.

[0041] In some embodiments, the ripple suppression calibration stage further includes half-LSB optimization. Half-LSB optimization includes: after the DAC control code iteration is completed, the DAC control code register in the digital control logic module stores the final DAC control code. The digital control logic module, while maintaining the current DAC control code, enables a 1 / 2LSB auxiliary current. The 1 / 2LSB auxiliary current is superimposed with the original compensation current and injected into the preset node of the chopper current feedback amplifier body. After the analog node stabilizes, the dynamic comparator performs polarity determination. If the dynamic comparator outputs a high level, the 1 / 2LSB auxiliary current is turned off, and the original DAC control code is incremented by 1 to obtain the target DAC control code. If the dynamic comparator outputs a low level, the 1 / 2LSB auxiliary current is turned off, and the original DAC control code remains unchanged to obtain the target DAC control code.

[0042] In other words, this invention, based on the original binary search-based ripple suppression process, also introduces a semi-minimum step size (semi-LSB) decision optimization mechanism to improve suppression accuracy. Figure 7The flowchart for ripple suppression calibration based on half-LSB decision does not increase the bit width of the DAC control code, which remains at 9 bits. Instead, it temporarily introduces a 1 / 2 LSB auxiliary current at the end of the calibration for decision-making. Based on the comparison result, it determines whether to add 1 to the final DAC control code, thereby improving the ripple suppression accuracy from ±1 LSB to ±1 / 2 LSB.

[0043] For details, please refer to Figure 4 and Figure 7 The system first executes with Figure 3 The consistent initialization and binary search suppression process, in open-loop operation mode, involves clearing the DAC control code and sending it to the redundant segmented current steering DAC. After stabilization and waiting, the initial polarity decision is completed to determine the injection direction of the compensation current. Then, the binary search phase begins. The control logic sequentially determines the weight of each bit according to the predetermined direction. Each iteration includes DAC control code updates, data transmission, and a stabilization and waiting process for the analog node. The comparator output determines whether the current bit should be retained. This process continues until all 9 bits of the DAC control code are determined. At this point, residual ripple suppression is achieved with integer LSB precision. After completing the conventional binary search, the system further enters... During the half-LSB decision adjustment phase, the control logic temporarily activates an additional 1 / 2LSB decision current while keeping the current 9-bit DAC control code unchanged. It then performs a data transmission and stabilization wait operation. The dynamic comparator is used to determine the polarity of the residual ripple after introducing the 1 / 2LSB current. If the comparison result shows that the compensation is still insufficient, the original 9-bit DAC control code is incremented by 1 while keeping the half-LSB decision current off. If the comparison result shows that the compensation is excessive, the original DAC control code is kept unchanged. Through this one-time half-LSB decision process, the DAC control code is finally locked at the position closest to zero residual ripple.

[0044] After completing the half-LSB decision and codeword correction, the final target DAC control code is issued and latched. The system exits the open-loop calibration state and switches back to the normal operating mode. During normal operation, the DAC control code remains constant, achieving high-precision and stable suppression of chopper ripple, while only incurring the cost of a very small area and power consumption by introducing a set of 1 / 2LSB decision current.

[0045] In some embodiments, the low-order bits of the redundant segmented current steering DAC are thermometer-decoded, and the high-order bits of the redundant segmented current steering DAC are binary-decoded.

[0046] In some embodiments, the chopper current feedback instrumentation amplifier introduces a 9-bit resolution DAC. Generally, implementing a 9-bit DAC requires the current mirror to have high device matching accuracy. High matching accuracy often depends on larger MOSFETs and more complex layout, which inevitably leads to a significant increase in chip area. For a current-driven DAC with a binary decoding structure, its differential nonlinearity DNL is as follows: ; in, Indicates the DAC resolution (bit width). This represents the standard deviation of the current mismatch between a unit current source and a current source. This represents the current step corresponding to 1 LSB under ideal conditions.

[0047] It can be seen that in order to maintain a certain DNL, ​​a higher number of bits requires a lower current matching accuracy, which also leads to a huge increase in the current source area. Therefore, a more reasonable approach has always been to use a segmented structure, i.e., high-order temperature code and low-order binary code. Typically, the differential nonlinearity DNL of a segmented DAC is as follows: ; Here, SEG represents the number of bits in the low-order binary code portion of the segmented DAC. It can be seen that compared to a pure binary current-controlled DAC, the differential nonlinearity of the segmented DAC is significantly reduced. However, as the total number of bits in the DAC increases, if the number of bits in the low-order binary code remains unchanged, the number of thermometer codes required for the high-order bits must increase accordingly. This will significantly increase the complexity and area of ​​the decoding logic, thereby further increasing the overall layout area of ​​the current-controlled DAC. For a DAC using a pure thermometer coding structure, its differential nonlinearity DNL is as follows: ; It can be seen that the current-rudder DAC with a pure thermometer encoding structure has the lowest differential nonlinearity, but its decoding logic is the most complex, and therefore occupies the largest circuit area. In comparison, the segmented DAC has a certain advantage in area overhead, but its linear performance is still inferior to that of the pure thermometer encoding DAC.

[0048] To simultaneously combine the advantages of simple binary decoding structure and low digital logic overhead with the low differential nonlinearity of thermometer encoding structure, the current-steering DAC of this invention adopts a segmented DAC architecture. Its low-order bits use thermometer encoding, and its high-order bits use binary encoding. Traditional segmented DACs typically avoid combining high-order binary encoding with low-order thermometer encoding, mainly because the switch from thermometer encoding to binary encoding easily introduces large DNL jumps. To address this issue, this invention uses a redundant segmented DAC structure. By introducing a redundancy mechanism, it effectively suppresses the nonlinear degradation caused by inter-segment switching. Specifically, during the conversion process of adjacent segments, a certain overlap interval is reserved between the output analog quantities, thereby avoiding inter-code jumps. To achieve the above objectives, in Figure 8 The amplitude relationship of the high-order binary current unit in the circuit shown is designed as follows: ; ;in, Here, N represents the current from the first current source in the high-order bits of the DAC, and N represents the number of low-order bits in the DAC circuit. This refers to the current in each current source of the low-order bits of the DAC circuit. M represents the current in the high-order bits of the DAC circuit, starting from the second current source and continuing from there.

[0049] The transmission characteristics and differential nonlinearity (DNL) of the DAC based on the above design are as follows: Figure 9 and Figure 10 As shown, Figure 9 The transmission characteristics of an equivalent 9-bit DAC are presented, where the lower 5 bits use thermometer encoding and the higher 4 bits use binary encoding. The two higher-order binary bits divide the overall transmission characteristics of the DAC into four segments, such as... Figure 9 As shown, there is a certain output overlap interval between adjacent segments, which manifests as a downward jump on the transmission curve. This jump corresponds to a negative value of DNL, ​​such as... Figure 10 As shown. Superficially, a larger DNL seems to imply a decrease in the DAC's output ripple suppression calibration capability; however, when all analog outputs are rearranged in ascending order of amplitude, their corresponding transfer curves (as shown) reveal a different picture. Figure 11 As shown, the input offset amplitude is continuously changing. Therefore, as long as the amplitude of the input offset falls within the output coverage of the redundant segmented DAC, the DAC can accurately suppress the input offset regardless of its specific distribution location. It can be seen that for a DAC used for chopping ripple suppression, the presence of negative DNL will not have an adverse effect on the calibration accuracy. Only positive DNL will lead to a decrease in the output ripple suppression accuracy.

[0050] In redundant segmented DACs, a significant advantage over traditional segmented DACs lies in their insensitivity to circuit mismatch in calibration accuracy. This characteristic is primarily due to the introduction of a low-bit thermometer encoding structure. Because the high-bit bits employ binary encoding and a redundancy mechanism is introduced, the positive differential nonlinearity (DNL) in the segmented redundant DAC system is mainly determined by the low-bit thermometer encoding portion, unaffected by high-bit binary encoding mismatch. Although this segmented redundant DAC may have a large negative DNL, ​​this does not weaken its calibration capability for output ripple. Therefore, it can be considered that the redundant segmented DAC achieves an equivalent higher bit-count DAC accuracy with lower device matching accuracy requirements. Compared to traditional segmented DACs, redundant segmented DACs offer more precise suppression of chopper ripple; simultaneously, their calibration capability is comparable to that of a full thermometer-encoded DAC, while significantly lower in terms of control logic complexity and chip area.

[0051] Another way to understand why redundant segmented DACs are insensitive to circuit mismatch is from another perspective. Within a single segment, due to the use of a thermometer-encoded structure, device mismatch does not cause a sharp upward jump in the analog output. This upward jump is precisely the main factor leading to a decrease in the DAC's dark current calibration capability. Between adjacent segments, due to the downward jump in the transmission characteristics, device mismatch can only lead to an increase or decrease in the amplitude of this downward jump. If device mismatch increases the amplitude of the downward jump, this change will not reduce the DAC's ability to suppress chopper ripple; if device mismatch decreases the amplitude of the downward jump, as long as the degree of mismatch is insufficient to reverse the downward jump into an upward jump, the redundant segmented DAC's ability to suppress chopper ripple will also remain unaffected.

[0052] Therefore, by combining redundant segmented DACs with the aforementioned calibration algorithm, effective ripple suppression can be achieved with a very small circuit area and high calibration speed. In the actual ripple suppression calibration process, the high-bit search is mainly performed in a skipping manner at the segment boundaries, while when the search enters the low-bit stage, it falls into the thermometer encoding region, thus achieving high-precision ripple suppression without requiring high device matching accuracy.

[0053] Figure 12 and Figure 13 Simulation results of the ripple calibration process combining the aforementioned binary search algorithm and redundant piecewise DAC are presented respectively. Figure 12 This corresponds to the negative input imbalance situation. Figure 13For the positive input offset case, the above results are all based on MATLAB modeling. It can be seen that during the calibration process, as the number of comparisons gradually increases, the DAC output continuously approaches the input signal after each iteration, and the difference between the two shows a gradually decreasing trend, eventually converging to a very small range. This process clearly verifies that the proposed binary search algorithm can achieve fast and high-precision ripple calibration with the cooperation of redundant segmented DACs. At the same time, the simulation results also illustrate the importance of adopting the open-loop working mode: in the later stage of calibration, the difference between the DAC output and the input signal is very small. If it is working in the closed-loop state at this time, the amplitude of the comparator's input signal will be significantly reduced, and the comparator's own offset voltage is very easy to introduce misjudgment, thereby limiting the calibration accuracy. By amplifying the small offset and making a decision in the open-loop mode, the influence of the comparator offset on the calibration result can be effectively reduced, thereby ensuring the accuracy and robustness of ripple suppression.

[0054] Figure 14 and Figure 15 The transmission characteristics and differential nonlinearity (DNL) of a typical segmented DAC are presented. In this DAC structure, the lower 5 bits are binary encoded, and the higher 4 bits are thermometer encoded. The relative standard deviation of device mismatch is set to 5%. It can be seen that this structure exhibits a significant DNL deviation. When this DAC is applied to ripple suppression calibration, the corresponding calibration error is as follows: Figure 16 As shown, the results indicate that when DNL has a large positive value, the calibration error also reaches its maximum, severely limiting the ripple suppression accuracy. In contrast, Figure 17 The calibration error results when using a redundant segmented DAC for ripple calibration are presented. It can be seen that the calibration error is always limited to within ±1 LSB throughout the entire input range of the DAC, which verifies that the redundant segmented DAC can still maintain stable and high-precision ripple suppression capability under mismatch conditions.

[0055] In some embodiments, the chopper current feedback instrumentation amplifier further includes a first-stage common-mode feedback circuit, which includes transistors M21 (21st), M22 (22nd), M23 (23rd), M24 (24th), M25 (25th), M26 (26th), M27 (27th), M28 (28th), M29 (29th), and M30 (30th). Transistor M21 and M22 share a common gate. The source of transistor M21 and the drain of transistor M22 are both connected to ground. The gate of transistor M23 is connected to the positive output voltage Voutp. The source of transistor M23 is connected to the source of transistor M24. The drain of transistor M21 is connected to the source of transistor M23. The drain of transistor M23 is connected to the drain of transistor M27. The sources of transistors M27, M28, and M29 are also connected. The sources of transistors M29 and M30 are both connected to the power supply voltage. Transistor M27 shares a common gate with transistor M30. The gates of transistors M28 and M29 are both connected to the output of the first-stage common-mode feedback voltage Vcmfb1. The gates of transistors M13 and M14 are connected to the first-stage common-mode feedback voltage Vcmfb1. The drains of transistors M28, M29, and M24 are connected to the power supply voltage. The drains of both transistor M25 and the 24th transistor M24 are connected to the output of the first-stage common-mode feedback voltage Vcmfb1. The gates of both transistor M25 and the 24th transistor M24 are connected to the reference common-mode voltage VCM. The drains of transistor M22, the source of transistor M25, and the source of transistor M26 are connected together. The drain of transistor M26 is connected to the drain of transistor M30. The gate of transistor M26 is connected to the negative output voltage Voutn.

[0056] In some embodiments, the chopper current feedback instrumentation amplifier further includes a second-stage common-mode feedback circuit, which includes transistors M31 (31st), M32 (32nd), M33 (33rd), M34 (34th), M35 (35th), M36 (36th), M37 (37th), M38 (38th), M39 (39th), M40 (40th), M41 (41st), M42 (42nd), M43 (43rd), M44 (44th), M45 (45th), and M46 (46th). Transistor M47 (47), Transistor M48 (48), Transistor M49 (49), Transistor M50 (50), Transistor M51 (51), Transistor M52 (52), Transistor M53 (53), Transistor M54 (54), a first resistor module R10, and a second resistor module R20; wherein, the source of Transistor M31 and the source of Transistor M32 are connected to ground, the drain of Transistor M32 is connected to the gate of Transistor M31, the source of Transistor M35 is connected to the drain of Transistor M32, and the gate of Transistor M35 is connected to... The drain of transistor M35 (the 35th transistor), the drain of transistor M37 (the 37th transistor), and the drain of transistor M39 (the 39th transistor) are connected together, and all are connected to the positive feedback voltage Vfbp. The source of transistor M37 is connected to the drain of transistor M31 (the 31st transistor), the source of transistor M39 is connected to the power supply voltage, and the gate of transistor M37 is connected to the positive output voltage Voutp. The sources of transistors M33 (the 33rd transistor) and M34 (the 34th transistor) are connected to ground. The drain of transistor M34 is connected to the gate of transistor M33 (the 30th transistor). The source of transistor M36 is connected to the drain of transistor M34, the gate of transistor M36 is connected to the drain of transistor M36, the drain of transistor M36, the drain of transistor M38, and the drain of transistor M40 are connected, the source of transistor M38 is connected to the drain of transistor M33, the source of transistor M40 is connected to the power supply voltage, the gate of transistor M38 is connected to the reference common-mode voltage VCM, and the two ends of the first resistor module R10 are connected to the drain of transistor M31 and the drain of transistor M33, respectively.The source of transistor M41 (41st) and the source of transistor M43 (43rd) are connected to ground. The drain of transistor M43 is connected to the gate of transistor M41 (41st). The source of transistor M45 (45th) is connected to the drain of transistor M43 (43rd). The gate of transistor M45 is connected to the drain of transistor M45 (45th). The drains of transistors M45 (45th), M47 (47th), and M49 (49th) are connected together. The source of transistor M47 (47th) is connected to the drain of transistor M41 (41st). The source of transistor M49 (49th) is connected to the power supply voltage. The gate of transistor M47 (47th) is connected to the reference common-mode voltage VC. M; The source of transistor M42 (42nd) and the source of transistor M44 (44th) are connected to ground. The drain of transistor M44 (44th) is connected to the gate of transistor M42 (42nd). The source of transistor M46 (46th) is connected to the drain of transistor M44 (44th). The gate of transistor M46 (46th) is connected to the drain of transistor M46 (46th). The drains of transistors M46 (46th), M48 (48th), and M50 (50th) are connected and all connected to the negative feedback voltage Vfbn. The source of transistor M48 (48th) is connected to the drain of transistor M42 (42nd). The source of transistor M50 (50th) is connected to the power supply voltage. Transistor M44 (48th)... The gate of transistor M8 is connected to the negative output voltage Voutn. The two ends of the second resistor module R20 are connected to the drains of the forty-first transistor M41 and the forty-second transistor M42, respectively. The drains of the fifty-first transistor M51, the fifty-second transistor M52, the fifty-third transistor M53, and the gate of the fifty-fourth transistor M54 are connected and also connected to the output of the second-stage common-mode feedback voltage Vcmfb2. The gates of the sixteenth transistor M16 and the eighteenth transistor M18 are both connected to the second-stage common-mode feedback voltage Vcmfb2. The sources of the fifty-first transistor M51 and the fifty-second transistor M52 are both connected to ground. The gate of the fifty-first transistor M51 is connected to the negative output voltage Voutn. The gate of transistor M52 is connected to the positive feedback voltage Vfbp, the gate of transistor M53 is connected to the reference common-mode voltage VCM, the source of transistor M53 is connected to the drain of transistor M54, and the source of transistor M54 is connected to the power supply voltage. The gates of transistors M32, M34, M44, and M43 are all connected to the first bias voltage. The gates of transistors M39, M40, M49, and M50 are all connected to the second bias voltage.

[0057] In some embodiments, the first resistor module R10 includes a fifty-fifth transistor M55, a fifty-sixth transistor M56, and a fifty-seventh transistor M57. The gate and drain of the fifty-fifth transistor M55 and the gate of the fifty-sixth transistor M56 are all connected to the drain of the thirty-eighth transistor M38. The drain of the fifty-sixth transistor M56 is connected to the drain of the thirty-first transistor M31. The source of the fifty-sixth transistor M56, the source of the fifty-fifth transistor M55, and the drain of the fifty-seventh transistor M57 are connected to the drain of the thirty-third transistor M33. The source of the fifty-seventh transistor M57 is connected to ground. The second resistor module R20 includes a fifth... The gates of transistors M58 (18th), M59 (59th), and M60 (60th) are connected to the drain of transistor M48 (58th), the drain of transistor M59 (59th), and the drain of transistor M41 (41st). The sources of transistors M59 (59th), M58 (58th), and M60 (60th) are connected to the drain of transistor M42 (42nd). The source of transistor M60 (60th) is connected to ground. The gates of transistors M57 (57th) and M60 (60th) are connected to their respective bias voltages.

[0058] In a fully differential amplifier, the common-mode feedback circuit is an indispensable key module. Its function is to stabilize the common-mode level of the differential amplifier at a predetermined value; otherwise, drift in the common-mode level can easily cause the amplifier to enter an abnormal operating state. For a two-stage amplifier structure, two common-mode feedback methods are typically used: one method is to detect the common-mode output voltage of the second-stage amplifier and feed it back to the first stage, thus requiring only one common-mode feedback loop. However, in instrumentation amplifiers, especially in the instrumentation amplifier structure proposed in this invention, the differential-mode closed-loop gain can reach up to 100 times, corresponding to a differential-mode feedback coefficient of approximately 1 / 100. Thus, the small feedback coefficient gives the differential-mode feedback loop itself good stability, requiring only a small compensation capacitor to achieve stability. However, for common-mode feedback, the feedback coefficient is close to 1, and the common-mode feedback loop and the differential-mode feedback loop largely share the same amplifier channel and compensation network. This makes it difficult for the Miller compensation capacitor, which is originally used to stabilize the differential-mode loop, to simultaneously ensure the stability of the common-mode loop. To achieve the stability of the common-mode loop, it is usually necessary to significantly increase the Miller compensation capacitor, but this will inevitably reduce the unity-gain bandwidth of the differential-mode loop, thereby limiting the operating speed of the amplifier and increasing the chip area of ​​the overall instrumentation amplifier.

[0059] Therefore, this invention employs two independent common-mode feedback loops, namely, independent feedback loops are set for the first-stage gain and the second-stage gain, thereby freeing the design of the Miller compensation capacitor from common-mode stability constraints. In the chopper current feedback amplifier body provided by this invention, the first-stage gain output is located at an internal node, and its voltage swing is relatively small, thus employing... Figure 18 The differential pair-based common-mode feedback structure (first-stage common-mode feedback circuit) shown can meet the stability and linearity requirements. However, for the second-stage gain, due to its large output swing, if the differential pair-based common-mode feedback structure is continued, the large signal swing will cause the differential pair devices to enter the nonlinear operating region, thereby causing a shift in the common-mode voltage. Based on the above considerations, this invention employs a method such as... Figure 19 or Figure 20 The common-mode feedback structure (second-stage common-mode feedback circuit) based on a flip-source follower is shown. The flip-source follower operates similarly to a source follower in principle. It transfers the output voltage to the resistor terminal via transistors M37 (37) and M48 (48), thus avoiding the amplifier open-loop gain reduction problem caused by directly sensing the common-mode level through the resistor, and also avoiding the increased area overhead caused by using large-value resistors. A pair of flip-source followers, consisting of transistors M31 to M40 (31 to 40), transfers the difference between Voutp and the reference common-mode voltage VCM to the first resistor module R10. Subsequently, a current mirror, consisting of transistors M51 (51) and M52 (52), transmits the current change caused by this voltage difference on the first resistor module R10 to the subsequent node. Similarly, another pair of flip-source followers, consisting of transistors M41 to M50, perform the same common-mode detection process on the complementary output. When the output common-mode level is consistent with VCM, the current changes generated by the positive and negative paths cancel each other out, and no additional voltage disturbance is introduced into the gate of transistor M54 at the subsequent node. However, when the output common-mode level deviates from VCM, the current balance on the second resistor module R20 is broken, thereby adjusting the bias state of the amplifier through the feedback path.

[0060] Taking the flip-source follower composed of transistors M31 (31), M32 (32), M35 (35), M37 (37), and M39 (39) as an example, the working mechanism of the other three flip-source followers is the same. A local feedback loop is formed by transistors M31, M32, M35, and M37. The current of transistor M37 does not change with the input voltage but is always set and kept constant by transistor M39. Therefore, the saturation drain-source voltage of transistor M37 is... With its drain voltage remaining largely unaffected by the input, the drain voltage of the 37th transistor M37 can be transferred to the first resistor module R10 in an almost linear manner, ensuring excellent linearity of the flip-source follower regardless of input voltage variations. Furthermore, the 35th transistor M35 is introduced to raise the drain voltage of the 37th transistor M37, thereby ensuring that the 37th transistor M37 always operates in the saturation region and avoids entering the linear region due to changes in Voutp.

[0061] To further reduce the circuit area, for the first resistor module R10 and the second resistor module R20, this invention uses MOSFETs operating in the deep linear region to replace traditional polysilicon resistors as resistive elements, thereby significantly reducing the layout area. Under deep linear region conditions, this MOSFET can be equivalent to a resistor. Since the equivalent resistance of a MOSFET operating in the deep linear region varies with the gate-source voltage... The voltage of a MOSFET changes with the differential-mode signal. Therefore, when the output differential-mode voltage changes, it is necessary to ensure that the gate-source voltage of this type of MOSFET remains constant to avoid the resistance value being modulated by the differential-mode signal, thereby introducing undesirable common-mode disturbances. Therefore, on the Voutp side, a diode-connected level shifting structure composed of 55 diodes is introduced, whose overdrive voltage is fixed, thus ensuring that 56 in the corresponding flip-over source follower has the same overdrive voltage and is effectively clamped. Therefore, even if Voutp changes with the differential-mode signal, the gate-source voltage of 56 remains constant. It remains approximately constant, and its source voltage can be linearly mapped to the resistor node, thereby ensuring that the equivalent resistance implemented by the deep linear region MOSFET remains stable during differential mode changes. For the Voutn side, since its output voltage is located on the other side of VCM and has a lower potential, a symmetrical voltage migration structure is introduced in the direction away from VCM to clamp the gate-source voltage in the same way, thereby ensuring that the MOSFETs on both sides used to implement the equivalent resistance operate stably in the deep linear region when the differential mode signal changes.

[0062] It should be noted that the above analysis implicitly assumes that Voutp > Voutn. This assumption holds true for the terahertz detector readout circuit because the terahertz detector only outputs a positive voltage, and there is no operating condition where Voutp is less than Voutn. Although the chopping operation may introduce some ripple disturbance in the transient state, after introducing a redundant segmented current rudder DAC for ripple suppression, the amplitude of this disturbance is significantly reduced, and its impact on the above assumption and common-mode stability can be ignored.

[0063] The first-stage common-mode feedback circuit is used to detect the common-mode levels of the differential output terminals Voutp and Voutn and stabilize them near the reference common-mode voltage VCM. The first-stage common-mode feedback circuit is an internal common-mode feedback circuit used to stabilize the common-mode level of the first-stage gain.

[0064] M19 serves as the tail current source for the second stage, and its gate is also connected to the bias voltage node generated by the on-chip bias circuit to set the bias current of the corresponding branch. In a conventional two-stage common-mode feedback amplifier structure that detects the common-mode level of the second stage output and feeds it back to the first stage, the second stage typically does not have an independent tail current source; its operating current is mainly determined by the second-stage PMOS current mirror, while the operating current of the NMOS input stage is adaptively adjusted by the common-mode feedback level. However, this invention employs an independent two-stage common-mode feedback structure. The target common-mode level of the first-stage common-mode feedback is a fixed value, which is prone to deviation in actual operation. This deviation directly causes a change in the operating current of the second-stage NMOS input stage transistor, and this current change further causes a deviation in the second-stage output common-mode level, thus causing the final output common-mode level to deviate from the expected value. To reduce the impact of first-stage common-mode level fluctuations on the second-stage bias conditions, the chopper current feedback amplifier introduces M19 as a tail current source in the second-stage gain, and explicitly sets the operating currents of M15 and M17. In this way, as long as the change in the first-stage common-mode level remains within a certain range, the operating current of the second stage can be basically unaffected, which helps to achieve reliable control of the output common-mode level.

[0065] In the first-stage common-mode feedback circuit, M23 and M26 are connected to the differential output node to sample the output voltage. The gates of M24 and M25 share the reference common-mode voltage VCM, converting the deviation between the output common-mode level and the reference value into current changes. M21 and M22 act as tail current sources, with their gates receiving corresponding bias voltages from the bias circuit. This provides stable bias current for the common-mode detection and comparator stages, thereby setting the operating point and transconductance characteristics of the common-mode feedback loop. M27 and M30 above form an active load, converting the current changes below into voltage signals. The gates of M28 and M29 are connected to the drains of M24 and M25, converting current changes into voltage changes and feeding this voltage back to the source. Figure 2 Vcmfb1 in the above refers to the gate of M13 and M14. Through the above feedback mechanism, when the output common-mode voltage deviates from the reference value, Vcmfb1 changes accordingly and adjusts the bias condition of the amplifier, so that the output common-mode voltage gradually recovers and stabilizes at the target value, realizing closed-loop control of the output common-mode level.

[0066] In summary, the chopper current feedback instrumentation amplifier provided by this invention combines a redundant segmented current-steering DAC with a binary search calibration algorithm to achieve high-precision, high-speed chopper ripple suppression under extremely low device matching accuracy requirements. During the ripple suppression calibration process, an open-loop operating mode is adopted, allowing the amplifier's small offset to be fully amplified to near full swing, thus simplifying the comparison task to polarity decision. Under this condition, only a simple, small-area dynamic comparator is needed to complete the highly reliable comparison operation, avoiding the power consumption and area overhead of traditional high-precision comparators. In the common-mode feedback design, two independent common-mode feedback loops are used, so that common-mode stability no longer restricts the design of the differential-mode compensation network. For the second-stage large-swing gain output node, a... A common-mode feedback structure based on a flip-source follower is proposed, which avoids the nonlinearity problem of differential pair structures under large signal conditions while ensuring good linearity. In the common-mode feedback circuit, a MOSFET operating in the deep linear region is used to replace the traditional polysilicon resistor. By introducing a symmetrical voltage migration structure, the gate-source voltage of the MOSFET remains constant when the differential signal changes, thereby effectively suppressing the common-mode modulation introduced by the equivalent resistance changing with the signal and significantly reducing the area overhead of the resistor implementation. Through the synergistic design of the aforementioned circuit structure and calibration mechanism, a low-area and low-complexity overall implementation is achieved while ensuring high ripple suppression accuracy and fast calibration capability. It is particularly suitable for large-scale terahertz detector readout array systems that are highly sensitive to area and power consumption.

[0067] It should be understood that the various forms of processes shown above can be used to reorder, add, or delete steps. For example, the steps described in this invention disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this invention can be achieved, and this is not limited herein.

[0068] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A chopper current feedback instrumentation amplifier, characterized in that, The chopper current feedback instrumentation amplifier is used in the readout link of a large-scale terahertz detection array, and the chopper current feedback instrumentation amplifier includes: Chopper current feedback amplifier body; A ripple suppression calibration module, which includes a redundant segmented current steering DAC and a digital control logic module; A dynamic comparator has two input terminals connected to the positive and negative output terminals of the chopper current feedback amplifier body, respectively. The output terminal of the dynamic comparator is connected to the digital control logic module. During the ripple suppression calibration stage, the digital control logic module outputs a DAC control code based on the logic signal output by the dynamic comparator. The redundant segmented current steering DAC outputs a compensation current to a preset node of the chopper current feedback amplifier body based on the DAC control code to suppress ripple.

2. The chopper current feedback instrumentation amplifier according to claim 1, characterized in that, The ripple suppression calibration stage includes an initialization and a binary search process. The initialization includes: the digital control logic module clears the DAC control code, the chopper current feedback amplifier body switches to open-loop mode, and the initial ripple is amplified by using the open-loop high gain. The dynamic comparator makes a polarity decision on the amplified initial ripple and outputs a logic signal characterizing the decision result to the digital control logic module. The binary search process includes: the digital control logic module iteratively updates the DAC control code based on the logic signal from high bit to low bit, the number of iterations is equal to the number of bits of the DAC control code, and the DAC control code is dynamically updated by retaining valid bits and backing up excessive bits. The compensation current output by the redundant segmented current rudder DAC gradually approaches the target value of canceling ripple, and finally the target DAC control code is obtained. After completing the ripple suppression calibration stage, the chopper current feedback instrumentation amplifier enters the normal operating mode. In the normal operating mode, the digital control logic module outputs the target DAC control code, and the redundant segmented current steering DAC outputs compensation current to the preset node of the chopper current feedback amplifier body based on the target DAC control code to reduce chopper ripple.

3. The chopper current feedback instrumentation amplifier according to claim 2, characterized in that, The chopper current feedback amplifier body includes a first chopper switch, a second chopper switch, a third chopper switch, an input stage transconductance Gm1, a feedback stage transconductance Gm2, and a high-gain amplification unit. The high-gain amplification unit includes a first-stage gain and a second-stage gain. The third chopper switch is located between the first-stage gain and the second-stage gain. The second-stage gain outputs a positive output voltage Voutp and a negative output voltage Voutn. The first input terminal of the first chopper switch is connected to a reference common-mode voltage VCM through a first switch. The first input terminal of the first chopper switch is also connected to a positive input voltage Vinp through a second switch. The second input terminal of the first chopper switch is connected to a negative input voltage Vinn through a third switch. The second input terminal of the first chopper switch is also connected to a reference common-mode voltage VC through a fourth switch. M; the two output terminals of the first chopper switch are respectively connected to the two input terminals of the input stage transconductance Gm1; the first input terminal of the second chopper switch is connected to the reference common-mode voltage VCM through the fifth switch, the first input terminal of the second chopper switch is also connected to the positive feedback voltage Vfbp through the sixth switch, the second input terminal of the second chopper switch is connected to the negative feedback voltage Vfbn through the seventh switch, and the second input terminal of the second chopper switch is also connected to the reference common-mode voltage VCM through the eighth switch; the two output terminals of the second chopper switch are respectively connected to the two input terminals of the feedback stage transconductance Gm2; the two output terminals of the feedback stage transconductance Gm2 are respectively connected to the two input terminals of the first stage gain, and the two output terminals of the input stage transconductance Gm1 are also respectively connected to the two input terminals of the first stage gain; The first-stage gain includes a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, and a fourteenth transistor. The sources of the seventh and eighth transistors are both connected to ground voltage. The seventh and eighth transistors share a common gate. The drain of the seventh transistor is connected to the source of the ninth transistor. The drain of the eighth transistor is connected to the source of the tenth transistor. The tenth and ninth transistors share a common gate. The sources of the ninth and tenth transistors serve as the two input terminals of the first-stage gain. The drains of the ninth and tenth transistors serve as the two output terminals of the first-stage gain. The sources of the thirteenth and fourteenth transistors are both connected to the power supply voltage. The thirteenth and fourteenth transistors share a common gate. The drain of the thirteenth transistor is connected to the source of the eleventh transistor. The drain of the fourteenth transistor is connected to the source of the twelfth transistor. The eleventh and twelfth transistors share a common gate. The drain of the ninth transistor is connected to the drain of the eleventh transistor. The drain of the tenth transistor is connected to the drain of the twelfth transistor. The preset node is the drain of the thirteenth transistor or the drain of the fourteenth transistor.

4. The chopper current feedback instrumentation amplifier according to claim 3, characterized in that, The dynamic comparator performs polarity determination on the amplified initial ripple and outputs a logic signal characterizing the determination result, including: if the amplified initial ripple is a positive ripple, the dynamic comparator outputs a high level, and the control logic sets a compensation current to be injected into the drain of the fourteenth transistor to compensate for the positive offset; if the amplified initial ripple is a negative ripple, the dynamic comparator outputs a low level, and the control logic sets a compensation current to be injected into the drain of the thirteenth transistor to compensate for the negative offset.

5. The chopper current feedback instrumentation amplifier according to claim 4, characterized in that, The digital control logic module iteratively updates the DAC control code based on the logic signal from high to low bits, and dynamically updates the DAC control code by retaining valid bits and backing up excess bits, including: Starting from the most significant bit, the current bit is set to 1, and a DAC control code is generated and sent to the redundant segmented current rudder DAC. The redundant segmented current rudder DAC activates the current unit with the corresponding weight to adjust the magnitude of the compensation current. After the simulated node stabilizes, the dynamic comparator outputs a logic signal representing the new decision result. If the polarity of the current decision result is the same as the polarity of the initial decision result, the current bit is kept as 1. If the polarity of the current decision result is different from the polarity of the initial decision result, the current bit is reset to 0. Update the next bit, until all bits of the DAC control code have been updated.

6. The chopper current feedback instrumentation amplifier according to claim 5, characterized in that, The ripple suppression calibration stage also includes half-LSB optimization, which includes: After the DAC control code iteration is completed, the DAC control code register in the digital control logic module stores the final DAC control code. While maintaining the current DAC control code, the digital control logic module enables a 1 / 2 LSB auxiliary current. This 1 / 2 LSB auxiliary current, superimposed on the original compensation current, is injected into a preset node of the chopper current feedback amplifier. After the analog node stabilizes, the dynamic comparator performs a polarity decision. If the dynamic comparator outputs a high level, the 1 / 2 LSB auxiliary current is turned off, and the original DAC control code is incremented by 1 to obtain the target DAC control code. If the dynamic comparator outputs a low level, the 1 / 2 LSB auxiliary current is turned off, and the original DAC control code remains unchanged to obtain the target DAC control code.

7. The chopper current feedback instrumentation amplifier according to claim 1, characterized in that, The low-order bits of the redundant segmented current steering DAC are thermometer-decoded, and the high-order bits of the redundant segmented current steering DAC are binary-decoded.

8. The chopper current feedback instrumentation amplifier according to claim 1, characterized in that, The chopper current feedback instrumentation amplifier further includes a first-stage common-mode feedback circuit, which includes transistors 21, 22, 23, 24, 25, 26, 27, 28, 29, and 30. Transistors 21 and 22 share a common gate. The source and drain of transistor 21 and transistor 22 are both connected to ground. The gate of transistor 23 is connected to the positive output voltage Voutp. The source of transistor 23 is connected to the source of transistor 24. The drain of transistor 21 is connected to the source of transistor 23. The drain of transistor 23 is connected to the drain of transistor 27. The sources of transistors 27, 28, 29, and 30 are all connected to the power supply voltage. Transistors 27 and 30 share a common gate. The gate of transistor 28... The gates of transistors 28, 29, 24, and 25 are all connected to the output of the first-stage common-mode feedback voltage Vcmfb1. The drains of transistors 24, 25, 26, and 27 are all connected to the output of the first-stage common-mode feedback voltage Vcmfb1. The gates of transistors 24 and 25 are connected to the reference common-mode voltage VCM. The drains of transistors 22, 25, and 26 are connected. The drain of transistor 26 is connected to the drain of transistor 30. The gate of transistor 26 is connected to the negative output voltage Voutn.

9. The chopper current feedback instrumentation amplifier according to claim 1, characterized in that, The chopper current feedback instrumentation amplifier further includes a second-stage common-mode feedback circuit, which includes transistors 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, a first resistor module, and a second resistor module. Among them, the source of the thirty-first transistor and the source of the thirty-second transistor are connected to the ground voltage, the drain of the thirty-second transistor is connected to the gate of the thirty-first transistor, the source of the thirty-fifth transistor is connected to the drain of the thirty-second transistor, the gate of the thirty-fifth transistor is connected to the drain of the thirty-fifth transistor, the drain of the thirty-fifth transistor, the drain of the thirty-seventh transistor and the drain of the thirty-ninth transistor are connected together, the source of the thirty-seventh transistor is connected to the drain of the thirty-first transistor, the source of the thirty-ninth transistor is connected to the power supply voltage, and the gate of the thirty-seventh transistor is connected to the positive output voltage Voutp. The source of the 33rd transistor and the source of the 34th transistor are connected to ground voltage. The drain of the 34th transistor is connected to the gate of the 33rd transistor. The source of the 36th transistor is connected to the drain of the 34th transistor. The gate of the 36th transistor is connected to the drain of the 36th transistor. The drains of the 36th transistor, the 38th transistor, and the 40th transistor are connected together. The source of the 38th transistor is connected to the drain of the 33rd transistor. The source of the 40th transistor is connected to the power supply voltage. The gate of the 38th transistor is connected to the reference common-mode voltage VCM. The two ends of the first resistor module are connected to the drains of the 31st transistor and the 33rd transistor, respectively. The source of transistor 41 and the source of transistor 43 are connected to ground voltage. The drain of transistor 43 is connected to the gate of transistor 41. The source of transistor 45 is connected to the drain of transistor 43. The gate of transistor 45 is connected to the drain of transistor 45. The drains of transistor 45, transistor 47, and transistor 49 are connected together. The source of transistor 47 is connected to the drain of transistor 41. The source of transistor 49 is connected to the power supply voltage. The gate of transistor 47 is connected to the reference common-mode voltage VCM. The source of transistor 42 and the source of transistor 44 are connected to ground voltage. The drain of transistor 44 is connected to the gate of transistor 42. The source of transistor 46 is connected to the drain of transistor 44. The gate of transistor 46 is connected to the drain of transistor 46. The drains of transistor 46, transistor 48 and transistor 50 are connected together. The source of transistor 48 is connected to the drain of transistor 42. The source of transistor 50 is connected to the power supply voltage. The gate of transistor 48 is connected to the negative output voltage Voutn. The two ends of the second resistor module are connected to the drains of transistor 41 and transistor 42 respectively. The drains of transistors 51, 52, and 53, and the gate of transistor 54 are connected together. The sources of transistors 51 and 52 are both connected to ground. The gate of transistor 51 is connected to the negative feedback voltage Vfbn, the gate of transistor 52 is connected to the positive feedback voltage Vfbp, the gate of transistor 53 is connected to the reference common-mode voltage VCM, the source of transistor 53 is connected to the drain of transistor 54, and the source of transistor 54 is connected to the power supply voltage. The gates of the thirty-second transistor, the thirty-fourth transistor, the forty-fourth transistor, and the forty-third transistor are all connected to a first bias voltage, while the gates of the thirty-ninth transistor, the fortieth transistor, the fortyth transistor, and the fiftieth transistor are all connected to a second bias voltage.

10. The chopper current feedback instrumentation amplifier according to claim 9, characterized in that, The first resistor module includes a 55th transistor, a 56th transistor, and a 57th transistor. The gate, drain, and gate of the 55th transistor are all connected to the drain of the 38th transistor. The drain of the 56th transistor is connected to the drain of the 31st transistor. The source, source, and drain of the 56th transistor, the 55th transistor, and the 57th transistor are connected to the drain of the 33rd transistor. The source of the 57th transistor is connected to ground voltage. The second resistor module includes a 58th transistor, a 59th transistor, and a 60th transistor. The gate, drain, and gate of the 58th transistor are all connected to the drain of the 48th transistor. The drain of the 59th transistor is connected to the drain of the 41st transistor. The source, source, and drain of the 59th transistor, the 58th transistor, and the 60th transistor are connected to the drain of the 42nd transistor. The source of the 60th transistor is connected to ground voltage.

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