A method for manufacturing a thin copper core substrate composite outer layer circuit

Abstract

The application discloses a kind of thin copper core substrate composite outer layer circuit preparation methods including copper plate pretreatment, three times patterning processing, filling and metallization deposition such as pressing, by adopting insulating colloid filling and double-sided pressing, realize boss zero gap covering, in combination with whole plate electroplating instead of local plating, significantly improve plating adhesion and surface flatness, and adopt gradient etching process to complete concave cup forming and outer layer circuit production step by step, realize the high-precision etching of 140-160 μm deep concave cup, the reliability, adhesion and heat dissipation performance of the thin copper core substrate circuit can be effectively improved by the method, suitable for high-density electronic component packaging field.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board manufacturing technology, specifically to a method for preparing a thin copper core substrate composite outer layer circuit. Background Technology

[0002] As electronic products evolve towards miniaturization, high density, and high reliability, higher demands are placed on circuit boards, which serve as critical carrier components. For example, in the field of Mini / Micro LED displays, the LED carrier board needs to fabricate bosses with a height of approximately 0.08 mm (for electrical connection and heat dissipation) and precision cups with a depth of approximately 0.15 mm (for accommodating and positioning the LEDs) on an extremely thin (e.g., 0.4 mm thick) copper core substrate, while ensuring that the outer layer circuitry (especially the positive and negative electrode pads) has extremely high bonding strength and reliability.

[0003] Currently, the traditional manufacturing process commonly used in the industry typically includes the following steps: first, etching protrusions onto a copper core substrate; then, using thermally conductive adhesive or prepreg (PP) for window lamination (i.e., reserving a window for the protrusion position); next, grinding until the protrusion is exposed; then, locally plating copper foil onto the surface of a small protrusion area to increase thickness; and finally, using chemical etching to fabricate the concave cups and outer layer circuitry (such as...). Figure 1 (As shown).

[0004] However, the aforementioned traditional processes face numerous technical bottlenecks when applied to ultrathin copper core substrates:

[0005] 1. Pressing misalignment and adhesive overflow: Due to the extremely thin copper core substrate and insufficient rigidity, the boss is prone to misalignment (the misalignment rate can reach about 10%) during the pressing process between the boss and the thermally conductive adhesive / prepreg (PP). At the same time, the thermally conductive adhesive / PP is easily squeezed onto the surface of the boss, and subsequent grinding makes it difficult to completely remove it to make it flush with the boss, affecting the surface flatness.

[0006] 2. Excessive gaps lead to poor flatness: The window-opening lamination process inevitably leaves gaps (usually greater than 0.075mm) between the boss and the surrounding insulating colloid. These gaps will cause uneven copper plating during subsequent whole-board electroplating, forming depressions, which seriously affect the overall flatness of the copper core substrate surface, and thus affect the fabrication accuracy of the outer layer circuitry and the electrical performance of electronic component mounting.

[0007] 3. Insufficient adhesion of small-area copper foil plating: Traditional processes only apply a layer of copper foil (e.g., 35μm) to a small area of ​​the negative electrode boss. Due to the small plating area and significant edge effect, the adhesion between the copper foil and the substrate boss is weak. The copper foil is prone to detachment during subsequent electronic component mounting or when subjected to thermal stress, which has become a recognized technical challenge in the industry.

[0008] 4. Difficulty in controlling the etching precision of concave cups: When using single chemical etching to make deep concave cups, the depth-to-width ratio is large, and the etching solution is difficult to exchange. This can easily lead to sidewall tilting, over-etching at the bottom, or uneven etching depth, making it difficult to meet the customer's precise requirements for the shape and depth of the concave cup.

[0009] Existing technologies typically employ a combination of methods, including "boss etching," "thermal conductive adhesive laser windowing and lamination followed by grinding," "copper foil plating on small-area bosom surfaces," and "single-stage independent concave cup chemical etching." However, this approach fails to fundamentally address the aforementioned issues of misalignment, gaps, bonding strength, and etching precision, thus limiting the application of thin copper core substrates in precision electronic component packaging. Therefore, developing a method for fabricating composite outer layer circuitry on thin copper core substrates that can simultaneously solve the aforementioned technical problems has significant practical implications and application value. Summary of the Invention

[0010] The purpose of this invention is to overcome the shortcomings of the prior art and provide a method for fabricating composite outer layer circuits on a thin copper core substrate, achieving the following technical objectives: 1. Achieve precision etching of recessed cups with a depth of 140-160μm on thin copper core substrates with a thickness of 0.3-0.5mm; 2. Ensure that the adhesive and the boss are seamlessly bonded after the copper core substrate is laminated and filled, thereby improving the bonding strength and tightness; 3. Ensure the uniformity of the copper core substrate surface after electroplating and improve the adhesion of the copper foil on the outer positive and negative electrode bosses; 4. Ensure the reliability of LED chip components and the efficient heat dissipation performance of the copper core substrate, providing a mass-producible solution.

[0011] To achieve the above objectives, the present invention adopts the following technical solution: A method for fabricating a composite outer layer circuit on a thin copper core substrate includes the following steps: S1 Copper Plate Pretreatment: Prepare a copper core substrate with a predetermined thickness and an isolation groove, fill the isolation groove with insulating colloid and cure it; S2 First Patterning Process: The first dry film application, the first pattern transfer, the first chemical etching, and the first film removal are performed sequentially on both sides of the copper core substrate to form a double-sided boss structure. S3 Browning Treatment: The surface of the copper core substrate after the protrusion is formed is subjected to browning treatment to form a dense browning film; S4 Press Filling: Apply insulating colloid to both sides of the copper core substrate and press it together, and fill the gap between the bosses with the insulating colloid. S5 Grinding and Leveling: Grind the insulating colloid until the surface of the boss is exposed; S6 metallization deposition: copper plating and electroplating are performed on both sides of the copper core substrate to form a uniform metal plating layer on the copper core substrate and the colloidal flat surface. S7 Second Patterning Process: Sequentially perform second dry film application, second pattern transfer, second chemical etching, and second film removal to form a preliminary concave cup structure; S8 Third Patterning Process: The process involves sequentially applying a third dry film, transferring the pattern, chemically etching, and removing the film, while simultaneously completing the concave cup finishing and outer layer circuit formation to obtain a composite outer layer circuit structure.

[0012] Preferably, in step S1, the thickness of the copper core substrate is 0.3-0.5 mm.

[0013] Preferably, in steps S2, S7, and S8, the dry film is a photoresist dry film with a thickness of 30-40 μm. The dry film application process parameters are: application temperature 100-110℃, application pressure 0.4-0.6 MPa, and application speed 1.5-2 m / min.

[0014] Preferably, in step S2, the first pattern transfer uses LDI laser direct imaging exposure with a laser wavelength of 380-400 nm and an exposure energy of 160-180 mJ / cm². 2 The developing process uses a sodium carbonate solution with a concentration of 0.8-1.2%, a developing temperature of 30-35℃, and a developing time of 45-60 seconds.

[0015] Preferably, in step S2, the first chemical etching uses a copper chloride etching solution, wherein Cu in the etching solution... 2+ Concentration 140-160 g / L, hydrochloric acid concentration 50-70 g / L, etching temperature 45-50℃, etching rate 12-15 μm / min, using 1.5-2.0 kg / cm 2 Spray etching under spray pressure; after etching, the boss height is 70-90μm, the perpendicularity is ≥89°, the surface roughness Ra=0.3-0.5μm, and there is no side etching phenomenon.

[0016] Preferably, in steps S1 and S4, the insulating colloid is composed of 23-25 ​​wt% bisphenol A type epoxy resin, 15.5-16.5 wt% alicyclic epoxy resin, 13.5-14.5 wt% methylhexahydrophthalic anhydride, 4.5-5.5 wt% accelerator, 24-36 wt% silica, 4.5-8.5 wt% high thermal conductivity filler, 2.5-3.5 wt% epoxy silane coupling agent, and 0.5-2.5 wt% leveling agent, wherein the high thermal conductivity filler is at least one of aluminum nitride or boron nitride.

[0017] Preferably, the pressing process parameters in step S4 are: first stage heating to 145-170℃, pressure 8-16 kg / cm². 2 Hold the temperature and pressure for 40-60 minutes; in the second stage, raise the temperature to 175-185℃ and the pressure to 18-25 kg / cm².2 Maintain heat and pressure for 50-60 minutes; in the third stage, cool down to below 60℃ and apply pressure of 10-15 kg / cm². 2 The cooling rate is 2-3℃ / min.

[0018] Preferably, the grinding in step S5 is a stepped grinding, and ultrasonic cleaning is used after grinding to remove surface particle residue.

[0019] Preferably, in step S6, the copper plating is performed using a chemical copper plating solution, wherein the copper plating solution contains Cu 2+ The concentration of copper plating solution is 5-8 g / L, the NaOH concentration is 10-15 g / L, the treatment temperature is 40-45℃, the treatment time is 15-20 min, the chemical copper deposition thickness is 6-8 μm, and no peeling is observed after tape testing; the entire board is electroplated using an acidic copper sulfate system, with CuSO4 in the plating solution. 5H2O concentration 200-250g / L, H2SO4 concentration 50-70g / L, Cl - Concentration 50-80 mg / L, brightener 0.1-0.3 g / L, electroplating parameters: current density 2-3 A / dm³ 2 Temperature 25-30℃, electroplating time 45-55min, electroplating layer thickness 30±2μm, copper thickness uniformity on copper core substrate surface ≥98%.

[0020] Preferably, in step S7, the same etching solution system and process parameters as the first chemical etching are used, with an etching depth of 110-130μm, a verticality of the concave cup sidewall ≥88° after etching, and a surface roughness Ra≤0.4μm; in step S8, the third chemical etching uses the same etching solution system as the first chemical etching, with a current etching depth of 25-35μm for the front concave cup, a cumulative etching depth of 140-160μm, a line width and spacing error ≤±5μm after etching of the outer layer circuit, and an etching uniformity ≥95%.

[0021] Preferably, the browning treatment in step S3 uses a solution containing 20-30 g / L Cu. 2+ The browning solution contains 80-100 g / L H2SO4 and 5-10 g / L oxidant. The treatment temperature is 35-40℃, the treatment time is 60-90 seconds, the micro-etching amount is 1.2-1.5 μm, the browning film thickness is 0.3-0.5 μm, and the film adhesion is ≥5 N / cm (no peeling in the cross-cut test), ensuring good adhesion between the copper core substrate and the colloid.

[0022] Preferably, in steps S2, S7, and S8, a 3-5 wt% NaOH solution is used for film removal at a temperature of 45-55°C for 60-90 seconds of spraying. After film removal, the substrate undergoes a three-stage water wash, resulting in a surface conductivity ≤10 μS / cm. The parameters for the third film removal and subsequent water washing and drying are as follows: the water washing temperatures are 30-35°C, 40-45°C, and 50-55°C respectively, with each stage lasting 30 seconds. The drying temperature is 70-80°C, and the drying time is 2-3 minutes. After drying, the surface moisture content of the copper core substrate is ≤0.1%. This standardized film removal and water washing / drying process avoids the influence of residual film or moisture on subsequent processes.

[0023] The beneficial effects are: 1. It achieves integrated precision fabrication of bosses, concave cups and outer layer circuits on thin copper core substrates. Through the process route of "copper plate pretreatment - three-stage patterning treatment - lamination filling - metallization deposition", it ensures that the dimensional accuracy of each structure is qualified, which can effectively improve the bonding strength and reliability of the outer layer circuits.

[0024] 2. By adopting double-sided adhesive pressing and filling with stepped grinding process, the adhesive and boss can be seamlessly combined and filled with zero gaps, completely eliminating the flatness problem and stress concentration points caused by traditional window opening process. The copper plating uniformity of the whole board after electroplating reaches more than 98%. 3. By adopting "whole board electroplating" instead of "partial plating", the raised areas that need to be thickened and the entire copper core substrate surface can obtain a uniform electroplated copper layer. The adhesion of copper foil plating on small raised areas can be increased to more than 95%. After cross-cut test and thermal stress test (288℃, 10s, 3 cycles), there is no copper foil peeling phenomenon, which can effectively solve the industry problem of copper foil easy to fall off the raised surface.

[0025] 4. The innovative use of a stepped etching process to form the concave cup (the first etching process etches most of the depth of the concave cup separately, and the second etching process is synchronized with the peripheral circuit to the final depth) can significantly reduce the difficulty of a single etching, improve etching uniformity and shape controllability, and accurately control the cumulative etching depth of the concave cup within 140-160μm to meet customer assembly and appearance requirements.

[0026] 5. Starting with the material system, a special insulating colloid formula was designed that is highly matched with the thermal expansion coefficient of the copper core substrate, has good fluidity and strong adhesion. In terms of process, precise browning, multi-stage pressing and fine grinding were used to provide key guarantees for the successful implementation of the entire process and the acquisition of high-reliability products.

[0027] 6. This application has strong process compatibility. By adjusting the pattern and process parameters, it can adapt to different design requirements for bosses, concave cups and circuit designs, providing a mass-producible solution for the packaging of high-density, high-reliability electronic components. Attached Figure Description

[0028] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 This is an existing process; Figure 2 A cross-sectional view of a copper core substrate with insulating colloid-filled isolation grooves; Figure 3 A cross-sectional view of the copper core substrate after the first etching to form double-sided bosses; Figure 4 A cross-sectional view of a copper core substrate after it has been coated with insulating colloid on both sides and pressed together. Figure 5 A cross-sectional view of a copper core substrate after the insulating colloid has been ground until the bosses are exposed. Figure 6 This is a cross-sectional view of the copper core substrate after electroplating. Figure 7 This is a cross-sectional view of a copper core substrate with outer circuit patterns formed after the third etching. Figure 8 Photo of the final product; In the diagram: 1. Copper core substrate; 2. Isolation groove; 3. Boss; 4. Insulating colloid layer; 5. Metal plating layer; 6. Prepreg. Detailed Implementation

[0029] The technical solution of the present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. It should be understood that the following embodiments are only used to explain the present invention and are not intended to limit the present invention.

[0030] This invention provides a method for preparing composite outer layer circuits on a thin copper core substrate. The core process includes: first dry film application and pattern transfer (protrusion pattern) → first etching → first film removal → browning → lamination and filling → grinding → copper immersion → whole board electroplating → second dry film application and pattern transfer (preliminary concave cup structure) → second etching → second film removal → third dry film application and pattern transfer (outer layer circuit pattern and concave cup refinement) → third etching → third film removal.

[0031] Example This embodiment provides a method for fabricating a thin copper core substrate composite outer layer circuit, which can be used as an LED lamp bead carrier board, including the following steps: S1 Copper Plate Pretreatment: Prepare a copper core substrate with a thickness of 0.3-0.5mm and isolation grooves. Fill the isolation grooves with insulating colloid and cure it (see [link to documentation]). Figure 2 , Figure 2This is a cross-sectional view of a copper core substrate with an insulating colloid-filled isolation groove. The copper core substrate 1 has an isolation groove 2, which is filled with insulating colloid 4. After filling, the surface flatness of the copper core substrate is ≤5μm, ensuring the stability of the substrate structure and preventing deformation during subsequent lamination. The insulating colloid consists of 23-25wt% bisphenol A type epoxy resin, 15.5-16.5wt% alicyclic epoxy resin, 13.5-14.5wt% methylhexahydrophthalic anhydride, 4.5-5.5wt% accelerator, 24-36wt% silica, 4.5-8.5wt% high thermal conductivity filler, 2.5-3.5wt% epoxy silane coupling agent, and 0.5-2.5wt% leveling agent. The high thermal conductivity filler is at least one of aluminum nitride or boron nitride, and the epoxy silane coupling agent is γ- Glycidoxypropyltrimethoxysilane (KH560), the insulating colloid formulated with the above-mentioned formula has good flow and filling properties, a thermal expansion coefficient that matches that of copper, and strong chemical bonding with the browning layer through coupling agents.

[0032] S2 First Graphical Processing: First dry film application: Select DF-200 photoresist dry film with a thickness of 30-40μm and apply it to both sides of the copper core substrate. The film application temperature is controlled at 100-110℃, the film application pressure is 0.4-0.6MPa, and the film application speed is 1.5-2m / min to ensure that the dry film is tightly bonded to the copper surface without air bubbles. First pattern transfer: The designed double-sided protrusion pattern is exposed onto the dry film using LDI laser direct imaging. The laser wavelength is 380-400nm, and the exposure energy is 160-180mJ / cm². 2 After exposure, use a 0.8-1.2% sodium carbonate solution at 30-35℃ for 45-60 seconds to develop, dissolving the unexposed dry film and exposing the surface of the copper core substrate to be etched. First chemical etching: using copper chloride etching solution, with Cu in the etching solution 2+ Concentration 140-160 g / L, hydrochloric acid concentration 50-70 g / L, etching temperature 45-50℃, etching rate 12-15 μm / min, using 1.5-2.0 kg / cm 2 Spray etching with spray pressure; a first chemical etching process forms bosses on both sides of the copper core substrate with a height of 70-90μm, a perpendicularity ≥89°, and a surface roughness Ra=0.3-0.5μm (see [link to documentation]). Figure 3 , Figure 3 This is a cross-sectional view of the copper core substrate after the first etching to form double-sided bosses. In the figure, bosses 3 are etched on the copper core substrate 1. First film removal: The film removal is performed using a 3-5 wt% NaOH solution at a temperature of 45-55℃, with a spray treatment of 60-90 seconds. After film removal, the copper core substrate and the boss surface are cleaned by three-stage water washing, and the surface conductivity is ≤10μS / cm.

[0033] S3 browning treatment: using a solution containing 20-30g / L Cu 2+ A browning solution containing 80-100 g / L H2SO4 and 5-10 g / L hydrogen peroxide (an oxidant) is used to treat the surface of the copper core substrate after the protrusions are formed. The treatment temperature is 35-40℃, the treatment time is 60-90 seconds, and the micro-etching amount is 1.2-1.5 μm, forming a dense browning film with a thickness of 0.3-0.5 μm. This browning film can greatly enhance the adhesion between the copper surface and the subsequent insulating colloid, and its adhesion is ≥5N / cm (no peeling in the cross-cut adhesion test), ensuring good adhesion between the copper core substrate and the colloid.

[0034] S4 Lamination Filling: Apply insulating colloid to both sides of the copper core substrate and laminate them together, filling the gaps between the bosses with the insulating colloid (see [link]). Figure 4 , Figure 4 This is a cross-sectional view of a copper core substrate coated with insulating colloid on both sides and then laminated. After lamination, an insulating colloid layer 4 is formed on the surface of the copper core substrate 1 and in the gap between the bosses 3. The insulating colloid is the same material as the insulating colloid in step S1, and will not be described again. The lamination process parameters are as follows: First stage: heat to 145-170℃, pressure 8-16kg / cm², hold for 40-60min to allow the colloid to melt and begin to flow and fill the gap between the bosses; Second stage: heat to 175-185℃, pressure 18-25kg / cm². 2 The mixture is kept at a constant temperature and pressure for 50-60 minutes to allow the colloid to fully solidify and achieve molecular-level bonding with the sidewalls of the bosses; in the third stage, the temperature is lowered to below 60℃, and the pressure is 10-15 kg / cm². 2 The cooling rate is 2-3℃ / min to ensure that the colloid completely fills the gaps between the bosses and achieves molecular-level bonding.

[0035] S5 Grinding and Leveling: Using a belt grinder, successively use 1000# and 1200# abrasive belts to perform a stepped grinding of the insulating colloid on the surface of the copper core substrate until the surface of the boss is completely exposed (see [link]). Figure 5 , Figure 5 (This is a cross-sectional view of the copper core substrate after the insulating colloid has been ground until the bosses are exposed.) After grinding, ultrasonic cleaning is used to remove residual particles on the surface to ensure the uniformity of the subsequent electroplating layer.

[0036] S6 metallization deposition: Copper plating treatment: The polished copper core substrate is immersed in a chemical copper plating solution, in which Cu... 2+With a concentration of 5-8 g / L and a NaOH concentration of 10-15 g / L, the treatment temperature is 40-45℃ and the treatment time is 15-20 min. The chemical copper deposition thickness is 6-8 μm. The tape test shows no peeling. The deposited chemical copper layer is dense and has good adhesion, which can provide a conductive substrate for subsequent electroplating. Full-board electroplating: The copper core substrate was electroplated using an acidic copper sulfate system, with CuSO4 in the plating solution. 5H2O concentration 200-250g / L, H2SO4 concentration 50-70g / L, Cl - Concentration 50-80 mg / L, brightener 0.1-0.3 g / L, electroplating parameters: current density 2-3 A / dm³ 2 Temperature 25-30℃, electroplating time 45-55min, electroplating layer thickness 30±2μm, copper thickness uniformity on copper core substrate surface ≥98%; A uniform metal plating layer is formed on the flat surface of the copper core substrate and insulating colloid through copper plating and full-board electroplating (see [link]). Figure 6 , Figure 6 This is a cross-sectional view of the copper core substrate after electroplating. A metal plating layer 5 is formed on the top of the copper core substrate 1 in the figure.

[0037] S7 Second Graphical Processing: Second dry film application: After the entire board is electroplated, a second dry film is applied to the front side of the copper core substrate (the side where the concave cup needs to be made is defined as the front side of the copper core substrate). The process parameters are the same as the first dry film application, and DF-200 photoresist dry film with a thickness of 30-40μm is still used. Second pattern transfer: The designed concave cup pattern is transferred onto the dry film using LDI laser direct imaging. The process parameters are the same as the first pattern transfer, with an alignment accuracy of ±10μm. The exposure energy can be adjusted to 100-150mJ / cm according to the copper thickness. 2 ; Second chemical etching: Using the same etching solution system and process parameters as the first chemical etching, the copper layer with a depth of 110-130μm is etched away, forming a preliminary concave cup structure on the front side of the copper core substrate. After etching, the verticality of the concave cup sidewall is ≥88°, the surface roughness Ra≤0.4μm, and there are no defects such as bottom over-etching or sidewall tilting. Second film removal: The process parameters are the same as the first film removal. After film removal, the surface is washed three times with water, and the electrical conductivity of the boss surface is ≤10μS / cm.

[0038] S8 Third Graphical Processing: Third dry film application: The process parameters are the same as the first dry film application, and DF-200 photoresist dry film with a thickness of 30-40μm is still used. The third pattern transfer: LDI laser direct imaging is used to transfer the designed double-sided outer layer circuit pattern and the final pattern of the concave cup onto the dry film simultaneously. The process parameters are the same as those of the first pattern transfer. The circuit pattern is required to be free of defects such as open circuits, short circuits, incomplete etching, pinholes and gaps. This pattern transfer requires precise alignment with the boss and the initial concave cup structure. The third chemical etching: Using the same etching solution system as the first chemical etching, this etching achieves two purposes: firstly, it etches the initial concave cup downwards by 25-35 μm, bringing its total depth to 140-160 μm, completing the concave cup finishing process and forming the final concave cup that meets the requirements (see [link]). Figure 7 and Figure 8 , Figure 7 This is a cross-sectional view of a copper core substrate with outer layer circuitry formed after the third etching. Figure 8 (This is a photo of the final product). Secondly, the designed outer layer circuit pattern is etched on both sides of the copper core substrate. After etching, the line width and spacing error of the outer layer circuit is ≤±5μm, the etching uniformity is ≥95%, and the edges are clear.

[0039] The third stripping process: The process parameters are the same as the first stripping process. After stripping, the substrate undergoes a three-stage washing and drying process. The washing temperatures for each stage are 30-35℃, 40-45℃, and 50-55℃, with each stage lasting 30 seconds. The drying temperature is 70-80℃, and the drying time is 2-3 minutes. After drying, the surface moisture content of the copper core substrate is ≤0.1%, and the surface conductivity is ≤10μS / cm. This results in a highly reliable thin copper core substrate composite outer layer circuit product. The standardized stripping and washing / drying process avoids the influence of residual film or moisture on subsequent processes.

[0040] Performance testing The products obtained in the above embodiments were tested, and the results are as follows: The machining depth accuracy of the concave cup is 150±8μm, which meets the design requirement of 140-160μm.

[0041] Gap between colloid and boss: Microscopic observation confirmed that zero gap was achieved. After electroplating of the whole board, the surface of the copper core substrate was flat and there was no depression caused by the traditional windowing process.

[0042] Copper foil adhesion: The copper foil layers on the positive and negative electrode bosses were subjected to a cross-cut adhesion test and three cycles of thermal stress impact at 288℃ / 10s, and no copper foil peeling was observed. The adhesion is improved by more than 95% compared to traditional small-area local plating processes.

[0043] Copper core substrate surface flatness: The thickness deviation of the entire board is ≤8μm, which fully meets the requirements of high-precision surface mounting.

[0044] Product reliability: It has passed 1000 hours of high temperature and high humidity (85℃ / 85%RH) testing and 1000 cycles of cold and heat (-40℃~125℃) testing, and the electrical connection performance is stable and without failure.

[0045] Comparative Example 1 (Verifying the importance of whole-board electroplating) The difference between this comparative example and the embodiment is that, in step S6, instead of full-board electroplating, a small-area localized plating method from the traditional process is used. Specifically, only the area around the raised surface is locally electroplated using a mask (the plating thickness is the same as in the embodiment, 30±2μm). The remaining process steps are completely consistent with the embodiment. Performance testing revealed localized detachment of the copper foil after cross-cut adhesion testing, and significant copper foil peeling after the second cycle of 288℃ / 10s thermal stress impact. Poor electrical connection was observed after 500 hours of high temperature and high humidity (85℃ / 85%RH) testing. It is evident that the localized plating process, due to the small plating area and significant edge effect, significantly reduces the adhesion between the copper layer and the substrate raised surface. Furthermore, a small gap remains between the colloid and the raised surface, affecting overall flatness and reliability. This demonstrates that full-board electroplating plays a crucial role in improving the adhesion of copper layers on small-area raised surfaces, ensuring surface uniformity and overall reliability.

[0046] Comparative Example 2 (Verifying the importance of the tiered etching process) The difference between this comparative example and the embodiment is that the second patterning process in step S7 is omitted, and the final concave cup (target depth 150μm) is directly formed in step S8 through a single etching. The remaining process steps are the same as in the embodiment. Performance testing revealed that the concave cup machining depth accuracy reached 165μm, but the uniformity was poor; the perpendicularity of the concave cup sidewall was approximately 82°, indicating significant side etching; when testing the etching accuracy of the outer layer circuit, a line width and spacing error of 8μm was found. It is evident that the large depth-to-width ratio of a single etching operation and the difficulty in etchant exchange lead to prominent problems such as sidewall tilting, bottom over-etching, and uneven depth. Adopting a stepped etching process (etching most of the depth first, and then simultaneously refining with the circuit) can significantly improve etching uniformity and shape controllability, ensuring the dimensional accuracy of the concave cup and the outer layer circuit.

[0047] Comparative Example 3 (Verifying the importance of insulating colloid formulation and lamination process) The difference between this comparative example and the embodiment is that the insulating colloid used in steps S1 and S4 lacks alicyclic epoxy resin, and the pressing process is simplified to single-stage pressing (temperature 165℃, pressure 12kg / cm², time 60min), while the remaining processes are the same as in the embodiment. Performance testing revealed that when the bonding force between the insulating colloid and the boss was tested using a cross-cut tester, the insulating colloid peeled off; after pressing, the colloid had poor flowability, and there were obvious gaps (approximately 70~90μm) around the boss; after 200 cycles of thermal cycling (-40℃~125℃), the insulating colloid cracked. It is evident that changing the insulating colloid formulation and simplifying the pressing process significantly reduced the bonding force between the colloid and the copper core substrate, leading to decreased structural reliability. This indicates that the insulating colloid formulation and multi-stage pressing process are crucial for achieving seamless bonding between the colloid and the boss and ensuring structural stability.

[0048] In summary, this invention has successfully solved several key technical challenges in fabricating high-reliability composite outer layer circuits on ultrathin copper core substrates through optimized process flow and material system.

[0049] It should be noted that the above embodiments are merely preferred embodiments of the present invention and are not intended to limit the present invention. Those skilled in the art can make various adjustments and modifications to the colloidal formulation, etching parameters, electroplating thickness, etc., without departing from the principles of the present invention, and these should also be considered within the scope of protection of the present invention. The scope of protection of the present invention should be determined by the claims.

Claims

1. A method for fabricating a composite outer layer circuit on a thin copper core substrate, characterized in that, Includes the following steps: S1 Copper Plate Pretreatment: Prepare a copper core substrate with a predetermined thickness and an isolation groove, wherein the isolation groove is filled with insulating colloid and cured; S2 First Patterning Process: The first dry film application, the first pattern transfer, the first chemical etching, and the first film removal are performed sequentially on both sides of the copper core substrate to form a double-sided boss structure. S3 Browning Treatment: The surface of the copper core substrate after the protrusion is formed is subjected to browning treatment to form a dense browning film; S4 Pressing and Filling: Apply insulating colloid to both sides of the copper core substrate and press it together, so that the insulating colloid fills the gap between the bosses; S5 Grinding and Leveling: Grind the insulating colloid until the surface of the boss is exposed; S6 Metallization Deposition: Copper plating and whole-board electroplating are performed sequentially on both sides of the copper core substrate to form a uniform metal plating layer on the copper core substrate and the colloidal flat surface. S7 Second Patterning Process: Sequentially perform second dry film application, second pattern transfer, second chemical etching, and second film removal to form a preliminary concave cup structure; S8 Third Patterning Process: The process involves sequentially applying a third dry film, transferring the pattern, chemically etching, and removing the film, while simultaneously completing the concave cup finishing and outer layer circuit formation to obtain a composite outer layer circuit structure.

2. The preparation method according to claim 1, characterized in that, In step S1, the thickness of the copper core substrate is 0.3-0.5 mm.

3. The preparation method according to claim 1, characterized in that, In steps S2, S7, and S8, the dry film is a photoresist dry film with a thickness of 30-40 μm. The dry film application process parameters are: application temperature 100-110℃, application pressure 0.4-0.6 MPa, and application speed 1.5-2 m / min.

4. The preparation method according to claim 1, characterized in that, In step S2, the first pattern transfer uses LDI laser direct imaging exposure with a laser wavelength of 380-400 nm and an exposure energy of 160-180 mJ / cm². 2 ; The developing solution is sodium carbonate solution with a concentration of 0.8-1.2%, a developing temperature of 30-35℃, and a developing time of 45-60 seconds.

5. The preparation method according to claim 1, characterized in that, In step S2, the first chemical etching uses a copper chloride etching solution, wherein Cu in the etching solution... 2+ Concentration 140-160 g / L, hydrochloric acid concentration 50-70 g / L, etching temperature 45-50℃, etching rate 12-15 μm / min, using 1.5-2.0 kg / cm 2 Spray etching under spray pressure; after etching, the boss height is 70-90μm, the perpendicularity is ≥89°, the surface roughness Ra=0.3-0.5μm, and there is no side etching phenomenon.

6. The preparation method according to claim 1, characterized in that, In steps S1 and S4, the insulating colloid is composed of 23-25 ​​wt% bisphenol A type epoxy resin, 15.5-16.5 wt% alicyclic epoxy resin, 13.5-14.5 wt% methylhexahydrophthalic anhydride, 4.5-5.5 wt% accelerator, 24-36 wt% silica, 4.5-8.5 wt% high thermal conductivity filler, 2.5-3.5 wt% epoxy silane coupling agent, and 0.5-2.5 wt% leveling agent, wherein the high thermal conductivity filler is at least one of aluminum nitride or boron nitride.

7. The preparation method according to claim 1, characterized in that, The pressing process parameters in step S4 are as follows: the first stage temperature is raised to 145-170℃, and the pressure is 8-16 kg / cm². 2 Hold the temperature and pressure for 40-60 minutes; in the second stage, raise the temperature to 175-185℃ and the pressure to 18-25 kg / cm². 2 Maintain heat and pressure for 50-60 minutes; in the third stage, cool down to below 60℃ and apply pressure of 10-15 kg / cm². 2 The cooling rate is 2-3℃ / min.

8. The preparation method according to claim 1, characterized in that, The grinding in step S5 is a stepped grinding process, and ultrasonic cleaning is used after grinding to remove residual particles from the surface.

9. The preparation method according to claim 1, characterized in that, The copper plating in step S6 uses a chemical copper plating solution, wherein Cu in the copper plating solution 2+ The concentration of copper plating solution is 5-8 g / L, the NaOH concentration is 10-15 g / L, the treatment temperature is 40-45℃, the treatment time is 15-20 min, the chemical copper deposition thickness is 6-8 μm, and no peeling is observed after tape testing; the entire board is electroplated using an acidic copper sulfate system, with CuSO4 in the plating solution. 5H2O concentration 200-250g / L, H2SO4 concentration 50-70g / L, Cl - Concentration 50-80 mg / L, brightener 0.1-0.3 g / L, electroplating parameters: current density 2-3 A / dm³ 2 Temperature 25-30℃, electroplating time 45-55min, electroplating layer thickness 30±2μm, copper thickness uniformity on copper core substrate surface ≥98%.

10. The preparation method according to claim 1, characterized in that, In step S7, the same etching solution system and process parameters as the first chemical etching are used, with an etching depth of 110-130μm, a verticality of the concave cup sidewall ≥88° after etching, and a surface roughness Ra≤0.4μm. In step S8, the third chemical etching uses the same etching solution system as the first chemical etching, with a current etching depth of 25-35μm for the concave cup, a cumulative etching depth of 140-160μm, a line width and spacing error of ≤±5μm after etching of the outer layer circuit, and an etching uniformity ≥95%.

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