A method of testing a semiconductor device and a testing apparatus

Abstract

The application discloses a kind of test method and testing device of semiconductor device, belong to semiconductor technical field.For the technical problem that the breakdown voltage of semiconductor device is long in quasi-static scanning and affects productivity, the application identifies appropriate starting voltage before quasi-static scanning.That is, before quasi-static scanning, first apply probe current with the amplitude between off-state current and breakdown criterion current to semiconductor device, and the corresponding voltage measured is used as starting voltage.Increase from the starting voltage under quasi-static test condition to determine the breakdown voltage.Based on the amplitude characteristics of the aforementioned probe current, the corresponding starting voltage can reflect the critical point in the current-voltage characteristic curve of semiconductor device from linear conduction region to nonlinear breakdown region.Starting from the starting voltage for quasi-static scanning, the invalid measurement of pre-breakdown window domain can be effectively skipped, so as to significantly shorten the overall test time while ensuring accurate measurement results and avoiding false breakdown.

Description

Technical Field

[0001] This application relates to semiconductor technology, specifically to a testing method and testing apparatus for semiconductor devices. Background Technology

[0002] Breakdown voltage is a key electrical parameter for measuring the reliability and withstand voltage capability of semiconductor devices, especially high-voltage metal-oxide-semiconductor field-effect transistors (HVMOSFETs) and their derivative structures such as laterally diffused metal-oxide-semiconductor (LDMOS). Specifically, breakdown voltage refers to the voltage value at which, under the device's off-state condition, the reverse voltage applied between the drain and source increases to a certain critical value, at which point the internal electric field strength of the device is sufficient to trigger avalanche breakdown or other conduction mechanisms, resulting in a sharp increase in drain current.

[0003] Breakdown voltage testing typically employs a voltage sweep method, which involves applying a gradually increasing DC voltage, starting from zero volts or a low voltage, to the drain of the device while simultaneously monitoring the drain current flowing through it. The test continues until the drain current reaches a preset, relatively large threshold or meets a specific current condition.

[0004] To obtain accurate and repeatable breakdown voltage measurements, the industry generally adopts quasi-static test conditions. Quasi-static testing requires a sufficiently slow voltage scan rate, allowing the charge traps inside the device ample time to complete the charging and discharging process after each voltage step, thereby achieving electrical steady state.

[0005] However, quasi-static testing conditions can significantly extend the testing cycle. For production scenarios such as wafer-level testing (WAT) that require rapid screening of massive numbers of devices, this time-consuming quasi-static scanning method severely restricts the overall testing throughput and production capacity, creating an irreconcilable contradiction between testing accuracy and production efficiency.

[0006] Therefore, how to achieve accurate and rapid testing of the breakdown voltage of semiconductor devices is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0007] In view of this, embodiments of this application provide a testing method and testing apparatus for semiconductor devices.

[0008] In a first aspect, this application provides a testing method for a semiconductor device. The method includes: applying a probe current to the semiconductor device and measuring the corresponding initial voltage, wherein the semiconductor device has an off-state and a breakdown state, the probe current is greater than the current of the semiconductor device in the off-state, and less than the breakdown criterion current indicating the breakdown state; applying an increasing test voltage to the semiconductor device under quasi-static test conditions and acquiring the test current of the semiconductor device at each test voltage until the test current reaches the breakdown criterion current, wherein the test voltage at which the test current reaches the breakdown criterion current is configured as the breakdown voltage of the semiconductor device, and the test voltage is greater than or equal to the initial voltage.

[0009] Secondly, this application provides a testing apparatus for a semiconductor device, which includes a probe station and a measurement unit. When the semiconductor device is placed on the probe station for a breakdown voltage test, the test probes in the probe station are connected to the test pins of the semiconductor device in the breakdown voltage test. The measurement unit is connected to the test probes and is used to apply voltage or current to the test pins through the test probes and detect the corresponding electrical parameters to perform the testing method described in the first aspect and determine the breakdown voltage of the semiconductor device.

[0010] Based on the semiconductor device testing method and apparatus provided in this application, addressing the technical problem of long testing time during quasi-static scanning of semiconductor devices' breakdown voltage, which affects production capacity, this application identifies a suitable starting voltage before quasi-static scanning. Specifically, before quasi-static scanning, a probe current with an amplitude between the off-state current and the breakdown criterion current is applied to the semiconductor device, and the measured corresponding voltage is used as the starting voltage. Then, the breakdown voltage is determined by incrementally increasing the quasi-static test conditions from this starting voltage. Based on the amplitude characteristics of the aforementioned probe current, its corresponding starting voltage can reflect the critical point in the current-voltage characteristic curve of the semiconductor device that transitions from the linear conduction region to the nonlinear breakdown region. Starting the quasi-static scan from this starting voltage can effectively skip invalid measurements in the pre-breakdown window region, thereby significantly shortening the overall testing time while ensuring accurate measurement results and avoiding false breakdowns. Attached Figure Description

[0011] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0012] Figure 1 These are voltage timing curves of semiconductor devices under rapid testing conditions provided in some embodiments of this application.

[0013] Figure 2 These are voltage timing curves of semiconductor devices under quasi-static test conditions provided in some embodiments of this application.

[0014] Figure 3 These are current-voltage characteristic curves of semiconductor devices under quasi-static test conditions provided in some embodiments of this application.

[0015] Figure 4 This is an exemplary flowchart of a test method for probe current and starting voltage provided in some embodiments of this application.

[0016] Figure 5 This is an exemplary flowchart of semiconductor device pre-screening provided in some embodiments of this application.

[0017] Figure 6 This is an exemplary flowchart of a starting voltage determination method provided in some embodiments of this application. Detailed Implementation

[0018] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0019] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of this application. Therefore, the drawings only show the components related to this application and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the shape, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0020] In this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" are used only for descriptive and distinguishing purposes and should not be construed as indicating or implying relative importance.

[0021] Application Overview: Before further explaining the test method, this application describes a test apparatus for performing breakdown voltage tests on semiconductor devices. This test apparatus generally includes a probe station and a measurement unit.

[0022] When a semiconductor device is placed on a probe station for breakdown voltage testing, the test probes in the probe station are connected to the test pins of the semiconductor device during the breakdown voltage test. The measurement unit is connected to the test probes and is used to apply voltage or current to the test pins through the test probes and detect the corresponding electrical parameters (such as the current when a constant voltage is applied and the voltage when a constant current is applied) to perform the test method specified for breakdown voltage testing and determine the breakdown voltage of the semiconductor device.

[0023] Specifically, in the breakdown voltage test of semiconductor devices, the test pins are generally the cathode / anode of a diode, the drain / source of a MOSFET, etc., to achieve physical and electrical contact between the test probe and the semiconductor device.

[0024] Test units can generally be built based on source measurement units (SMUs) or other current and voltage sources. An SMU is a precision instrument capable of simultaneously providing voltage / current source output and voltage / current measurement, possessing four-quadrant operation capability, and is particularly suitable for testing the breakdown characteristics of semiconductor devices. Depending on the testing requirements, dedicated withstand voltage testers or parameter analyzers can also be used instead of SMUs.

[0025] During actual testing, the source measurement unit (SMU) is connected to the test probes via a triaxial cable to precisely apply voltage (or current) to the test pins and simultaneously detect the corresponding current (or voltage), thereby performing the measurement method specified for breakdown voltage testing to determine the breakdown voltage of the semiconductor device.

[0026] In existing technologies, breakdown voltage testing typically employs either a sweep or step scan method. Specifically, for reverse breakdown voltage testing of PN junctions / diodes: the SMU is set to voltage source mode, and an increasing reverse voltage is applied to the cathode (reverse bias direction) of the device under test starting from 0V at a certain step size (e.g., 1V) or a linear rate (e.g., 10V / s), while simultaneously measuring the reverse leakage current flowing through the device in real time. When a sharp increase in leakage current is detected and exceeds a preset threshold (e.g., 1mA or 10μA, depending on the device specifications), the scan is stopped, and the voltage value corresponding to that moment is recorded as the breakdown voltage. For drain-source breakdown voltage testing of MOSFETs: the gate and source are shorted (putting the device in the off state), the SMU is connected to the drain and source, and an increasing drain-source voltage is applied, monitoring the drain current. When the drain current reaches a specified value (e.g., 250μA), the corresponding voltage is the breakdown voltage.

[0027] As described in the background section, quasi-static test conditions are generally used in the breakdown voltage testing of semiconductor devices (especially high-voltage semiconductor devices). In practical applications, quasi-static test conditions can ensure that the measurement results accurately reflect the physical characteristics of the device.

[0028] Specifically, high-voltage metal-oxide-semiconductor (HV MOS) and its derivative structures, such as lateral double-diffused metal-oxide-semiconductor (LDMOS), have complex electric field distributions in their drift regions and contain numerous charge traps. When a voltage is applied, these traps require a certain amount of time to charge and discharge to reach a steady state. If a fast scan is used, the trapped charges do not have enough time to respond, causing the measured current-voltage characteristics to deviate from their true quasi-static behavior.

[0029] To further illustrate the testing process of the two testing methods (the aforementioned quasi-static test and rapid test), this application also provides the variation of the test voltage over time under quasi-static test conditions and rapid test conditions using the voltage sweep method. Among them, Figure 1 These are current-voltage characteristic curves of semiconductor devices under rapid testing conditions provided in some embodiments of this application. Figure 2 These are current-voltage characteristic curves of semiconductor devices under quasi-static test conditions provided in some embodiments of this application.

[0030] like Figure 1 and Figure 2 As shown, during the execution of the voltage scanning method, the test voltage starts from 0V and increases in a specific step voltage. After each increase, the current of the semiconductor is tested until the current matches the breakdown criterion current (such as a specific value or the current characteristic of the breakdown criterion current). The test voltage at this point is recorded as the breakdown voltage.

[0031] like Figure 1 and Figure 2 As shown, in Figure 1 In rapid testing conditions, current measurement is performed immediately after the test voltage reaches a new amplitude based on the step amplitude. However, in quasi-static testing conditions, a certain time is waited after reaching a new amplitude before measurement. That is, the measurement delay occurs between the completion of the change in test voltage amplitude and the start of the next amplitude change. Figure 1 The quick test shown only includes measurement time, while... Figure 2In the quasi-static test, the test delay includes not only the measurement time but also the compliance check wait. This compliance check wait is used to ensure that after a new voltage step is applied, the charge distribution inside the device reaches a steady state, and the current flowing through the device no longer undergoes significant transient changes, thereby ensuring that the collected current data can truly reflect the quasi-static characteristics under that voltage.

[0032] In high-voltage MOS devices, especially LDMOS devices with complex drift region structures, numerous charge traps exist at the semiconductor-dielectric interface. When the device is subjected to high electric field stress, these traps capture or release charge carriers, and their charging and discharging processes have specific time constants. In fast scan testing, the voltage step interval is much shorter than the trap response time constant, causing the trap charge to fail to reach its corresponding steady-state concentration at the instant of measurement. This non-equilibrium state temporarily alters the electric field distribution inside the device, resulting in an abnormally increased leakage current observed even at relatively low applied voltages. This phenomenon is recorded as a breakdown event, but the corresponding voltage value is not the device's true physical breakdown voltage; rather, it is a "pseudo-breakdown" caused by trap dynamics. This "pseudo-breakdown" voltage value is typically lower than the true breakdown voltage and has poor repeatability, failing to accurately characterize the device's withstand voltage capability.

[0033] Due to the aforementioned compliance check waiting time, quasi-static testing often has a long execution time. Specifically, quasi-static testing requires a sufficiently long waiting time for each voltage step to cover the response time constant of the slowest charge trap. In the initial stage of the voltage scan, from zero volts to the pre-breakdown window near the actual breakdown voltage, the device is in a high-resistance off-state, and the leakage current is extremely weak, typically in the nanoampere (nA) or even picoampere (pA) range. To accurately read such a small current signal, the measurement system requires a long integration time to suppress noise and improve the signal-to-noise ratio. Simultaneously, to ensure sufficient response of the trap charge, an additional compliance check waiting time is needed. The superposition of these two time components makes single-point measurement in the pre-breakdown window significantly more time-consuming than in the breakdown region. Since this invalid measurement region covers most of the voltage scan range, its cumulative effect directly leads to a significant increase in the entire quasi-static testing cycle, becoming a key bottleneck restricting wafer-level testing capacity.

[0034] Specifically, let's take the test results of the same semiconductor device under different test conditions as an example. When using rapid testing, considering that it does not involve the aforementioned compliance check waiting time (abbreviated as waiting time, also known as wtime or Tcd), the overall test time can be 0.37s, and the test result can be 22.8V. However, when using quasi-static condition testing, the waiting time can be 0.02s, thus the test time can be 2.74s, and the measured voltage result is 24.4V. It can be seen that compared to rapid testing, quasi-static testing increases the test time by 6.4 times. Furthermore, rapid testing has an error of up to 1.6V in terms of breakdown voltage.

[0035] In practical applications, the aforementioned rapid testing's measurement error in breakdown voltage and the testing time of quasi-static testing are both unacceptable. Specifically, for the production and quality control of high-voltage semiconductor devices, a breakdown voltage measurement error of 1.6V exceeds the allowable range of the process window, potentially leading to qualified devices being misjudged as failed or devices with potential defects being incorrectly released, directly affecting product reliability and yield. This error originates from the "pseudo-breakdown" phenomenon, whose physical mechanism is unrelated to the actual avalanche breakdown of the device, and cannot be used as an effective basis for evaluating the device's withstand voltage capability; therefore, it is unacceptable in engineering practice. On the other hand, the quasi-static testing's long single-point measurement time of 2.74 seconds constitutes a serious bottleneck in wafer-level testing (WAT) scenarios. A standard wafer typically contains thousands to tens of thousands of devices under test (DUTs). If each DUT requires several seconds for breakdown voltage (BV) testing, the testing cycle for the entire wafer will be extended to several hours or even longer. This severely limits the throughput of the production line, significantly increases testing costs, and hinders the rapid iteration and mass production ramp-up of advanced processes. Therefore, the insufficient accuracy of rapid testing and the low efficiency of quasi-static testing in existing technologies together constitute the core obstacles restricting the efficient and reliable electrical characterization of high-voltage semiconductor devices.

[0036] To address the aforementioned issues, this application provides a testing method for semiconductor devices. Addressing the technical problem of prolonged testing time during quasi-static scanning of semiconductor device breakdown voltage, which impacts production capacity, this application identifies a suitable starting voltage before quasi-static scanning. Specifically, before quasi-static scanning, a probe current with an amplitude between the off-state current and the breakdown criterion current is applied to the semiconductor device, and the measured corresponding voltage is used as the starting voltage. The breakdown voltage is then determined by incrementally increasing the quasi-static test conditions from this starting voltage. Based on the amplitude characteristics of the aforementioned probe current, its corresponding starting voltage reflects the critical point in the semiconductor device's current-voltage characteristic curve where it transitions from the linear conduction region to the nonlinear breakdown region. Starting the quasi-static scan from this starting voltage effectively skips invalid measurements within the pre-breakdown window, thereby significantly shortening the overall testing time while ensuring accurate measurement results and avoiding false breakdowns.

[0037] Based on the aforementioned test method, in actual testing, the test unit can load the test method provided in this application to perform breakdown voltage testing of semiconductor devices, and the test unit / test device configured with the test method is also within the protection scope of this application.

[0038] To further illustrate the application principle of this process, this application provides a current-voltage characteristic curve obtained based on quasi-static condition testing (…). Figure 3 ).in, Figure 3 The current-voltage characteristic curve shown can be the test result of the aforementioned 24.4V test.

[0039] like Figure 3 As shown, the horizontal axis of the current-voltage characteristic curve represents the amplitude of the test voltage, and the vertical axis represents the amplitude of the measured current. Each point reflects one test. Figure 3 As shown, the current is maintained at approximately 10V between 0 and 20V. -10 (Represented as 1.E-10 in the diagram), and the current increases rapidly between 20V and 24.4V. After 24.4V, the current maintains a value of approximately 10. -6 The value (denoted as 1.E-6 in the figure). Among them, 24.4V is the breakdown voltage of the semiconductor device.

[0040] based on Figure 3The test results shown indicate that for semiconductor devices involving breakdown voltage, the device sequentially passes through three states as the voltage increases. The first stage is the off-state. In this region, the voltage applied to the drain is low, and the internal electric field strength is insufficient to induce significant carrier injection or multiplication effects. The device exhibits a high-resistivity state, with only a weak leakage current generated by thermal excitation or tunneling mechanisms, typically in the picoampere to nanoampere range. The second stage is the pre-breakdown region. As the drain voltage further increases, the electric field strength in the drift region gradually strengthens, and nonlinear conduction mechanisms such as local carrier multiplication or trap-assisted tunneling begin to appear. This causes the leakage current to rise rapidly with voltage in an exponential or power-law relationship, but it has not yet reached full conduction. The third stage is the avalanche breakdown state (hereinafter referred to as the breakdown state). At this point, the drain voltage reaches a critical value, the avalanche multiplication effect dominates the conduction process, the leakage current increases sharply and tends to saturate, and the device loses its blocking capability. This critical voltage is the breakdown voltage.

[0041] The aforementioned quasi-static test takes a long time, mainly due to the large number of redundant measurements performed in the off-state region. In this region, the current signal is extremely weak and changes very slowly. The measurement system needs to spend a lot of time integrating and confirming the steady state to obtain stable readings, and the data in this region does not contribute substantially to the final determination of the breakdown voltage. If the off-state region can be skipped and the quasi-static scan can be performed directly from the starting point of the pre-breakdown window, the number of test points can be significantly reduced, thereby greatly shortening the overall test cycle.

[0042] However, the starting point of the pre-breakdown window is not a fixed value; it drifts due to factors such as device process variations, material defects, charge trap distribution, and historical stress, and the transition window itself is relatively narrow. This makes it extremely difficult to pre-set a universal starting voltage. If the starting voltage is set too high, the true breakdown starting point may be missed, leading to overestimation of the measurement results; if it is set too low, invalid measurements in the off-state region cannot be effectively avoided, resulting in a loss of efficiency advantage.

[0043] To address this technical challenge, this application creatively employs a probe current as a medium to dynamically determine the starting voltage. By applying a specific probe current with an amplitude between the off-state leakage current and the breakdown criterion current to the device, and measuring the corresponding terminal voltage, this voltage value precisely corresponds to the critical point where the current-voltage characteristic curve transitions from linear (or approximately linear) off-state behavior to nonlinear pre-breakdown behavior. This method does not rely on a preset voltage value but rather locates the effective test starting point in real time based on the device's own electrical response, effectively solving the problem of accurately predicting the starting voltage.

[0044] For example, for Figure 3The current-voltage characteristic curve shown indicates that the leakage current in the off-state is approximately 10. -10 A, whose breakdown criterion current is approximately 10. -6 A, then a value between the two can be selected (such as 10). -9 A) Use this as the probe current to obtain the corresponding starting voltage (e.g., 22V), and then perform tests from this starting voltage. This eliminates the need for numerous test nodes in the off-state, improving test efficiency.

[0045] Specifically, based on the test method of this application, when testing the aforementioned semiconductor device with a breakdown voltage of 24.4V, the actual test time can be 0.988s, which is 64% faster than the 2.74s of the traditional method. At the same time, the measured result is 24.2V, which is very close to the actual breakdown voltage.

[0046] Furthermore, this application also tested semiconductor devices with breakdown voltages of 30.5V and 37.5V. The test time for the former was reduced from 2.29s to 0.438s, and for the latter from 1.73s to 0.377s. It is evident that the test method provided in this application offers at least a 60% efficiency improvement compared to traditional test methods. Simultaneously, based on the aforementioned reduction in test time, it can be seen that the voltage range corresponding to the pre-breakdown window is inherently very small, making it difficult to directly determine a suitable starting voltage. However, this application can provide a reasonable starting voltage from the perspective of current, making the test process more accurate.

[0047] The following will combine Figures 4-6 The test methods provided in this application are described in detail.

[0048] Example testing method: Based on the aforementioned test logic, this application provides an exemplary flowchart of a test method for semiconductor devices ( Figure 4 ).

[0049] like Figure 4 As shown, the semiconductor device testing method P400 may include the following steps: S410. Apply probe current to the semiconductor device and measure the corresponding starting voltage.

[0050] S420. Apply an increasing test voltage to the semiconductor device under quasi-static test conditions and collect the test current of the semiconductor device at each test voltage until the test current reaches the breakdown criterion current.

[0051] Before further describing the test methods of this application, the semiconductor devices to which this application applies will be explained. This application mainly relates to semiconductor devices with breakdown voltage, that is, semiconductor devices having an off state and a breakdown state. The off state refers to the operating state of the semiconductor device when the applied drain-source voltage is much lower than its breakdown voltage. In this state, the depletion region inside the device does not undergo avalanche multiplication; only a weak leakage current flows through, generated by mechanisms such as thermal excitation, tunneling, or surface leakage. The device exhibits high impedance characteristics and can effectively block the main current path. The breakdown state refers to the state where, when the drain-source voltage applied to the semiconductor device increases to a critical value, the internal electric field strength is sufficient to trigger avalanche breakdown, Zener breakdown, or other strong conduction mechanisms, resulting in a sharp increase in drain current and loss of voltage blocking capability. This state marks the limit of the device's withstand voltage capability.

[0052] Based on the properties of the aforementioned semiconductor devices, the semiconductor devices applicable to this application include, but are not limited to, high voltage metal-oxide-semiconductor field-effect transistors (HV MOSFETs), lateral double-diffused metal-oxide-semiconductor (LDMOS), and other power semiconductor devices with distinct off-state and breakdown state characteristics. They are particularly suitable for device types with complex drift region structures that are susceptible to charge traps and thus exhibit walk-out / in phenomena.

[0053] In the S410, the probe current refers to a precisely set test current with a value greater than the typical leakage current of the semiconductor device in the off-state, but less than the breakdown criterion current used to determine a breakdown event. The probe current is used to detect the critical operating point where the device transitions from the off-state to the pre-breakdown region. This current amplitude is set between the off-state leakage current and the breakdown criterion current, precisely corresponding to the critical region where the internal electric field strength begins to increase significantly but has not yet triggered avalanche multiplication. At this current level, the device's voltage-current response is extremely sensitive to the trap charge state and changes in the local electric field. The measured voltage value can stably mark the inflection point where the current-voltage characteristic curve (denoted as IU) transitions from ohmic or approximately linear behavior to exponential or power-law nonlinear behavior, thus effectively indicating the critical operating point transitioning from the off-state to the pre-breakdown window.

[0054] The starting voltage refers to the stable voltage value presented across the semiconductor device after the aforementioned probe current is applied. Based on the properties of the aforementioned probe current, this starting voltage can correspond to the inflection point where the linear (or approximately linear) region transitions to the nonlinear region in the device's current-voltage characteristic curve, thus serving as an effective starting position for subsequent quasi-static voltage scanning.

[0055] The current in the off-state refers to the weak leakage current flowing through a semiconductor device under low drain-source voltage bias. Its magnitude is usually in the range of picoamperes (pA) to nanoamperes (nA), and is mainly determined by mechanisms such as thermally generated carriers, tunneling effect and interface state-assisted recombination.

[0056] The breakdown criterion current refers to a preset current threshold used to determine whether a semiconductor device has entered a breakdown state. When the drain current measured during testing reaches or exceeds this threshold, the device is considered to have broken down, and the corresponding voltage is recorded as the breakdown voltage. This threshold is usually set according to device specifications or industry standards, and its magnitude is generally in the range of microamps (μA) to milliamps (mA).

[0057] In some embodiments, the aforementioned S410 can be achieved by forcibly injecting a set probe current into the drain of the device under test through a source measurement unit (SMU). Based on this stable current, the starting voltage (i.e., the voltage drop is the starting voltage) can be determined by simultaneously and accurately measuring the voltage drop between the drain and source. This process can be completed in milliseconds without requiring a long waiting time.

[0058] In some embodiments, the probe current can be dynamically generated based on known device specifications. Specifically, firstly, the breakdown criterion current Ij is acquired or preset. Secondly, a low operating voltage (such as 50% or 100% of the nominal operating voltage, where the nominal operating voltage is generally within the off-state voltage range) is quickly applied to measure or estimate the current off-state leakage current Ioff of the current device (or a pre-stored leakage current Ioff can be directly invoked). Subsequently, a current value with an amplitude order between Ioff and Ij is selected as the probe current I0. For example, if Ioff is on the order of 1 nA and Ij is on the order of 1 mA, then I0 can be selected as being on the order of 100 μA. This logic ensures that I0 is always within the effective probe window, suitable for devices with different process corners or sizes.

[0059] It should be noted that the aforementioned breakdown criterion current is generally unaffected by the walk-in / walk-out phenomenon. Walk-in and walk-out are common electrical characteristic drift phenomena in high-voltage semiconductor devices, indicating the dynamic behavior of charge traps present at the device's internal interface or bulk region under high electric field stress. Because it is defined as the threshold for the device to enter a fully conducting state, this physical process itself has a clear current abrupt change characteristic. This value can usually be estimated as a fixed value or a reasonable range based on the device's design specifications, historical test data, or industry standards. The aforementioned off-state current can be directly obtained through rapid low-voltage testing, or it can be stored and retrieved based on typical values ​​from the same batch of devices, thus providing a reliable basis for dynamically determining the appropriate probe current.

[0060] In S420, quasi-static test conditions refer to reserving a sufficiently long waiting time after each voltage step during the voltage scan process to ensure that the internal charge traps of the device complete charging and discharging and reach electrical steady state. This allows for obtaining a current response that reflects the true physical characteristics of the device and avoids measurement distortion caused by transient effects. In breakdown voltage testing based on quasi-static test conditions, the voltage of the semiconductor device (denoted as the test voltage) is primarily controlled. That is, the test voltage refers to the DC voltage signal applied to the drain of the semiconductor device in progressively increasing steps according to a preset step size. Based on the aforementioned determined starting voltage, the test voltage generally increases from this starting voltage, meaning the test voltage is greater than or equal to the starting voltage.

[0061] The test current refers to the current flowing through the drain of the semiconductor device after each test voltage step has stabilized. This current is collected in real time and used to determine whether the breakdown condition has been met. The test current reaching the breakdown criterion current refers to the event during the voltage scan where the real-time monitored test current first equals or exceeds the preset breakdown criterion current threshold. This event triggers the recording of the breakdown voltage.

[0062] It should be noted that in the aforementioned process of determining whether the test current meets the breakdown criterion current, the breakdown criterion current can be preset as a fixed threshold, or it can be characterized as a current determination condition based on the characteristics of the current itself. In a typical avalanche breakdown process, when the voltage reaches the critical value, the drain current will increase sharply and enter a relatively stable high-current state after breakdown. For example... Figure 3 As shown, after the breakdown voltage (24.4V), the current rises rapidly and stabilizes at approximately 10. -6 The current level exhibits an approximately constant characteristic, indicating that the device has entered a stable avalanche conduction state. Therefore, the determination of a breakdown event can be based not only on whether the current reaches a certain preset absolute value, but also on characteristics such as abrupt changes in the rate of current change or the entry into a stable high-current plateau. This current-characteristic-based determination logic allows the method of this application to adapt to the differences in breakdown behavior under different device structures or process conditions, rather than being limited to a single fixed threshold setting.

[0063] In some embodiments, the aforementioned S420 can be implemented by a test system starting from the initial voltage. That is, the output test voltage can be increased in fixed steps (e.g., 0.05V), and the test current can be read after waiting for the compliance check waiting time (e.g., 0.02 seconds) at each step point until the current reaches the breakdown criterion current, and finally the voltage at that point is output as the breakdown voltage.

[0064] In summary, to address the technical problem of the long testing time required for quasi-static scanning of semiconductor device breakdown voltage, which affects production capacity, the semiconductor device testing method P400 provided in this application can identify a suitable starting voltage before quasi-static scanning. Specifically, before quasi-static scanning, a probe current with an amplitude between the off-state current and the breakdown criterion current is applied to the semiconductor device, and the measured corresponding voltage is used as the starting voltage. Then, the breakdown voltage is determined by incrementally increasing the quasi-static test conditions from this starting voltage. Based on the amplitude characteristics of the aforementioned probe current, its corresponding starting voltage can reflect the critical point in the current-voltage characteristic curve of the semiconductor device from the linear conduction region to the nonlinear breakdown region. Starting the quasi-static scan from this starting voltage can effectively skip invalid measurements in the pre-breakdown window region, thereby significantly shortening the overall testing time while ensuring accurate measurement results and avoiding false breakdowns.

[0065] In some embodiments, based on some of the principles of the aforementioned tests, semiconductor devices may experience walk-in / out phenomena during use, which can cause the current-voltage characteristic curve of the device to drift.

[0066] Specifically, when a device is subjected to a high drain voltage, high-energy carriers (such as hot electrons or hot holes) may be injected into trap levels at the gate oxide layer, field oxide layer, or silicon-silicon dioxide interface. If the trap captures the same type of charge as the majority carriers in the channel (e.g., trapping electrons in an N-type LDMOS), an additional electric field is generated locally, weakening the electric field strength of the original drift region. This results in a higher applied voltage being required to reach avalanche breakdown conditions, manifested as a gradual increase in breakdown voltage over time—this is the "walk out" phenomenon. Conversely, if the trap captures the opposite type of charge (e.g., trapping holes in an N-type LDMOS), the local electric field is enhanced, leading to a decrease in breakdown voltage—this is the "walk in" phenomenon.

[0067] These internal electric field modulations caused by the accumulation of trapped charges directly lead to a shift in the device's current-voltage characteristic curve (i.e., the aforementioned IU) along the voltage axis, meaning the breakdown point drifts towards higher or lower voltages. This drift not only affects the accuracy of a single measurement but also results in inconsistent breakdown voltages under different test histories or scan conditions, severely compromising the repeatability and reliability of the test.

[0068] To detect the aforementioned effects, the test results can be compared with the design parameters of the semiconductor device itself. That is, the voltage drift of the semiconductor device can be determined based on the breakdown voltage obtained from the aforementioned tests and the rated voltage of the semiconductor device.

[0069] Voltage drift refers to the quantitative description of the deviation of the actual measured breakdown voltage of a semiconductor device from a certain reference value after experiencing electrical stress, thermal stress, or aging over time. It is usually expressed as an absolute difference (ΔU) or a relative rate of change and is used to characterize the stability or degree of degradation of the device's electrical properties. The calibration voltage refers to the breakdown voltage value that serves as the aforementioned reference. It can be derived from measurement data of the device in its initial state, the statistical average value of devices of the same specification, the nominal value in the design specification, or the theoretical expected value derived from physical model simulation.

[0070] In practical implementation, the calibration voltage U corresponding to the semiconductor device can be retrieved from the database or device file first. cal Subsequently, after completing the efficient quasi-static test procedure described in this application, the measured breakdown voltage U under the current state is obtained. BV The system automatically calculates the voltage drift ΔU=U BV -U cal If ΔU deviates significantly from zero (exceeding the preset process tolerance or measurement noise range), the device is determined to have voltage drift. Positive drift (ΔU>0) indicates that the walk-out effect is dominant, while negative drift (ΔU<0) indicates that the walk-in effect is dominant.

[0071] The aforementioned voltage drift ΔU has multiple engineering and technical applications. First, in reliability assessment and lifetime prediction, the magnitude and trend of ΔU directly reflect the degree of device degradation under electrothermal stress. For example, by repeatedly performing this test method at multiple sampling points in accelerated aging tests (such as HTRB and HTGB) and recording ΔU, a degradation curve of breakdown voltage over time or stress dose can be constructed, and a lifetime model can be fitted to predict the long-term reliability of the device in practical applications. Second, in process monitoring and yield improvement, the ΔU distribution obtained from batch testing can be used to identify abnormal process batches. If a batch of devices generally exhibits a large negative drift, it may indicate a deviation in injection dose or insufficient annealing; if the positive drift is significant, it may be related to increased interface state density or dielectric layer defects. Such data can be quickly fed back to the front-end process to achieve closed-loop control. Third, in failure analysis and root cause localization, the sign and magnitude of ΔU provide key clues for judging the failure mechanism. For example, a significant walk-in (negative ΔU) is often associated with thermal hole injection, while walk-out (positive ΔU) often originates from the accumulation of electron traps. By combining other electrical parameters, the physical root cause of failure can be accurately located. Finally, in product classification and application adaptation, devices can be classified according to their performance based on the measured value of ΔU. For high-reliability applications (such as automotive electronics and base station power amplifiers), devices with extremely small absolute values ​​of ΔU can be selected; while for cost-sensitive applications, the criteria can be relaxed to optimize product portfolio and resource allocation.

[0072] Specifically, since the aforementioned voltage drift has characterizing capabilities, the breakdown voltage determined by the aforementioned test method also has characterizing capabilities for performance parameters such as the lifetime of semiconductor devices. Therefore, the aforementioned test method can be applied as a step in the performance testing of semiconductor devices. In some embodiments, the test method provided in this application can be executed at various sampling points in the reliability testing of semiconductor devices, and the breakdown voltage of the semiconductor device can be used as the test result for the corresponding sampling point.

[0073] In practical implementation, the stress can be paused at preset time points (e.g., 0 hours, 168 hours, 500 hours, 1000 hours) during the application of reliability stress (such as high temperature reverse bias HTRB, high temperature gate bias HTGB, or time-dependent dielectric breakdown TDDB), temporarily switching to the test mode and executing the high-efficiency V described in this application. BV The measurement process yields a series of breakdown voltage data points that evolve over time. These data points can then be used to construct a complete breakdown voltage degradation trajectory, providing high-time-resolution empirical evidence for analyzing device failure mechanisms, validating reliability models, and determining product lifespan.

[0074] Based on the reduction in the test time for breakdown voltage using this test method, the sampling point density can be increased without significantly extending the overall reliability test cycle, thereby more accurately capturing subtle changes in the early stages of degradation and improving the sensitivity and accuracy of reliability assessment.

[0075] In some embodiments, to further ensure the accuracy of the test results, the current-voltage characteristics determined in the aforementioned test process can be repeatedly tested and verified. Specifically, the first current-voltage characteristics of the semiconductor device can be determined based on the test voltage and its corresponding test current. Then, a verification voltage based on decreasing breakdown voltage is applied to the semiconductor device, and the verification current of the semiconductor device at each verification voltage is collected to determine the second current-voltage characteristics of the semiconductor device based on the verification voltage and its corresponding verification current. Finally, the confidence level of the test method and / or a stability index reflecting the charge trapping activity of the semiconductor device are determined based on the difference between the first and second current-voltage characteristics.

[0076] In some embodiments, to further ensure the accuracy of the test results, the current-voltage characteristics determined in the aforementioned test process can be repeatedly tested and verified. Specifically, the first current-voltage characteristic of the semiconductor device can be determined based on the test voltage and its corresponding test current. Then, a verification voltage based on decreasing breakdown voltage is applied to the semiconductor device, and the verification current of the semiconductor device at each verification voltage is collected to determine the second current-voltage characteristic of the semiconductor device based on the verification voltage and its corresponding verification current. Finally, the confidence level of the test method and / or a stability index reflecting the charge trapping activity of the semiconductor device are determined based on the difference between the first and second current-voltage characteristics.

[0077] In actual implementation, step S420 is completed and the breakdown voltage U is determined. BV Afterwards, the test system keeps the device in U... BV Bias is applied, and then the reverse scan process is initiated. With the same step size and quasi-static wait time as the forward scan, the voltage is shifted from U... BV Gradually decrease to the starting voltage U start Or a preset lower limit value, and collect the corresponding verification current at each voltage point. Then, analyze the forward scan data (U... test ,I test ) and reverse scan data (U verify ,I verify The process involves extracting key features (such as voltage difference under a specific current, area enclosed by the curve, inflection point offset, etc.) to quantify the differences between the two.

[0078] In some embodiments, the meaning of the difference responses can be adjusted based on the actual acquisition method of the reverse scan data. For example, the acquisition methods are the same (e.g., the reverse scan data are identical).

[0079] If the difference is less than a preset threshold, the positive test result is considered to have high confidence, indicating that the test conditions are sufficiently quasi-static and the trapped charge has responded sufficiently. If the difference is large, it indicates that the device has significant charge trapping activity, and a quantitative stability index (such as hysteresis voltage ΔU) can be output. hyst This two-way verification mechanism is used to evaluate the device's walk-out / in resistance and long-term electrical stability. It not only enhances the reliability of single measurement results but also provides direct experimental evidence for a deeper understanding of the device's internal physical mechanisms.

[0080] In some embodiments, the effectiveness of the semiconductor device can be verified first during the aforementioned testing process, that is, the current of the semiconductor device under the operating voltage can be tested to determine whether the semiconductor device can be used in its application scenario.

[0081] To further illustrate the testing process, this application also provides an exemplary flowchart of the pre-screening of semiconductor devices (…). Figure 5 ).

[0082] like Figure 5 As shown, the semiconductor device pre-screening P500 may include the following steps: S510: Apply a working voltage to the semiconductor device and measure the working current.

[0083] S520. Determine whether the operating current is less than the breakdown criterion current.

[0084] S530, If yes, determine the probe current to perform a breakdown voltage test.

[0085] S540. If not, determine the device current value obtained by the four-terminal measurement method and terminate the test.

[0086] based on Figure 5 It can be seen that in the aforementioned P500, S520 can be a judgment step, S530 can be a follow-up step when the judgment result of S520 is yes, and S540 can be a follow-up step when the judgment result of S520 is no.

[0087] In S510, the operating voltage refers to the drain-source voltage applied to a semiconductor device during normal operation in a real-world circuit application. This voltage value is determined by the device's application scenario and circuit design, and it is generally significantly lower than the device's breakdown voltage to ensure that the device remains reliably off during system operation, maintaining high blocking capability and preventing accidental conduction or breakdown. In the testing process, this operating voltage is used as a pre-screening bias to accurately reflect the device's electrical state under its expected operating conditions, thus testing whether the semiconductor device can maintain its off state in practical applications.

[0088] Operating current refers to the drain current flowing through a semiconductor device after the aforementioned operating voltage is applied. Since the operating voltage is much lower than the breakdown voltage, a normal device should only exhibit a weak off-state leakage current under these conditions. If the measured operating current increases abnormally, or even reaches or exceeds the breakdown criterion current, it indicates that the device may have manufacturing defects, premature failure, or hard breakdown.

[0089] In some embodiments, the aforementioned S510 can apply the nominal operating voltage defined in its datasheet (e.g., for an LDMOS device with a 28V power rail, its operating voltage may be 20V) to the drain of the device under test through a test system, and complete the measurement of the operating current in a short time to determine its operation in the application scenario.

[0090] Based on the aforementioned test logic, the semiconductor devices in the aforementioned application scenarios should remain in the off state. Therefore, in S520, the semiconductor devices can be screened based on the comparison between the measured operating current and the preset breakdown criterion current. Among them, the breakdown criterion current serves as a threshold to distinguish between normal and failure states. Its value is much higher than the normal off-state leakage current. It can be the fixed value discussed above, or it can be a current condition that is much larger than the operating current (e.g., there is an order of magnitude difference) (e.g., 100 times larger than the nominal operating current).

[0091] Based on the aforementioned judgment logic, if the operating current is less than the threshold (i.e., in response to the operating current being less than the breakdown criterion current), it indicates that the device performs well under normal operating voltage and is worth conducting subsequent precise breakdown voltage testing, so S530 can be executed. If the operating current is greater than or equal to the threshold (i.e., in response to the operating current being greater than or equal to the breakdown criterion current), it indicates that the device can no longer maintain the off state under normal operating conditions and is a failed device, so S540 can be executed.

[0092] The aforementioned S530 can be referred to the test process shown in P400 above, and will not be repeated here.

[0093] In the aforementioned S540, when the semiconductor device itself is defective, the time-consuming U process can be terminated immediately. BV Testing. To accurately record failure information and protect the test hardware, a four-terminal measurement method is used to precisely measure the high current value of the device under the operating voltage. The test is then terminated, thus concentrating test resources on qualified devices and improving overall test efficiency and reliability.

[0094] Specifically, four-terminal sensing (also known as the Kelvin method) is a technique for accurately measuring voltage / current characteristics under low impedance or high current conditions. This method utilizes two independent pairs of terminals: a pair of force terminals for injecting test current into the device under test (DUT), and a pair of sense terminals for directly measuring the voltage drop across the device. Because the input impedance of the sensing circuit is extremely high, the current flowing through the sensing leads is almost zero. Therefore, the voltage drop across the sensing leads and contacts is negligible, thus eliminating the influence of lead resistance and contact resistance on the measurement results.

[0095] In practical applications, when a semiconductor device is in a low-resistance conduction state due to failure, the current flowing through the device may be large (e.g., in the milliampere range). If traditional two-terminal measurements are used, the voltage read by the test system will include the voltage drop across the contact resistance between the probe and the pad, leading to distorted current measurements. However, using a four-terminal measurement method ensures that the applied voltage is precisely applied to the device itself and accurately measures the resulting current. The large current value obtained through the four-terminal measurement method can be denoted as the device current value (4T current). This device current value accurately reflects the device's conduction capability under operating voltage, is unaffected by external parasitic resistance, and offers high accuracy and reliability. In other words, current testing using the four-terminal measurement method not only provides accurate electrical parameters for failure analysis but also avoids misjudgments caused by contact resistance voltage drops. Furthermore, the fast and accurate measurement process effectively prevents continuous thermal damage to the test probe due to the large current.

[0096] In some embodiments, the aforementioned operating current can also be used as a test result for the semiconductor device. Furthermore, to further calibrate the parameters of the semiconductor device, the recorded operating current can also be characterized using current density to eliminate device variations. That is, the operating current density of the semiconductor junction can be determined based on the operating current and the width of the semiconductor junction, wherein the semiconductor device has a semiconductor junction for forming the off-state.

[0097] A semiconductor junction refers to a PN junction or its equivalent structure formed by the boundary between regions of different doping types (such as P-type and N-type) in a semiconductor device. In high-voltage MOS devices, it is usually manifested as the depletion region between the source / body region and the drift region, or between the drain and the drift region. This junction is the core region for the device to achieve voltage blocking function, and its geometry (especially the effective width along the current flow direction) directly affects the device's conduction and blocking characteristics.

[0098] Operating current density refers to the current intensity flowing through a unit effective width of the aforementioned semiconductor junction. It is defined as the operating current divided by the width of the semiconductor junction, and the unit is usually amperes per micrometer (A / μm) or microamperes per micrometer (μA / μm). Since the absolute operating current value varies linearly with device size (such as channel width or junction width), directly comparing the operating current of devices of different sizes lacks fairness. Operating current density, on the other hand, eliminates the influence of geometric dimensions and reflects only intrinsic electrical characteristics such as material quality, interface state density, and process uniformity. Therefore, it is a standardized indicator for evaluating the intrinsic performance of devices and process consistency.

[0099] In a specific implementation, the semiconductor junction width W corresponding to the effective conductive path in the semiconductor device under test is first obtained through layout design data, process parameters, or microscopic measurement methods. Then, the operating current I is measured in S510. work The system calculates the operating current density J based on this. work =Iwork / W. The current density value can be used as a unified criterion for device status assessment. For example, a size-independent current density threshold Jth can be set. If Jwork ≥ Jth, the device is determined to be invalid; otherwise, it is determined to be qualified (this method can also be applied to the aforementioned S520, that is, screening can be performed based on the working current density and the current density corresponding to the breakdown criterion). Therefore, based on the aforementioned current density, the same test procedure can be seamlessly applied to the same type of devices with different sizes or different design specifications, significantly improving the universality and comparability of the test solution.

[0100] In some embodiments, based on the operating current determined as above, the probe current can be determined first, and then the starting voltage can be determined. To further illustrate this process, the present application also provides an exemplary flow chart of a starting voltage determination method ( Figure 6 ).

[0101] As shown in Figure 6 , the starting voltage determination method P600 may include the following steps: S610: Determine the probe current based on the working current and the breakdown criterion current.

[0102] S620: Apply a probe current to the semiconductor device and measure the starting voltage.

[0103] In S610, after the working current is screened and determined as described above, the probe current can be determined in real time. As a result, the magnitude order of the determined probe current is between the working current and the breakdown criterion current. That is, in the test method of the present application, the probe current is not a preset fixed value, but is obtained by real-time dynamic calculation or selection after obtaining the working current of the current device and combining the known breakdown criterion current.

[0104] Since the working current directly reflects the off-state leakage level of the device in the current state, and the breakdown criterion current characterizes its failure threshold, the two together define an effective detection window. The probe current selected within this window can ensure that the measured voltage accurately corresponds to the critical region where the I-V characteristic curve changes from linear to nonlinear, thereby realizing adaptive and high-precision positioning of the starting voltage.

[0105] In some embodiments, considering the huge difference in magnitude between the working current and the breakdown criterion current, when determining the aforementioned probe current, one or more appropriate currents can be determined based on the current-voltage characteristics to be used as the probe current. That is, the aforementioned S610 may further include the following sub-steps: S611: Determine the current-voltage characteristics of the semiconductor device based on the working current and the breakdown criterion current.

[0106] S612: Estimate the probe current based on the current-voltage characteristics.

[0107] In the aforementioned S611, the current-voltage characteristic refers to a mathematical model or dataset describing the current response behavior of a semiconductor device under different biases, typically represented by an IU curve. The current-voltage characteristic is determined based on historical test data of semiconductor devices of the same specifications and / or a preset algorithm.

[0108] Historical test data refers to complete IU test results from a large number of devices of the same design and process batch. Their statistical average or cluster centers can serve as prior estimates of the current device characteristics. The preset algorithm can be a prediction function built based on physical models (such as drift-diffusion equations) or empirical formulas, used to extrapolate the complete IU trend based on limited inputs (such as the operating current point). By fusing historical data with the algorithm, the most probable IU characteristic profile of the current device can be reconstructed or matched, provided only the operating current and breakdown criterion current are known.

[0109] In actual execution, the aforementioned S611 can use the currently measured operating current and the preset breakdown criterion current as boundary conditions to infer or reconstruct the complete current-voltage (IU) characteristic profile of the semiconductor device. This process can be flexibly executed according to the actual test scenario.

[0110] For example, in scenarios involving continuous testing within the same batch, subsequent devices under test (DUTs) can directly access the IU data of devices already tested in the same batch, using their statistical average or median curves as the predicted characteristics of the current device. Another example is if the system contains a large historical test database of the same type and process node; the closest IU curve can be retrieved through similarity matching as prior knowledge. Yet another example is the deployment of pre-defined algorithms based on physical mechanisms or data-driven approaches (such as machine learning regression models), using operating current and breakdown criterion current as input features to generate personalized IU characteristic predictions for the current device in real time.

[0111] Based on the aforementioned estimated IU characteristics, theoretically, the optimal starting voltage should be located near the inflection point where the IU curve transitions from the approximately linear region to the significantly nonlinear region. This position effectively avoids the pure off-state region with low current and high noise, while also not yet entering the breakdown region where the current rises sharply. It is the best balance point between skipping invalid measurements and ensuring measurement accuracy.

[0112] Therefore, when performing the aforementioned S612, the derivative or curvature of the predicted IU curve can be analyzed, the critical current value at which the current growth rate begins to accelerate significantly can be identified, and this value can be set as the probe current.

[0113] In some embodiments, the probe current may not use the aforementioned inflection point, but can be configured based on historical test results. That is, in actual testing, the system typically accumulates a large amount of complete test data for devices of the same specifications, which may include experimental records of initial voltage positioning using different probe current values. By retrospectively analyzing this historical data, a mapping relationship can be established between the relative position of the probe current on the IU curve (e.g., its corresponding current order of magnitude, its ratio to the operating current and the breakdown criterion current, or the slope range it occupies on the estimated IU curve) and the final breakdown voltage measurement error. In subsequent formal testing, S612 directly calls this data-verified selection logic, combining the currently measured operating current and the known breakdown criterion current, to quickly calculate the optimal probe current without needing to perform multiple rounds of trial measurements.

[0114] In the aforementioned S620, the probe current determined above can be forcibly injected into the device through the source measurement unit, and the voltage across its two ends can be measured simultaneously with high precision. This voltage is the starting voltage.

[0115] In some embodiments, the probe current includes multiple current values ​​with different amplitude orders. Thus, when performing the aforementioned S620, each current value of the probe current can be applied to the semiconductor device sequentially based on the amplitude order, and the corresponding voltage value can be measured until the voltage value matches the starting voltage condition. The voltage value that matches the starting voltage condition is then configured as the starting voltage, wherein the starting voltage condition indicates that the correlation between the voltage value and the current value changes from a linear relationship to a nonlinear relationship.

[0116] A linear relationship refers to a situation where, in the low-current region, voltage and current are approximately proportional, and the differential resistance remains essentially constant. A nonlinear relationship refers to a situation where, near the breakdown region, current increases exponentially or power-lawly with voltage, and the differential resistance decreases significantly. The initial voltage condition can be determined by calculating the differential resistance of adjacent data points or the local linearity of the fitted data: when a sudden change in differential resistance is observed or the goodness of fit (R²) of the linear regression decreases significantly, the IU relationship is considered to have changed from linear to nonlinear, and the corresponding voltage is determined as the initial voltage. This multi-point detection strategy further improves the robustness and noise resistance of the initial point identification.

[0117] In scenarios involving multiple test points in the S620, to more accurately identify the critical point where the current-voltage characteristic transitions from linear to nonlinear, coordinate transformation can be performed on the measured data to enhance the identifiability of the inflection point. Since the leakage current of semiconductor devices typically spans multiple orders of magnitude from the off-state to the pre-breakdown region, logarithmic coordinates are commonly used in engineering to represent current. Therefore, during analysis, the raw data is often converted into a curve representing the relationship between voltage (U) and the logarithm of current (lnI or lgI), i.e., the U–lnI curve. In this coordinate system, the ideal ohmic conduction or thermally excited off-state region appears as an approximately straight line, and its slope reflects physical parameters such as barrier height or effective mass.

[0118] To further highlight the nonlinear starting point, a logarithmic transformation can be performed on the voltage axis to construct a double logarithmic coordinate system of lnU–lnI or lgU–lgI. In this coordinate system, if the device is in a purely linear (ohmic) conduction state, then I∝U, and the slope of the corresponding curve is no greater than 1. Figure 3 (The current is generally constant in the medium term). When entering regions dominated by nonlinear mechanisms such as trap-assisted tunneling, thermionic emission, or early avalanche multiplication, the current growth rate will exceed the linear ratio of the voltage, i.e., I∝U. n (n>1), at this point the local slope of the double logarithmic curve (e.g., lnI∝nlnU) will gradually exceed 1. Therefore, by calculating the differential slope of the U–lnI curve, or by directly fitting the local power-law exponent of the lgU–lgI data segment, the nonlinear starting point can be objectively determined.

[0119] Specifically, when the slope is observed to consistently and significantly exceed 1 (e.g., the slope rises from near 1 to above 1.2 and maintains this trend), it indicates that the device has transitioned from the linear conduction region to the nonlinear pre-breakdown region. This voltage value is then determined as the initiation voltage.

[0120] Unexpected technical effects: In summary, the semiconductor device testing method provided in this application has achieved the following unexpected results: ① Restructuring of the Test Process and Breakthrough of Efficiency Bottlenecks: Addressing the core pain point of severely restricting production capacity in wafer-level testing of high-voltage semiconductor devices (such as LDMOS) due to excessively long quasi-static breakdown voltage scanning time, this application abandons the traditional paradigm of "starting from 0V and slowly scanning throughout" and innovatively introduces a two-stage intelligent test architecture of "probe current positioning of the starting point + skipping the invalid region". This method accurately captures the critical voltage at which the IU characteristic curve transitions from linear to nonlinear by applying a probe current with an amplitude between the off-state current and the breakdown criterion current at the front end of the pre-breakdown region, and uses this as the starting point of the quasi-static scan. In addition, experimental data show that this strategy successfully skips the inefficient off-state measurement segment, which accounts for more than 60% of the original test time. While ensuring measurement accuracy, it reduces the single-device breakdown voltage test time from 2.74 seconds to 0.988 seconds, improving efficiency by more than 60%, and providing a practical and feasible speed-up path for high-throughput WAT testing.

[0121] ② Precise Starting Point Identification and False Breakdown Avoidance Guided by Physical Mechanisms: This application does not simply shorten the scanning range, but delves into the inherent physical laws of the IU characteristics of high-voltage devices—that is, the breakdown starting point corresponds to the inflection point where the current-voltage relationship transitions from linear conduction to nonlinear multiplication. By forcibly injecting a specific probe current to reverse-locate this inflection point voltage, the physical meaning of the starting voltage is clear and repeatable. This method naturally avoids the "false breakdown" phenomenon caused by insufficient response of charge traps during rapid scanning, while also avoiding the risk of missing the true inflection point due to a preset fixed starting voltage. Furthermore, by combining multi-point probe current scanning with slope analysis in the U–lnI or lgU–lgI coordinate system, an objective and quantitative determination of the nonlinear starting point is achieved, making the test results both highly accurate and robust.

[0122] ③ Adaptive Parameter Setting and Universality Verification Across Processes / Sizes: The probe current dynamic determination mechanism established in this solution enables it to adapt to testing requirements of different process corners, device sizes, and degradation states. Whether based on interpolation of the order of magnitude of the operating current and breakdown criterion current, or on intelligent prediction by integrating historical IU data of devices of the same specification with preset algorithms, it can generate the optimal probe current for the device under test. In the testing of LDMOS devices with different withstand voltage levels such as 24V, 30V, and 37V, this method consistently achieves a test time reduction of over 60%, and the BV measurement deviation is controlled within 0.2V.

[0123] ④ Integrated Closed-Loop Capability for Testing, Screening, and Evaluation: This application deeply integrates efficient breakdown voltage testing with multiple engineering objectives, constructing a complete testing closed loop that combines rapid screening, accurate measurement, and reliability assessment. The pre-emptive rapid screening mechanism using operating voltage can immediately eliminate broken-down devices, protecting pin cards and saving resources; standardized characterization based on current density eliminates device size effects and improves the fairness of cross-design comparisons; voltage drift obtained by comparing measured BV with calibrated voltage can be directly used for reliability degradation monitoring; and the stability indicators extracted from forward and reverse scanning comparisons provide a quantitative diagnosis of charge trap activity.

[0124] ⑤ Early Failure Screening and Hardware Protection Mechanism Based on Probe Current: This application introduces a probe current testing step before the formal breakdown voltage measurement. This not only locates the starting voltage but also provides a rapid preliminary judgment of the device's condition. If the device has serious defects or has already experienced hard breakdown, it will exhibit an abnormally high response voltage or current when probe current is applied. The system can then terminate the subsequent high-voltage, high-current quasi-static scan in advance. More importantly, in the pre-screening stage, by applying the working voltage and measuring the working current, devices that have already broken down can be identified in a very short time, and the test can be terminated immediately, avoiding the application of a complete breakdown voltage scan stress. This mechanism significantly reduces the duration and frequency of high current flowing through the test pin card, effectively mitigating performance degradation and lifespan loss caused by electromigration, oxidation, or overheating at the pin card contact points. This reduces the maintenance cost and replacement frequency of the test hardware, ensuring the stability and economy of long-term mass production testing.

[0125] The embodiments disclosed above are merely illustrative of this application. The embodiments do not exhaustively describe all details, nor do they limit the application to the specific implementations described. Clearly, many modifications and variations can be made based on the content of this specification. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to better understand and utilize this application. This application is limited only by the claims and their full scope and equivalents.

Claims

1. A method for testing semiconductor devices, characterized in that, include: A probe current is applied to a semiconductor device, and the corresponding starting voltage is measured. The semiconductor device has an off state and a breakdown state. The probe current is greater than the current of the semiconductor device when it is in the off state, and less than the breakdown criterion current indicating the breakdown state. An incremental test voltage is applied to the semiconductor device under quasi-static test conditions, and the test current of the semiconductor device at each test voltage is collected until the test current reaches the breakdown criterion current. The test voltage at which the test current reaches the breakdown criterion current is configured as the breakdown voltage of the semiconductor device, and the test voltage is greater than or equal to the starting voltage.

2. The test method according to claim 1, characterized in that, The process of applying a probe current to a semiconductor device and measuring the corresponding starting voltage includes: A working voltage is applied to the semiconductor device, and the working current is measured; In response to the operating current being greater than or equal to the breakdown criterion current, the device current value obtained by the four-terminal measurement method is determined, and the test is terminated; In response to the operating current being less than the breakdown criterion current, the probe current is applied to the semiconductor device, and the starting voltage is measured.

3. The test method according to claim 2, characterized in that, Applying the probe current to the semiconductor device and measuring the starting voltage includes: The probe current is determined based on the operating current and the breakdown criterion current, wherein the magnitude of the probe current is between the operating current and the breakdown criterion current. The probe current is applied to the semiconductor device, and the starting voltage is measured.

4. The test method according to claim 3, characterized in that, The probe current includes multiple current values ​​with different amplitude orders of magnitude. Applying the probe current to the semiconductor device and measuring the starting voltage includes: Based on the magnitude of the current, the probe current is applied to the semiconductor device sequentially, and the corresponding voltage value is measured until the voltage value matches the starting voltage condition. The voltage value that matches the starting voltage condition is then configured as the starting voltage, wherein the starting voltage condition indicates that the correlation between the voltage value and the current value changes from a linear relationship to a nonlinear relationship.

5. The test method according to claim 3, characterized in that, Determining the probe current based on the operating current and the breakdown criterion current includes: The current-voltage characteristics of the semiconductor device are determined based on the operating current and the breakdown criterion current, wherein the current-voltage characteristics are determined based on historical test data of devices of the same specification as the semiconductor device and / or a preset algorithm. The probe current is estimated based on the current-voltage characteristics.

6. The test method according to claim 2, characterized in that, The semiconductor device has a semiconductor junction, and the testing method further includes: The operating current density of the semiconductor junction is determined based on the operating current and the width of the semiconductor junction.

7. The test method according to claim 1, characterized in that, The testing method also includes: The voltage drift of the semiconductor device is determined based on the breakdown voltage and the calibration voltage of the semiconductor device.

8. The test method according to claim 1, characterized in that, The testing method also includes: The first current-voltage characteristic of the semiconductor device is determined based on the test voltage and its corresponding test current. A verification voltage based on the breakdown voltage is applied to the semiconductor device, and the verification current of the semiconductor device at each verification voltage is collected to determine the second current-voltage characteristic of the semiconductor device based on the verification voltage and the corresponding verification current. The confidence level of the test method and / or a stability index reflecting the charge trapping activity of the semiconductor device are determined based on the difference between the first current-voltage characteristics and the second current-voltage characteristics.

9. The test method according to any one of claims 1 to 8, characterized in that, The test method is performed at each sampling point of the reliability test of the semiconductor device, and the breakdown voltage of the semiconductor device is used as the test result of the corresponding sampling point. The semiconductor device is a high-voltage metal-oxide-semiconductor device.

10. A testing apparatus for a semiconductor device, characterized in that, The testing device includes a probe station and a measurement unit; When a semiconductor device is placed in the probe station for breakdown voltage testing, the test probes in the probe station are connected to the test pins of the semiconductor device during the breakdown voltage test. The measurement unit is connected to the test probe and is used to apply voltage or current to the test pin through the test probe and detect the corresponding electrical parameters, so as to perform the test method according to any one of claims 1 to 9 and determine the breakdown voltage of the semiconductor device.

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