A test method for automatically calculating CPU redundancy switching time average deviation

Abstract

The application discloses a kind of test methods for automatically calculating CPU redundancy switching time average deviation, the test method is composed of CPU redundancy programmable control system and automatic test CPU redundancy switching time difference system, and the automatic test CPU redundancy switching time difference system includes LabVIEW software, programmable ac power supply and packet sniffer, packet sniffer software.The test method includes the following steps: (1) the LabVIEW software automatically controls CPU module master-slave machine power supply output.(2) the packet sniffer software respectively captures the communication message of CPU host and slave station module, CPU backup host and slave station module after backup host.(3) the LabVIEW software automatically analyzes file, analyzes message.(4) the LabVIEW software automatically calculates i round CPU redundancy switching time average deviation, and exports calculation result display, storage.

Description

Technical Field

[0001] This method relates to performance testing in the PLC field, and in particular to an automatic testing method for CPU module redundancy switching time. Background Technology

[0002] The rapid development of industrialization has spurred the research and development of Programmable Logic Controllers (PLCs), transforming industrial control systems from early relay-based interlocking control schemes to PLC-centric automation systems. This has better ensured the stability and reliability of control, significantly increasing productivity, freeing up a large amount of labor, and improving industrial manufacturing efficiency. In this process, redundancy control technology has become a key competitive factor among major industrial control manufacturers, addressing the high availability requirements of critical processes and equipment. To meet the demands of the industrial control field for the safe and stable operation of PLC systems, CPU module redundancy switching performance is an important indicator for evaluating PLC system stability. Based on this, an automatic testing method for the redundancy switching time of programmable logic controller (PLC) CPU modules was designed. Summary of the Invention

[0003] This method provides a test method for automatically calculating the average deviation of CPU module redundancy switching time, which is used to evaluate the average deviation of CPU module redundancy switching time.

[0004] The LabVIEW software logic automatically controls the power supply status of the CPU module's primary and backup units, thereby controlling the CPU module redundancy switching. Throughout the process, the communication messages between the CPU module and the slave module are captured, and the files are parsed and analyzed in the LabVIEW software. Based on the deviation formula Tm=[∑ni=1 (Tstandby iTmaster i)] / n, the average deviation value of the CPU redundancy switching time is calculated. In the formula, i represents the number of times the periodic evaluation is performed, Tstandby i represents the first read / write slave message sent after the CPU standby unit becomes the primary unit, and Tmaster i represents the last read / write slave message sent by the CPU primary unit.

[0005] The evaluation method of the present invention has the function of automatically testing the mean absolute deviation of the redundancy switching time of the CPU module, thereby improving the accuracy and efficiency of its evaluation. Attached Figure Description

[0006] Figure 1 A topology diagram of the test system implemented in this invention is shown.

[0007] Figure 2 A flowchart illustrating the logical processing of an embodiment of the present invention is shown.

[0008] Figure 3 A flowchart of the method for evaluating the average deviation of CPU redundancy switching time based on LabVIEW software is shown.

[0009] Figure 4 The flowchart of data analysis using LabVIEW software is shown.

[0010] Figure 5 The flowchart for data location in LabVIEW software is shown.

[0011] Figure 6 A scatter plot of CPU redundancy switching time is shown. Detailed Implementation

[0012] 1. The internal logic processing flow for automatically testing the average deviation of CPU redundancy switching time: Setting up the test system and test environment, such as Figure 1 Test system topology diagram; internal logic processing flow with automatic test CPU module redundancy switching time average deviation, as follows: Figure 2 The method consists of logic configuration software, a CPU redundancy programmable control system, and an automatic testing system for CPU redundancy switching time difference. The automatic testing system for CPU redundancy switching time difference includes LabVIEW software, a programmable AC power supply, a packet capture device, and packet capture software. The specific logic processing flow is described below: Step 1: Install the CPU redundancy system on a common mounting rail or two separate mounting rails. Connect both ends of the CPU redundancy cable to the redundancy interfaces of the two CPUs respectively, and determine the CPU master / slave redundancy relationship.

[0013] Step 2: Create a periodic task using the logic configuration software. The periodic time is 100ms. In the periodic task, write a program to output a square wave with DO1:= NOT DO1. The logic configuration software establishes communication with the CPU module and downloads the program to the CPU module for execution. Step 3: In the CPU redundant programmable control system, an internal data synchronization channel is established, and the CPU master and backup units perform periodic and aperiodic synchronization according to different transmission frequencies. Step 4: Create a new VI using LabVIEW software. In the block diagram, program the instrument I / O - instrument driver, select the programmable AC power supply model, and start initialization, parameter configuration (U: 24V, I: 0.6A, number of channels: 2, control parameter output in a 10-minute loop), and close the connection. Step 5: When the programmable AC power output channel 1 is disconnected according to the program, the CPU host is powered off, triggering the CPU redundancy master-slave switch. When the host diagnoses its own fault and the standby unit has the conditions to become the master, the CPU host sends a master-becomes command to the standby unit. The standby unit responds with a synchronization confirmation frame and performs the standby-becomes-master action. Step 6: The packet capture software captures the communication messages between the host, the backup host, and the PLC slave module respectively. The LabVIEW software is used to parse the file and analyze the message. The timestamps of the last read / write message sent by the host and the first read / write message sent after the backup host is upgraded are obtained by using regular expressions and index arrays. The difference between the two is used to obtain the CPU redundancy switching time. Step 7: Follow the above steps and execute them i times to obtain the CPU redundancy switching time deviation.

[0014] 2. The workflow of the CPU redundancy switching time average deviation evaluation method: The flowchart of the automatic test CPU redundancy switching time average deviation evaluation method is as follows: Figure 3 As shown: Step 1: The packet capture software captures the process data communication packets output by the CPU main module controlling the DO module, and saves them to a file periodically. The file is then parsed and analyzed using LabVIEW software to obtain the timestamp T of the messages written by the CPU main module to the DO module. 主 ; Step 2: Write a program using LabVIEW software to control the automatic disconnection of the programmable AC power output channel, thus creating a power failure in the CPU main module. Step 3: Trigger the CPU redundancy switching conditions and perform a primary / standby switchover; Step 4: After the CPU becomes the primary master, the packet capture software captures the process data communication packets output by the control DO module and saves them to a file. LabVIEW software is then used to parse the file and analyze the report to obtain the timestamp T of the message used by the CPU primary master module to control the DO module to write data. 备； Step 5, write the T program in LabVIEW software. 备 -T 主 Calculate the time for one CPU redundancy switch; Step 6: The LabVIEW software program automatically controls the programmable AC power output channel 1 to close, eliminates the CPU main module fault, and after a 10-minute delay, controls the programmable AC power output channel to open, and performs CPU redundancy switching again. The program can obtain another CPU redundancy switching time. Step 7: After performing i CPU redundancy switching, the switching time of i times can be obtained. The average value is calculated using the formula Tm=[∑ni=1 (T standby iT main i)] / n, and the final calculation result is displayed and stored in LabVIEW software.

[0015] 3. The LabVIEW software data positioning process described above: The flowchart of the LabVIEW software data analysis based on the pcapng file format and EtherCAT protocol is as follows: Figure 4 As shown: Step 1: Use Wireshark software to capture EtherCAT data packets from the CPU redundancy test system, and set it to automatically generate and save pcapng format files every 10 minutes. Step 2: Use the LabVIEW software's binary file reading function. First, set the file path and the total number of file elements to be read - 1. The function output is a string, which is displayed in hexadecimal as the file content in pcapng format. Step 3: Call the string to byte array conversion function to convert the string into an array of unsigned bytes; Step 4: The smallest unit of a pcapng file is a "block," which contains four types of blocks: header block, interface description block, interface statistics block, and enhancement packet block. The enhancement packet block contains communication process data between the CPU module and the slave module. The enhancement packet block consists of block type (4 bytes), block length (4 bytes), interface ID (4 bytes), timestamp (8 bytes), capture length (4 bytes), packet length (4 bytes), packet data, block fields, and block length. The packet data is the communication process data between the CPU module and the slave module. To analyze the communication process data, the enhancement packet block needs to be filtered out from the entire file. In a while loop, the index array function is called to concatenate bytes 4-7 (starting from 0) into 32-bit integer data, which is used as input to the array element deletion function. The loop continues until the array content is empty, and a two-dimensional array is output. Each message is displayed through a two-dimensional array. Step 5: Call the index array function to compare the first byte number of each message with 0x06 (Enhanced Packet Block Type). If it is equal, keep it; if it is not equal, delete it. Step 6: Call the function to delete array elements, set the length to 24, and keep the first 24 elements and the remaining elements in two arrays. Step 7: In the array after 24 elements, call the function to delete array elements, with the length set to 4, thus obtaining the communication process data between the CPU module and the slave module.

[0016] 4. The LabVIEW software data positioning process described above: The flowchart of the LabVIEW software data positioning method based on the pcapng file format and EtherCAT protocol is as follows: Figure 5 As shown: Step 1: The communication process data consists of the destination address, source address, frame type, EtherCAT header, packet data, and FCS. First, determine whether it is an EtherCAT data frame. Call the index array function to index bytes 12-13 (starting from 0) and then compare it with 0x88A4. If it is equal, keep it; if it is not equal, delete it. Step 2, the group data in the communication process data consists of several EtherCAT sub-messages. The EtherCAT sub-message consists of addressing mode and read / write mode, frame encoding, slave address, message data area length, interrupt arrival flag, data area and WKC. First, the message with the command logical addressing write data LWR (11) is selected, the index array function is called to index the 31st byte (starting from 0), and then compared with 0X0b. If it is equal, it is kept; if it is not equal, it is deleted. Step 3: After searching for all logically addressed EtherCAT sub-messages that write data, obtain the latest timestamp by comparing timestamps.

[0017] 5. The CPU redundancy switching time result: The CPU redundancy switching time scatter plot is as follows: Figure 6 As shown, the CPU redundancy switching time ranges are displayed for task cycles of 5, 50, and 100ms, respectively.

[0018] Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of this invention should be covered within the protection scope of the claims of this invention.

Claims

1. A method for testing the average deviation of CPU redundancy switching time, characterized in that... Automatically control CPU redundancy switching and automatically calculate the average deviation of CPU redundancy switching time.

2. A test method for the average deviation of CPU redundancy switching time, the test method comprising the following steps: Step 1: Create a periodic task using logic configuration software with a period of 100ms. In the periodic task, write a program to output a square wave with DO1:=NOT DO1. Establish communication between the logic configuration software and the CPU module, and download this program to the CPU module for execution. Step 2: Create a new VI using LabVIEW software. In the block diagram, program the instrument I / O - instrument driver, select the programmable AC power supply model, and start initialization, parameter configuration (U: 24V, I: 0.6A, number of channels: 2, control parameter output in a 10-minute loop), and close the connection. Step 3: The packet capture software simultaneously monitors the communication packets between the CPU master-slave module and the PLC slave module; Step 4: The programmable AC power output channel 1 is automatically disconnected from the CPU host, triggering the CPU redundancy switching condition and performing a master-slave switch. Step 5: The packet capture software captures the communication messages between the master, the backup master, and the PLC slave module. The LabVIEW software receives, analyzes, and calculates the messages. The regular expression and string search function blocks are used to obtain the timestamps of the last read / write message sent by the master and the first read / write message sent after the backup master is upgraded. The difference between the two is used to obtain the CPU redundancy switching time. This process is repeated i times to obtain the CPU redundancy switching time deviation, which is then displayed and stored in the software.

3. The LabVIEW software data analysis workflow described above: The flowchart of the LabVIEW software data analysis based on the pcapng file format and EtherCAT protocol is shown in Figure 4: Step 1: Use Wireshark software to capture EtherCAT data packets from the CPU redundancy test system, and set it to automatically generate and save pcapng format files every 10 minutes. Step 2: Use the LabVIEW software's binary file reading function. First, set the file path and the total number of file elements to be read - 1. The function output is a string, which is displayed in hexadecimal as the file content in pcapng format. Step 3: Call the string to byte array conversion function to convert the string into an array of unsigned bytes; Step 4: The smallest unit of a pcapng file is a "block," which contains four types of blocks: header block, interface description block, interface statistics block, and enhancement packet block. The enhancement packet block contains communication process data between the CPU module and the slave module. The enhancement packet block consists of block type (4 bytes), block length (4 bytes), interface ID (4 bytes), timestamp (8 bytes), capture length (4 bytes), packet length (4 bytes), packet data, block fields, and block length. The packet data is the communication process data between the CPU module and the slave module. To analyze the communication process data, the enhancement packet block needs to be filtered out from the entire file. In a while loop, the index array function is called to concatenate bytes 4-7 (starting from 0) into 32-bit integer data, which is used as input to the array element deletion function. The loop continues until the array content is empty, and a two-dimensional array is output. Each message is displayed through a two-dimensional array. Step 5: Call the index array function to compare the first byte number of each message with 0x06 (Enhanced Packet Block Type). If it is equal, keep it; if it is not equal, delete it. Step 6: Call the function to delete array elements, set the length to 24, and keep the first 24 elements and the remaining elements in two arrays. Step 7: In the array after 24 elements, call the function to delete array elements, with the length set to 4, thus obtaining the communication process data between the CPU module and the slave module.

4. The LabVIEW software data positioning process described above: The flowchart of the LabVIEW software data positioning method based on the pcapng file format and EtherCAT protocol is shown in Figure 5: Step 1: The communication process data consists of the destination address, source address, frame type, EtherCAT header, packet data, and FCS. First, determine whether it is an EtherCAT data frame. Call the index array function to index bytes 12-13 (starting from 0) and then compare it with 0x88A4. If it is equal, keep it; if it is not equal, delete it. Step 2, the group data in the communication process data consists of several EtherCAT sub-messages. The EtherCAT sub-message consists of addressing mode and read / write mode, frame encoding, slave address, message data area length, interrupt arrival flag, data area and WKC. First, the message with the command logical addressing write data LWR (11) is selected, the index array function is called to index the 31st byte (starting from 0), and then compared with 0X0b. If it is equal, it is kept; if it is not equal, it is deleted. Step 3: After searching for all logically addressed EtherCAT sub-messages that write data, obtain the latest timestamp by comparing timestamps.

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