Method, apparatus, host computer and media for parallel programming of front-end DSP chips

Abstract

This invention relates to the field of software programming technology, and provides a method, apparatus, host computer, and medium for parallel programming of front-end DSP chips. The method includes: sending request forwarding instructions to multiple back-end DSP chips and receiving confirmation information from each back-end DSP chip; sending a collection serial number instruction to each back-end DSP chip that has received confirmation information, and obtaining a unique serial number from each back-end DSP chip based on the collection serial number instruction; assigning a temporary machine number to each back-end DSP chip based on the serial number; distributing the temporary machine number to the front-end DSP chips connected to each back-end DSP chip; and performing parallel programming of the front-end DSP chips connected to each back-end DSP chip, using each back-end DSP chip as an instruction and data relay, based on the temporary machine number. This invention solves the problem in the prior art of being unable to perform batch and efficient programming of front-end DSP chips without external connections.

Description

Technical Field

[0001] This invention belongs to the field of software programming technology, and particularly relates to a method, device, host computer and medium for parallel programming of a front-end DSP chip. Background Technology

[0002] With the development of new energy electric vehicles, charging equipment such as charging piles typically employs front-end and rear-end stages in their power module design to adapt to various charging scenarios with different voltage and current levels. For example, the front-end stage of the power module uses power factor correction to achieve AC / DC conversion, while the rear-end stage uses DC-DC conversion. The front and rear stages are each controlled by two Digital Signal Processor (DSP) chips, and serial communication is used between the front and rear stages to exchange information. The rear-end stage uses CAN communication to exchange information with external devices.

[0003] For upgrading the internal program of a chip, CAN communication is typically used to reduce the need for additional simulation interfaces on the hardware circuitry. Therefore, it's impossible to directly program a front-end DSP chip without a CAN communication connection. Furthermore, traditional programming methods only support independent programming of a single DSP chip, or serial programming of multiple DSP chips sequentially using a serial interface, resulting in extremely low overall efficiency. Some solutions add a Field Programmable Gate Array (FPGA) control circuit and configure multiple JTAG interfaces to enable parallel programming of multiple Flash memories on DSP chips. However, this method not only increases hardware costs but also fails to achieve parallel programming of multiple DSP chips' own programs. Therefore, how to efficiently perform batch programming of front-end DSP chips is a problem that urgently needs to be solved. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a method, apparatus, host computer, and medium for parallel programming of front-end DSP chips, in order to solve the problem in the prior art that it is impossible to perform batch and efficient programming of front-end DSP chips without external connections.

[0005] In a first aspect, embodiments of the present invention provide a method for parallel programming of a front-end DSP chip, comprising: Send request forwarding instructions to multiple downstream DSP chips and receive confirmation information from each downstream DSP chip. Send a serial number collection instruction to each downstream DSP chip that receives the confirmation message, and obtain the unique serial number of each downstream DSP chip that receives the confirmation message according to the serial number collection instruction; Based on the serial number, assign a temporary machine number to each subsequent DSP chip; The temporary machine number is sent to the front-end DSP chip connected to each subsequent DSP chip. Based on the temporary machine number, each subsequent DSP chip is used as an instruction and data relay, and the preceding DSP chip connected to each subsequent DSP chip is programmed in parallel.

[0006] In one possible implementation, the step of sending request forwarding instructions to multiple downstream DSP chips and receiving confirmation information from each downstream DSP chip includes: Send request forwarding instructions to multiple downstream DSP chips so that each downstream DSP chip can jump from the application program to the upgrade bootloader; Receive confirmation information from the subsequent DSP chip upon successful jump.

[0007] In one possible implementation, the step of issuing the temporary machine number to each front-end DSP chip connected to a subsequent DSP chip includes: The downstream DSP chip sends a setting machine number request command to the corresponding upstream DSP chip and receives confirmation information from the upstream DSP chip forwarded by each downstream DSP chip. The subsequent DSP chip sends a setting machine number instruction to the corresponding previous DSP chip so that the previous DSP chip stores the temporary machine number, and receives the setting machine number success message from the previous DSP chip forwarded by each subsequent DSP chip.

[0008] In one possible implementation, the step of parallel programming of the front-end DSP chip connected to each subsequent DSP chip, based on the temporary machine number and using each subsequent DSP chip as an instruction and data relay, includes: Based on the temporary machine number, programming instructions are sent to the corresponding front-end DSP chip through each subsequent DSP chip. Each subsequent DSP chip receives the file size confirmation result from the corresponding preceding DSP chip based on the burning instruction acknowledgment. Based on the file size confirmation result, each subsequent DSP chip is used as an instruction and data relay to control the corresponding preceding DSP chip to perform parallel programming.

[0009] In one possible implementation, based on the file size confirmation result, using each subsequent DSP chip as an instruction and data relay to control the corresponding preceding DSP chip to perform parallel programming includes: If the file size confirmation result indicates that the required memory of the front-end DSP chip is sufficient, the program data is forwarded to the corresponding front-end DSP chip through the back-end DSP chip for program writing; if the file size confirmation result indicates that the required memory of the front-end DSP chip is insufficient, the front-end DSP chip is set to a writing wait state, and a prompt indicating insufficient required memory is generated. Additionally, the back-end DSP chip receives the corresponding programming process receipt information from the front-end DSP chip, and monitors the programming progress of the front-end DSP chip based on the programming process receipt information.

[0010] In one possible implementation, before forwarding the program data through the subsequent DSP chip to the corresponding preceding DSP chip for program programming, the method further includes: The flash memory of the corresponding DSP chip is unlocked by sending a flash unlock command from the subsequent DSP chip to the corresponding preceding DSP chip. The back-end DSP chip receives the Flash unlock success message from the corresponding front-end DSP chip. Based on the Flash unlock success information, the program data is forwarded to the corresponding front-end DSP chip through the back-end DSP chip for program writing.

[0011] In one possible implementation, after the parallel programming of the front-end DSP chips connected to each subsequent DSP chip, the method further includes: for the pre-end DSP chip that has been programmed, clearing the temporary machine number stored in its corresponding subsequent DSP chip.

[0012] Secondly, embodiments of the present invention provide a front-end DSP chip programmable device for parallel programming, comprising: The request module is used to send request forwarding instructions to multiple downstream DSP chips and receive confirmation information from each downstream DSP chip. The collection module is used to send a collection serial number instruction to each downstream DSP chip that receives the confirmation message, and to obtain the unique serial number of each downstream DSP chip that receives the confirmation message according to the collection serial number instruction. The allocation module is used to allocate a temporary machine number to each downstream DSP chip according to the serial number; The distribution module is used to distribute the temporary machine number to the front-end DSP chip connected to each back-end DSP chip; The monitoring module is used to perform parallel programming of the front-end DSP chips connected to each rear-end DSP chip, based on the temporary machine number and using each rear-end DSP chip as an instruction and data relay.

[0013] Thirdly, embodiments of the present invention provide a host computer, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the method described in the first aspect or any possible implementation of the first aspect.

[0014] Fourthly, embodiments of the present invention provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method described in the first aspect or any possible implementation thereof.

[0015] The beneficial effects of the embodiments of the present invention compared with the prior art are as follows: This invention uses a downstream DSP chip as a relay for parallel programming, enabling identification, data, and instruction transmission. The upstream DSP chip only needs to obey commands, simplifying the upstream task. Simultaneously, utilizing the unique serial number permanently embedded in the power module, the host computer actively sends serial number collection commands to gather serial numbers and assigns a corresponding temporary serial number to each downstream DSP chip, which is then distributed to each upstream DSP chip. Throughout the programming process, each downstream DSP chip can independently report the programming status and progress of its corresponding upstream DSP chip based on its temporary serial number. The host computer achieves centralized monitoring, unified scheduling, and collaborative control of the programming processes of multiple upstream DSP chips. Compared to traditional programming schemes, this invention eliminates the need for additional control hardware and expansion interfaces, effectively reducing hardware costs and circuit complexity. Furthermore, relying on the serial number identification and forwarding mechanism, it directly enables true parallel simultaneous programming control of multiple upstream DSP chips, significantly improving batch programming efficiency. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is an application scenario diagram provided by an embodiment of the present invention; Figure 2 This is a schematic diagram illustrating the implementation process of the parallel programming method for front-end DSP chips provided in this embodiment of the invention. Figure 3 This is a schematic diagram illustrating the functions of the host computer and slave computer provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the parallel programming device for the front-end DSP chip provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of the host computer provided in an embodiment of the present invention. Detailed Implementation

[0018] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of the invention. However, those skilled in the art will understand that the invention can be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods are omitted so as not to obscure the description of the invention with unnecessary detail.

[0019] To illustrate the technical solution described in this invention, specific embodiments are described below.

[0020] Figure 1 This is a schematic diagram of an application scenario provided by an embodiment of the present invention. The host computer is connected to power modules 1-n via CAN communication. Each power module contains two DSP chips: a post-stage DSP chip (DSP11-DSPn1) and a pre-stage DSP chip (DSP12-DSPn2), which are directly connected via a serial port. DSP11-DSPn1 serves as the external interface and is directly connected to the CAN bus.

[0021] The embodiments of the present invention mainly solve the following problem: how to perform parallel batch programming of DSP12-DSPn2 without adding additional hardware devices.

[0022] The key to automated parallel programming of multiple front-end DSP chips lies in: (1) The front-end DSP chip can accurately know the instructions sent by the host computer and execute the commands and receive the instructions. This requires that: the host computer sends information through CAN communication, which can be transmitted to the serial communication in real time and be known by the front-end DSP chip; the progress of the front-end chip's execution can be transmitted to the serial communication in real time, which can be known by the back-end DSP chip, and then transmitted to the CAN communication, which can be known by the host computer.

[0023] (2) The host computer can accurately distinguish n power modules in order to understand the current module's programming progress. Therefore, the downstream DSP chip needs to know the serial number of the device and match it with the host computer. After successful matching, the downstream forwards the program that the upstream needs to program to the upstream.

[0024] Therefore, embodiments of the present invention provide a method for parallel programming of a front-end DSP chip, see [link to relevant documentation]. Figure 2 As shown, it includes: Step S201: Send request forwarding instructions to multiple downstream DSP chips and receive confirmation information from each downstream DSP chip.

[0025] In this embodiment, the host computer can send a request forwarding command to multiple downstream DSP chips via the CAN communication bus. This command is used to trigger the downstream DSP chips to perform a program switching operation, so that each chip can safely jump from the application program (App) running in normal working state to the upgrade bootloader (BootLoader) dedicated to program writing and firmware upgrade. The host computer receives and verifies the confirmation information of the downstream DSP chip that has successfully completed the program jump in real time, so as to confirm that each chip has entered the program writing state, and prepare for the subsequent temporary machine number configuration and parallel writing process.

[0026] Step S202: Send a collection serial number instruction to each downstream DSP chip that has received the confirmation message, and obtain the unique serial number of each downstream DSP chip that has received the confirmation message according to the collection serial number instruction.

[0027] The key to enabling parallel programming of multiple front-end DSP chips lies in accurately distinguishing between front-end DSP chips that are currently being programmed, have completed programming, and have not yet started programming, allowing the host computer to manage the programming progress. The prerequisite for achieving this is assigning a unique and identifiable identifier to each front-end DSP chip; only with this unique identifier can the host computer independently monitor each chip.

[0028] This embodiment considers utilizing the unique serial number generated by each power module at the time of manufacture based on information such as the manufacturing date, production batch, and serial number (this serial number is scanned and entered by production personnel and stored in the host computer APP program in real time at the time of scanning). This serial number uniquely corresponds to the front-end and back-end DSP chips inside each power module and can be used as a unique identification indicator to distinguish different DSP chips.

[0029] Step S203: Assign a temporary machine number to each downstream DSP chip according to the serial number.

[0030] In this embodiment, the host computer can sort all the collected serial numbers in an orderly manner. After sorting, the host computer will assign corresponding temporary machine numbers to each subsequent DSP chip in turn.

[0031] Step S204: The temporary machine number is sent to the front-end DSP chip connected to each subsequent DSP chip.

[0032] The host computer can broadcast a matching message containing a serial number and a temporary machine number to the CAN communication bus. After receiving the bus message, each downstream DSP chip compares the serial number in the message with its own locally stored serial number. When the serial numbers match, the chip determines that the message is the corresponding information for that chip and sends the assigned temporary machine number to the upstream DSP chip for local storage.

[0033] Step S205: Based on the temporary machine number, use each subsequent DSP chip as an instruction and data relay to perform parallel programming on the preceding DSP chip connected to each subsequent DSP chip.

[0034] Based on the assigned temporary serial numbers, the host computer uses each downstream DSP chip as an instruction forwarding and data relay node. The host computer transmits programming instructions and program data sequentially through each downstream DSP chip, performing parallel batch programming on the upstream DSP chips connected to each downstream DSP chip. This achieves integrated parallel programming control of the upstream and downstream DSP chips. Simultaneously, the upstream DSP chip can send programming progress information to the host computer in real time through the downstream DSP chips, enabling programming progress management.

[0035] This invention uses a downstream DSP chip as a relay for parallel programming, enabling identification, data, and instruction transmission. The upstream DSP chip only needs to obey commands, simplifying the upstream task. Simultaneously, utilizing the unique serial number permanently embedded in the power module, the host computer actively sends serial number collection commands to gather serial numbers and assigns a corresponding temporary serial number to each downstream DSP chip, which is then distributed to each upstream DSP chip. Throughout the programming process, each downstream DSP chip can independently report the programming status and progress of its corresponding upstream DSP chip based on its temporary serial number. The host computer achieves centralized monitoring, unified scheduling, and collaborative control of the programming processes of multiple upstream DSP chips. Compared to traditional programming schemes, this invention eliminates the need for additional control hardware and expansion interfaces, effectively reducing hardware costs and circuit complexity. Furthermore, relying on the serial number identification and forwarding mechanism, it directly enables true parallel simultaneous programming control of multiple upstream DSP chips, significantly improving batch programming efficiency.

[0036] To facilitate understanding of this solution, Figure 3 The embodiment illustrates the functional diagram of the host computer, the front-end slave computer (front-end DSP chip), and the back-end slave computer (back-end DSP chip) during the front-end program burning control process.

[0037] The host computer program: The function code needs to include function codes such as the front-end forwarding request function code, forwarding logic, and exit forwarding function code, as well as the forwarding process and obstacle avoidance system that are associated with these function codes.

[0038] The downstream program (downstream APP, downstream Bootloader): In order to achieve transparent forwarding of the upstream code and matching with the upstream computer, a forwarding process for upstream programming needs to be added. This part of the code is fixed. At the same time, to reduce the amount of code in the downstream APP and the programming pressure, this part is added to the downstream Bootloader. It is only necessary to add a forwarding request jump interface in the downstream APP. So that when programming the upstream, after the downstream APP receives the forwarding function request from the upstream computer, the downstream program jumps from the APP to the Bootloader and transmits the received upstream data to the upstream through the downstream serial port for upstream programming.

[0039] The preceding lower-level program (preceding App, preceding Bootloader): After receiving a request via serial port, the preceding program jumps from the preceding App to the preceding Bootloader to perform the programming and sends a success message to the following Bootloader. The following program then forwards the success message to the host computer. After the preceding Bootloader finishes refreshing the preceding App program, it sends a programming completion message to the host computer. Upon receiving this message, the host computer sends an exit forwarding function request. The following Bootloader forwards this request to the preceding Bootloader, and the preceding program automatically jumps from the preceding Bootloader to the preceding App program for execution. Subsequently, the following Bootloader automatically jumps to the following App program to execute the following App code.

[0040] Specifically, to achieve collaborative parallel programming of the front-end and back-end DSP chips, the host computer needs to pre-configure and define communication flow function codes, including: 0. Forwarding request command; 1. Collect serial number command; 2. Set machine number request command; 3. Set temporary machine number command; 4. Start forwarding command; 5. Send programming command; 6. Confirm file size command; 7. Unlock Flash command; 8. Data send request command; 9. Write data in this package command; 10. Verify the entire file command; 11. Jump to App command.

[0041] The corresponding functions of the lower-level machine include: 0. The lower-level machine jumps from the APP to the BootLoader; 1. Upload serial number; 2. Set machine number request connection receipt; 3. Temporary machine number setting success / failure; 4. After confirming that this module is forwarding, the serial port starts forwarding the "start forwarding command" to the front-end; 5. After confirming that this module is being burned, the serial port starts forwarding the "start burning command" to the front-end; 6. Upon receiving the file size confirmation command, the lower-level BootLoader forwards the "confirm file size command" to the front-end. The front-end compares the size of the bytes to be received with its remaining memory. If the bytes that can be received are smaller than the remaining memory, it sends a receipt: file size confirmation successful; if the bytes that can be received are larger than the remaining memory, it sends a receipt: file size confirmation failed; 7. The lower-level BootLoader sends the "unlock Flash" command. The "h command" is forwarded to the front-end via serial port. The front-end sends a success / failure receipt to the back-end upon unlocking the Flash according to the command. 8. The back-end BootLoader sends a receipt to the host computer with "local temporary machine number and local connection success / failure". 9. The back-end BootLoader forwards the "data write command" to the front-end via serial port. The front-end sends a receipt with "data received successfully, data written successfully / failed" to the back-end. 10. The back-end BootLoader forwards the "verify the entire file command" to the front-end via serial port. The front-end sends a receipt with "verification of the entire file successfully / failed" to the back-end. 11. The back-end BootLoader forwards the "jump to App command" to the front-end via serial port. The front-end sends a receipt with "jump to App successfully / failed" to the back-end. If successful, the back-end will also jump its own program from the BootLoader to the App.

[0042] See Figure 3 As shown, in this embodiment, the parallel programming process for the DSP chip includes: (1) Send request forwarding instructions to multiple downstream DSP chips and receive confirmation information from each downstream DSP chip.

[0043] The back-end typically runs an App program. When the host computer requests the front-end to be programmed, the back-end App program stores the serial number in the Flash. The back-end program then jumps from the App to the BootLoader. In order to put the forwarding process in the BootLoader, the amount of code in the back-end App is reduced.

[0044] When the host computer executes the forwarding request command, the subsequent program jumps from the App to the BootLoader, instead of jumping after the temporary machine number has been allocated. The reason for this is that if the jump occurs after the temporary machine number is allocated, the temporary machine number will be stored in the subsequent stage's Flash memory. Since the preceding stage's Flash memory is erased and written after programming, if the temporary machine number is written to the subsequent stage's Flash memory, it cannot be changed during subsequent programming. Therefore, the jump occurs before the temporary machine number is allocated to prevent the temporary machine number from being stored in the subsequent stage's Flash memory.

[0045] (2) Send a collection serial number instruction to each downstream DSP chip that receives the confirmation message, and obtain the unique serial number of each downstream DSP chip according to the collection serial number instruction.

[0046] The serial number is a combination of numbers and letters. The numbers indicate the batch and time of manufacture of the power module, while the letters indicate the model information of the power module, which is a unique identifier.

[0047] (3) Assign a temporary machine number to each downstream DSP chip according to the serial number.

[0048] After the host computer sends the instruction to collect serial numbers, the subsequent lower-level machine uploads its own unique serial number to the host computer. The host computer collects the serial numbers uploaded by the subsequent lower-level machines, allocates and stores the serial numbers and temporary machine numbers (numbers from 1 to n), and counts the total number of modules.

[0049] (4) Send a setting machine number request instruction to the corresponding front-end DSP chip through the back-end DSP chip, and receive the confirmation information of the front-end DSP chip forwarded by each back-end DSP chip.

[0050] The subsequent DSP chip sends a setting machine number instruction to the corresponding previous DSP chip so that the previous DSP chip stores the temporary machine number, and receives the setting machine number success message from the previous DSP chip forwarded by each subsequent DSP chip.

[0051] (5) Based on the temporary machine number, the corresponding front-end DSP chip is sent a burning instruction through each subsequent DSP chip; the corresponding front-end DSP chip receives the file size confirmation result of the burning instruction reply from each subsequent DSP chip; based on the file size confirmation result, each subsequent DSP chip is used as an instruction and data relay to control the corresponding front-end DSP chip to perform parallel burning.

[0052] If the file size confirmation result indicates that the required memory of the front-end DSP chip is sufficient, the host computer forwards the program data to be programmed to the corresponding front-end DSP chip packet by packet through the back-end DSP chip to complete the program programming operation of the front-end DSP chip. If the file size confirmation result indicates that the required memory of the front-end DSP chip is insufficient, the front-end DSP chip is placed in a programming waiting state, and the host computer generates and outputs a message indicating insufficient required memory, so that the operator can identify and handle the abnormality in a timely manner.

[0053] The process involves first sending a Flash unlock command from the subsequent DSP chip to the corresponding preceding DSP chip to unlock its Flash memory. The subsequent DSP chip then receives a successful Flash unlock confirmation from the preceding DSP chip. Based on this confirmation, the program data is forwarded from the subsequent DSP chip to the preceding DSP chip for program writing. This step-by-step approach—unlocking the Flash first and then sending the program data after successful unlocking—effectively avoids writing failures, chip malfunctions, and data corruption caused by forcibly writing programs while the Flash is locked, ensuring a safe and reliable program writing operation. Furthermore, combined with a temporary serial number addressing mechanism, it enables parallel and orderly secure writing of multiple DSP chips, significantly improving the stability and success rate of batch writing.

[0054] Meanwhile, the host computer receives the programming progress feedback information from the corresponding front-end DSP chip through the back-end DSP chip, and performs real-time monitoring, status judgment and anomaly handling of the programming progress of each front-end DSP chip based on the feedback information, so as to ensure that the parallel programming process of the front-end DSP chips is controllable, stable and reliable.

[0055] (6) Clear the temporary serial number stored in the pre-programmed DSP chip.

[0056] In this embodiment, the temporary machine number is stored in the front-end Flash partition. When the Flash erase operation is performed, the original temporary machine number is erased and restored to the default initial value. When the programming task is restarted in the future, the host computer will reassign a new temporary machine number to each DSP chip, so as to avoid the defects of duplicate machine numbers and chaotic parallel addressing caused by the old temporary machine number remaining in the Flash during the next programming.

[0057] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0058] Figure 4 This is a schematic diagram of a front-end DSP chip program parallel programming device provided in an embodiment of the present invention. Figure 4As shown, the front-end DSP chip program parallel burning device 4 includes: The request module 41 is used to send request forwarding instructions to multiple downstream DSP chips and receive confirmation information from each downstream DSP chip. The collection module 42 is used to send a collection serial number instruction to each downstream DSP chip that receives the receipt confirmation information, and to obtain the unique serial number of each downstream DSP chip that receives the receipt according to the collection serial number instruction. Allocation module 43 is used to allocate a temporary machine number to each downstream DSP chip according to the serial number; The distribution module 44 is used to distribute the temporary machine number to the front-end DSP chip connected to each back-end DSP chip; The monitoring module 45 is used to perform parallel programming of the front-end DSP chip connected to each subsequent DSP chip, based on the temporary machine number and using each subsequent DSP chip as an instruction and data relay.

[0059] In one possible implementation, request module 41 is used for: Send request forwarding instructions to multiple downstream DSP chips so that each downstream DSP chip can jump from the application program to the upgrade bootloader; Receive confirmation information from the subsequent DSP chip upon successful jump.

[0060] In one possible implementation, the distribution module 44 is used for: The downstream DSP chip sends a setting machine number request command to the corresponding upstream DSP chip and receives confirmation information from the upstream DSP chip forwarded by each downstream DSP chip. The subsequent DSP chip sends a setting machine number instruction to the corresponding previous DSP chip so that the previous DSP chip stores the temporary machine number, and receives the setting machine number success message from the previous DSP chip forwarded by each subsequent DSP chip.

[0061] In one possible implementation, based on the temporary machine number, each subsequent DSP chip acts as an instruction and data relay, and the preceding DSP chips connected to each subsequent DSP chip are programmed in parallel, including: Based on the temporary machine number, programming instructions are sent to the corresponding front-end DSP chip through each subsequent DSP chip. Each subsequent DSP chip receives the file size confirmation result from the corresponding preceding DSP chip based on the burning instruction retrieval. Based on the file size confirmation result, each subsequent DSP chip is used as an instruction and data relay to control the corresponding preceding DSP chip to perform parallel programming.

[0062] In one possible implementation, the monitoring module 45 is used for: If the file size confirmation result indicates that the required memory of the front-end DSP chip is sufficient, the program data is forwarded to the corresponding front-end DSP chip through the back-end DSP chip for program writing; if the file size confirmation result indicates that the required memory of the front-end DSP chip is insufficient, the front-end DSP chip is set to a writing wait state, and a message indicating insufficient required memory is generated. Additionally, the back-end DSP chip receives the corresponding programming process receipt information from the front-end DSP chip, and monitors the programming progress of the front-end DSP chip based on the programming process receipt information.

[0063] In one possible implementation, before forwarding the program data through the downstream DSP chip to the corresponding upstream DSP chip for program programming, the monitoring module 45 is also used for: The flash memory of the corresponding DSP chip is unlocked by sending a flash unlock command from the subsequent DSP chip to the corresponding preceding DSP chip. The back-end DSP chip receives the Flash unlock success message from the corresponding front-end DSP chip. Based on the successful Flash unlock information, the program data is forwarded to the corresponding front-end DSP chip through the back-end DSP chip for program writing.

[0064] In one possible implementation, after parallel programming of the front-end DSP chips connected to each subsequent DSP chip, the monitoring module 45 is further configured to: clear the temporary machine number stored in the corresponding subsequent DSP chip for the pre-end DSP chip that has been programmed.

[0065] This invention uses a downstream DSP chip as a relay for parallel programming, enabling identification, data, and instruction transmission. The upstream DSP chip only needs to obey commands, simplifying the upstream task. Simultaneously, utilizing the unique serial number permanently embedded in the power module, the host computer actively sends serial number collection commands to gather serial numbers and assigns a corresponding temporary serial number to each downstream DSP chip, which is then distributed to each upstream DSP chip. Throughout the programming process, each downstream DSP chip can independently report the programming status and progress of its corresponding upstream DSP chip based on its temporary serial number. The host computer achieves centralized monitoring, unified scheduling, and collaborative control of the programming processes of multiple upstream DSP chips. Compared to traditional programming schemes, this invention eliminates the need for additional control hardware and expansion interfaces, effectively reducing hardware costs and circuit complexity. Furthermore, relying on the serial number identification and forwarding mechanism, it directly enables true parallel simultaneous programming control of multiple upstream DSP chips, significantly improving batch programming efficiency.

[0066] Figure 5 This is a schematic diagram of the host computer provided in an embodiment of the present invention. Figure 5 As shown, the host computer 5 in this embodiment includes a processor 50 and a memory 51. The memory 51 stores a computer program 52. When the processor 50 executes the computer program 52, it implements the steps in the various method embodiments described above. Alternatively, when the processor 50 executes the computer program 52, it implements the functions of each module in the various device embodiments described above.

[0067] For example, computer program 52 can be divided into one or more modules / units, which are stored in memory 51 and executed by processor 50 to complete the present invention. The one or more modules / units can be a series of computer program instruction segments capable of performing specific functions, which describe the execution process of computer program 52 in host computer 5.

[0068] The host computer 5 may include, but is not limited to, a processor 50 and a memory 51. Those skilled in the art will understand that... Figure 5 This is merely an example of the host computer 5 and does not constitute a limitation on the host computer 5. It may include more or fewer components than shown in the figure, or combine certain components, or different components. For example, the host computer 5 may also include input / output devices, network access devices, buses, etc.

[0069] For the sake of simplicity and clarity, only the above-described functional modules / units are used as examples. In practical applications, the functions described above can be assigned to different functional modules / units as needed. These modules / units can be implemented in hardware, software, or a combination of both.

[0070] In the above embodiments, the descriptions of each embodiment have their own emphasis. Parts not detailed or described in a particular embodiment can be referred to in the relevant descriptions of other embodiments. Unless otherwise specified or in conflict with logic, the terminology and / or descriptions between different embodiments are consistent and can be referenced interchangeably. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0071] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A method for parallel programming of a front-end DSP chip, characterized in that, It is applied to a host computer, which is connected to multiple downstream DSP chips via CAN communication. The method includes: Send request forwarding instructions to multiple downstream DSP chips and receive confirmation information from each downstream DSP chip. Send a serial number collection instruction to each downstream DSP chip that receives the confirmation message, and obtain the unique serial number of each downstream DSP chip that receives the confirmation message according to the serial number collection instruction; Based on the serial number, assign a temporary machine number to each subsequent DSP chip; The temporary machine number is sent to the front-end DSP chip connected to each subsequent DSP chip. Based on the temporary machine number, each downstream DSP chip serves as an instruction and data relay, and the upstream DSP chips connected to each downstream DSP chip are programmed in parallel. During the entire programming process, each downstream DSP chip independently reports the programming status and progress of the corresponding upstream DSP chip according to the temporary machine number. The host computer realizes centralized monitoring, unified scheduling and collaborative control of the programming process of multiple upstream DSP chips.

2. The method for parallel programming of a front-end DSP chip as described in claim 1, characterized in that, The process of sending request forwarding instructions to multiple downstream DSP chips and receiving confirmation information from each downstream DSP chip includes: Send request forwarding instructions to multiple downstream DSP chips so that each downstream DSP chip can jump from the application program to the upgrade bootloader; Receive confirmation information from the subsequent DSP chip upon successful jump.

3. The method for parallel programming of a front-end DSP chip as described in claim 1, characterized in that, The step of sending the temporary machine number to each front-end DSP chip connected to a subsequent DSP chip includes: The downstream DSP chip sends a setting machine number request command to the corresponding upstream DSP chip and receives confirmation information from the upstream DSP chip forwarded by each downstream DSP chip. The subsequent DSP chip sends a setting machine number instruction to the corresponding previous DSP chip so that the previous DSP chip stores the temporary machine number, and receives the setting machine number success message from the previous DSP chip forwarded by each subsequent DSP chip.

4. The method for parallel programming of a front-end DSP chip as described in any one of claims 1 to 3, characterized in that, The step of parallel programming of the front-end DSP chips connected to each subsequent DSP chip, based on the temporary machine number and using each subsequent DSP chip as an instruction and data relay, includes: Based on the temporary machine number, programming instructions are sent to the corresponding front-end DSP chip through each subsequent DSP chip. Each subsequent DSP chip receives the file size confirmation result from the corresponding preceding DSP chip based on the burning instruction acknowledgment. Based on the file size confirmation result, each subsequent DSP chip is used as an instruction and data relay to control the corresponding preceding DSP chip to perform parallel programming.

5. The method for parallel programming of a front-end DSP chip as described in claim 4, characterized in that, Based on the file size confirmation result, the process of controlling the corresponding front-end DSP chips to perform parallel programming, using each subsequent DSP chip as an instruction and data relay, includes: If the file size confirmation result indicates that the required memory of the front-end DSP chip is sufficient, the program data is forwarded to the corresponding front-end DSP chip through the back-end DSP chip for program writing; if the file size confirmation result indicates that the required memory of the front-end DSP chip is insufficient, the front-end DSP chip is set to a writing wait state, and a prompt indicating insufficient required memory is generated. Additionally, the back-end DSP chip receives the corresponding programming process receipt information from the front-end DSP chip, and monitors the programming progress of the front-end DSP chip based on the programming process receipt information.

6. The method for parallel programming of a front-end DSP chip as described in claim 5, characterized in that, Before forwarding the program data to the corresponding front-end DSP chip via the back-end DSP chip for program burning, the following steps are also included: The flash memory of the corresponding DSP chip is unlocked by sending a flash unlock command from the subsequent DSP chip to the corresponding preceding DSP chip. The back-end DSP chip receives the Flash unlock success message from the corresponding front-end DSP chip. Based on the Flash unlock success information, the program data is forwarded to the corresponding front-end DSP chip through the back-end DSP chip for program writing.

7. The method for parallel programming of a front-end DSP chip as described in any one of claims 1 to 3, characterized in that, After performing parallel programming on the front-end DSP chips connected to each subsequent DSP chip, the method further includes: clearing the temporary machine number stored in the programmed front-end DSP chips.

8. A front-end DSP chip programmable device for parallel programming, characterized in that, It is applied to a host computer, which is connected to multiple downstream DSP chips via CAN communication. The device includes: The request module is used to send request forwarding instructions to multiple downstream DSP chips and receive confirmation information from each downstream DSP chip. The collection module is used to send a collection serial number instruction to each downstream DSP chip that receives the confirmation message, and to obtain the unique serial number of each downstream DSP chip that receives the confirmation message according to the collection serial number instruction. The allocation module is used to allocate a temporary machine number to each downstream DSP chip according to the serial number; The distribution module is used to distribute the temporary machine number to the front-end DSP chip connected to each back-end DSP chip; The monitoring module is used to perform parallel programming of the front-end DSP chips connected to each back-end DSP chip, based on the temporary machine number and using each back-end DSP chip as an instruction and data relay. During the programming process, each back-end DSP chip independently reports the programming status and progress of the corresponding front-end DSP chip according to the temporary machine number. The host computer realizes centralized monitoring, unified scheduling and collaborative control of the programming process of multiple front-end DSP chips.

9. A host computer, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method as described in any one of claims 1 to 7.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method as described in any one of claims 1 to 7.

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