Drive chip and laser radar
Patent Information
- Application Number
- CN202610662096.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2026-05-14
- Publication Date
- 2026-10-23
- Estimated Expiration
- 2046-05-14
AI Technical Summary
[0003]现有技术中激光雷达确定的时间差会存在偏差,导致测距偏差
在本公开实施例中,第一隔离部可以隔离反馈信号生成电路和驱动信号生成电路。可以实现反馈信号生成单元与驱动信号生成单元在电学上的隔离,避免激光驱动信号的瞬态脉冲对驱动反馈信号的瞬态波形产生干扰。如此,可以避免所述干扰对反馈延迟的测试精度的影响,可以更准确地测试确定反馈延迟时间。激光雷达可以基于更准确的反馈延迟时间确定飞行时间,提高测距准度。
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Figure CN122203028B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor laser technology, and more particularly to a driver chip and a lidar. Background Technology
[0002] A lidar (Light Detection and Ranging) system is a device that uses laser light as a medium to detect objects. Lidar is widely used in fields such as autonomous driving, drones, robot recognition, geographic mapping, and environmental monitoring. Some lidar systems determine the distance to objects based on time-of-flight (TOF). Lidar emits laser pulses. These pulses are reflected back when they encounter an object, forming an echo. Lidar can determine the time difference between receiving the echo and emitting the laser pulse, and calculate the distance to the object based on this time difference.
[0003] In existing technologies, the time difference determined by lidar can be inaccurate, leading to ranging errors. Summary of the Invention
[0004] This disclosure provides a driver chip and a lidar that can reduce ranging errors.
[0005] To address the aforementioned problems, this disclosure provides a driver chip for driving the laser of a lidar system. The driver chip includes: Substrate, the substrate having a first conductivity type; A feedback signal generation circuit is formed on the substrate, the feedback signal generation circuit being configured to generate a drive feedback signal based on a trigger signal; A drive signal generation circuit is formed on the substrate, the drive signal generation circuit being configured to generate a laser drive signal based on a trigger signal; and A first isolation section is configured to isolate the feedback signal generation circuit and the drive signal generation circuit.
[0006] Optionally, the substrate has a first surface, the feedback signal generation circuit and the drive signal generation circuit are located at different positions on a first plane parallel to the first surface, and the first isolation portion extends at least partially to the first surface along a first direction perpendicular to the first surface.
[0007] Optionally, the projection of the first isolation portion onto the first surface along the first direction forms a first region, and the projection of the feedback signal generation circuit onto the first surface along the first direction is located within the first region.
[0008] Optionally, it also includes a first electrostatic discharge (ESD) protection circuit, a second ESD protection circuit, a first grounding terminal, and a second grounding terminal. The feedback signal generation circuit is connected to the first ESD protection circuit and the first grounding terminal. The drive signal generation circuit is connected to the second ESD protection circuit and the second grounding terminal. The projections of the first ESD protection circuit and the first grounding terminal along the first direction onto the first surface are located within the first region.
[0009] Optionally, the first isolation portion includes a first doped region having a second conductivity type, and the first doped region has a first gap with the feedback signal generation circuit along the first direction.
[0010] Optionally, the first doped region is configured to be connected to a first voltage.
[0011] Optionally, the first isolation portion includes a third doped region and a fourth doped region, the third doped region and the fourth doped region having a second conductivity type, the third doped region having a second spacing from the feedback signal generation circuit along the first direction, and the fourth doped region extending from the third doped region along the first direction to the first surface.
[0012] Optionally, along the first plane, the fourth doped region is configured to be connected to the second voltage.
[0013] Optionally, a second isolation portion is also included. The substrate has a first surface, and the feedback signal generation circuit and the drive signal generation circuit are located at different positions on a first plane parallel to the first surface. The projection of the second isolation portion onto the first surface along the first direction forms a second region, and the projection of the drive signal generation circuit onto the first surface along the first direction is located within the second region.
[0014] Optionally, the second isolation portion includes a sixth doped region and a seventh doped region, the sixth doped region and the seventh doped region having a second conductivity type, the sixth doped region having a fourth spacing from the driving signal generation circuit along the first direction, and the seventh doped region extending from the sixth doped region along the first direction to the first surface.
[0015] Optionally, along the first plane, the seventh doped region has a fifth interval with the driving signal generation circuit, and the substrate corresponding to the fifth interval is connected to ground.
[0016] This disclosure also provides a lidar, including: A driver chip, as described above, is configured to receive a trigger signal and output a drive feedback signal and a laser drive signal. A laser, receiving the laser drive signal, the laser being configured to emit a laser; and A receiving chip receives the drive feedback signal, and the receiving chip is configured to receive the echo formed by the reflection of the laser.
[0017] Optionally, the receiving chip includes: a detector configured to receive the echo and convert the echo into an electrical signal; and logic circuitry configured to receive and process the electrical signal.
[0018] Compared with the prior art, the technical solution of the present disclosure has the following advantages: In this embodiment, the first isolation unit can isolate the feedback signal generation circuit and the drive signal generation circuit. This achieves electrical isolation between the feedback signal generation unit and the drive signal generation unit, preventing transient pulses of the laser drive signal from interfering with the transient waveform of the drive feedback signal. Thus, the impact of such interference on the testing accuracy of the feedback delay can be avoided, allowing for more accurate testing and determination of the feedback delay time. The lidar can then determine the flight time based on a more accurate feedback delay time, improving ranging accuracy. Attached Figure Description
[0019] Figure 1 A schematic diagram of a lidar structure is shown; Figure 2 The diagram shows a schematic diagram of the circuit principle of a driver chip provided in an embodiment of this disclosure from a top view.
[0020] Figure 3 The diagram shows an example of the structure of a driver chip provided in an embodiment of this disclosure from a side view.
[0021] Figure 4 The diagram shows a schematic diagram of the circuit principle of a driver chip provided in an embodiment of this disclosure from a top view.
[0022] Figure 5 The diagram shows an example of the structure of a driver chip provided in an embodiment of this disclosure from a side view.
[0023] Figure 6 The diagram shows a schematic diagram of the circuit principle of a driver chip provided in an embodiment of this disclosure from a top view.
[0024] Figure 7 The diagram shows an example of the structure of a driver chip provided in an embodiment of this disclosure from a side view.
[0025] Figure 8 The transient waveform of TRIG_Feedback is shown when the first isolation section is absent.
[0026] Figure 9The transient waveform of TRIG_Feedback is shown when the first isolation section is present.
[0027] Figure 10 A schematic diagram of an exemplary structure of a lidar provided in an embodiment of this disclosure is shown. Detailed Implementation
[0028] As the background technology shows, current lidar distance measurement methods have inaccuracies. This paper analyzes the reasons for these inaccuracies in ranging accuracy by examining the structure of a lidar driver chip.
[0029] Figure 1 A schematic diagram of a lidar system is shown. (Reference) Figure 1 A lidar system includes a laser, a detector, a drive circuit, a front-end processing circuit, an echo processing circuit, and a main controller.
[0030] During the operation of the lidar, the main controller sends a trigger signal TRIG_O. The drive circuit generates a laser drive signal LDK and a drive feedback signal (TRIG_feedback) based on this trigger signal. The drive feedback signal characterizes the timing of LDK. The laser emits a laser pulse based on LDK. The laser pulse is reflected by an object, forming an echo. The detector receives the echo. The detector converts the echo from an optical signal to an electrical signal, generating an echo signal Vr. The front-end processing circuit receives the echo signal Vr and generates a voltage intensity signal Raw. The echo processing circuit generates a time digital signal tdc_data based on the voltage intensity signal Raw. The main controller can determine the time of flight of the laser pulse and thus the distance between the lidar and the object.
[0031] When determining the flight time, it is necessary to consider both the time it takes for the laser pulse to be emitted from the lidar and for the echo to return to the lidar, as well as the transmission path delay of the electrical signal within the lidar. For example, refer to... Figure 1 The transmission path delay may include, for example, the delay corresponding to the signal transmission path from the main controller to the drive circuit and the laser, and the delay corresponding to the signal transmission path from the detector to the front-end processing circuit, the echo processing circuit and the main controller.
[0032] The TRIG_feedback output from the drive circuit can be used to determine the delay time of LDK transmission from the drive circuit to the laser and Vr transmission from the detector to the front-end processing circuit. During lidar calibration, the feedback delay of electrical signal transmission can be measured. This feedback delay includes the time delay of the master controller sending TRIG_O to the drive circuit, the drive circuit sending TRIG_feedback to the front-end processing circuit, the front-end processing circuit sending raw_data to the echo processing circuit, and the echo processing circuit sending tdc_data to the master controller. The deviation between this feedback delay and the transmission path delay of the electrical signal within the lidar is generally less than 200 ps. They can be considered essentially equivalent. Therefore, the feedback delay can be measured to eliminate errors in time-of-flight calculations.
[0033] In the driving circuit, the LDK signal is a high-current, high-voltage signal that drives the laser, and it has a significant interference effect on other low-voltage signals. The LDK signal can also interfere with ordinary digital signals such as TRIG_Feedback. When the transient pulse of the LDK signal significantly interferes with the transient waveform of TRIG_Feedback, it will affect the accuracy of the feedback delay test and the accuracy of the time-of-flight calculation.
[0034] In a first aspect, embodiments of this disclosure provide a driving chip. The driving chip is used to drive the laser of a lidar system. The driving chip includes a substrate, a feedback signal generation circuit, a drive signal generation circuit, and a first isolation portion. The substrate has a first conductivity type. The feedback signal generation circuit is formed on the substrate. The feedback signal generation circuit can generate a drive feedback signal based on a trigger signal. The drive signal generation circuit is formed on the substrate. The drive signal generation circuit can generate a laser drive signal based on a trigger signal. The first isolation portion can isolate the feedback signal generation circuit and the drive signal generation circuit.
[0035] In this embodiment, the driver chip includes a first isolation section that isolates the feedback signal generation circuit and the drive signal generation circuit. The first isolation section electrically isolates the feedback signal generation unit from the drive signal generation unit, preventing interference from transient pulses of the laser drive signal on the transient waveform of the drive feedback signal. This avoids the impact of such interference on the testing accuracy of the feedback delay, allowing for more accurate testing and determination of the feedback delay time of the electrical signal transmission within the lidar. The lidar can then more accurately determine the time of flight, improving ranging accuracy.
[0036] Figure 2 The diagram shows a schematic diagram of the circuit principle of a driver chip provided in an embodiment of this disclosure from a top view. Figure 3The diagram shows an example of the structure of a driver chip provided in an embodiment of this disclosure from a side view.
[0037] refer to Figure 2 and Figure 3 The driving chip includes a substrate 100, a feedback signal generation circuit 110, a driving signal generation circuit 120, and a first isolation section 130.
[0038] In some embodiments, the substrate 100 has a first conductivity type. The substrate 100 can provide a process platform for a device structure. Exemplarily, the material of the substrate may include silicon. Alternatively, the material of the substrate may include germanium, silicon carbide, gallium arsenide, or indium gallium dihydrogen phosphate. Alternatively, the substrate may also be a silicon-on-insulator substrate or a germanium-on-insulator substrate, without specific limitation herein.
[0039] The substrate is a substrate of a first conductivity type. The first conductivity type can be N-type or P-type. N-type refers to the conductivity carrier being electrons. P-type refers to the conductivity carrier being holes. In some embodiments, the substrate can be a P-type substrate.
[0040] The feedback signal generation circuit 110 is formed on the substrate 100. The feedback signal generation circuit 110 can generate a drive feedback signal based on a trigger signal.
[0041] In some embodiments, the feedback signal generation circuit may include a feedback circuit. The feedback circuit can generate a driving feedback signal TRIG_feedback.
[0042] The drive signal generation circuit 120 is formed on the substrate 100. The drive signal generation circuit 120 can generate a laser drive signal based on a trigger signal.
[0043] In some embodiments, the drive signal generation circuit 120 may include high-voltage switching transistors. Exemplarily, the drive signal generation circuit 120 includes multiple high-voltage switching transistors. For example, the drive signal generation circuit includes N high-voltage switching transistors. N is a positive integer greater than 1. N can represent the number of high-voltage switching transistors. One high-voltage switching transistor can generate one laser drive signal LDK[i] (i takes values from 1 to N). The high-voltage switching transistor can be connected to one or more lasers. The laser drive signal LDK[i] can drive the one or more lasers to emit laser light.
[0044] In some embodiments, the feedback signal generation circuit 110 includes multiple switching transistor driving circuits. Each of the multiple switching transistor driving circuits can correspond one-to-one with a multiple high-voltage switching transistor. The multiple switching transistor driving circuits are connected to the feedback circuit. One switching transistor driving circuit drives one high-voltage switching transistor.
[0045] A switching transistor driver circuit can generate an initial drive signal LDK'[i] (where i takes values from 1 to N) based on a trigger signal. A feedback circuit can generate a drive feedback signal TRIG_feedback based on the triggering of the switching transistor driver circuit. For example, when a switching transistor driver circuit generates the initial drive signal LDK'[i], it can trigger the feedback circuit to generate the corresponding drive feedback signal TRIG_feedback.
[0046] For example, the high-voltage switching transistor connected to the switching transistor driving circuit can receive the initial driving signal LDK'[i] and output the laser driving signal LDK[i].
[0047] In some embodiments, the driver chip further includes a first electrostatic discharge (ESD) protection circuit 140 and a first ground terminal DGND. The feedback signal generation circuit is connected to the first ESD protection circuit 140. The first ESD protection circuit can provide ESD protection for the input / output interface. In some embodiments, the driver chip includes multiple first ESD protection circuits. Exemplarily, one first ESD protection circuit can be connected to the input terminal of the feedback signal generation circuit. Another first ESD protection circuit can be connected to the output terminal of the feedback signal generation circuit. Exemplarily, the trigger signal TRIG_O received by the feedback signal generation circuit is input to the switching transistor driver circuit via one of the first ESD protection circuits. The drive feedback signal TRIG feedback is output via the other first ESD protection circuit. In this way, the ESD protection performance of the feedback signal generation circuit can be improved. For example, the first ESD protection circuit may include an input / output ESD (IO-ESD) protection circuit.
[0048] In some embodiments, the switching transistor drive circuit, the feedback circuit, and the first electrostatic discharge protection circuit are also connected to the first ground terminal DGND.
[0049] In some embodiments, the driver chip may further include a second electrostatic discharge (ESD) protection circuit 150 and a second ground terminal PGND. The drive signal generation circuit 120 is connected to the second ESD protection circuit 150. The second ESD protection circuit 150 may be the same as or similar to the first ESD protection circuit 140. The second ESD protection circuit 150 can provide ESD protection for the input / output interface. In some embodiments, the driver chip includes multiple second ESD protection circuits 150. One second ESD protection circuit 150 may be connected to an output terminal of the drive signal generation circuit. Exemplarily, the number of second ESD protection circuits 150 included in the driver chip may be the same as the number of output terminals of the drive signal generation circuit or the number of high-voltage switching transistors, for example, N. The N second ESD protection circuits 150 are respectively connected to the output terminals of the N high-voltage switching transistors. Exemplarily, the laser drive signal LDK[i] generated by the high-voltage switching transistors is output via the second ESD protection circuit. In this way, the ESD protection performance of the drive signal generation circuit can be improved. In the example, the second ESD protection circuit may include an input / output ESD (IO-ESD) protection circuit.
[0050] In some embodiments, the high-voltage switching transistor and the second electrostatic discharge protection circuit are connected to the second grounding terminal PGND.
[0051] In this embodiment, the driver chip further includes a first isolation section 130. The first isolation section 130 can isolate the feedback signal generation circuit 110 and the drive signal generation circuit 120. The first isolation section 130 can achieve electrical isolation between the feedback signal generation circuit and the drive signal generation circuit, preventing the laser drive signal from interfering with the drive feedback signal.
[0052] In some embodiments, the feedback signal generation circuit 110 and the drive signal generation circuit 120 may be located at different positions on the substrate. (Refer to reference...) Figure 2 and Figure 3 The substrate 100 has a first surface 100a. The first surface 100a may be a surface of the substrate 100. Alternatively, the first surface 100a may represent a side of the substrate on which the feedback signal generation circuit and the drive signal generation circuit are disposed. The feedback signal generation circuit 110 and the drive signal generation circuit 120 are located at different positions on a first plane. The first plane is parallel to the first surface 100a. Alternatively, the projections of the feedback signal generation circuit 110 and the drive signal generation circuit 120 on the first surface 100a are located at different positions. Exemplarily, the feedback signal generation circuit 110 and the drive signal generation circuit 120 do not overlap on the first plane.
[0053] Continue to refer to Figure 3The first isolation portion 130 extends at least partially along a first direction to the first surface 100a. The first direction is perpendicular to the first surface 100a. Exemplarily, the dimension of the first isolation portion 130 along the first direction is larger than the dimension of the feedback signal generation circuit 110 in the first direction. Thus, the first isolation portion 130 can isolate the feedback signal generation circuit 110 from other circuits or devices in the first direction. For example, the portion of the first isolation portion 130 that overlaps with the feedback signal generation circuit 110 along the first plane can extend along the first direction to the feedback signal generation circuit 110. The portion of the first isolation portion 130 that does not overlap with the feedback signal generation circuit 110 along the first plane can extend along the first direction to the first surface 100a. Alternatively, the portion of the first isolation portion 130 that does not overlap with the feedback signal generation circuit 110 along the first plane can extend along the first direction to other circuits or devices.
[0054] In some embodiments, the projection of the first isolation portion onto the first surface 100a along the first direction forms a first region. The projection of the feedback signal generation circuit 110 onto the first surface 100a along the first direction is located within the first region. Thus, the first isolation portion 130 can isolate the feedback signal generation circuit 110 from other circuits or devices on the first plane. Exemplarily, the first isolation portion 130 is partially located along the first plane between the feedback signal generation circuit and the drive signal generation circuit, which can prevent the laser drive signal from interfering with the drive feedback signal.
[0055] In some embodiments, the circumferential portion of the first isolation portion 130 corresponding to the first region extends along a first direction to the first surface 100a. Thus, the first isolation portion 130 surrounds the feedback signal generation circuit 110, enhancing the isolation effect.
[0056] This disclosure does not limit the size of the first isolation portion along the first direction, as long as the first isolation portion can achieve the isolation function. For example, the first isolation portion can extend to a second surface opposite to the first surface of the substrate. Alternatively, the first isolation portion can extend a first distance from the first surface along the first direction. The feedback signal generation circuit extends a second distance from the first surface along the first direction. The first distance is greater than the second distance. Thus, the first isolation portion forms a closed region in the direction away from the first surface. The feedback signal generation circuit can be located within the closed region, achieving electrical isolation between the feedback signal generation circuit and the drive signal generation circuit.
[0057] In some embodiments, the projections of the first electrostatic discharge (ESD) protection circuit 140 and the first grounding terminal onto the first surface 100a are located within the first region. Exemplarily, the first ESD protection circuit 140 and the first grounding terminal are located within the enclosed region formed by the first isolation portion. Thus, the first isolation portion 130 isolates the first ESD protection circuit 140 and the first grounding terminal from other circuits or devices, preventing the laser driving signal from interfering with the driving feedback signal.
[0058] In some embodiments, such as Figure 3 As shown, the first isolation portion 130 includes a first doped region 131. This first doped region 131 has a second conductivity type. The second conductivity type indicates a conductivity type different from the first conductivity type. Thus, when the first conductivity type is N-type, the second conductivity type can be P-type. When the first conductivity type is P-type, the second conductivity type can be N-type. By configuring the first doped region with the second conductivity type, a reverse PN junction can be formed at the boundary between the first doped region and the substrate, achieving isolation between the region where the first isolation portion is located and other regions of the substrate.
[0059] In some embodiments, the first doped region 131 can be a well doped region. For example, the first conductivity type can be P-type. The substrate is a P-type substrate. The second conductivity type can be N-type. The first doped region 131 can be a deep N-well (DNW).
[0060] In some embodiments, the first doped region 131 and the feedback signal generation circuit have a first gap along the first direction. The first gap can prevent the first doped region from affecting the electrical performance of the feedback signal generation circuit.
[0061] In some embodiments, the driver chip further includes a second doped region 141. The second doped region 141 has a first conductivity type. For example, the second doped region 141 is disposed in the first spacing. Alternatively, the second doped region 141 is disposed between the first doped region 131 and the feedback signal generation circuit 110. Yet another example is that the second doped region 141 is disposed between the first doped region 131, the feedback signal generation circuit 110, and the first electrostatic discharge protection circuit 140.
[0062] For example, the second doped region 141 can be a P-well (PWELL). The feedback signal generation circuit and the first electrostatic discharge protection circuit can be located in the PWELL.
[0063] In some embodiments, the first doped region may be connected to a first voltage (not shown in the figure). The second doped region is connected to ground. Thus, a reverse PN junction is formed between the first and second doped regions. The reverse PN junction can prevent the substrate or circuits or devices in the substrate from conducting electrical signals to the feedback signal generation circuit in the second doped region. In this way, interference from the drive signal generation circuit to the feedback signal generation circuit can be avoided.
[0064] Figure 4 The diagram shows a schematic diagram of the circuit principle of a driver chip provided in an embodiment of this disclosure from a top-down view. Figure 5 The diagram shows an example of the structure of a driver chip provided in an embodiment of this disclosure from a side view.
[0065] refer to Figure 4 and Figure 5 The driving chip includes a substrate 100, a feedback signal generation circuit 110, a driving signal generation circuit 120, and a first isolation section 130. The substrate 100, the feedback signal generation circuit 110, the driving signal generation circuit 120, and the first isolation section 130 may be the same as or similar to the substrate 100, the feedback signal generation circuit 110, the driving signal generation circuit 120, and the first isolation section 130 in the aforementioned embodiments.
[0066] In some embodiments, the driver chip further includes a first electrostatic discharge (ESD) protection circuit 140 and a second ESD protection circuit 150. The first ESD protection circuit 140 and the second ESD protection circuit 150 may be the same as or similar to the first ESD protection circuit 140 and the second ESD protection circuit 150 in the foregoing embodiments.
[0067] In some embodiments, the first isolation portion 130 includes a third doped region 132 and a fourth doped region 133. The third doped region 132 and the fourth doped region 133 have a second conductivity type. Along the first direction, the third doped region 132 has a second spacing 142 with the feedback signal generation circuit 110. The fourth doped region 133 extends from the third doped region 132 along the first direction to the first surface 100a. Exemplarily, the fourth doped region 133 does not overlap with the feedback signal generation circuit 110 on the first plane. For example, the projection of the third doped region 132 onto the first plane corresponds to a first region. The fourth doped region 133 is located on the first plane in the circumferential region of the projection of the third doped region 132. Exemplarily, the third doped region 132, the fourth doped region 133, and the first surface 100a form a closed region. The feedback signal generation circuit 110 is located within the closed region.
[0068] In some embodiments, the fourth doped region may also be located on the side of the first plane where the projection of the third doped region faces the driving signal generation circuit. In some embodiments, the third doped region may include a buried layer. For example, in a P-type substrate, the third doped region 132 may include an N-type buried layer (NBL). The fourth doped region may include a well doped region. For example, the fourth doped region 133 may be a deep N-well (DNW). The DNW extends from the NBL toward one side of the feedback signal generation circuit to a first surface of the substrate.
[0069] Reference Figure 4 and Figure 5 The third doped region 132 and the fourth doped region 133 form an isolation space. The feedback signal generation circuit is located within this isolation space. In this way, the first isolation section 130 can isolate the feedback signal generation circuit 110.
[0070] In this embodiment of the disclosure, the driver chip further includes a fifth doped region 143. The fifth doped region 143 has a first conductivity type. Exemplarily, the fifth doped region 143 is spaced from the third doped region 132 in a first direction. The fifth doped region 143 is spaced from the fourth doped region 133 in a first plane by a third spacing 144. The spacing between the fifth doped region 143 and the third doped region 132, and the spacing between the fifth doped region 143 and the fourth doped region 133, may be part of the substrate 100. For example, the fifth doped region 143 is PWELL.
[0071] In some embodiments, the feedback signal generation circuit 110 and the first electrostatic discharge (ESD) protection circuit 140 are disposed in the fifth doped region 143. The fourth doped region 133 may be connected to a second voltage (not shown). The substrate corresponding to the third interval 144 may be connected to ground. Thus, the third and fourth doped regions can form a reverse PN junction between the substrate and the fifth doped region. The reverse PN junction can prevent the substrate or circuits or devices within the substrate from conducting electrical signals to the feedback signal generation circuit in the fifth doped region. In this way, interference from the drive signal generation circuit to the feedback signal generation circuit can be avoided.
[0072] Figure 6 The diagram shows a schematic diagram of the circuit principle of a driver chip provided in an embodiment of this disclosure from a top view. Figure 7 The diagram shows an example of the structure of a driver chip provided in an embodiment of this disclosure from a side view.
[0073] refer to Figure 6 and Figure 7The driving chip includes a substrate 100, a feedback signal generation circuit 110, a driving signal generation circuit 120, and a first isolation section 130. The substrate 100, the feedback signal generation circuit 110, the driving signal generation circuit 120, and the first isolation section 130 may be the same as or similar to the substrate 100, the feedback signal generation circuit 110, the driving signal generation circuit 120, and the first isolation section 130 in the aforementioned embodiments.
[0074] In some embodiments, the driver chip further includes a first electrostatic discharge (ESD) protection circuit 140 and a second ESD protection circuit 150. The first ESD protection circuit 140 and the second ESD protection circuit 150 may be the same as or similar to the first ESD protection circuit 140 and the second ESD protection circuit 150 in the foregoing embodiments.
[0075] In some embodiments, the driver chip further includes a first isolation region 130. The first isolation region 130 may be the same as or similar to the first isolation region 130 in the foregoing embodiments. For example, the first isolation region 130 may include a first doped region 131. Alternatively, the first isolation region 130 may include a third doped region 132 and a fourth doped region 133.
[0076] For example, the substrate 100 has a first surface 100a. The first surface 100a may be a surface of the substrate 100. Alternatively, the first surface may refer to the surface on which the feedback signal generation circuit 110 and the drive signal generation circuit 120 are disposed. The feedback signal generation circuit 110 and the drive signal generation circuit 120 are located at different positions on a first plane. The first plane is parallel to the first surface 100a. Alternatively, the projections of the feedback signal generation circuit 110 and the drive signal generation circuit 120 on the first surface 100a are located at different positions. Exemplarily, the feedback signal generation circuit 110 and the drive signal generation circuit 120 do not overlap on the first plane.
[0077] In some embodiments, the driver chip further includes a second isolation section 160. The second isolation section 160 can isolate the drive signal generation circuit 120 from other circuits or devices.
[0078] refer to Figure 7The second isolation portion 160 extends at least partially along a first direction to the first surface 100a. The first direction is perpendicular to the first surface. Exemplarily, the dimension of the second isolation portion 160 along the first direction is larger than the dimension of the drive signal generation circuit 120 in the first direction. Thus, the second isolation portion 160 can isolate the drive signal generation circuit from other circuits or devices in the first direction. For example, the portion of the second isolation portion 160 that overlaps with the drive signal generation circuit along the first plane can extend along the first direction to the drive signal generation circuit. The portion of the second isolation portion 160 that does not overlap with the drive signal generation circuit along the first plane can extend along the first direction to the first surface 100a. Alternatively, the portion of the second isolation portion 160 that does not overlap with the drive signal generation circuit along the first plane can extend along the first direction to other circuits or devices.
[0079] In some embodiments, the projection of the second isolation portion 160 onto the first surface along the first direction forms a second region. The projection of the drive signal generation circuit 120 onto the first surface along the first direction is located within the second region. Thus, the second isolation portion 160 can isolate the drive signal generation circuit from other circuits or devices on the first plane. For example, if the second isolation portion 160 is partially located between the feedback signal generation circuit and the drive signal generation circuit along the first plane, interference from the laser drive signal to the drive feedback signal can be avoided.
[0080] In some embodiments, the circumferential portion of the second isolation portion 160 corresponding to the second region extends along a first direction to the first surface 100a. Thus, the second isolation portion 160 surrounds the drive signal generation circuit, enhancing the isolation effect.
[0081] This disclosure does not limit the size of the second isolation portion along the first direction, as long as the second isolation portion can achieve the isolation function. For example, the second isolation portion can extend to a second surface opposite to the first surface of the substrate. Alternatively, the second isolation portion can form a closed region in a direction away from the first surface. The drive signal generation circuit can be located within the closed region to achieve electrical isolation between the feedback signal generation circuit and the drive signal generation circuit.
[0082] In some embodiments, the projections of the second electrostatic discharge (ESD) protection circuit 150 and the second grounding terminal PGND onto the first surface 100a are located within the second region. Thus, the second isolation portion isolates the second ESD protection circuit 150 and the second grounding terminal PGND from other circuits or devices on the first plane, preventing the laser drive signal from interfering with other signals.
[0083] For example, the second electrostatic discharge protection circuit 150 and the second grounding terminal are located within the enclosed area formed by the second isolation section, which helps to prevent the laser driving signal from interfering with other signals.
[0084] In some embodiments, the second isolation portion 160 may include a sixth doped region 161 and a seventh doped region 162. Along the first direction, the sixth doped region 161 has a fourth spacing 145 with the drive signal generation circuit. The seventh doped region 162 extends from the sixth doped region 161 along the first direction to the first surface 100a.
[0085] In some embodiments, the seventh doped region 162 does not overlap with the drive signal generation circuit 120 on the first plane. For example, the projection of the sixth doped region 161 onto the first plane corresponds to a second region. The seventh doped region 162 is located on the first plane in the circumferential region of the projection of the sixth doped region 161. For example, the sixth doped region 161, the seventh doped region 162, and the first surface 100a form a closed region. The drive signal generation circuit 120 is located within the closed region. The second electrostatic discharge protection circuit 150 and the second ground terminal may also be located within the closed region.
[0086] In some embodiments, the seventh doped region may also be located on the side of the first plane where the projection of the sixth doped region faces the feedback signal generation circuit.
[0087] The sixth and seventh doped regions may have a second conductivity type. In some embodiments, the sixth doped region may include a buried layer. In a P-type substrate, the sixth doped region may include an N-type buried layer (NBL). The seventh doped region may include a well doped region. For example, the seventh doped region 162 may include a deep N-well (DNW). The DNW extends from the NBL toward one side of the drive signal generation circuit to the first surface of the substrate.
[0088] refer to Figure 7 As shown, the sixth doped region 161 and the seventh doped region 162 form an isolation space. The drive signal generation circuit and the second electrostatic discharge protection circuit 150 are located within the isolation space. In this way, the drive signal generation circuit can be isolated from other devices or circuits, preventing the laser drive signal from interfering with other signals.
[0089] In this embodiment of the disclosure, along the first plane, the seventh doped region is further spaced from the driving signal generation circuit. The driving signal generation circuit is also spaced from the sixth and seventh doped regions. The space may be a portion of the substrate 100.
[0090] In some embodiments, the seventh doped region may be connected to a second voltage. The substrate between the seventh doped region and the drive signal generation circuit may be connected to ground. Thus, the sixth and seventh doped regions can form a reverse PN junction between the drive signal generation circuit and the substrate. The reverse PN junction can prevent the drive signal generation circuit from conducting electrical signals into the substrate, thereby preventing the laser drive signal from interfering with other signals, such as the drive feedback signal.
[0091] In the physical verification of the driver chip, a comparative experiment was conducted to determine whether the driver chip included a first isolation section. Figure 8 The transient waveform of TRIG_Feedback is shown when the first isolation section is absent. Figure 9 The transient waveform of TRIG_Feedback is shown when the first isolation section is present. Figure 9 The driver chip takes the first isolation section, which includes NBL and DNW, as an example. Figure 8 and Figure 9 The curves of different colors represent the driving feedback signals corresponding to different LDK[i].
[0092] Through actual testing, it was found that, Figure 8 As shown, without the first isolation section, the leading edge of the transient waveform of TRIG_Feedback interfered with by LDK exhibits significant distortion. This is because the leading edge transient current waveforms of TRIG_Feedback and LDK are essentially time-overlapping. When TRIG_Feedback is in its falling phase, the PGND ground bounce caused by the LDK signal can propagate to the TRIG_Feedback reference ground DGND through the substrate resistance (Rsub resistance). This causes leading edge distortion of TRIG_Feedback, affecting the ranging accuracy of the lidar. When the first isolation section is set, as... Figure 9 As shown, the distortion of the TRIG_Feedback transient waveform affected by LDK interference is significantly reduced. The leading edge of the TRIG_Feedback transient waveform exhibits no distortion, with only amplitude variations caused by a portion of the AC signal from PGND to DGND. Thus, the leading edge of the TRIG_Feedback no longer shows distortion, avoiding any impact on the ranging accuracy of the lidar.
[0093] Secondly, this disclosure also provides a lidar system. This lidar system includes the driving chip provided in this disclosure. The lidar system provided in this disclosure can improve ranging accuracy.
[0094] Figure 10 A schematic diagram of an exemplary structure of a lidar provided in an embodiment of this disclosure is shown.
[0095] like Figure 10As shown, the lidar may include a driver chip 200, a laser 210, and a receiver chip 220.
[0096] In some embodiments, the driver chip 200 can receive a trigger signal and output a drive feedback signal and a laser drive signal. The driver chip 200 may be the same as or similar to the driver chip provided in the embodiments of this disclosure.
[0097] Laser 210 can receive the laser driving signal. Laser 210 can emit laser light under the drive of the laser driving signal.
[0098] The receiver chip 220 can receive the echo formed by the reflected laser. The receiver chip 220 can also receive the drive feedback signal. Exemplarily, the receiver chip 220 can determine the time of flight of the laser based on the drive feedback signal and the time it takes to receive the echo. The time of flight can be used to determine the distance to an object.
[0099] In some embodiments, the laser 210 may include a semiconductor laser, such as a vertical-cavity surface-emitting laser (VCSEL), an edge-emitting laser (EEL), or other semiconductor lasers capable of generating laser light. In some embodiments, the laser 210 may also include a solid-state laser or a fiber laser. The wavelength of the laser emitted by the laser 210 may be any one of 905 nm, 940 nm, or 1550 nm. The laser 210 may also emit laser light of other wavelengths. The driver chip 200 may be an analog chip or a digital-analog hybrid chip.
[0100] In some embodiments, the receiving chip may include a detector and logic circuitry. The detector may receive the echo and convert it into an electrical signal. The logic circuitry may receive and process the electrical signal. Exemplarily, the logic circuitry may determine the timing of receiving the electrical signal. The logic circuitry may also receive the drive feedback signal. The logic circuitry may determine the time of flight of the laser based on a feedback delay determined by testing and the timing of receiving the electrical signal.
[0101] In some embodiments, the detector may include an avalanche photodiode (APD), a single-photon avalanche diode (SPAD), or a silicon photomultiplier (SiPM). For example, the detector may include a SPAD array. The SPAD array may be integrated into a photosensitive chip.
[0102] In some embodiments, the logic circuit may be implemented as a system-on-chip (SOC) or an application-specific integrated circuit (ASIC). For example, the logic circuit chip is packaged together with the photosensitive chip of the detector.
[0103] The lidar provided in this embodiment includes a first isolation section in its driving chip. This first isolation section prevents the laser driving signal from interfering with the driving feedback signal, thereby improving the accuracy of feedback delay testing. The lidar provided in this embodiment facilitates more accurate testing and determination of the feedback delay time of electrical signal transmission within the lidar. Based on this more accurate feedback delay, the lidar can determine the time of flight, improving ranging accuracy.
[0104] While the embodiments disclosed herein are as described above, they are not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of these embodiments; therefore, the scope of protection of these embodiments should be determined by the scope defined in the claims.
Claims
1. A driver chip for driving the laser of a lidar system, characterized in that, The driver chip includes: Substrate, the substrate having a first conductivity type; A feedback signal generation circuit is formed on the substrate, the feedback signal generation circuit being configured to generate a drive feedback signal based on a trigger signal; A drive signal generation circuit is formed on the substrate, the drive signal generation circuit being configured to generate a laser drive signal based on a trigger signal; and A first isolation section is configured to isolate the feedback signal generation circuit and the drive signal generation circuit; The substrate has a first surface, the feedback signal generation circuit and the drive signal generation circuit are located at different positions on a first plane parallel to the first surface, the first isolation portion extends at least partially to the first surface along a first direction perpendicular to the first surface; the dimension of the first isolation portion along the first direction is larger than the dimension of the feedback signal generation circuit in the first direction. The projection of the first isolation portion onto the first surface along the first direction forms a first region, and the projection of the feedback signal generation circuit onto the first surface along the first direction is located within the first region.
2. The driver chip as described in claim 1, characterized in that, It also includes a first electrostatic discharge (ESD) protection circuit, a second ESD protection circuit, a first grounding terminal, and a second grounding terminal. The feedback signal generation circuit is connected to the first ESD protection circuit and the first grounding terminal. The drive signal generation circuit is connected to the second ESD protection circuit and the second grounding terminal. The projections of the first ESD protection circuit and the first grounding terminal along the first direction onto the first surface are located within the first region.
3. The driver chip as described in claim 1, characterized in that, The first isolation portion includes a first doped region having a second conductivity type, and along the first direction, the first doped region has a first gap from the feedback signal generation circuit.
4. The driver chip as described in claim 3, characterized in that, The first doped region is configured to be connected to a first voltage.
5. The driver chip as described in claim 1, characterized in that, The first isolation portion includes a third doped region and a fourth doped region, the third doped region and the fourth doped region having a second conductivity type, the third doped region having a second spacing from the feedback signal generation circuit along the first direction, and the fourth doped region extending from the third doped region along the first direction to the first surface.
6. The driver chip as described in claim 5, characterized in that, The fourth doped region is configured to be connected to the second voltage.
7. The driver chip as described in claim 1, characterized in that, It also includes a second isolation portion, the substrate has a first surface, the feedback signal generation circuit and the drive signal generation circuit are located at different positions on a first plane parallel to the first surface, the projection of the second isolation portion onto the first surface along the first direction forms a second region, and the projection of the drive signal generation circuit onto the first surface along the first direction is located within the second region.
8. The driver chip as described in claim 7, characterized in that, The second isolation portion includes a sixth doped region and a seventh doped region, the sixth doped region and the seventh doped region having a second conductivity type, the sixth doped region having a fourth spacing from the driving signal generation circuit along the first direction, and the seventh doped region extending from the sixth doped region along the first direction to the first surface.
9. The driver chip as described in claim 8, characterized in that, Along the first plane, the seventh doped region and the driving signal generation circuit have a fifth interval, and the substrate corresponding to the fifth interval is connected to ground.
10. A lidar, characterized in that, include; A driver chip, as described in any one of claims 1-9, wherein the driver chip is configured to receive a trigger signal and output a drive feedback signal and a laser drive signal; A laser that receives the laser driving signal and is configured to emit a laser. and A receiving chip receives the drive feedback signal, and the receiving chip is configured to receive the echo formed by the reflection of the laser.
11. The lidar as described in claim 10, characterized in that, The receiving chip includes: a detector configured to receive the echo and convert the echo into an electrical signal; and logic circuitry configured to receive and process the electrical signal.
Citation Information
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