Power fluctuation suppression method and circuit, power supply circuit, electronic device
Patent Information
- Application Number
- CN202610640612.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2026-05-11
- Publication Date
- 2026-10-13
- Estimated Expiration
- 2046-05-11
AI Technical Summary
[0004]本申请主要解决的技术问题是提供一种功率波动抑制方法及电路、电源电路、电子设备,能够解决相关技术中的功率波动抑制方法对功率波动的抑制效果不佳,也不够精准,无法有效保障供电稳定性,能源利用效率也较低的问题
[0020]本申请的有益效果是:区别于现有技术,本申请提供的功率波动抑制方法通过获取并对功率补偿电路中的输出电流进行高通滤波得到电流补偿目标值,以对电流补偿目标值与输出补偿电流之间的电流误差值进行电流反馈调节得到补偿输出值,并利用补偿输出值调制生成的补偿控制信号调节输出补偿电流,从而能够更快响应功率波动引起的输出电流的变化,并通过对输出补偿电流的调节对输出电流的变化进行补偿,以能够匹配功率波动的快速性和突发性有效对功率波动实现更良好、更精准的抑制效果,从而能够有效保障供电的稳定性,并提高能源的利用效率。
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Figure CN122203254B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of grid-connected power generation technology, and in particular to a power fluctuation suppression method and circuit, power supply circuit, and electronic equipment. Background Technology
[0002] In recent years, with the increasing abundance of electronic devices, it has become increasingly important to meet the power supply needs of these devices. This is especially true in scenarios where power loads exhibit sudden and drastic periodic changes. Suppressing power fluctuations, such as those that cause unstable supply voltage and frequency affecting equipment operation, and those that increase the pressure on power dispatching affecting the stable operation of regional power supply, is of paramount importance.
[0003] However, power fluctuation suppression methods in related technologies generally use energy storage devices to assist in power supply to alleviate power fluctuations. However, the control strategies of energy storage devices are mostly simple charge-discharge switching, with a slow response speed. They cannot match the speed and suddenness of power fluctuations, resulting in poor suppression effect on power fluctuations and insufficient precision. They cannot effectively guarantee power supply stability and have low energy utilization efficiency. Summary of the Invention
[0004] The main technical problem addressed by this application is to provide a power fluctuation suppression method and circuit, power supply circuit, and electronic device, which can solve the problems of poor suppression effect, insufficient accuracy, inability to effectively guarantee power supply stability, and low energy utilization efficiency of power fluctuation suppression methods in related technologies.
[0005] To solve the above-mentioned technical problems, one technical solution adopted in this application is: providing a power fluctuation suppression method applied to a power compensation circuit, wherein the power fluctuation suppression method includes: acquiring electrical characteristic parameters in the power compensation circuit; wherein the electrical characteristic parameters include output current and output compensation current; performing high-pass filtering on the output current to obtain a current compensation target value; subtracting the output compensation current from the current compensation target value to obtain a current error value; performing current feedback adjustment on the current error value to obtain a compensation output value; using the compensation output value to modulate and generate a compensation control signal; and sending the compensation control signal to the power compensation circuit to trigger the power compensation circuit to change its switching state, thereby adjusting the output compensation current.
[0006] The step of obtaining the target current compensation value by high-pass filtering the output current includes: processing the output current using a first-order high-pass filter transfer function to obtain the target current compensation value; wherein the calculation formula of the first-order high-pass filter transfer function is: I* compensate =Iload*τs / (1+τs); Among them, I* compensate For the target value of current compensation, For output current, Let be the filtering time constant, and s be a complex variable.
[0007] The step of obtaining the target current compensation value by high-pass filtering the output current includes: processing the output current using a second-order high-pass filter transfer function to obtain the target current compensation value; wherein the calculation formula of the second-order high-pass filter transfer function is: I* compensate =Iload*τ 2 *s 2 / (τ 2 *s 2 +2*ζ*τ*s+1); Among them, I* compensate For the target value of current compensation, For output current, Let be the filtering time constant, s be a complex variable, and ζ be the damping ratio.
[0008] The output current is an AC output current. The steps of high-pass filtering the output current to obtain the current compensation target value include: performing a rotational coordinate transformation on the AC output current to obtain the direct-axis component current; and high-pass filtering the direct-axis component current to obtain the current compensation target value.
[0009] The electrical characteristic parameters include energy buffer voltage and output voltage. The step of subtracting the output compensation current from the current compensation target value to obtain the current error value includes: obtaining the load power using the output voltage and output current; performing low-pass filtering on the load power to obtain the steady-state value of the load power; obtaining the voltage control target value using the steady-state value of the load power; performing voltage feedback adjustment on the voltage error value between the voltage control target value and the energy buffer voltage to obtain the compensation adjustment value; adding the compensation adjustment value to the current compensation target value and subtracting the output compensation current to obtain the current error value.
[0010] The step of obtaining the voltage control target value using the steady-state value of the load power includes: using a set calculation function to process the steady-state value of the load power, the limited steady-state value of the voltage of the power compensation circuit, and the equivalent capacitance value to obtain the voltage control target value; wherein, the calculation formula of the set calculation function is: ; in, U is the target value for voltage control. x To limit the steady-state voltage value, This represents the steady-state value of the load power. The filtering time constant is This is the equivalent capacitance value. This refers to the efficiency of electrical energy conversion.
[0011] The step of obtaining the steady-state value of the load power by low-pass filtering includes: processing the load power using a first-order low-pass filter transfer function to obtain the steady-state value of the load power; wherein the calculation formula of the first-order low-pass filter transfer function is: P * =P*1 / (1+τs); in, Let P be the steady-state value of the load power, and s be the load power.
[0012] The step of obtaining the steady-state value of the load power by low-pass filtering includes: processing the load power using a second-order low-pass filter transfer function to obtain the steady-state value of the load power; wherein the calculation formula of the second-order low-pass filter transfer function is: P * =P*1 / (τ 2 *s 2 +2*ζ*τ*s+1); in, Let P be the steady-state value of the load power, s be the complex variable, and ζ be the damping ratio.
[0013] The output voltage is an AC output voltage, and the output current is an AC output current. The steps for obtaining the load power using the output voltage and output current include: performing a rotational coordinate transformation on the AC output voltage to obtain the direct-axis component voltage; performing a rotational coordinate transformation on the AC output current to obtain the direct-axis component current; and using the direct-axis component voltage and direct-axis component current to obtain the load power.
[0014] Wherein, the AC output voltage is the three-phase output voltage uabc, and the AC output current is the three-phase output current Iabc. The steps to obtain the load power using the direct-axis component voltage and the direct-axis component current include: multiplying the direct-axis component voltage by the direct-axis component current and then multiplying by 1.5 to obtain the load power.
[0015] Wherein, the AC output voltage is a single-phase output voltage, and the AC output current is a single-phase output current. The steps to obtain the load power using the direct-axis component voltage and the direct-axis component current include: multiplying the direct-axis component voltage by the direct-axis component current and then multiplying by 0.5 to obtain the load power.
[0016] The step of obtaining the steady-state value of the load power by low-pass filtering includes: obtaining a reference value of the load power by low-pass filtering; and multiplying the reference value of the load power by a compensation distribution coefficient to obtain the steady-state value of the load power.
[0017] To solve the above-mentioned technical problems, another technical solution adopted in this application is: to provide a power fluctuation suppression circuit, wherein the power fluctuation suppression circuit is coupled to a power compensation circuit; wherein the power fluctuation suppression circuit uses the power fluctuation suppression method described in any of the above claims to suppress power fluctuations in the power compensation circuit.
[0018] To solve the above-mentioned technical problems, another technical solution adopted in this application is: to provide a power supply circuit, wherein the power supply circuit includes a power compensation circuit and a power fluctuation suppression circuit, the power compensation circuit includes an energy buffer circuit and a power switching circuit, the power switching circuit is coupled to the energy buffer circuit and the power fluctuation suppression circuit, and is used to be coupled to the power supply circuit and the load operating circuit; wherein the power fluctuation suppression circuit is the power fluctuation suppression circuit as described above.
[0019] To solve the above-mentioned technical problems, another technical solution adopted in this application is: to provide an electronic device, wherein the electronic device includes a housing and a signal function circuit connected to the housing; wherein the signal function circuit is the power fluctuation suppression circuit as described above; or, the signal function circuit is the power supply circuit as described above.
[0020] The beneficial effects of this application are as follows: Unlike the prior art, the power fluctuation suppression method provided in this application obtains the current compensation target value by acquiring and high-pass filtering the output current in the power compensation circuit, and then adjusts the current error value between the current compensation target value and the output compensation current to obtain the compensation output value. The compensation output value is then used to modulate the generated compensation control signal to adjust the output compensation current, thereby enabling a faster response to changes in the output current caused by power fluctuations. By adjusting the output compensation current, the changes in the output current are compensated, which can match the speed and suddenness of power fluctuations and effectively achieve a better and more accurate suppression effect on power fluctuations. This can effectively ensure the stability of power supply and improve energy utilization efficiency. Attached Figure Description
[0021] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort, wherein: Figure 1 This is a flowchart illustrating the first embodiment of the power fluctuation suppression method of this application; Figure 2 This is a schematic diagram of the structure of the first embodiment of the power fluctuation suppression circuit and power compensation circuit of this application; Figure 3 yes Figure 1A logic block diagram of a signal processing embodiment in a medium-power fluctuation suppression method; Figure 4 yes Figure 1 A flowchart illustrating an embodiment of S12; Figure 5 This is a flowchart illustrating the second embodiment of the power fluctuation suppression method of this application; Figure 6 This is a schematic diagram of the first embodiment of the power supply circuit of this application; Figure 7 yes Figure 5 A logic block diagram of a signal processing embodiment in a medium-power fluctuation suppression method; Figure 8 This is a schematic diagram of the second embodiment of the power supply circuit of this application; Figure 9 yes Figure 5 A flowchart illustrating an embodiment of S23; Figure 10 This is a schematic diagram of the third embodiment of the power supply circuit of this application; Figure 11 This is a schematic diagram of the fourth embodiment of the power supply circuit of this application; Figure 12 This is a schematic diagram of the fifth embodiment of the power supply circuit of this application; Figure 13 yes Figure 5 A flowchart illustrating an embodiment of S24; Figure 14 yes Figure 13 A logic block diagram of a signal processing embodiment in a medium-power fluctuation suppression method; Figure 15 This is a schematic diagram of one embodiment of the electronic device of this application. Detailed Implementation
[0022] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0023] The terms "first," "second," and "third" in this application are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. All directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationships and movements between components in a specific orientation (as shown in the figures). If the specific orientation changes, the directional indications also change accordingly. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.
[0024] In this document, the term "implementation" means that a specific feature, structure, or characteristic described in connection with an implementation may be included in at least one implementation of this application. The appearance of this phrase in various places in the specification does not necessarily refer to the same implementation, nor is it a separate or alternative implementation mutually exclusive with other implementations. It will be explicitly and implicitly understood by those skilled in the art that the implementations described herein can be combined with other implementations.
[0025] The present application will now be described in detail with reference to the accompanying drawings and embodiments.
[0026] Please refer to the following: Figure 1 and Figure 2 ,in, Figure 1 This is a flowchart illustrating the first embodiment of the power fluctuation suppression method of this application. Figure 2 This is a schematic diagram of the first embodiment of the power fluctuation suppression circuit and power compensation circuit of this application. Specifically, it may include the following steps: S11: Obtain the electrical characteristic parameters of the power compensation circuit.
[0027] It is understood that the power fluctuation suppression method in this embodiment is specifically applied to, for example... Figure 2 In the first power compensation circuit 40 shown; wherein, the first power fluctuation suppression circuit 30 is coupled to the first power compensation circuit 40 to drive and control the first power compensation circuit 40 using the power fluctuation suppression method described in any one of the present invention.
[0028] It is worth noting that this power fluctuation refers to the unexpected changes in active or reactive power in the power system over time, which may manifest as periodic oscillations, random pulsations, or continuous deviations from the set value.
[0029] Furthermore, the term "coupled" in this document refers to any direct or indirect connection. Therefore, if the document describes a first circuit coupled to a second circuit, it means that the first circuit can be directly connected to the second circuit via electrical connection or signal connection methods such as wireless transmission or optical transmission, or indirectly connected to the second circuit via other circuits or connection methods via electrical connection or signal connection.
[0030] In some embodiments, the first power compensation circuit 40 may specifically include any reasonable energy buffer circuit with energy storage elements, such as a supercapacitor, a lithium battery, or a combination of a supercapacitor and a lithium battery, as well as any reasonable multi-level DC-AC (Direct Current to Alternating Current) inverter with bidirectional flow, such as a two-level or three-level inverter, or any reasonable DC-CDC (Direct Current to Direct Current) inverter with bidirectional flow, such as a buck converter, a boost converter, or a buck-boost converter. This embodiment does not limit this.
[0031] In some embodiments, the first power fluctuation suppression circuit 30 may specifically include any reasonable circuit unit with signal processing function, such as a control chip, a DSP (Digital Signal Processing) chip, an MCU (Micro Controller Unit) circuit, a CPU (Central Processing Unit), a microcontroller, a field-programmable gate array, a programmable logic device, discrete gate or transistor logic devices, or discrete hardware. This application does not limit this.
[0032] Specifically, the first power fluctuation suppression circuit 30 samples and obtains its electrical characteristic parameters from the first power compensation circuit 40 in real time for subsequent feedback control.
[0033] Specifically, this electrical characteristic parameter may include the output current I. load and output compensation current I compensate .
[0034] It is worth noting that the output current I load This can be understood as the load supply current provided to the load's operating circuit; the output compensation current I compensateThis corresponds to the output current I caused by load power fluctuations. load When it changes, the output current I load The auxiliary power supply current used for compensation.
[0035] In some embodiments, the output current I load and output compensation current I compensate Specifically, it can be obtained through one or more of any reasonable sampling methods such as current sensor, sampling resistor, Hall sensor or circuit model estimation, and this application does not limit it.
[0036] S12: High-pass filtering is performed on the output current to obtain the target value for current compensation.
[0037] Please continue reading. Figure 3 , Figure 3 yes Figure 1 A logic block diagram of a signal processing embodiment in a medium-power fluctuation suppression method.
[0038] The current output I is obtained by using a first-order high-pass filter transfer function, a second-order high-pass filter transfer function, or any other reasonable multi-order high-pass filter transfer function. load Perform calculations to obtain the target current compensation value I*. compensate ; or, the output current I load The input is fed into a first-order or second-order discrete high-pass filter to obtain the target current compensation value I* after processing by the filter. compensate This allows the output current I to be controlled through filtering algorithms or filters. load The steady-state and fluctuation components in the output current I are precisely separated to effectively filter out the output current I. load The steady-state component is retained, while only the fluctuating component that changes rapidly over time is preserved. This fluctuating component is the target component that needs to be compensated for by power, i.e., the target value I* for current compensation. compensate This is to provide a precise control basis for subsequent power compensation control.
[0039] S13: Subtract the output compensation current from the current compensation target value to obtain the current error value.
[0040] Within each control cycle, the current compensation target value I* will be... compensate Subtract the output compensation current I compensate The current error value is obtained, which reflects the deviation between the current compensation current and the ideal compensation requirement.
[0041] S14: The current error value is adjusted by current feedback to obtain the compensated output value.
[0042] The current error value is processed to obtain a compensation output value by using any reasonable current feedback regulation algorithm, such as ACR (Automatic Current Regulator), fuzzy control, sliding mode control, or model predictive control, and the compensation output value is dynamically adjusted in response to changes in the current error value.
[0043] It is worth noting that ACR typically employs a proportional-integral control algorithm, adjusting the output through real-time feedback to maintain the precise stability of the set current value. Its core functions include: Current tracking: ensuring the actual current closely follows the given signal; Anti-interference capability: suppressing the impact of external voltage fluctuations on the system; Dynamic acceleration: allowing the maximum permissible current to pass through during speed regulation, accelerating the start-up or braking process; Overcurrent protection: automatically limiting current when a fault occurs to ensure equipment safety.
[0044] S15: Generate a compensation control signal by modulating the compensation output value.
[0045] The compensation output value is processed by any reasonable signal modulation method such as unipolar modulation, bipolar modulation, sinusoidal pulse width modulation and space vector pulse width modulation to generate a compensation control signal, and the duty cycle and / or signal frequency of the compensation control signal are dynamically adjusted.
[0046] In some embodiments, the compensation control signal may be one or more of any reasonable control signal such as PWM (Pulse Width Modulation) signal or PFM (Pulse Frequency Modulation) signal, and this application does not limit it.
[0047] S16: Send the compensation control signal to the power compensation circuit to trigger the power compensation circuit to change the switching state, thereby adjusting the output compensation current.
[0048] The compensation control signal is sent to the first power compensation circuit 40 to trigger the switching element inside the first power compensation circuit 40 to change the switching state, thereby affecting the output compensation current I. compensate Adjustments can be made, such as in the output power and output current I. load During a sudden drop, the first power compensation circuit 40 is triggered to inject a positive output compensation current I into the load operating circuit. compensate And / or adjust to increase the positive output compensation current I compensate ; while in terms of output power and output current I load During a sudden increase, the first power compensation circuit 40 is triggered to absorb excess energy and inject a negative output compensation current I into the load operating circuit. compensateAnd / or adjust to increase the negative output compensation current I compensate .
[0049] The above scheme, the power fluctuation suppression method, obtains and processes the output current I in the first power compensation circuit 40. load High-pass filtering is performed to obtain the target current compensation value I*. compensate To compensate for the target value I* of the current compensate With output compensation current I compensate The current error value between the two values is used to obtain a compensated output value through current feedback adjustment, and the compensation output value is used to modulate the generated compensation control signal to adjust the output compensation current I. compensate This allows for a faster response to output current I caused by power fluctuations. load The change is observed by adjusting the output compensation current I. compensate The adjustment of the output current I load The system compensates for changes in power supply to match the speed and suddenness of power fluctuations, effectively suppressing power fluctuations more effectively and precisely, thereby ensuring the stability of power supply and improving energy utilization efficiency.
[0050] By extracting the dynamic current component requiring compensation through high-pass filtering and constructing a closed-loop feedback regulation mechanism, effective suppression of power fluctuations is achieved. Furthermore, direct current control offers fast response and high precision; the high-pass filter covers a continuous frequency band, providing strong adaptability. Addressing the prominent issue of power fluctuations, this approach achieves significant improvements in power supply stability and maintenance cost control through precise power fluctuation suppression and energy management. It combines practicality, reliability, and economy, providing strong support for the stable and efficient operation of load circuits.
[0051] Furthermore, in some embodiments, S12 may specifically include: using a first-order high-pass filter transfer function to filter the output current I. load The target current compensation value I* is obtained through calculation and processing. compensate .
[0052] The formula for calculating the transfer function of a first-order high-pass filter is as follows: I* compensate =Iload*τs / (1+τs); in, For the target value of current compensation, For output current, Let be the filtering time constant, and s be a complex variable.
[0053] Furthermore, in some embodiments, the above S12 may specifically include: using a second-order high-pass filter transfer function to process the output current to obtain the current compensation target value.
[0054] The formula for calculating the transfer function of a second-order high-pass filter is as follows: I* compensate =Iload*τ 2 *s 2 / (τ 2 *s 2 +2*ζ*τ*s+1); in, For the target value of current compensation, For output current, Let be the filtering time constant, s be a complex variable, and ζ be the damping ratio.
[0055] It is worth noting that, compared to first-order high-pass filtering, second-order and higher-order filtering can further reduce steady-state component interference and improve the purity of fluctuating component extraction, making them suitable for power supply scenarios with high load fluctuation frequency and a lot of electrical interference.
[0056] In other embodiments, the first power fluctuation suppression circuit 30 can also precisely separate the output current I using wavelet multi-scale decomposition technology. load The system can simultaneously process multi-frequency mixed fluctuations in different frequency bands to adapt to complex load fluctuation types and diverse frequencies, such as communication data centers, AI (Artificial Intelligence) data centers, and any reasonable power supply scenario, in order to make up for the limitations of single-order filtering. This application does not limit this.
[0057] It's worth noting that as AI data centers continue to expand in scale, the number of high-performance computing chips, such as GPUs (Graphics Processing Units), integrated within them has increased significantly. When these chips perform model training and inference operations, the computational load exhibits sudden and cyclical drastic changes, leading to significant fluctuations in the overall power consumption of AI data centers—the difference between peak and valley power can be several times, with high fluctuation frequency and rapid response. Therefore, it is crucial to achieve rapid and precise power fluctuation suppression, specifically tailored to the power supply scenarios of AI data centers, to ensure stable power supply and improve energy efficiency.
[0058] Please continue reading. Figure 4 , Figure 4 yes Figure 1 A flowchart illustrating an embodiment of S12 is shown. In one embodiment, the power fluctuation suppression method of this application, in addition to the above-described S11-S16, further includes some more specific steps. Specifically, S12 may further include the following steps: S121: Perform a rotational coordinate transformation on the AC output current to obtain the direct-axis component current.
[0059] Understandably, in the output current I load When the AC output current, i.e. the first power compensation circuit 40, is specifically applied in an AC system, in order to lay the core foundation for the subsequent extraction of the fluctuation component, the first power fluctuation suppression circuit 30 also needs to preprocess the AC output current, that is, to perform coordinate transformation on the AC output current, so as to transform the AC output current that changes periodically with time into a stable DC current in a synchronous rotating coordinate system, thereby realizing the initial separation of the steady-state component and the fluctuation component in the AC output current.
[0060] In addition, in a DC system, the first power fluctuation suppression circuit 30 does not require preprocessing of the acquired DC output current.
[0061] It is worth noting that the αβ (Clark) Clark transform is a mathematical tool used to simplify the analysis and control of three-phase systems. When the AC output current is specifically a three-phase output current Iabc, such as phase A current Ia, phase B current Ib, and phase C current Ic, the transform is expressed as: ; The inverse transformation mapping the αβ components back to the original three-phase output current Iabc is: .
[0062] In addition, the αβ→dq (Clarke-Park transformation) is used to convert the electrical quantities in the stationary two-phase coordinate system (αβ) to the synchronous rotating coordinate system (dq), so that the AC quantity is converted into the DC quantity, which simplifies the design of the control system.
[0063] The formula for transforming the stationary coordinate system (αβ) into the rotating coordinate system (dq) is as follows: ; Where θ is the rotation angle (usually the rotor electrical angle), the d-axis is aligned with the rotor magnetic field, and the q-axis leads the d-axis by 90°.
[0064] These transformations can be similarly applied to three-phase voltages, thus achieving a consistent representation of voltage and current in the αβ reference coordinate system. This method simplifies the control and analysis of three-phase systems by reducing the three-dimensional problem to two dimensions, improving computational efficiency and system performance.
[0065] Specifically, the first power fluctuation suppression circuit 30 performs a Parker transformation on the AC output current using the aforementioned transformation formula to obtain the rotating transformation current, i.e., the quadrature axis component current i. q and direct-axis component current i d .
[0066] When the AC output current is a single-phase output current, and the single-phase output current is Iac = Im * sin(wt + θ), let Iα = Iac, Iβ = Iac * H(s), H(s) = (sw) / (s + w), then Iα and Iβ are two sinusoidal AC currents with the same peak value and a phase difference of 90 degrees. After dq transformation, Iα and Iβ yield the quadrature axis component current i. q and direct-axis component current i d .
[0067] Where, Im can be understood as the amplitude of the single-phase output current Iac, ω represents the phase angle that changes per unit time, in radians per second (rad / s); t represents the independent variable, usually in seconds (s); θ represents the initial phase or phase angle; H(s) is the transfer function of the first-order all-pass filter, and s is a complex variable.
[0068] S122: High-pass filtering is performed on the direct-axis component current to obtain the target value of current compensation.
[0069] The current i of the current along the direct axis is obtained by applying a first-order high-pass filter transfer function, a second-order high-pass filter transfer function, or any other reasonable multi-order high-pass filter transfer function. d Perform calculations or process the direct-axis component current i d The input is fed into a first-order or second-order discrete high-pass filter for processing to obtain the target current compensation value I*. compensate .
[0070] Please see Figure 5 and Figure 6 ,in, Figure 5 This is a flowchart illustrating the second embodiment of the power fluctuation suppression method of this application. Figure 6 This is a schematic diagram of the first embodiment of the power supply circuit of this application. The power fluctuation suppression method of this embodiment... Figure 1 A detailed implementation diagram of the power fluctuation suppression method is shown, which specifically includes the following steps: S21: Obtain the electrical characteristic parameters of the power compensation circuit.
[0071] It is understood that the power fluctuation suppression method in this embodiment can specifically be the second power fluctuation suppression circuit 51 for example... Figure 6The drive control method implemented by the second power compensation circuit 52 shown is as follows. The first power supply circuit 50 includes the second power compensation circuit 52 and the second power fluctuation suppression circuit 51. The second power compensation circuit 52 includes a first energy buffer circuit 521 and a first power switch circuit 522. The first power switch circuit 522 is coupled to the first energy buffer circuit 521 and the second power fluctuation suppression circuit 51, and is used to couple with the first power supply circuit 101 and the load operating circuit 201.
[0072] In some embodiments, the first power supply circuit 101 serves as the basic power source for the load operating circuit 201. Specifically, it can be the power grid, a diesel generator, HVDC (High Voltage Direct Current), or any other reasonable type of DC or AC power supply. Its core function is to provide stable power to the load operating circuit 201, such as AI data center core computing equipment, auxiliary equipment, communication data center, or any reasonable load that exhibits sudden and drastic periodic changes. This application does not limit this.
[0073] In some embodiments, the first energy buffer circuit 521 is used to perform energy storage and release functions, serving as an energy carrier for power fluctuation compensation. It can be selected from supercapacitors, lithium batteries, or a combination of supercapacitors and lithium batteries. Considering the impact of cycle charge-discharge lifespan, the first energy buffer circuit 521 preferably uses a supercapacitor, which can quickly respond to millisecond-level sudden power fluctuations, adapting to the rapid and sudden power fluctuation requirements of AI data centers, and achieving rapid absorption and release of fluctuating power. When considering both rapid response and large-capacity energy storage requirements, the first energy buffer circuit 521 preferably adopts a combination of a supercapacitor and a lithium iron phosphate battery pack. "The combined energy storage structure, in which the supercapacitor focuses on millisecond-level instantaneous power fluctuation compensation and the lithium battery pack undertakes medium- and long-term continuous power compensation, is adapted to the high amplitude and long duration power fluctuation scenarios of large AI data centers. When considering that only fine-tuning of charging and discharging parameters is needed to adapt to its electrochemical characteristics, the first energy buffer circuit 521 preferably uses a vanadium redox flow battery or a lithium battery as a separate energy storage unit. It has the characteristics of large capacity, long cycle life and strong charging and discharging stability, which can completely replace the supercapacitor and has the same control logic as the supercapacitor. It is suitable for ultra-large AI data centers with extremely high energy storage capacity requirements. This application does not limit this."
[0074] In some embodiments, the second power fluctuation suppression circuit 51 further includes a current acquisition circuit (not shown), a voltage acquisition circuit (not shown), and a signal processing circuit (not shown). The current acquisition circuit uses an external sensor, such as a current transformer (CT) or a Hall sensor, and is installed on the AC side circuit to be compensated. Its core function is to acquire the real-time current value of the AC side to be compensated in real time and transmit the acquired current signal to the signal processing circuit in real time. This provides accurate and real-time data support for the power compensation algorithm built into the signal processing circuit, ensuring the accuracy of power compensation. The voltage acquisition circuit uses a sampling resistor, a circuit model, or an external sensor, such as a voltage sensor or a Hall sensor. It is used to acquire the real-time voltage value of the AC side to be compensated and the output port of the first energy buffer circuit 521 in real time and transmit the acquired voltage signal to the signal processing circuit in real time. This application does not limit the specific voltage acquisition circuit.
[0075] It is worth noting that the core function of the first power switching circuit 522 is to adjust the charging and discharging state of the first energy buffer circuit 521 under the control of the second power fluctuation suppression circuit 51, so as to realize real-time compensation for power fluctuations, ensure that the output of the first power supply circuit 101 is stable and the power quality meets the standards; and the second power fluctuation suppression circuit 51 also monitors the operating status and power quality of the entire system to ensure the stable output of the first power supply circuit 101.
[0076] In addition, if the first energy buffer circuit 521 uses a supercapacitor, its fast charging and discharging speed and long cycle life can quickly cope with sudden power fluctuations in AI data centers and better match the needs of rapid compensation for power fluctuations; if a lithium battery is used, a lithium iron phosphate battery pack can be used, which has the advantages of high safety and stable capacity; if a combination of supercapacitor and lithium battery is used, it can achieve synergistic compensation for instantaneous sudden fluctuations and medium- and long-term continuous fluctuations, adapting to the needs of different power fluctuation scenarios.
[0077] Specifically, the second power fluctuation suppression circuit 51 samples the electrical characteristic parameters of the first power switching circuit 522 in real time for use in subsequent feedback control.
[0078] Specifically, this electrical characteristic parameter may include the output current I. load Output compensation current I compensate Energy buffer voltage U and output voltage U load .
[0079] S22: High-pass filtering is performed on the output current to obtain the target value of current compensation.
[0080] Among them, S22 and Figure 1The same applies to S12 in the text. Please refer to S12 and its related textual description for details, which will not be repeated here.
[0081] S23: Obtain the load power using the output voltage and output current.
[0082] Please continue reading. Figure 7 , Figure 7 yes Figure 5 A logic block diagram of a signal processing embodiment in a medium-power fluctuation suppression method.
[0083] Understandably, when the first power supply circuit 101 is a DC source, the second power fluctuation suppression circuit 51 can specifically reduce the output voltage U load Multiplied by the output current I load The load power P is obtained; and when the first power supply circuit 101 is an AC source, the output voltage U is obtained respectively. load and output current I load After coordinate transformation, the corresponding direct-axis voltage component u is used. d and direct-axis component current i d The load power P is calculated.
[0084] S24: Low-pass filtering is performed on the load power to obtain the steady-state value of the load power.
[0085] The load power P is processed by a first-order low-pass filter transfer function, a second-order low-pass filter transfer function, or any other reasonable multi-order low-pass filter transfer function to obtain the steady-state value P* of the load power; or, the load power P is input into a first-order or second-order discrete low-pass filter to obtain the steady-state value P* of the load power after processing by the first-order or second-order discrete low-pass filter.
[0086] S25: Obtain the voltage control target value using the steady-state value of the load power.
[0087] The steady-state value P* of the load power is calculated using a preset control algorithm or control program to obtain the voltage control target value U*, which is used as the control target for the output port voltage of the first energy buffer circuit 521, i.e. the energy buffer voltage U, so as to maintain its state of charge within a safe range.
[0088] S26: The voltage error between the voltage control target value and the energy buffer voltage is adjusted by voltage feedback to obtain a compensation adjustment value.
[0089] In each control cycle, the voltage error value is obtained by subtracting the energy buffer voltage U from the voltage control target value U*. This voltage error value reflects the deviation between the current voltage at the first energy buffer circuit 521 terminal and the ideal charging and discharging requirements.
[0090] Furthermore, one of the following reasonable current feedback regulation algorithms is used: AVR (Automatic Current Regulator), fuzzy control, sliding mode control, model predictive control, etc., to process the voltage error value to obtain the compensation regulation value, and the compensation regulation value is dynamically adjusted in response to the change of the voltage error value.
[0091] It is worth noting that AVRs typically employ PID (Proportion Integral Differential) control algorithms: most widely used in industrial systems, they adjust the excitation current through proportional-integral-derivative operations to quickly respond to voltage deviations. Their parameters need to be optimized to adapt to the nonlinear, multivariable characteristics of power systems.
[0092] MBA (Mine Blast Algorithm): A novel swarm intelligence optimization algorithm that simulates mine explosion behavior. It demonstrates higher efficiency than genetic algorithms and particle swarm optimization in AVR parameter tuning, reducing computational burden by up to 40%.
[0093] Genetic Algorithms and Particle Swarm Optimization: Traditional soft computation methods used to solve multimodal nonconvex optimization problems in AVR.
[0094] DRL (Deep Reinforcement Learning) Algorithm: An improved deep reinforcement learning algorithm based on dual-delay deep deterministic policy gradient combined with an exploration network, used to enhance the adaptive control capability of AVRs under complex operating conditions.
[0095] S27: Add the compensation adjustment value to the current compensation target value and subtract the output compensation current to obtain the current error value.
[0096] Set the current compensation target value I* compensate Add the compensation adjustment value and subtract the output compensation current I. compensate By obtaining the current error value, the stored energy can be precisely regulated by controlling the terminal voltage of the first energy buffer circuit 521, avoiding overcharging and undercharging, and ensuring that the compensation energy is precisely matched with the load fluctuation requirements.
[0097] S28: The current error value is adjusted by current feedback to obtain the compensated output value.
[0098] S29: Generate a compensation control signal by modulating the compensation output value.
[0099] S210: Sends the compensation control signal to the power compensation circuit to trigger the power compensation circuit to change the switching state, thereby adjusting the output compensation current.
[0100] Among them, S28, S29 and S210 and Figure 1 S14, S15 and S16 are the same. Please refer to S14, S15 and S16 and their related textual descriptions for details. They will not be repeated here.
[0101] Furthermore, in some embodiments, the above S24 may specifically include: using a first-order low-pass filter transfer function to process the load power P to obtain the steady-state value P* of the load power.
[0102] The formula for calculating the transfer function of a first-order low-pass filter is as follows: P * =P*1 / (1+τs); in, Let P be the steady-state value of the load power, and P be the load power. Let be the filtering time constant, and s be a complex variable.
[0103] It is worth noting that the first-order low-pass filter transfer function is complementary to the first-order high-pass filter transfer function in this paper; that is, the sum of the transfer functions G1(s) and G2(s) is 1. The second power fluctuation suppression circuit 51 is specifically designed according to the output current I... load The high-pass filter component compensates for current fluctuations. Utilizing the complementary characteristics of high-pass and low-pass filters, the input current of the power supply circuit is made to follow the output current I. load Its low-pass filtering characteristics provide current, enabling the power supply circuit to provide gradually varying power when the load fluctuates, thus avoiding the impact of load fluctuations on the power supply circuit.
[0104] Furthermore, in some embodiments, the above S24 may specifically include: using a second-order low-pass filter transfer function to process the load power P to obtain the steady-state value P* of the load power.
[0105] The formula for calculating the transfer function of a second-order low-pass filter is as follows: P * =P*1 / (τ 2 *s 2 +2*ζ*τ*s+1); in, Let P be the steady-state value of the load power, s be the complex variable, and ζ be the damping ratio.
[0106] Similarly, this second-order low-pass filter transfer function complements the second-order high-pass filter transfer function in this paper, enabling the power supply circuit to provide gradually varying power during load fluctuations and preventing load fluctuations from impacting the power supply circuit. Furthermore, compared to the first-order high-pass filter, second-order and higher-order filters can further reduce steady-state interference and improve the purity of fluctuating component extraction, making them suitable for scenarios with high load fluctuation frequencies and numerous external electrical interferences.
[0107] Furthermore, in some embodiments, S25 may specifically include: using a set operation function to define the steady-state value of the load power P* and the fixed steady-state value of the voltage U of the second power compensation circuit 52. x Equivalent capacitance value The voltage control target value U* is obtained through calculation and processing.
[0108] The operational formula for the defined operation function is as follows: ; in, U is the target value for voltage control. x To limit the steady-state voltage value, This represents the steady-state value of the load power. The filtering time constant is This is the equivalent capacitance value. This refers to the efficiency of electrical energy conversion.
[0109] Understandably, with the power input current provided by the first power supply circuit 101 as Isource, the output compensation current of the first power switch circuit 522 is I... compensate The output current to the load circuit 201 is I. load For example, according to Kirchhoff's current theorem, we can obtain: Isource + Icompensate = Iload; Then, Isource = Iload - Icompensate; That is, the power input current Isource is the difference between the output current Iload and the output compensation current Icompensate.
[0110] The second power fluctuation suppression circuit 51 specifically obtains the output current I of the load working circuit 201 through the current and voltage acquisition unit. load and output voltage U load The energy buffer voltage U and output compensation current I are sampled from the first energy buffer circuit 521 and the first power switch circuit 522, respectively. compensate This serves as the foundational data for subsequent signal processing and power calculations.
[0111] In the AC system, the second power fluctuation suppression circuit 51 also needs to control the output current I. load A coordinate transformation is performed to convert the alternating current into a DC quantity in a synchronous rotating coordinate system. The rotation speed and angle of the synchronous rotating coordinate system are consistent with the synchronous coordinate system of the input voltage of the first power supply circuit 101. This coordinate transformation converts the time-varying alternating current into a stable DC quantity, thereby enabling control over the output current I. load The initial separation of the steady-state component from the fluctuating component lays a core foundation for the subsequent extraction of the fluctuating component. In a DC system, this second power fluctuation suppression circuit 51 does not require control over the output current I. load Preprocessing is performed, namely, the corresponding coordinate transformation.
[0112] The direct current component i is obtained by coordinate transformation in the synchronous rotating coordinate system. d Or the output current I sampled in the DC system load The output current I is further separated and extracted by the second power fluctuation suppression circuit 51. load The fluctuation component within the sample can be precisely separated from the steady-state component through filtering algorithms. For example, the fluctuation component can be extracted using a first-order high-pass filter, with the transfer function of the first-order high-pass filter being G1(s)=τs / (1+τs), where τ is the filtering time constant and s is a complex variable.
[0113] By using a first-order high-pass filter, the direct-axis current component i can be effectively filtered out. d Or output current I load The steady-state component is retained, while only the fluctuating component that changes rapidly over time is preserved. This fluctuating component is the target component that needs to be compensated for by the second power fluctuation suppression circuit 51, namely the current compensation target value I*. compensate This is to provide a precise control basis for subsequent power compensation control.
[0114] Among them, I compensate * = I load * G1(s).
[0115] The second power fluctuation suppression circuit 51 is also used to suppress the extracted direct-axis component current i d Or output current I load The fluctuation component is used as a current control command, and current compensation for the power input current Isource is achieved through current closed-loop control, which also achieves load power fluctuation compensation. The second power fluctuation suppression circuit 51 adjusts the charging and discharging state of the first energy buffer circuit 521 in real time according to the magnitude and direction of the fluctuation component: when the direct-axis component current i... d Or output current I loadWhen a positive fluctuation occurs (a sudden increase in load power P), the first energy buffer circuit 521 is controlled to discharge rapidly, outputting a corresponding output compensation current I. compensate To offset the sudden increase in load power P; when the direct-axis component current i d Or output current I load When a negative fluctuation occurs (a sudden decrease in load power P), the first energy buffer circuit 521 is charged to absorb excess current and energy, preventing excess current from feeding back to the first power supply circuit 101 and causing power fluctuations. This real-time compensation control effectively suppresses power fluctuations.
[0116] Under the closed-loop control of the second power fluctuation suppression circuit 51, the output compensation current I is... compensate The target value for current compensation I* compensate equal.
[0117] In the AC system, the second power fluctuation suppression circuit 51 can be specifically based on the instantaneous power theory of coordinate transformation, combined with the synchronously acquired output current I. load and output voltage U load The system accurately calculates the instantaneous power of the load operating circuit 201; in a DC system, the second power fluctuation suppression circuit 51 can also calculate the instantaneous power based on the sampled output current I. load and output voltage U load Calculate the instantaneous power of the load.
[0118] The second power fluctuation suppression circuit 51 controls the energy of the first energy buffer circuit 521. It calculates the target voltage of the first energy buffer circuit 521 based on the instantaneous power of the load. The second power fluctuation suppression circuit 51 precisely regulates the stored energy of the first energy buffer circuit 521 by controlling its output voltage. By monitoring the terminal voltage of the first energy buffer circuit 521 in real time, the charging and discharging current of the second power fluctuation suppression circuit 51 is dynamically adjusted to ensure that the voltage of the first energy buffer circuit 521 remains within a preset range. This ensures sufficient energy storage to cope with sudden fluctuations while avoiding overcharging or undercharging, guaranteeing the stable operation of the first energy buffer circuit 521 and providing continuous support for power compensation.
[0119] From the above formula, we can obtain: Isource = I load - I load *G1(s); Isource = I load *[1 - G1(s)]; make: G2(s) = 1 - G1(s) = 1 / (1+τs); but: Isource = I load *G2(s).
[0120] Therefore, it can be seen that in the output current I load When fluctuations occur, the power input current Isource provided by the first power supply circuit 101 will be adjusted according to the output current I. load The first-order low-pass filter exhibits a smooth change in characteristics, with the output voltage U... load The voltage of the first power supply circuit 101 is equal to that of the first power supply circuit 101, and the current of the first power supply circuit 101 is controlled according to the output current I. load The change in the low-pass filter characteristics controls the power supplied by the first power supply circuit 101 to change according to the low-pass filter characteristics of the load power P, thereby avoiding the impact of sudden changes in load power P on the power supply equipment and power system.
[0121] The transfer function of the first-order low-pass filter is G2(s) = 1 / (1+τs). It is important to note that the transfer functions of the first-order high-pass filter and the first-order low-pass filter are complementary, and their sum equals 1, i.e., G1(s) + G2(s) = τs / (1+τs) + 1 / (1+τs) = 1. This complementary characteristic is the core logic for achieving precise power allocation—the steady-state component of the load power P is provided by the first power supply circuit 101, the power fluctuation component is provided by the power switching transistor circuit, and the energy of the power switching transistor circuit is provided by the first energy buffer circuit 521. These three components work together to achieve a stable supply of load power P, ensuring that the power output of the first power supply circuit 101 remains stable.
[0122] Understandably, the energy required for load fluctuation compensation has a clearly defined calculation standard: the energy for load fluctuation compensation is equal to the product of the filtering time constant τ and the power change ΔP. The formula for calculating the compensation energy is: E = τ × ΔP; The unit of compensation energy E is kJ (kilojoule), the unit of filtering time constant τ is s (second), and the unit of power change ΔP is kW (kilowatt).
[0123] For example, if the filtering time constant τ = 1s and the fluctuation power ΔP = 100kW, then the energy required for load fluctuation compensation is 100kJ. This calculation method can accurately determine the energy storage capacity requirement of the first energy buffer circuit 521, providing a clear basis for the selection of components and parameter design in the first energy buffer circuit 521.
[0124] For ease of understanding, taking the first energy buffer circuit 521, which includes a supercapacitor, as an example, the energy provided by the supercapacitor is: E / η = 0.5*C*U1 2 - 0.5*C*U22 ; Where η is the power conversion efficiency of the second power fluctuation suppression circuit 51 from the supercapacitor port to the output port of the first power switch circuit 522, C is the capacitance of the supercapacitor, U1 is the initial voltage of the supercapacitor, and U2 is the voltage of the supercapacitor after energy buffering.
[0125] Using a control algorithm that corresponds to the load power P and the supercapacitor voltage, when the steady-state value of the load power P* is minimum, i.e., the load power P=0, the limit voltage steady-state value of the supercapacitor terminal voltage is controlled to the maximum value Umax; when the steady-state value of the load power P* is maximum, the limit voltage steady-state value of the supercapacitor terminal voltage is controlled to the minimum value Umin.
[0126] With load power P=0 as a reference, the supercapacitor voltage control target, i.e., the voltage control target value U*, is: τ×P* / η= 0.5*C*(Umax2 - U*2); but: ; And when the steady-state value of load power P* is at its maximum, .
[0127] Therefore, when the steady-state value of the load power P* is taken as the first-order low-pass filter value of the load power P, and the transfer function of the first-order low-pass filter is taken as G2(s)=1 / (1+τs), then P*=P*G2(s).
[0128] Understandably, the second power fluctuation suppression circuit 51 will operate according to the output current I. load The high-pass filter component compensates for current fluctuations. Utilizing the complementary characteristics of high-pass and low-pass filters (the sum of which is 1), the current in the first power supply circuit 101 is adjusted according to the output current I. load The low-pass filtering characteristic provides current, enabling the first power supply circuit 101 to provide gradually changing power when the load fluctuates, thus avoiding the impact of load fluctuations on the first power supply circuit 101.
[0129] By transforming the coordinates, the alternating current is converted into a stable direct current. With the help of a high-pass filter (or its alternative), the fluctuating components and steady-state components are accurately separated. Combined with the compensation energy calculation formula (E=τ×ΔP), the compensation energy is accurately matched. At the same time, relying on the complementary logic of "high-pass filter + low-pass filter", the first power supply circuit 101 outputs steady-state power, avoiding the impact of power surges on power supply equipment and regional power grid.
[0130] Please continue reading. Figure 8 , Figure 8 This is a schematic diagram of the second embodiment of the power supply circuit of this application.
[0131] In some embodiments, the second power supply circuit 60 can specifically be a DC power supply system. The second power supply circuit 60 includes a third power compensation circuit 62 and a third power fluctuation suppression circuit 61. The third power compensation circuit 62 includes a second energy buffer circuit 621 and a second power switching circuit 622. The second power supply circuit 102 includes a DC power source. The second energy buffer circuit 621 includes a first supercapacitor Cs1. The second power switching circuit 622 includes a first capacitor C1, a first switching transistor Q1, a second switching transistor Q2, a first inductor L1, and a second capacitor C2.
[0132] The first supercapacitor Cs1 is coupled to the first terminal of the first capacitor C1 and the third terminal of the first switch Q1. The second terminal of the first supercapacitor Cs1 is coupled to the second terminal of the first capacitor C1, the second terminal of the second switch Q2, and the second terminal of the second capacitor C2, and is used to couple to the second terminal of the DC source DC and the second terminal of the load working circuit 201. The second terminal of the first switch Q1 is coupled to the third terminal of the second switch Q2 and the first terminal of the first inductor L1. The second terminal of the first inductor L1 is coupled to the first terminal of the second capacitor C2, and is used to couple to the first terminal of the DC source DC and the first terminal of the load working circuit 201. The third power fluctuation suppression circuit 61 is coupled to the first terminal of the first switch Q1 and the first terminal of the second switch Q2, so that when corresponding compensation control signals are sent to the first terminal of the first switch Q1 and the first terminal of the second switch Q2, respectively, the second and third terminals of the first switch Q1 and the second switch Q2 can be triggered to turn on or off.
[0133] In some embodiments, the first switch Q1, the second switch Q2, and other switches mentioned herein may be MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), transistors, thin-film transistors, field-effect transistors, or any other reasonable switch, and this application does not limit them.
[0134] Understandably, the third power fluctuation suppression circuit 61 is specifically used to drive and control the first switch Q1 and the second switch Q2 using the control method described in S21-S210 above, so as to adjust the charging and discharging state of the first supercapacitor Cs1, and to control the port voltage and output compensation current I of the first supercapacitor Cs1. compensate Adjustments are made to suppress power fluctuations in the load circuit 201.
[0135] In other embodiments, the first supercapacitor Cs1 can be replaced by a lithium battery, and the third power fluctuation suppression circuit 61 can use the control method described in S11-S16 above to drive and control the first switch Q1 and the second switch Q2 to adjust the charging and discharging state of the lithium battery and to adjust the output compensation current I. compensate Adjustments are made to suppress power fluctuations in the load circuit 201.
[0136] Please continue reading. Figure 9 , Figure 9 yes Figure 5 A flowchart illustrating an embodiment of S23 is provided. In one embodiment, the power fluctuation suppression method of this application, in addition to the above-described S21-S210, further includes some more specific steps. Specifically, S23 may further include the following steps: S231: Perform a rotational coordinate transformation on the AC output voltage to obtain the direct-axis component voltage.
[0137] Please continue reading. Figure 10 , Figure 10 This is a schematic diagram of the third embodiment of the power supply circuit of this application.
[0138] In some embodiments, the third power supply circuit 70 can specifically be a single-phase AC system. The third power supply circuit 70 includes a fourth power compensation circuit 72 and a fourth power fluctuation suppression circuit 71. The fourth power compensation circuit 72 includes a third energy buffer circuit 721 and a third power switching circuit 722. The third power supply circuit 103 includes a single-phase AC source AC1. The third energy buffer circuit 721 includes a second supercapacitor Cs2. The third power switching circuit 722 includes a third capacitor C3, a third switch Q3, a fourth switch Q4, a second inductor L2, and a fifth capacitor C5.
[0139] Specifically, the first terminal of the second supercapacitor Cs2 is coupled to the first terminal of the third capacitor C3 and the third terminal of the third switch Q3; the second terminal of the second supercapacitor Cs2 is coupled to the second terminal of the fourth capacitor and the second terminal of the fourth switch Q4; the second terminal of the third capacitor C3 is coupled to the first terminal of the fourth capacitor and the second terminal of the fifth capacitor C5, and is used to couple to the second terminal of the single-phase AC source AC1 and the second terminal of the load working circuit 201; the second terminal of the third switch Q3 is coupled to the third terminal of the fourth switch Q4 and the first terminal of the second inductor L2. The second terminal of L2 is coupled to the first terminal of the fifth capacitor C5 and is used to couple to the first terminal of the single-phase AC source AC1 and the first terminal of the load working circuit 201; the fourth power fluctuation suppression circuit 71 is coupled to the first terminal of the third switch Q3 and the first terminal of the fourth switch Q4, so that when corresponding compensation control signals are sent to the first terminal of the third switch Q3 and the first terminal of the fourth switch Q4 respectively, the second and third terminals of the third switch Q3 can be triggered to turn on or off, and the second and third terminals of the fourth switch Q4 can be triggered to turn on or off.
[0140] Specifically, when the fourth power fluctuation suppression circuit 71 obtains the AC output voltage, it can also perform a Parker transformation on the AC output voltage to obtain a rotational transformation voltage, i.e., the quadrature-axis component voltage u. q and direct-axis component voltage u d .
[0141] Specifically, the AC output voltage is a single-phase output voltage u. ac =u m When *sin(wt+θ), let u α =u ac u β =u ac *H(s), H(s)=(sw) / (s+w), then u α and u β These are two sinusoidal alternating currents with the same peak value and a phase difference of 90 degrees. α and u β After dq transformation, the quadrature-axis voltage component u will be obtained. q and direct-axis component voltage u d .
[0142] Among them, u m This can be understood as the single-phase output voltage u ac The amplitude of ω represents the phase angle change per unit time, in radians per second (rad / s); t represents the independent variable, usually in seconds (s); θ represents the initial phase or phase angle; H(s) is the transfer function of the first-order all-pass filter, and s is a complex variable.
[0143] S232: Perform a rotational coordinate transformation on the AC output current to obtain the direct-axis component current.
[0144] Similarly, when the fourth power fluctuation suppression circuit 71 obtains the AC output current, it can also perform a Parker transformation on the AC output current to obtain the rotating transformation current, i.e., the quadrature axis component current i. q and direct-axis component current i d .
[0145] S233: The load power is obtained by using the direct-axis component voltage and the direct-axis component current.
[0146] Understandably, when the third power supply circuit 103 is an AC source, the fourth power fluctuation suppression circuit 71 specifically uses a corresponding power calculation function to suppress the direct-axis voltage u. d and direct-axis component current i d The load power P is obtained through calculation.
[0147] Please continue reading. Figure 11 , Figure 11 This is a schematic diagram of the fourth embodiment of the power supply circuit of this application.
[0148] In some other embodiments, the fourth power supply circuit 80 may specifically be a three-phase three-wire AC system. The fourth power supply circuit 80 includes a fifth power compensation circuit 82 and a fifth power fluctuation suppression circuit 81. The fifth power compensation circuit 82 includes a fourth energy buffer circuit 821 and a fourth power switching circuit 822. The fourth power supply circuit 104 includes a three-phase AC source AC2. The fourth energy buffer circuit 821 includes a third supercapacitor Cs3. The fourth power switching circuit 822 includes a sixth capacitor C6, a fifth switch Q5, a sixth switch Q6, a seventh switch Q7, an eighth switch Q8, a ninth switch Q9, a tenth switch Q10, a third inductor L3, a fourth inductor L4, a fifth inductor L5, a seventh capacitor C7, an eighth capacitor C8, and a ninth capacitor C9.
[0149] Specifically, the first terminal of the third supercapacitor Cs3 is coupled to the first terminal of the sixth capacitor C6, the third terminal of the fifth switch Q5, the third terminal of the sixth switch Q6, and the third terminal of the seventh switch Q7. The second terminal of the third supercapacitor Cs3 is coupled to the second terminal of the sixth capacitor C6, the second terminal of the eighth switch Q8, the second terminal of the ninth switch Q9, and the second terminal of the tenth switch Q10. The second terminal of the fifth switch Q5 is coupled to the third terminal of the eighth switch Q8 and the first terminal of the third inductor L3. The second terminal of the sixth switch Q6 is coupled to the third terminal of the ninth switch Q9 and the first terminal of the fourth inductor L4. The second terminal of the seventh switch Q7 is coupled to the third terminal of the tenth switch Q10 and the first terminal of the fifth inductor L5. The second terminal of the third inductor L3 is coupled to the first terminal of the seventh capacitor C7. This connection is used to connect to the first terminal of the three-phase AC source AC2 and the load. The first terminal of the working circuit 201 is coupled to the second terminal of the fourth inductor L4, which is coupled to the first terminal of the eighth capacitor C8 and used to couple with the second terminal of the three-phase AC source AC2 and the second terminal of the load working circuit 201. The second terminal of the fifth inductor L5 is coupled to the first terminal of the ninth capacitor C9 and used to couple with the third terminal of the three-phase AC source AC2 and the third terminal of the load working circuit 201. The second terminal of the seventh capacitor C7 is coupled to the second terminal of the eighth capacitor C8 and the second terminal of the ninth capacitor C9. The fifth power fluctuation suppression circuit 81 is coupled to the first terminal of each of the fifth switch Q5, the sixth switch Q6, the seventh switch Q7, the eighth switch Q8, the ninth switch Q9, and the tenth switch Q10, so that when a corresponding compensation control signal is sent to the first terminal of each switch, the second and third terminals of each switch can be triggered to turn on or off.
[0150] Understandably, when the AC output voltage is specifically a three-phase output voltage uabc, such as phase A voltage ua, phase B voltage ub, and phase C voltage uc, the αβ (Clark) transformation can be expressed as: ; The inverse transformation mapping the αβ components back to the original three-phase voltage is: .
[0151] In addition, αβ→dq is used to convert the electrical quantity in the stationary two-phase coordinate system (αβ) to the synchronous rotating coordinate system (dq), so that the AC quantity is converted into the DC quantity, which simplifies the design of the control system.
[0152] The formula for transforming the stationary coordinate system (αβ) into the rotating coordinate system (dq) is as follows: ; Where θ is the rotation angle (usually the rotor electrical angle), the d-axis is aligned with the rotor magnetic field, and the q-axis leads the d-axis by 90°.
[0153] When the fifth power fluctuation suppression circuit 81 obtains the three-phase output voltage uabc, it can also perform a Parker transformation on the AC output voltage to obtain the rotating transformation voltage, i.e., the quadrature axis component voltage u. q and direct-axis component voltage u d Simultaneously, a similar transformation is used to perform a rotating coordinate transformation on the three-phase output current Iabc to obtain the direct-axis component current i. d Then, the corresponding power calculation function is used to calculate the direct-axis component voltage u. d and direct-axis component current i d The load power P is obtained through calculation.
[0154] Please continue reading. Figure 12 , Figure 12 This is a schematic diagram of the fifth embodiment of the power supply circuit of this application.
[0155] In some other embodiments, the fifth power supply circuit 90 may specifically be a three-phase four-wire AC system. The fifth power supply circuit 90 includes a sixth power compensation circuit 92 and a sixth power fluctuation suppression circuit 91. The sixth power compensation circuit 92 includes a fifth energy buffer circuit 921 and a fifth power switching circuit 922. The fifth power supply circuit 105 includes a three-phase AC power supply AC3. The fifth energy buffer circuit 921 includes a fourth supercapacitor Cs4. The fifth power switching circuit 922 includes a tenth capacitor C10, an eleventh switch Q11, a twelfth switch Q12, a thirteenth switch Q13, a fourteenth switch Q14, a fifteenth switch Q15, a sixteenth switch Q16, a seventeenth switch Q17, an eighteenth switch Q18, a sixth inductor L6, a seventh inductor L7, an eighth inductor L8, a ninth inductor L9, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13, and a fourteenth capacitor C14.
[0156] Specifically, the first terminal of the fourth supercapacitor Cs4 is coupled to the first terminal of the tenth capacitor C10, the third terminal of the eleventh switch Q11, the third terminal of the twelfth switch Q12, the third terminal of the thirteenth switch Q13, and the third terminal of the fourteenth switch Q14. The second terminal of the fourth supercapacitor Cs4 is coupled to the second terminal of the tenth capacitor C10, the second terminal of the fifteenth switch Q15, the second terminal of the sixteenth switch Q16, the second terminal of the seventeenth switch Q17, and the second terminal of the eighteenth switch Q18. The second terminal of the eleventh switch Q11 is coupled to the fifteenth switch Q14. The third terminal of transistor 5, the first terminal of the sixth inductor L6, and the second terminal of the twelfth switch Q12 are coupled to the third terminal of the sixteenth switch Q16 and the first terminal of the seventh inductor L7. The second terminal of the thirteenth switch Q13 is coupled to the third terminal of the seventeenth switch Q17 and the first terminal of the eighth inductor L8. The second terminal of the fourteenth switch Q14 is coupled to the third terminal of the eighteenth switch Q18 and the first terminal of the ninth inductor L9. The second terminal of the sixth inductor L6 is coupled to the first terminal of the eleventh capacitor C11, and is used to connect to the first terminal of the three-phase AC power supply AC3 and the first terminal of the load working circuit 201. The seventh inductor L7 is coupled to the first terminal of the twelfth capacitor C12, and is used to couple to the second terminal of the three-phase AC power supply AC3 and the second terminal of the load operating circuit 201. The eighth inductor L8 is coupled to the first terminal of the thirteenth capacitor C13, and is used to couple to the third terminal of the three-phase AC power supply AC3 and the third terminal of the load operating circuit 201. The ninth inductor L9 is coupled to the first terminal of the fourteenth capacitor C14, and is used to couple to the fourth terminal of the three-phase AC power supply AC3 and the fourth terminal of the load operating circuit 201. The eleventh capacitor C11 is coupled to the second terminal of the thirteenth capacitor C12. The second terminal of the twelfth capacitor C12, the second terminal of the thirteenth capacitor C13, and the second terminal of the fourteenth capacitor C14 are coupled to the first terminal of each of the eleventh switch Q11, the twelfth switch Q12, the thirteenth switch Q13, the fourteenth switch Q14, the fifteenth switch Q15, the sixteenth switch Q16, the seventeenth switch Q17, and the eighteenth switch Q18, so that when a corresponding compensation control signal is sent to the first terminal of each switch, the second and third terminals of each switch can be triggered to be turned on or off.
[0157] It is worth noting that the calculation of load power P for a three-phase four-wire AC system is the same as that for a three-phase three-wire AC system, and will not be repeated here.
[0158] Furthermore, by converting the alternating current into a direct current in a synchronous rotating coordinate system through coordinate transformation, and then using a first-order high-pass filter to separate the fluctuating and steady-state components, the accuracy of fluctuating component extraction can be effectively ensured. By clearly defining the energy calculation method for load fluctuation compensation (E=τ×ΔP) to control the terminal voltage of the fifth energy buffer circuit 921, precise regulation of stored energy can be effectively achieved, avoiding overcharging and undercharging, and ensuring that the compensation energy is precisely matched with the load fluctuation requirements.
[0159] According to the output current I load The high-pass filter component compensates for current fluctuations. Utilizing the complementary characteristics of high-pass and low-pass filters (the sum of which is 1), the current in the fifth power supply circuit 105 is adjusted according to the output current I. load The low-pass filtering characteristic provides current, enabling the fifth power supply circuit 105 to provide gradually changing power when the load fluctuates, thus avoiding the impact of load fluctuations on the fifth power supply circuit 105.
[0160] To address the issue of power fluctuations in AI data centers, the alternating current can be converted into a stable direct current through coordinate transformation. This, combined with a high-pass filter (or its alternative), allows for precise separation of fluctuating and steady-state components. By incorporating the compensation energy calculation formula (E=τ×ΔP), precise matching of compensation energy can be achieved. Simultaneously, relying on the complementary logic of "high-pass filter + low-pass filter," the fifth power supply circuit 105 is ensured to output steady-state power, avoiding the impact of power surges on power supply equipment and the regional power grid.
[0161] By controlling the terminal voltage of the fifth energy buffer circuit 921, precise energy regulation can be achieved, avoiding overcharging and undercharging. At the same time, energy storage solutions and control strategies can be flexibly selected according to the load characteristics of the AI data center, reducing the loss of energy storage devices, lowering the cost of equipment replacement and maintenance, and ensuring the long-term stable operation of the AI data center.
[0162] In summary, through precise power fluctuation suppression and energy control, significant improvements are achieved in power supply stability, energy storage device lifespan, and operation and maintenance cost control. It combines practicality, reliability, and economy, and can provide strong support for the stable and efficient operation of AI data centers.
[0163] Furthermore, in some embodiments, the AC output voltage is the three-phase output voltage uabc, and the AC output current is the three-phase output current Iabc. Specifically, S233 may further include: converting the direct-axis component voltage u... d Multiplied by the direct-axis component current i d Multiply by 1.5 to get the load power P.
[0164] Understandably, in a three-phase three-wire AC system and a three-phase four-wire AC system, the load power P = 1.5 * Ud * Id.
[0165] Furthermore, in some embodiments, the AC output voltage is a single-phase output voltage, and the AC output current is a single-phase output current. Specifically, S233 may further include: converting the direct-axis component voltage u... d Multiplied by the direct-axis component current i d Multiply by 0.5 to get the load power P.
[0166] Understandably, in a single-phase AC system, the load power P = 0.5 * Ud * Id.
[0167] Please continue reading. Figure 13 , Figure 13 yes Figure 5 A flowchart illustrating an embodiment of S24 is provided. In one embodiment, the power fluctuation suppression method of this application, in addition to the above-described S21-S210, further includes some more specific steps. Specifically, S24 may further include the following steps: S241: Low-pass filtering is performed on the load power to obtain the load power reference value.
[0168] Please continue reading. Figure 14 , Figure 14 yes Figure 13 A logic block diagram of a signal processing embodiment in a medium-power fluctuation suppression method.
[0169] Understandably, when the first energy buffer circuit 521 in the second power compensation circuit 52 is a supercapacitor + lithium battery pack, it is also necessary to compensate for the power distribution of the supercapacitor and the lithium battery pack.
[0170] Specifically, the load power P is processed by a first-order low-pass filter transfer function, a second-order low-pass filter transfer function, or any other reasonable multi-order low-pass filter transfer function to obtain a reference value for the load power P; or, the load power P is input into a first-order or second-order discrete low-pass filter to obtain a reference value for the load power P after processing by the first-order or second-order discrete low-pass filter.
[0171] S242: Multiply the load power reference value by the compensation distribution coefficient to obtain the steady-state value of the load power.
[0172] The proportion of power compensation participated by the supercapacitor, i.e., the compensation allocation coefficient, is determined based on the settings of the supercapacitor and the lithium battery pack. The steady-state value of the load power P* is obtained by multiplying the load power base value P by the compensation allocation coefficient.
[0173] The compensation allocation coefficient k ranges from 0 to 1. The supercapacitor requires closed-loop control of its voltage, while the lithium battery is monitored by the BMS (Battery Management System) to ensure that the battery pack is adequately supplied with energy during steady-state load conditions.
[0174] This application also provides an electronic device, please refer to... Figure 15 , Figure 15 This is a schematic diagram of the structure of an embodiment of the electronic device of this application. In this embodiment, the electronic device 100 includes a housing 1001 and a signal function circuit 1002 connected to the housing 1001.
[0175] It should be noted that the signal function circuit 1002 described in this embodiment is any of the first power fluctuation suppression circuit 30, second power fluctuation suppression circuit 51, third power fluctuation suppression circuit 61, fourth power fluctuation suppression circuit 71, fifth power fluctuation suppression circuit 81, or sixth power fluctuation suppression circuit 91 described in any of the above embodiments, or the first power supply circuit 50, second power supply circuit 60, third power supply circuit 70, fourth power supply circuit 80, or fifth power supply circuit 90. Please refer to the following for details. Figures 1-14 The relevant textual content will not be elaborated upon here.
[0176] The beneficial effects of this application are as follows: Unlike the prior art, the power fluctuation suppression method provided in this application obtains the current compensation target value by acquiring and high-pass filtering the output current in the power compensation circuit, and then adjusts the current error value between the current compensation target value and the output compensation current to obtain the compensation output value. The compensation output value is then used to modulate the generated compensation control signal to adjust the output compensation current, thereby enabling a faster response to changes in the output current caused by power fluctuations. By adjusting the output compensation current, the changes in the output current are compensated, which can match the speed and suddenness of power fluctuations and effectively achieve a better and more accurate suppression effect on power fluctuations. This can effectively ensure the stability of power supply and improve energy utilization efficiency.
[0177] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.
Claims
1. A power fluctuation suppression method, applied to a power compensation circuit, characterized in that, The power fluctuation suppression method includes: Obtain the electrical characteristic parameters of the power compensation circuit; wherein the power compensation circuit is used to couple with the power supply circuit and the load operating circuit, and the electrical characteristic parameters include the output current and the output compensation current, wherein the output current is the sum of the power input current provided by the power supply circuit and the output compensation current; The output current is high-pass filtered to obtain a target current compensation value; wherein, the step of high-pass filtering the output current to obtain the target current compensation value includes: processing the output current using a first-order high-pass filter transfer function to obtain the target current compensation value; wherein, the calculation formula of the first-order high-pass filter transfer function is: I* compensate =Iload*τs / (1+τs); where I* compensate The target value for current compensation is... The output current, Let s be the filtering time constant, and s be a complex variable; The current error value is obtained by subtracting the output compensation current from the current compensation target value; wherein, the electrical characteristic parameters further include energy buffer voltage and output voltage, and the step of obtaining the current error value by subtracting the output compensation current from the current compensation target value includes: The load power is obtained using the output voltage and the output current; The load power is low-pass filtered to obtain a steady-state value; wherein, the step of low-pass filtering the load power to obtain a steady-state value includes: processing the load power using a first-order low-pass filter transfer function to obtain the steady-state value; wherein, the calculation formula of the first-order low-pass filter transfer function is: P * =P*1 / (1+τs); where, Let P be the steady-state value of the load power, s be the load power, and s be a complex variable; the sum of the first-order high-pass filter transfer function and the first-order low-pass filter transfer function is 1. The voltage control target value is obtained using the steady-state value of the load power; A compensation adjustment value is obtained by performing voltage feedback adjustment on the voltage error value between the voltage control target value and the energy buffer voltage; The current error value is obtained by adding the compensation adjustment value to the current compensation target value and subtracting the output compensation current. The current error value is adjusted by current feedback to obtain a compensated output value; The compensation output value is used to modulate and generate a compensation control signal; The compensation control signal is sent to the power compensation circuit to trigger the power compensation circuit to change its switching state, thereby adjusting the output compensation current.
2. The power fluctuation suppression method according to claim 1, characterized in that, The step of high-pass filtering the output current to obtain the target current compensation value includes: The target value of current compensation is obtained by processing the output current using a second-order high-pass filter transfer function. The calculation formula for the second-order high-pass filter transfer function is as follows: I* compensate =Iload*τ 2 *s 2 / (t 2 *s 2 +2*z*t*s+1); Among them, I* compensate The target value for current compensation is... The output current, Let be the filtering time constant, s be a complex variable, and ζ be the damping ratio.
3. The power fluctuation suppression method according to claim 1, characterized in that, The output current is an AC output current, and the step of high-pass filtering the output current to obtain the current compensation target value includes: The direct-axis component current is obtained by performing a rotating coordinate transformation on the AC output current; The current compensation target value is obtained by high-pass filtering the direct-axis component current.
4. The power fluctuation suppression method according to claim 1, characterized in that, The step of obtaining the voltage control target value using the steady-state value of the load power includes: The voltage control target value is obtained by performing calculations on the steady-state value of the load power, the limited steady-state value of the voltage of the power compensation circuit, and the equivalent capacitance value using a set calculation function. The calculation formula for the defined operation function is as follows: ; in, U is the target value for voltage control. x The defined steady-state voltage value, The steady-state value of the load power. The filtering time constant is The equivalent capacitance value is... This refers to the efficiency of electrical energy conversion.
5. The power fluctuation suppression method according to claim 4, characterized in that, The step of low-pass filtering the load power to obtain the steady-state value of the load power includes: The steady-state value of the load power is obtained by processing the load power using a second-order low-pass filter transfer function. The calculation formula for the second-order low-pass filter transfer function is as follows: P * =P*1 / (τ 2 *s 2 +2*z*t*s+1); in, Let P be the steady-state value of the load power, s be a complex variable, and ζ be the damping ratio.
6. The power fluctuation suppression method according to claim 1, characterized in that, The output voltage is an AC output voltage, the output current is an AC output current, and the step of obtaining the load power using the output voltage and the output current includes: The direct-axis component voltage is obtained by performing a rotational coordinate transformation on the AC output voltage; The direct-axis component current is obtained by performing a rotating coordinate transformation on the AC output current; The load power is obtained using the direct-axis voltage component and the direct-axis current component.
7. The power fluctuation suppression method according to claim 6, characterized in that, The AC output voltage is a three-phase output voltage uabc, and the AC output current is a three-phase output current Iabc. The steps for obtaining the load power using the direct-axis component voltage and the direct-axis component current include: The load power is obtained by multiplying the direct-axis voltage component by the direct-axis current component and then multiplying by 1.
5.
8. The power fluctuation suppression method according to claim 6, characterized in that, The AC output voltage is a single-phase output voltage, and the AC output current is a single-phase output current. The step of obtaining the load power using the direct-axis component voltage and the direct-axis component current includes: The load power is obtained by multiplying the direct-axis voltage component by the direct-axis current component and then multiplying by 0.
5.
9. The power fluctuation suppression method according to any one of claims 4-8, characterized in that, The step of low-pass filtering the load power to obtain the steady-state value of the load power includes: The load power is low-pass filtered to obtain a reference value for the load power; The steady-state value of the load power is obtained by multiplying the load power reference value by the compensation distribution coefficient.
10. A power fluctuation suppression circuit, characterized in that, The power fluctuation suppression circuit is coupled to the power compensation circuit. The power fluctuation suppression circuit uses the power fluctuation suppression method as described in any one of claims 1-9 to drive and control the power compensation circuit.
11. A power supply circuit, characterized in that, The power supply circuit includes a power compensation circuit and a power fluctuation suppression circuit. The power compensation circuit includes an energy buffer circuit and a power switching circuit. The power switching circuit is coupled to the energy buffer circuit and the power fluctuation suppression circuit, and is used to couple with the power supply circuit and the load operating circuit. The power fluctuation suppression circuit is the power fluctuation suppression circuit as described in claim 10.
12. An electronic device, characterized in that, The electronic device includes a housing and a signal function circuit connected to the housing; Wherein, the signal function circuit is the power fluctuation suppression circuit as described in claim 10; or, the signal function circuit is the power supply circuit as described in claim 11.