A fabrication process for a multilayer piezoelectric single-crystal thin-film heterosubstrate

CN122206170BActive Publication Date: 2026-08-14DABO TECHNOLOGY (SHANGHAI) CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-05-15
Publication Date
2026-08-14

AI Technical Summary

Technical Problem

其核心难点在于:若直接在硅、碳化硅等异质衬底上循环进行键合与退火剥离,由于压电材料(如LiNbO3/LiTaO3)与衬底材料的热膨胀系数存在显著差异,往往需要通过减薄压电晶圆以减少退火热应力,直接导致了昂贵单晶材料的巨额浪费,推高了原材料成本;同时,该过程中引入的损伤及多次热循环累积的应力,会引发晶圆翘曲、碎裂等问题,致使生产良率低下

Benefits of technology

1.根据本申请的叠层压电单晶薄膜异质衬底的制备工艺,通过精确控制离子注入量,实现衬底薄膜层的叠加,同时由于第一压电单晶注入片作为临时衬底与叠层压电薄膜层结合,在经历多次键合、升温与冷却制备工艺后,整个衬底结构能够实现整体均匀同步胀缩,抑制热应力的产生。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN122206170B_ABST
    Figure CN122206170B_ABST
Patent Text Reader

Abstract

This application discloses a fabrication process for a multilayer piezoelectric single-crystal thin-film heterogeneous substrate, belonging to the field of semiconductor thin-film substrate fabrication technology. The fabrication process uses a first piezoelectric single-crystal implanted wafer as a temporary substrate, controlling its ion implantation dose to be lower than that of other piezoelectric wafers. After multiple homogeneous bonding and peeling processes, a homogeneous multilayer thin-film structure is obtained. Finally, after bonding with a supporting substrate, heat treatment peels off the excess layer of the first piezoelectric single-crystal along the first piezoelectric single-crystal implanted layer, obtaining the multilayer piezoelectric single-crystal thin-film substrate. This fabrication process effectively avoids thermal mismatch stress, wafer warpage, and interface defects caused by multiple heterogeneous thermal cycles, achieving controllable fabrication of high-quality, customizable multilayer piezoelectric single-crystal thin films and near-zero waste of piezoelectric materials. It combines high yield with low cost, showing clear prospects for industrial application.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application relates to a fabrication process for a multilayer piezoelectric single-crystal thin-film heterostructure substrate, belonging to the field of semiconductor thin-film substrate fabrication technology. Background Technology

[0002] In recent years, multilayer piezoelectric thin film substrates have shown significant advantages in acoustic device research. Lamb wave devices based on bilayer or multilayer LiNbO3 thin films exhibit strong frequency spread, effectively suppress mechanical losses, improve the quality coefficient (Q), and enhance the electromechanical coupling coefficient (K). 2 Furthermore, this type of substrate can significantly suppress parasitic modes, improve power handling capability and frequency-temperature stability, thereby meeting the stringent requirements of high-frequency, high-power acoustic systems for material performance.

[0003] Smart-Cut technology, a key process for achieving heterogeneous integration of high-performance piezoelectric single-crystal thin films, utilizes steps such as high-energy ion implantation to form a defect layer, low-temperature bonding, and precise thermally controlled film cracking to fabricate single-crystal piezoelectric thin films with nanoscale thickness, low defect density, and high uniformity on heterogeneous substrates such as silicon, glass, silicon carbide, and quartz. This technology not only overcomes the challenges of lattice and thermal mismatch between piezoelectric single crystals and heterogeneous substrates but also enables device miniaturization, high performance, and compatibility with CMOS processes.

[0004] Although smart lift-off technology has propelled the mass production of nanoscale single-layer piezoelectric thin film substrates, the fabrication and industrialization of multilayer piezoelectric single-crystal thin film substrates still face significant challenges. The core difficulty lies in the following: if bonding and annealing lift-off are directly performed on heterogeneous substrates such as silicon and silicon carbide, the significant difference in thermal expansion coefficients between the piezoelectric material (e.g., LiNbO3 / LiTaO3) and the substrate material often necessitates thinning the piezoelectric wafer to reduce annealing thermal stress, directly leading to a huge waste of expensive single-crystal materials and driving up raw material costs. Simultaneously, the damage introduced during the process and the stress accumulated from multiple thermal cycles can cause wafer warping and breakage, resulting in low production yields. These two factors combined contribute to the high production costs, severely restricting its industrialization feasibility. Currently, there are no reports globally of a reproducible, end-to-end fabrication process for multilayer piezoelectric single-crystal thin films.

[0005] Therefore, developing a fabrication process for multilayer piezoelectric single-crystal thin-film substrates is not only a crucial prerequisite for realizing next-generation high-frequency broadband filters, high-sensitivity sensors, and other acoustic devices, but also of great significance for promoting the independent development and industrialization of high-end piezoelectric materials and micro-acoustic devices in my country. This process needs to improve fabrication efficiency and reduce production costs while ensuring that the substrate possesses low loss, high coupling, excellent interface quality, and reliable thermal stability to meet the development needs of future integrated, high-frequency acoustic systems. Summary of the Invention

[0006] To address the aforementioned issues, a fabrication process for a stacked piezoelectric single-crystal thin-film heterostructure is provided. This method uses a first piezoelectric single-crystal implanted wafer with a high ion implantation amount as a peelable temporary substrate. Through multiple bonding and peeling processes, a stacked thin-film structure is constructed. Finally, after bonding with a supporting substrate, the residual first piezoelectric single-crystal layer is peeled off along the first piezoelectric single-crystal implanted layer under high-temperature heat treatment to obtain the stacked piezoelectric single-crystal thin-film substrate.

[0007] This application provides a fabrication process for a multilayer piezoelectric single-crystal thin-film heterosubstrate, comprising the following steps: (1) Provide a first piezoelectric single crystal wafer, and perform ion implantation on the first piezoelectric single crystal wafer to obtain a first piezoelectric single crystal implanted wafer comprising a first piezoelectric single crystal residual layer, a first piezoelectric single crystal implanted layer, and a first piezoelectric single crystal thin film layer in sequence; (2) A second piezoelectric single-crystal wafer is provided, and ion implantation is performed on the second piezoelectric single-crystal wafer to obtain a second piezoelectric single-crystal implanted wafer comprising a second piezoelectric single-crystal residual layer, a second piezoelectric single-crystal implanted layer, and a second piezoelectric single-crystal thin film layer in sequence. The ion implantation dose of the first piezoelectric single-crystal wafer is less than that of the second piezoelectric single-crystal wafer, and the ion implantation doses of the first piezoelectric single-crystal wafer and the second piezoelectric single-crystal wafer are ≥1.0×10⁻⁶. 16 ions / cm 2 ; (3) Bond the first piezoelectric single crystal thin film layer of the first piezoelectric single crystal implanted wafer to the second piezoelectric single crystal thin film layer of the second piezoelectric single crystal implanted wafer to obtain a first bonded body; (4) The first bond is subjected to heat treatment, and the second piezoelectric single crystal residual layer is peeled off along the second piezoelectric single crystal injection layer to obtain a first thin film substrate with a single-layer thin film structure. (5) Planarize and clean the first thin film substrate. Steps (2)-(5) are performed at least once until the preset number of layers is reached. During the stacking process, the polarization directions of adjacent piezoelectric single crystal thin film layers are controlled to be different. (6) Bond the first thin film substrate to the support substrate to obtain a second bonded body; (7) The second bond is subjected to heat treatment. During the heat treatment, the heating rate is controlled at 0.1℃ / min-5℃ / min. The first piezoelectric single crystal residual layer is peeled off along the first piezoelectric single crystal injection layer to obtain a second thin film substrate with a stacked thin film structure. (8) Perform surface planarization on the second thin film substrate to obtain the stacked piezoelectric single crystal thin film substrate.

[0008] This application employs different ion doses implanted into a first piezoelectric single-crystal wafer and other piezoelectric single-crystal wafers, demonstrating an inverse relationship between ion implantation dose and peeling temperature. As the ion implantation dose increases, the required effective peeling temperature decreases because higher ion doses cause higher density lattice damage and more bubble nuclei formation, making peeling easier during heat treatment. Therefore, by implanting different ion doses, the second piezoelectric single-crystal residual layer and the second piezoelectric single-crystal thin film layer are first peeled off at a temperature of 130-180°C, resulting in a first thin film substrate bonded to the second piezoelectric single-crystal thin film layer and the first piezoelectric single-crystal implanted wafer. Then, the bonding and peeling process is repeated on the first thin film substrate to bond stacked piezoelectric single-crystal thin film layers onto the first piezoelectric single-crystal implanted wafer, preparing a third bonded thin film substrate with the target number of layers. Finally, the third bonded thin film substrate is bonded to a supporting substrate, and the first piezoelectric single-crystal thin film layer and the first piezoelectric single-crystal residual layer are peeled off at a high temperature above 200°C, resulting in a composite heterostructure substrate with stacked single-crystal thin films. Therefore, the above-mentioned setting of implanting different ion doses into the first piezoelectric single crystal and other piezoelectric single crystals can effectively achieve directional temperature stripping to obtain the final stacked piezoelectric single crystal thin film substrate.

[0009] After activation, the first and second piezoelectric single-crystal thin film layers are bonded to form a first bonded body. Due to the different implantation doses used, the second piezoelectric single-crystal implantation layer has a higher implantation dose, introducing denser lattice damage, cavities, and a higher hydrogen / helium atom concentration. During annealing, the cavity pressure inside the first piezoelectric single-crystal implantation layer is higher, making it easier for the cavity to expand, connect, and promote crack propagation, achieving lower-temperature peeling. In contrast, the first piezoelectric implantation layer, due to its smaller implantation dose, produces lower defects and hydrogen / helium atom concentrations, resulting in a smaller and sparser cavity density. Higher temperatures are required to provide higher atomic diffusion capabilities and gas pressures for these microcavities to grow and connect, ultimately initiating peeling.

[0010] Therefore, the above-mentioned ion implantation energy setting is not arbitrary, but is designed to achieve the directional stripping of the large-dose piezoelectric single crystal residual layer and the implanted layer, thereby realizing the bonding of two or more piezoelectric single crystal thin film layers. The above setting can effectively ensure the stripping efficiency and stripping effect, achieve directional stripping, and improve the various properties of the bond and the film.

[0011] Specifically, different polarization directions can be achieved by adjacent piezoelectric single crystal layers having opposite polarization directions or being at any angle. If the piezoelectric wafer is X-cut, its polarization direction is parallel to the wafer surface, and adjacent wafers can have different or opposite polarization directions by rotating the wafers during stacking. If the piezoelectric wafer has other tangential orientations (such as 128° Y-cut), its polarization direction is at a certain angle to the wafer surface, and adjacent wafers can have different polarization directions by rotating the wafer angle or by alternating forward and reverse stacking. If the piezoelectric wafer is Z-cut, its polarization direction is perpendicular to the wafer surface, and adjacent wafers can have opposite polarization directions by periodically alternating forward and reverse stacking.

[0012] Preferably, the tangential periodic stacking of piezoelectric thin films can significantly broaden the scope for device performance optimization.

[0013] Preferably, during the stacking process, the polarization directions of adjacent piezoelectric single crystal thin film layers are controlled to be opposite.

[0014] Preferably, the thickness of the single-layer piezoelectric film is controlled to be the same, so that it has better thickness matching.

[0015] Preferably, the implantation dose of the first piezoelectric single crystal wafer is 1.0 × 10⁻⁶. 16 ions / cm 2 -1.8×10 16 ions / cm 2 The implantation dose of the second piezoelectric single crystal wafer is 1.8 × 10⁻⁶. 16 ions / cm 2 -2.5×10 16 ions / cm 2 The implantation dose of the first piezoelectric single-crystal wafer is 0.3 × 10⁻⁶ higher than that of the second piezoelectric single-crystal wafer. 16 ions / cm 2 above.

[0016] Optionally, the heat treatment temperature in step (4) is 150-190℃.

[0017] Optionally, the heat treatment temperature in step (7) is 190-240℃.

[0018] Preferably, the first piezoelectric single crystal wafer, the second piezoelectric single crystal wafer, and the supporting substrate have a Bow < 10 μm, a Warp < 10 μm, and a TTV < 3 μm.

[0019] Preferably, the root mean square roughness (Rq) of the supporting substrate, the first piezoelectric single crystal wafer, and the second piezoelectric single crystal wafer is less than 0.5 nm / rms.

[0020] Preferably, the first thin film substrate is bonded to the support substrate to form a second bond, and the first thin film substrate is thinned before peeling.

[0021] Under these parameters, the first piezoelectric single-crystal wafer, the second piezoelectric single-crystal wafer, and the supporting substrate, which have high flatness and high uniformity, can achieve large-area atomic-level bonding, improve the uniformity of bonding, ensure uniform distribution of bonding pressure, and avoid local stress concentration.

[0022] Optionally, the ion implantation voltage of the first piezoelectric single crystal wafer in step (1) is 30-380 keV.

[0023] Optionally, in step (2), the ion implantation voltage of the second piezoelectric single crystal wafer is 30-380 keV.

[0024] At this injection voltage, ions can possess sufficient energy to penetrate deep into the material. By controlling the corresponding injection voltage, the thickness of the first and second piezoelectric single-crystal thin film layers, as well as subsequent stacked thin film layers, can be more precisely controlled. Simultaneously, the energy of the ions injected at this voltage makes it easier for them to form continuous cavities in the first and second piezoelectric single-crystal injection layers, reducing surface damage, increasing ion penetration, and thus improving stripping efficiency.

[0025] Optionally, the ion implantation step may use hydrogen ions, helium ions, or a hydrogen-helium mixture of ions.

[0026] Optionally, the heat treatment time in steps (4) and (7) is 5-40 hours.

[0027] Optionally, the heat treatment described in step (7) includes at least two-stage annealing, with a holding gradient interval of 5-100℃ and a holding time of 0.5-10h for each stage.

[0028] The heat treatment in this application is low-temperature annealing (<240℃), which can promote the nucleation and initial growth of hydrogen / helium bubbles, while strengthening the bonding interface. The high temperature promotes the expansion and connection of cavities, thereby achieving clean peeling.

[0029] The above-mentioned annealing method is gradient annealing. Compared with one-stage heat preservation annealing and linear heating-cooling annealing, it can make the temperature change of the first piezoelectric single crystal wafer and the second piezoelectric single crystal wafer more uniform. It avoids the huge internal stress caused by sudden temperature change, which could lead to the first piezoelectric single crystal thin film layer and the second piezoelectric single crystal thin film layer becoming fragmented or bent.

[0030] Optionally, the bonding described in steps (3) and (6) is atomic beam surface activation bonding or plasma surface activation bonding.

[0031] Optionally, the plasma surface activation bonding process also includes at least two stages of annealing, with a holding temperature gradient interval of 5-100℃ and a holding time of 0.5-10h for each stage.

[0032] Optionally, the planarization process described in steps (5) and (8) is chemical mechanical polishing.

[0033] Optionally, the cleaning in step (5) is RCA cleaning.

[0034] Optionally, the first piezoelectric single crystal wafer and the second piezoelectric single crystal wafer are selected from at least one of lithium niobate, lithium tantalate, quartz, lithium tetraborate and lanthanum gallium silicate.

[0035] Optionally, the material of the supporting substrate is selected from at least one of silicon, sapphire, SiO2 / Si composite substrate, silicon carbide, gallium nitride, and aluminum nitride.

[0036] Optionally, the dimensions of the supporting substrate, the first piezoelectric single crystal wafer, and the second piezoelectric single crystal wafer are 3-12 inches.

[0037] The smooth surfaces of the supporting substrate, the first piezoelectric single crystal wafer, and the second piezoelectric single crystal wafer enable ultra-large area molecular-level close contact at the bonding interface, thereby generating sufficiently strong van der Waals forces and chemical bonding forces, improving the strength and quality of each bonding interface, and ensuring the integrity of the film after peeling.

[0038] The beneficial effects of this application include, but are not limited to: 1. According to the fabrication process of the stacked piezoelectric single crystal thin film heterostructure of this application, the substrate thin film layers are stacked by precisely controlling the ion implantation amount. At the same time, since the first piezoelectric single crystal implantation sheet is used as a temporary substrate and is combined with the stacked piezoelectric thin film layers, after undergoing multiple bonding, heating and cooling fabrication processes, the entire substrate structure can achieve uniform synchronous expansion and contraction, suppressing the generation of thermal stress.

[0039] 2. The fabrication process of the multilayer piezoelectric single-crystal thin film heterostructure according to this application not only ensures that the multilayer piezoelectric thin film substrate maintains extremely high surface accuracy and mechanical stability throughout the entire complex process, but also eliminates fatal defects such as warping, cracking, and interface debonding caused by thermal mismatch in the traditional heterostructure fabrication process, providing a fundamental guarantee for the fabrication of high-quality multilayer piezoelectric thin film substrates.

[0040] 3. According to the fabrication process of the stacked piezoelectric single crystal thin film heterostructure of this application, in the heat treatment step, by controlling the heating rate and the staged annealing method, the overall temperature change of the substrate is made more uniform and controllable, which effectively avoids the generation of huge internal stress in the brittle piezoelectric single crystal material due to sudden temperature change, thereby minimizing the formation of film cracks, lattice damage and interface voids, and significantly improving the crystal quality of each thin film and the performance consistency of the stacked piezoelectric thin film substrate.

[0041] 4. According to the fabrication process of the stacked piezoelectric single-crystal thin film heterostructure of this application, the complex fabrication process of the stacked piezoelectric single-crystal thin film heterostructure is divided into repeatable and precisely controllable operation steps, making the process flow for fabricating the stacked piezoelectric thin film substrate highly uniform and greatly enhancing the repeatability and scalability of the process. At the same time, this fabrication process does not damage the first piezoelectric single-crystal thin film layer, the first piezoelectric single-crystal thin film layer, and the supporting substrate, and the substrates obtained by mass production have good consistency.

[0042] 5. When constructing a stacked thin film structure on a temporary substrate, since the temporary substrate and all stacked piezoelectric thin film layers are made of the same material, their coefficients of thermal expansion are completely identical, eliminating the problem of thermal expansion mismatch between heterogeneous materials. Before each peeling, no mechanical thinning treatment is required on the wafer to be peeled, avoiding damage and stress that may be introduced by the thinning process. Furthermore, the structures of the first and second piezoelectric single-crystal residual layers remain intact after peeling, allowing them to be reused as new "donor wafers" in the production cycle. This significantly improves the utilization rate of piezoelectric single-crystal materials and substantially reduces raw material costs in the production process. Attached Figure Description

[0043] The accompanying drawings, which are provided to further illustrate this application and form part of this application, illustrate exemplary embodiments of this application and are used to explain this application, but do not constitute an undue limitation of this application.

[0044] In the attached diagram: Figure 1 This is a schematic diagram of the fabrication process of the three-layer piezoelectric single-crystal thin film substrate involved in Embodiment 3 of this application, where "+Z" and "-Z" represent different polarization directions.

[0045] List of components and reference numerals: 10: First piezoelectric single crystal wafer (temporary substrate); 11: First piezoelectric single crystal thin film layer; 12: First piezoelectric single crystal injection layer; 13: First piezoelectric single crystal residual layer; 20: Second piezoelectric single crystal wafer a; 21: Second piezoelectric single crystal thin film layer a; 22: Second piezoelectric single crystal injection layer a; 23: Second piezoelectric single crystal residual layer a; 31: Second piezoelectric single crystal thin film layer b; 32: Second piezoelectric single crystal injection layer b; 33: Second piezoelectric single crystal residual layer b; 40: Supporting substrate. Detailed Implementation

[0046] The present application is described in detail below with reference to the embodiments, but the present application is not limited to these embodiments.

[0047] Unless otherwise specified, the raw materials used in the embodiments and comparative examples of this application were all purchased commercially.

[0048] Unless otherwise specified, the methods used in the embodiments and comparative examples of this application are conventional methods in the prior art. In this application, the plasma source is a device or apparatus for generating plasma; the specific model can be selected by those skilled in the art according to their needs, and this does not constitute a limitation on this application.

[0049] Example 1 This embodiment relates to a fabrication process for a double-layer piezoelectric single-crystal thin-film heterosubstrate, including the following steps: (1) Provide a 3-inch first piezoelectric single crystal wafer 10 (first lithium niobate wafer X-cut), and perform helium ion implantation on the first piezoelectric single crystal wafer 10 (first lithium niobate wafer X-cut) under an implantation voltage of 100 keV, with an implantation dose of 1.0 × 10 16 ions / cm 2 A first piezoelectric single crystal implantation wafer is obtained, which sequentially includes a first piezoelectric single crystal residual layer 13, a first piezoelectric single crystal implantation layer 12, and a first piezoelectric single crystal thin film layer 11. (2) Provide a 3-inch second piezoelectric single crystal wafer 20 (a second lithium niobate wafer X-cut), and perform helium ion implantation on the second piezoelectric single crystal wafer 20 (a second lithium niobate wafer X-cut) under an implantation voltage of 100keV, with an implantation dose of 1.8×10 16 ions / cm 2 A second piezoelectric single crystal implantation wafer is obtained, which sequentially includes a second piezoelectric single crystal residual layer 23, a second piezoelectric single crystal implantation layer 22, and a second piezoelectric single crystal thin film layer 21. (3) The first piezoelectric single crystal thin film layer 11 of the first piezoelectric single crystal implanted wafer and the second piezoelectric single crystal thin film layer 21 of the second piezoelectric single crystal implanted wafer are plasma activated and bonded. The activation gas is N2, the power of the plasma source is 100W, the gas flow rate is 100sccm, the irradiation time is 100s, and then the surface contact pressure is applied with a pressure of 10kN and a pressure time of 300s. Then the temperature is increased from room temperature to 60℃ at 5℃ / min and held for 1h. Then the temperature is increased to 130℃ at 1℃ / min and held for 10h to obtain the first bonded body. (4) The first bond is heated to 180°C at 2°C / min and kept at that temperature for 5 hours. Then the second piezoelectric single crystal residual layer 23 is peeled off along the second piezoelectric single crystal injection layer 22 to obtain a first thin film substrate with a single-layer thin film structure. (5) Perform chemical mechanical polishing and RCA cleaning on the first thin film substrate; (6) The first thin film substrate and the 3-inch support substrate 40 (gallium nitride) are bonded by atomic beam surface activation. Ar is used as the activation gas. Under the conditions of voltage of 2000V, current of 200mA, gas flow rate of 200sccm, irradiation time is 15s. Then, surface contact pressure is applied with a pressure of 20kN and a pressure time of 5s. The second bond is obtained. The first piezoelectric single crystal wafer of the second bond is mechanically thinned. The thickness of the first piezoelectric single crystal wafer after thinning is 30μm. (7) The second bond is heated from room temperature to 70°C at 0.1°C / min and held for 2 hours. Then it is heated to 130°C at 4°C / min and held for 14 hours. Then it is heated to 230°C at 4°C / min and the first piezoelectric single crystal residual layer 13 is peeled off along the first piezoelectric single crystal injection layer 12 to obtain a second thin film substrate with a double thin film structure. (8) After surface chemical mechanical polishing of the second thin film substrate, a bilayer lithium niobate X-cut piezoelectric single crystal thin film substrate is obtained.

[0050] Example 2 This embodiment relates to a fabrication process for a three-layer piezoelectric single-crystal thin-film heterosubstrate, including the following steps: (1) Provide an 8-inch first piezoelectric single crystal wafer 10 (first lithium tantalate wafer Y42°), and perform hydrogen ion implantation on the first piezoelectric single crystal wafer 10 (first lithium tantalate wafer Y42°) under an implantation voltage of 150keV, with an implantation dose of 1.5×10 16 ions / cm 2 A first piezoelectric single crystal implantation wafer is obtained, which sequentially includes a first piezoelectric single crystal residual layer 13, a first piezoelectric single crystal implantation layer 12, and a first piezoelectric single crystal thin film layer 11. (2) Provide an 8-inch second piezoelectric single crystal wafer 20 (second lithium tantalate wafer Y42°), and perform hydrogen ion implantation on the second piezoelectric single crystal wafer 20 (second lithium tantalate wafer Y42°) at an implantation voltage of 150keV, with an implantation dose of 2.5×10 16 ions / cm 2 A second piezoelectric single crystal implantation wafer is obtained, which sequentially includes a second piezoelectric single crystal residual layer 23, a second piezoelectric single crystal implantation layer 22, and a second piezoelectric single crystal thin film layer 21. (3) The first piezoelectric single crystal thin film layer 11 of the first piezoelectric single crystal implanted wafer and the second piezoelectric single crystal thin film layer 21 of the second piezoelectric single crystal implanted wafer are plasma activated and bonded. The activation gas is N2, the power of the plasma source is 150W, the gas flow rate is 100sccm, the irradiation time is 100s, and then the surface contact pressure is applied with a pressure of 10kN and a pressure time of 300s. Then the temperature is increased from room temperature to 70℃ at 6℃ / min and held for 1h. Then the temperature is increased to 130℃ at 2℃ / min and held for 10h to obtain the first bonded body. (4) After heating the first bond to 150°C at 1°C / min, the second piezoelectric single crystal residual layer 23 is peeled off along the second piezoelectric single crystal injection layer 22 to obtain a first thin film substrate with a single-layer thin film structure. (5) Perform chemical mechanical polishing and RCA cleaning on the first thin film substrate, and repeat steps (2)-(5) once to prepare a first thin film substrate containing two piezoelectric single crystal thin film layers; (6) The first thin film substrate and the 12-inch support substrate (sapphire) are bonded by atomic beam surface activation. Ar is used as the activation gas. Under the conditions of voltage of 2000V, current of 200mA, gas flow rate of 200sccm, irradiation time is 15s. Then, surface contact pressure is applied with a pressure of 20kN and a pressure time of 5s. The second bond is obtained. The first piezoelectric single crystal wafer of the second bond is mechanically thinned. After thinning, the thickness of the first piezoelectric single crystal wafer is 30μm. (7) The second bond is heated from room temperature to 70°C at 5°C / min and held for 2 hours. Then it is heated to 160°C at 4°C / min and held for 3 hours. Then it is heated to 190°C at 4°C / min and the first piezoelectric single crystal residual layer 13 is peeled off along the first piezoelectric single crystal injection layer 12 to obtain a second thin film substrate with a stacked thin film structure. (8) After performing surface chemical mechanical polishing on the second thin film substrate, a three-layer lithium niobate Y42° piezoelectric single crystal thin film substrate is obtained.

[0051] Example 3 This embodiment relates to a fabrication process for a three-layer piezoelectric single-crystal thin-film heterosubstrate, including the following steps: (1) Provide a 6-inch first piezoelectric single crystal wafer 10 (first lithium niobate wafer Y15°), and perform helium ion implantation on the first piezoelectric single crystal wafer 10 (first lithium niobate wafer Y15°) under an implantation voltage of 120keV, with an implantation dose of 1.4×10 16 ions / cm 2 A first piezoelectric single crystal implantation wafer is obtained, which sequentially includes a first piezoelectric single crystal residual layer 13, a first piezoelectric single crystal implantation layer 12, and a first piezoelectric single crystal thin film layer 11. (2) Provide a 6-inch second piezoelectric single crystal wafer 20 (second lithium niobate wafer Y15°); perform helium ion implantation on the second piezoelectric single crystal wafer 20 (second lithium niobate wafer Y15°) at an implantation voltage of 120keV, with an implantation dose of 2.5×10⁻⁶. 16 ions / cm 2 A second piezoelectric single crystal implantation wafer is obtained, which sequentially includes a second piezoelectric single crystal residual layer 23, a second piezoelectric single crystal implantation layer 22, and a second piezoelectric single crystal thin film layer 21. (3) The first piezoelectric single crystal thin film layer 11 of the first piezoelectric single crystal implanted wafer and the second piezoelectric single crystal thin film layer 21 of the second piezoelectric single crystal implanted wafer are plasma activated and bonded. The activation gas is N2, the power of the dual-frequency plasma source is 150W, the gas flow rate is 100sccm, the irradiation time is 100s, and then the surface contact pressure is applied with a pressure of 10kN and a pressure time of 300s. Then the temperature is increased from room temperature to 100℃ at 4℃ / min and held for 5h. Then the temperature is increased to 120℃ at 3℃ / min and held for 6h to obtain the first bonded body. (4) The first bond is heated to 150°C at 3°C / min and kept at that temperature for 20h. Then the second piezoelectric single crystal residual layer 23 is peeled off along the second piezoelectric single crystal injection layer 22 to obtain a first thin film substrate with a single-layer thin film structure. (5) Perform chemical mechanical polishing and RCA cleaning on the first thin film substrate, and repeat steps (2)-(5) once to prepare a second thin film substrate containing two piezoelectric single crystal thin film layers; (6) The second thin film substrate is bonded to the 6-inch support substrate 40 (silicon carbide) by atomic beam surface activation. Ar is used as the activation gas. Under the conditions of voltage of 2000V, current of 200mA, gas flow rate of 200sccm, irradiation time is 15s. After alignment, surface contact pressure is applied with a pressure of 20kN and a pressure time of 5s to obtain the second bond. The first piezoelectric single crystal wafer of the second bond is mechanically thinned. After thinning, the thickness of the first piezoelectric single crystal wafer is 30μm. (7) The second bond is heated from room temperature to 60°C at 5°C / min and held for 2 hours. Then it is heated to 150°C at 4°C / min and held for 2 hours. Then it is heated to 200°C at 3°C / min and held for 20 hours. Then it is cooled to room temperature at 3°C / min. The first piezoelectric single crystal residual layer 13 is peeled off along the first piezoelectric single crystal injection layer 12 to obtain a second thin film substrate with a two-layer thin film structure. (8) After performing surface chemical mechanical polishing on the second thin film substrate, a three-layer lithium niobate Y15° piezoelectric single crystal thin film substrate is obtained.

[0052] Example 4 The difference between this embodiment and embodiment 3 is that the heat treatment in step (7) is to raise the temperature from room temperature to 200°C at a rate of 1°C / min and then hold it at that temperature. The overall heat treatment time is 10 hours. The rest is the same as in embodiment 3.

[0053] Comparative Example 1 This comparative example relates to a fabrication process for a three-layer piezoelectric thin film substrate, comprising the following steps: (1) A 6-inch first piezoelectric single crystal wafer 10 (first lithium niobate wafer Y15° cut) is provided. The first piezoelectric single crystal wafer 10 (first lithium niobate wafer Y15°) is subjected to helium ion implantation at an implantation voltage of 120keV and an implantation dose of 2.5×10 16 ions / cm 2 A first piezoelectric single crystal implantation wafer is obtained, which sequentially includes a first piezoelectric single crystal residual layer 13, a first piezoelectric single crystal implantation layer 12, and a first piezoelectric single crystal thin film layer 11. (2) Provide a 6-inch support substrate 40 (silicon carbide), and perform atomic beam surface activation bonding between the first piezoelectric single crystal thin film layer 11 and the support substrate (silicon carbide) 40. Ar is used as the activation gas. Under the conditions of voltage of 2000V, current of 200mA, gas flow rate of 200sccm, irradiation time is 15s. After alignment, surface contact pressure is applied with a pressure of 20kN and a pressure time of 5s to obtain the first bonded body. (3) The first bond is heated from room temperature to 50°C at 1°C / min and kept at that temperature for 2 hours. Then, the temperature is increased to 150°C at 3°C / min and kept at that temperature for 20 hours. The first piezoelectric single crystal residual layer 13 is peeled off along the first piezoelectric single crystal injection layer 12 to obtain a first thin film substrate with a single-layer thin film structure. (4) Perform chemical mechanical polishing and RCA cleaning on the first thin film substrate; (5) Provide a 6-inch second piezoelectric single crystal wafer 20 (a second lithium niobate wafer X-cut), and perform hydrogen ion implantation on the second piezoelectric single crystal wafer 20 (a second lithium niobate wafer X-cut) under an implantation voltage of 120 keV, with an implantation dose of 1.4 × 10⁻⁶.16 ions / cm 2 A second piezoelectric single crystal implantation wafer is obtained, which sequentially includes a second piezoelectric single crystal residual layer 23, a second piezoelectric single crystal implantation layer 22, and a second piezoelectric single crystal thin film layer 21. (6) The first thin film substrate and the second piezoelectric single crystal thin film layer 21 are bonded by atomic beam surface activation. Ar is used as the activation gas. Under the conditions of voltage of 2000V, current of 200mA, gas flow rate of 200sccm, irradiation time is 15s. After alignment, surface contact pressure is applied with a pressure of 20kN and a pressure time of 5s to obtain the second bond. (7) The second bond is heated from room temperature to 60°C at 5°C / min and held for 2 hours. Then it is heated to 150°C at 4°C / min and held for 2 hours. Then it is heated to 220°C at 3°C / min and held for 20 hours. Then it is cooled to room temperature at 3°C / min. The second piezoelectric single crystal residual layer 23 is peeled off along the second piezoelectric single crystal injection layer 22 to obtain a second thin film substrate with a two-layer thin film structure. (8) Perform chemical mechanical polishing and RCA cleaning on the second thin film substrate; repeat steps (5)-(7) once to prepare a second thin film substrate containing three piezoelectric single crystal thin film layers; (9) After performing surface chemical mechanical polishing on the second thin film substrate, a three-layer piezoelectric single crystal thin film substrate is obtained.

[0054] Comparative Example 2 The difference between this comparative example and Example 3 is that in step (7), the second bond is heated to 260°C at 10°C / min and then kept at that temperature for 15 hours. The rest is the same as in Example 3.

[0055] Comparative Example 3 The difference between this comparative example and Example 3 is that the ion implantation dose of the first piezoelectric single crystal wafer in step (1) is 0.8 × 10⁻⁶. 16 ions / cm 2 The rest is the same as in Example 3.

[0056] Comparative Example 4 The difference between this comparative example and Example 3 is that in step (2), the ion implantation dose of the first piezoelectric single crystal wafer is the same as that of the second piezoelectric single crystal wafer, both being 2.5 × 10⁻⁶. 16 ions / cm 2 The rest is the same as in Example 3.

[0057] Test Example 1 The substrates prepared in the above embodiments and comparative examples were subjected to defect and surface shape tests, and the test methods are as follows: 1) Yield testing method: Yield (%) = Number of qualified products / Total quantity × 100%. Qualified products are those whose thin films are intact and free of defects and whose bonding interfaces have no voids, as observed by optical microscope and infrared detection technology.

[0058] 2) Warp value testing method: The measurement is performed using optical measurement methods, such as laser interferometers; 3) Bow value testing method: The measurement is performed using optical measurement methods, such as laser interferometer; 4) Thin film uniformity test method: Thin film uniformity (%) = standard deviation / average film thickness × 100%; 5) Electromechanical coupling coefficient test method: A resonator is fabricated on the upper surface for fabrication testing. An impedance analyzer is used to measure the admittance spectrum of its thickness scaling mode. The result is then calculated according to the formula... calculate.

[0059] 6) Mechanical Quality Factor Test Method: A resonator is fabricated on the upper surface for fabrication testing. An impedance analyzer is used to measure the admittance spectrum of its thickness scaling mode. The result is then calculated according to the formula... Calculations were performed; the test results are shown in Table 1 below.

[0060] Table 1

[0061] In Table 1, " / " indicates that there is no valid data.

[0062] As shown in Table 1, in Example 4, because the second bonded body is a heterogeneous bonded substrate, directly heating to the target temperature without gradient insulation leads to continuous accumulation of thermal stress, resulting in fragmentation, warping, and extremely low yield. In Comparative Example 3, due to the low ion implantation dose of the first piezoelectric single crystal wafer, the resulting defects and hydrogen / helium atom concentration are low, the cavity density is small, and the distribution is more sparse, making complete peeling impossible. In Comparative Example 4, because the first and second piezoelectric single crystal wafers have the same implantation dose, they are peeled off simultaneously after heating. Without a supporting substrate as a thin film carrier, the thin film breaks.

[0063] The above description is merely an embodiment of this application, and the scope of protection of this application is not limited to these specific embodiments, but is determined by the claims of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the technical concept and principles of this application should be included within the scope of protection of this application.

Claims

1. A fabrication process for a multilayer piezoelectric single-crystal thin-film heterostructure substrate, characterized in that, Includes the following steps: (1) Provide a first piezoelectric single crystal wafer, and perform ion implantation on the first piezoelectric single crystal wafer to obtain a first piezoelectric single crystal implanted wafer comprising a first piezoelectric single crystal residual layer, a first piezoelectric single crystal implanted layer, and a first piezoelectric single crystal thin film layer in sequence; (2) A second piezoelectric single-crystal wafer is provided, and ion implantation is performed on the second piezoelectric single-crystal wafer to obtain a second piezoelectric single-crystal implanted wafer comprising a second piezoelectric single-crystal residual layer, a second piezoelectric single-crystal implanted layer, and a second piezoelectric single-crystal thin film layer in sequence. The ion implantation dose of the first piezoelectric single-crystal wafer is less than that of the second piezoelectric single-crystal wafer, and the ion implantation doses of both the first and second piezoelectric single-crystal wafers are ≥1.0×10⁻⁶. 16 ions / cm 2 ; (3) Bond the first piezoelectric single crystal thin film layer of the first piezoelectric single crystal implanted wafer to the second piezoelectric single crystal thin film layer of the second piezoelectric single crystal implanted wafer to obtain a first bonded body; (4) The first bond is subjected to heat treatment, and the second piezoelectric single crystal residual layer is peeled off along the second piezoelectric single crystal injection layer to obtain a first thin film substrate with a single-layer thin film structure. (5) Planarize and clean the first thin film substrate. Steps (2)-(5) are performed at least once until the preset number of layers is reached. During the stacking process, the polarization directions of adjacent piezoelectric single crystal thin film layers are controlled to be different. (6) Bond the first thin film substrate to the support substrate to obtain a second bonded body; (7) The second bond is subjected to heat treatment. During the heat treatment, the heating rate is controlled at 0.1℃ / min-5℃ / min. The first piezoelectric single crystal residual layer is peeled off along the first piezoelectric single crystal injection layer to obtain a second thin film substrate with a stacked thin film structure. (8) Perform surface planarization on the second thin film substrate to obtain the stacked piezoelectric single crystal thin film heterostructure substrate; The heat treatment temperature in step (4) is 150-190℃; The heat treatment temperature in step (7) is 190-240℃; The heat treatment described in step (7) includes at least two-stage annealing with a holding gradient interval of 5. 100℃, with a heat preservation time of 0.5 seconds per section. 10h.

2. The fabrication process of the stacked piezoelectric single-crystal thin-film heterosubstrate according to claim 1, characterized in that, The implantation dose of the first piezoelectric single crystal wafer is 1.0 × 10⁻⁶. 16 ions / cm 2 -1.8×10 16 ions / cm 2 The implantation dose of the second piezoelectric single crystal wafer is 1.8 × 10⁻⁶. 16 ions / cm 2 -2.5×10 16 ions / cm 2 .

3. The fabrication process of the stacked piezoelectric single-crystal thin-film heterosubstrate according to any one of claims 1-2, characterized in that, In the ion implantation step, the types of ions used are hydrogen ions, helium ions, or a mixture of hydrogen and helium ions.

4. The fabrication process of a stacked piezoelectric single-crystal thin-film heterosubstrate according to claim 1, characterized in that, The heat treatment time mentioned in steps (4) and (7) is 5-40 hours.

5. The fabrication process of a multilayer piezoelectric single-crystal thin-film heterosubstrate according to claim 1, characterized in that, The bonding described in steps (3) and (6) is atomic beam surface activation bonding or plasma surface activation bonding.

6. The fabrication process of a multilayer piezoelectric single-crystal thin-film heterosubstrate according to claim 1, characterized in that, The planarization process described in steps (5) and (8) is chemical mechanical polishing.

7. The fabrication process of a multilayer piezoelectric single-crystal thin-film heterostructure according to claim 1, characterized in that, The cleaning in step (5) is RCA cleaning.

8. The fabrication process of a multilayer piezoelectric single-crystal thin-film heterostructure according to claim 1, characterized in that, The materials of the first piezoelectric single crystal wafer and the second piezoelectric single crystal wafer are selected from at least one of lithium niobate, lithium tantalate, quartz, lithium tetraborate and lanthanum gallium silicate.

9. The fabrication process of a multilayer piezoelectric single-crystal thin-film heterosubstrate according to claim 1, characterized in that, The material of the supporting substrate is selected from at least one of silicon, sapphire, SiO2 / Si composite substrate, silicon carbide, gallium nitride, and aluminum nitride.

Citation Information

Patent Citations

  • Composite heterogeneous integrated semiconductor structure, semiconductor device and preparation method

    CN112530855A

  • Wafer composite film and preparation method thereof

    CN120358922A