Testers, test methods, and computer-readable storage media
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- NUVOTON
- Filing Date
- 2025-06-05
- Publication Date
- 2026-06-16
AI Technical Summary
Defects during wafer manufacturing lead to excessively long testing times and numerous testing items, resulting in low efficiency.
A machine learning model is used to establish correlations based on wafer die test data, and the order of test items is adjusted so that the most sensitive test items are placed first, and only dies that pass the previous test items are further tested.
By optimizing the test sequence, testing time was reduced, testing efficiency and production effectiveness were improved, and labor and time costs were reduced.
Smart Images
Figure CN122218445A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a testing method, and more particularly to a testing method for testing wafers according to an optimal testing sequence. Background Technology
[0002] During wafer manufacturing, defects can easily occur due to various factors (such as insufficient doping concentration or short circuits in the metal layer). Therefore, the in-process packaging equipment must first test the dies on the wafer. However, each wafer has a large number of dies, and there are numerous testing items. As a result, each wafer requires a significant amount of testing time. Summary of the Invention
[0003] An embodiment of the present invention provides a testing apparatus, including a storage circuit, an input / output interface, and a computing circuit. The storage circuit stores a machine learning model. The input / output interface receives multiple Wafer Acceptance Test (WAT) sample data and multiple Wafer Probe (CP) sample data. The computing circuit reads from the storage circuit to retrieve the machine learning model. During a training period, the computing circuit provides WAT sample data and CP sample data to the machine learning model. The machine learning model calculates the WAT sample data and CP sample data to generate a correlation. During a testing period, the input / output interface receives product information and WAT measurement data. The computing circuit inputs the product information and WAT measurement data to the machine learning model. The machine learning model adjusts the test order of multiple test items in a CP operation based on the correlation.
[0004] The present invention also provides a testing method, comprising: during a training period, receiving multiple Wafer Acceptance Test (WAT) sample data from multiple sample wafers; performing a wafer probe test (CP) on the sample wafers to generate multiple CP sample data; and inputting the WAT sample data and CP sample data into a machine learning model. The machine learning model calculates the WAT sample data and CP sample data to generate a correlation. During a testing period, product information and WAT measurement data of a wafer under test are input into the machine learning model, causing the machine learning model to identify at least one key parameter from the WAT measurement data based on the correlation; the machine learning model adjusts the order of multiple test items based on the key parameter; and testing the wafer under test according to the adjusted order of test items.
[0005] The testing method of the present invention can be implemented using the testing equipment of the present invention, which is hardware or firmware capable of performing specific functions, or it can be implemented by incorporating code into a recording medium and combining it with specific hardware. When the code is loaded and executed by an electronic device, processor, computer, or machine, the electronic device, processor, computer, or machine becomes a testing equipment for implementing the present invention. Attached Figure Description
[0006] Figure 1 This is a flowchart illustrating the testing method of the present invention.
[0007] Figure 2A This is a schematic diagram of a test item for CP operation.
[0008] Figure 2B Another schematic diagram of the test item for CP operation.
[0009] Figure 2C Another schematic diagram of the test item for CP operation.
[0010] Figure 3 This is a schematic diagram of the testing equipment of the present invention.
[0011] Attached icon number
[0012] 110: During training
[0013] 120: During the test
[0014] S111~S113, S121, S122: Steps
[0015] A-F: Test Items
[0016] M, N: Parameters
[0017] 300: Testing equipment
[0018] 310: Input / output interface
[0019] 320: Operational circuit
[0020] 330: Storage circuit
[0021] 340: Storage circuit
[0022] 341: Code
[0023] 350: Processing circuit
[0024] 360: Testing Platform
[0025] ML: Machine Learning Model
[0026] DTR: Training Data
[0027] SD_W1~SD_Wn: WAT sample data
[0028] SD_C1~SD_Cn: CP sample data
[0029] WT: Wafer
[0030] WTS: Sample Wafer
[0031] WTT: Wafer to be tested
[0032] Pnum: Product Information
[0033] TD_W: WAT measurement data Detailed Implementation
[0034] To make the objectives, features, and advantages of this invention more apparent and understandable, embodiments are provided below, along with detailed descriptions in conjunction with the accompanying drawings. This specification provides different embodiments to illustrate the technical features of different implementations of the invention. The configuration of the elements in the embodiments is for illustrative purposes only and is not intended to limit the invention. Furthermore, the repetition of some reference numerals in the embodiments is for simplification and does not imply any correlation between different embodiments.
[0035] Figure 1 This is a schematic flowchart of the testing method of the present invention. The testing method of the present invention adjusts the order of test items in a chip probing (CP) operation based on the wafer acceptance test (WAT) data of each wafer under test, and performs the CP operation on each wafer under test according to the adjusted test order. In one possible embodiment, the most sensitive test item is tested first. Once any die of the wafer under test fails the sensitive test item arranged earlier, the testing machine will not spend time performing the remaining tests on that die, thus saving testing manpower and time. The testing method of the present invention can exist in code. The code may be stored in a computer-readable storage medium. When the code on the computer-readable storage medium is loaded and executed by a machine, the machine becomes a testing machine for implementing the present invention.
[0036] During a training period 110, WAT data from multiple sample wafers is received (step S111). In one possible embodiment, the WAT data is provided by the wafer foundry. The wafer foundry performs multiple tests on each sample wafer and uses the results of these tests as a single set of WAT data. For ease of explanation, the WAT data of the sample wafers is referred to as WAT sample data.
[0037] Next, a CP operation is performed on each sample wafer to generate multiple CP data sets (step S112). In one possible embodiment, if step S111 receives WAT sample data from 25 sample wafers, step S112 performs a CP operation on all dies of each of the 25 sample wafers to obtain 25 raw CP sample data sets. Each CP data set records all test results for each die of the corresponding sample wafer. For example, suppose each wafer has 10,000 dies, and the CP operation includes 100 test items. In this example, each CP data set includes 1 million (10,000 * 100) test results. For ease of explanation, the CP data of the sample wafer is referred to as CP sample data. In one possible embodiment, each CP sample data set includes at least one of a map data set and a data log.
[0038] Input WAT sample data and CP sample data into a machine learning model (step S113). The machine learning model calculates a correlation between the WAT sample data and the CP sample data. In one possible embodiment, the machine learning model establishes a correlation between the failed test results in the WAT sample data and the CP sample data. For example, when a specific parameter (such as the saturation current Isat of a transistor) in the WAT sample data is not within a normal range, the test result of a specific test item (such as on-resistance R) in the CP sample data is abnormal. In this example, since the specific test item (such as on-resistance R) is easily affected by the specific parameter (such as Isat), the machine learning model establishes a correlation between the specific test item (such as on-resistance R) and the specific parameter (such as Isat). By using the correlation established by the machine learning model, the key parameter most likely to cause test item failure can be identified in the WAT sample data.
[0039] During a test period 120, product information and WAT data of a wafer under test are input into a trained machine learning model to adjust the order of multiple test items (step S121). In one possible embodiment, the trained machine learning model determines the multiple test items required for the wafer under test based on the product information. Next, based on the relevance determined in step S113, the machine learning model identifies the most critical parameters from the WAT data of the wafer under test and identifies at least one test item (or sensitive test item) corresponding to the critical parameters from the multiple test items. The machine learning model adjusts the execution time of the sensitive test items.
[0040] Figure 2AThis is a schematic diagram of the test items for the CP operation. For ease of explanation, Figure 2A shows test items A to F, but it is not intended to limit the invention. In other embodiments, the CP operation has a different number of test items. Additionally, Figure 2A The CP (Consumer Protection) operation is designed for a specific product. Different products require different CP tests. For example, a first product might have 100 tests, while a second product might have 150. In this case, at least one of the 100 tests for the first product might be identical to the 150 tests for the second product.
[0041] Please refer to Figure 2A Suppose that during training, the machine learning model, based on WAT sample data and CP sample data from multiple sample wafers, learns that when parameter M is not within a normal range, the test result for test item C is usually a failure, and when parameter N is not within a normal range, the test result for test item E is usually a failure. Therefore, the machine learning model establishes a connection between parameter M and test item C, and a connection between parameter N and test item E.
[0042] Please refer to Figure 2B During testing, the machine learning model determines whether parameters M and N of the WAT data of a first wafer under test are within the normal range. Assume that parameter M of the WAT data of the first wafer under test is not within the normal range. In this example, since test item C is most easily affected by parameter M, the machine learning model moves test item C before test item A. Figure 2B As shown, the order of test items for the CP operation of the first wafer under test is C, A, B, D to F.
[0043] In another possible embodiment, suppose that parameter N of the WAT data of a second wafer under test is outside the normal range. In this example, since test item E is most susceptible to the influence of parameter N, the machine learning model moves test item E before test item A. Figure 2C As shown, the test items for the CP operation of the second wafer under test are in the order of E, A-D, and F. For ease of explanation, the WAT data of the wafer under test is referred to as WAT measurement data.
[0044] Next, each die of the wafer under test is tested according to the adjusted test sequence (step S122). In one possible embodiment, step S122 converts the adjusted test sequence into code. In this example, a processing circuit (such as a CPU) executes the code to perform a CP operation on the wafer under test.
[0045] by Figure 2BFor example, the machine learning model adjusts the order of test items in the CP operation based on the different WAT measurement data of different chips under test, placing the most sensitive tests first. Therefore, during the CP operation, the most sensitive tests are performed on each die first. If a die fails the most sensitive test, no further tests are performed on the abnormal die. This reduces test time and improves test efficiency.
[0046] In some embodiments, when any die of a wafer under test fails any test item of the CP operation, a testing machine highlights the plurality of dies. Therefore, after completing the CP operation, the tester can determine the location of the abnormal die and the yield of the wafer under test based on the testing machine's report. In another possible embodiment, when a die of the wafer under test passes all tests of the CP operation, the CP operation continues for the next die.
[0047] Figure 3 This is a schematic diagram of the test equipment of the present invention. As shown, the test equipment 300 includes an input / output interface 310, a computation circuit 320, and a storage circuit 330. The storage circuit 330 stores a machine learning model ML. In one possible embodiment, the storage circuit 330 has a non-volatile memory for storing the machine learning model ML.
[0048] The computation circuit 320 reads from the storage circuit 330 to load the machine learning model ML. During training, the input / output interface 310 receives training data DTR. The computation circuit 320 receives the training data DTR through the input / output interface 310 and inputs the training data DTR to the machine learning model ML to train the machine learning model ML to arrange the order of test items for CP operations. In one possible embodiment, the machine learning model ML calculates the training data DTR to establish a correlation. In some embodiments, the computation circuit 320 writes the trained machine learning model ML back to the storage circuit 330.
[0049] In one possible embodiment, the training data DTR includes WAT sample data SD_W1~SD_Wn of multiple sample wafers and CP sample data SD_C1~SD_Cn of each sample wafer. In other embodiments, the test equipment 300 further includes a storage circuit 340, a processing circuit 350, and a test platform 360. The storage circuit 340 is used to store a code 341. The test platform 360 is used to hold the wafer WT. During a training period, the wafer WT serves as a sample wafer WTS. During a test period, the wafer WT serves as a wafer under test WTT.
[0050] Processing circuit 350 executes code 341 to perform a CP operation on each die of wafer WT on test platform 360. The CP operation includes multiple test items. During testing, processing circuit 350 performs multiple tests on each die of sample wafer WTS and records multiple test results for each die. Processing circuit 350 uses all test results for all dies of each sample wafer WTS as CP sample data. In some embodiments, CP sample data includes at least one of map data and file data.
[0051] In one possible embodiment, processing circuitry 350 outputs CP sample data to an external device. During training, the external device provides CP sample data to input / output interface 310. In another possible embodiment, processing circuitry 350 stores CP sample data to storage circuitry 330 or 340. In this example, during training, arithmetic circuitry 320 reads CP sample data from storage circuitry 330 or 340.
[0052] In some embodiments, processing circuit 350 performs CP operations on multiple sample wafers (WTS) to generate multiple CP sample data. During training, machine learning model ML identifies failed test items based on the multiple CP sample data and then identifies key parameters related to the failed test items from the WAT sample data of the sample wafers (WTS). Machine learning model ML establishes a correlation between failed test items and key parameters. Using the key parameters, machine learning model ML determines the most sensitive test items and rearranges the order of the test items. In one possible embodiment, machine learning model ML converts the order of the test items into a code and uses this code to replace code 341 in storage circuit 340.
[0053] During a test, input / output interface 310 receives product information Pnum and WAT measurement data TD_W from a wafer under test (WTT). The processing circuit 320 reads from storage circuit 330 to load the trained machine learning model ML. The processing circuit 320 inputs the product information Pnum and WAT measurement data TD_W into the trained machine learning model ML. Based on the product information Pnum, the machine learning model ML determines which test items need to be performed on the wafer under test during the CP operation. For example, when the wafer under test WTT is a first product, the machine learning model ML plans 100 test items; when the wafer under test WTT is a second product, the machine learning model ML plans 150 test items. In one embodiment, the product information Pnum is a company product model code. In another embodiment, the product information Pnum includes a company product model code and a lot number, which corresponds to the WAT data and CP data of each batch of wafers.
[0054] Next, the machine learning model (ML) determines whether the WAT measurement data TD_W contains critical parameters (parameters most likely to cause test item failures) based on the correlations generated during previous training, and adjusts the order of the test items accordingly. For example, when the WAT measurement data TD_W does not contain critical parameters, the machine learning model ML adjusts the order of the test items according to a preset order. However, when the WAT measurement data TD_W contains critical parameters (such as...), the machine learning model adjusts the order of the test items according to a preset order. Figure 2B When the parameter M is specified, the machine learning model ML no longer adjusts the order of test items according to a preset order. Instead, the machine learning model ML identifies sensitive test items (such as those corresponding to key parameters) from multiple test items. Figure 2B Test item C), and move the sensitive test item (C) to the front, and move the other test items (such as...) to the front. Figure 2B Test items A, B, D to F) are arranged after sensitive test item (C).
[0055] In one possible embodiment, the computation circuit 320 converts the test sequence adjusted by the machine learning model ML into code and updates code 341 using this code. In this example, the processing circuit 350 performs a CP operation on the wafer under test (WTT) according to the updated code 341. At this time, the processing circuit 350 performs the test sequence arranged by the machine learning model ML (e.g., ...) according to the test sequence arranged by the machine learning model ML. Figure 2B The C, A, B, D to F) of the wafer WTT to be tested are used to test each grain.
[0056] By leveraging the pre-established correlations from the machine learning model ML, the model can determine which test items the wafer under test (WTT) is most sensitive to based on the product information Pnum and the WAT measurement data TD_W. The machine learning model ML then prioritizes the most sensitive tests. The processing circuit 350 performs each test on the wafer under test (WTT) according to the test order determined by the machine learning model ML.
[0057] When a first die of the wafer under test (WTT) fails one of the plurality of tests, the processing circuit 350 stops performing the remaining tests on the first die and marks the first die. In some embodiments, the first die may be marked as a defective product. In other embodiments, the tester determines the yield of the WTT based on the number of marked dies.
[0058] In another possible embodiment, when a second die of the wafer under test (WTT) passes all test items (including the most sensitive ones), the processing circuit 350 continues to perform CP operation on another die (or third die) of the wafer under test (WTT) until all dies have been tested.
[0059] By utilizing the optimized test sequence of CP operations generated by the machine learning model ML, when the processing circuit 350 performs CP operations on each die, since the most sensitive items are placed first, the processing circuit 350 can immediately detect abnormal dies, significantly shortening the test time and improving the production efficiency of the test production line, thus providing better price competitiveness.
[0060] The testing method, or a specific form or part thereof, of the present invention may exist in the form of code. The code may be stored on physical media, such as floppy disks, optical disks, hard disks, or any other machine-readable (e.g., computer-readable) storage media, or may be a computer program product, not limited to an external form. When the code is loaded and executed by a machine, such as a computer, this machine becomes a testing instrument for the present invention. The code may also be transmitted via some transmission medium, such as wires or cables, optical fibers, or any transmission method. When the code is received, loaded, and executed by a machine, such as a computer, this machine becomes a testing instrument for the present invention. When implemented in a general-purpose processing unit, the code, combined with the processing unit, provides a unique device that operates similarly to an application-specific logic circuit.
[0061] Unless otherwise defined, all terms herein (including technical and scientific terms) are as commonly understood by one of ordinary skill in the art to which this invention pertains. Furthermore, unless expressly stated otherwise, definitions of terms in general dictionaries should be interpreted as consistent with their meaning in the context of their respective technical fields, and not as idealized or overly formal expressions. While terms such as “first” and “second” may be used to describe various elements, these elements should not be limited by these terms. These terms are merely used to distinguish one element from another. In the claims, terms such as “first” and “second” are used as designations and are not intended to impose numerical requirements on their contents.
[0062] While the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the invention. Those skilled in the art can make modifications and refinements without departing from the spirit and scope of the invention. For example, the systems, apparatus, or methods described in the embodiments of the present invention can be implemented in physical embodiments of hardware, software, or a combination of hardware and software. Therefore, the scope of protection of the present invention shall be determined by the scope defined in the appended claims.
Claims
1. A testing machine, characterized in that, include: A first storage circuit stores a machine learning model; One input / output interface is used to receive multiple wafer acceptance test (WAT) sample data and multiple wafer probe test (CP) sample data; An arithmetic circuit reads the first storage circuit to read the machine learning model. in: During a training session: The computing circuit provides the plurality of WAT sample data and the plurality of CP sample data to the machine learning model, which calculates the plurality of WAT sample data and the plurality of CP sample data to generate a correlation. During a test: The input / output interface receives product information and WAT measurement data. The computing circuit inputs the product information and WAT measurement data into the machine learning model. The machine learning model adjusts the test order of multiple test items in a CP operation based on the correlation.
2. The testing machine as described in claim 1, characterized in that, Including: A second storage circuit stores a code; and A processing circuit executes the code during the test to perform the CP operation on each die of a wafer under test. in: During this training, the machine learning model translates the test sequence into the code and writes the code into the second storage circuit.
3. The testing machine as described in claim 2, characterized in that, When a first die of the wafer under test fails to pass a specified item in the plurality of test items, the processing circuit stops performing the CP operation on the first die and marks the first die.
4. The testing machine as described in claim 3, characterized in that, When a second die of the wafer under test passes the plurality of test items, the processing circuit performs the CP operation on a third die of the wafer under test.
5. A testing method, characterized in that, include: During a training session: Receive multiple wafer acceptance test (WAT) sample data from multiple sample wafers; A single-chip probe CP test is performed on the multiple sample wafers to generate multiple CP sample data. Input the plurality of WAT sample data and the plurality of CP sample data into a machine learning model, wherein the machine learning model calculates the plurality of WAT sample data and the plurality of CP sample data to generate a correlation; During a test: Input product information of a wafer to be tested and WAT measurement data into the machine learning model, so that the machine learning model can find at least one key parameter from the WAT measurement data based on the correlation, and adjust the order of multiple test items based on the key parameter. The wafer to be tested is tested according to the adjusted order of the multiple test items.
6. The test method as described in claim 5, characterized in that, Each CP sample data represents the test results of all grains on each sample wafer.
7. The test method as described in claim 5, characterized in that, Each CP sample data includes at least one map data and one file data.
8. The test method as described in claim 5, characterized in that, Including: During this test: When a first die among the multiple dies of the wafer under test fails one of the multiple test items, the remaining test items for the first die are stopped, and the first die is marked.
9. The test method as described in claim 8, characterized in that, Including: During this test: When a second grain among the plurality of grains passes the plurality of test items of the CP operation, a third grain among the plurality of grains is tested.
10. A computer-readable storage medium, characterized in that, Used to store code that, when executed, performs the following steps: During a training session: Receive multiple wafer acceptance test (WAT) sample data from multiple sample wafers; A single-chip probe CP operation is performed on the multiple sample wafers to generate multiple CP sample data. Input the plurality of WAT sample data and the plurality of CP sample data into a machine learning model, wherein the machine learning model calculates the plurality of WAT sample data and the plurality of CP sample data to generate a correlation; During a test: Input product information of a wafer to be tested and WAT measurement data into the machine learning model, so that the machine learning model can find at least one key parameter from the WAT measurement data based on the correlation, and adjust the order of multiple test items based on the key parameter. The wafer to be tested is tested according to the adjusted order of the multiple test items.