基于神经网络的集成电路芯片全生命周期寿命预测方法
By constructing a dual-track BIST architecture and an improved neural network, and combining the Wisfeld-Lyman algorithm to extract chip physical structure features, the problems of data source distortion and insufficient model fitting ability in the lifetime prediction of high-density integrated circuit chips are solved. This achieves accurate lifetime prediction and a self-healing mechanism, and improves the reliability of the prediction results.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- JIANGNAN UNIV
- Filing Date
- 2026-05-15
- Publication Date
- 2026-07-17
AI Technical Summary
Existing chip lifetime prediction technologies suffer from problems such as data source distortion, missing structural features, and insufficient model fitting ability in high-density integration environments. This leads to deviations between prediction results and actual conditions, making it difficult to capture the nonlinear degradation patterns under multi-parameter coupling.
A neural network-based approach is adopted to acquire multi-source data by constructing a dual-track on-chip self-test (BIST) architecture, extracting chip physical structure features using the Wisfeld-Lehman algorithm, combining simulation data augmentation technology, and constructing an improved neural network for accurate lifetime prediction, thereby realizing a system-level self-healing mechanism.
It enables accurate prediction and management of the lifespan of high-density integrated circuit chips, improves the generalization level of the model and the credibility of the prediction results, solves the accuracy problem of complex structure mapping and nonlinear prediction, and provides system-level safe and reliable closed-loop protection.
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Figure CN122220794B_ABST
Abstract
Citation Information
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