Tensor analysis network transient temperature solving method for three-dimensional interconnection structure

Abstract

This invention discloses a method for solving transient temperatures in tensor analysis networks for three-dimensional interconnected structures. The method includes: dividing the three-dimensional interconnected structure into thermal elements and constructing equivalent thermal paths based on its layout, vertical structure, and heat source distribution; connecting the equivalent thermal paths of each thermal element and adding excitation source branches and thermal boundary conditions to obtain an equivalent thermal path model of a complex interconnected structure with multiple elements and multiple excitations, and constructing its branch space-time tensor analysis network; generating independent meshes based on a spanning tree algorithm to generate an association matrix, and using the branch space-time tensor analysis network to construct the mesh space-time tensor analysis network of the equivalent thermal path model; constructing a time-domain thermal network equation through the mesh space-time tensor analysis network, updating the temperature-changing material parameters through time-domain iteration, and calculating the node transient temperature response curves of the three-dimensional interconnected structure. This invention enables rapid and accurate modeling of three-dimensional thermal topology, significantly improving the computational efficiency and accuracy of transient temperatures in complex interconnected structures.

Description

Technical Field

[0001] This invention belongs to the fields of microelectronic packaging thermal analysis technology and electro-digital data processing, specifically relating to a method for solving transient temperature in tensor analysis networks for three-dimensional interconnect structures. Background Technology

[0002] The coupling of electricity and heat is an inherent characteristic of circuits; the conduction current generates heat according to Joule's law. Early integrated circuits were large in size with low interconnect resistance, allowing the small amount of heat generated to dissipate quickly, and the low signal transmission rate meant that temperature had a negligible impact on signal integrity. However, as integrated circuits have iterated towards miniaturization and high density, the reduction in interconnect size has led to increased resistivity and current density, highlighting the issue of heat generation. Simultaneously, the low dielectric constant dielectric materials used to mitigate signal crosstalk have poor thermal conductivity, further exacerbating heat accumulation. Increased interconnect temperature leads to increased power consumption, shifts in transmission characteristics, and deterioration of signal integrity at high clock rates. In extreme cases, it can cause circuit meltdown, affecting reliability.

[0003] Currently, semiconductor processes have entered the nanoscale, and further miniaturization of transistor channel length faces insurmountable technical bottlenecks. To continuously improve integrated circuit performance, the industry is gradually turning to advanced packaging technologies such as 3D packaging integration, which improves overall system performance by shortening the global interconnect length. 3D microsystems, with their unique vertically stacked structure, have shown great potential in significantly enhancing device performance and reducing device size. However, with the continuous increase in integration density, the problem of internal heat accumulation is becoming increasingly prominent and difficult to solve. Therefore, accurately and efficiently acquiring the transient temperature response of 3D interconnect structures has become a key technical requirement for overcoming existing technological bottlenecks and improving the performance and reliability of integrated circuits.

[0004] Current research on the electrothermal characteristics of circuits mainly falls into two categories: experimental measurement and theoretical calculation. Experimental measurement obtains real-world electrothermal data by fabricating actual test boards, directly guiding design. However, circuit modifications necessitate re-fabrication and testing, which is time-consuming, resource-intensive, and lacks adaptability. Theoretical calculation, on the other hand, allows for simulation optimization before circuit fabrication, significantly reducing the number of actual tests. It is further subdivided into thermal field analysis and equivalent modeling. Thermal field analysis iteratively solves the heat conduction equation through mesh generation, offering high modeling accuracy and adaptability to complex physical structures. However, it is computationally time-consuming, resource-intensive, and demands higher computational standards for complex interconnect structures. Equivalent modeling constructs an RC equivalent thermal circuit model to analytically calculate the temperature response. It has a low computational threshold and fast calculation speed, shortening the thermal design cycle. However, its accuracy is highly dependent on the equivalent model; existing models lack sufficient accuracy, cannot achieve thermal coupling and parallel computation for multi-excitation and complex interconnect structures, and are difficult to adapt to complex scenarios with three-dimensional interconnects. Summary of the Invention

[0005] To achieve rapid and accurate modeling of thermal circuit networks in three-dimensional interconnected structures, and to significantly improve the computational efficiency and accuracy of transient temperatures in complex interconnected structures by updating temperature-changing material parameters in real time through time-domain iteration, while reducing the performance requirements of computing devices, this invention provides a method for solving transient temperatures in tensor analysis networks for three-dimensional interconnected structures. The technical problem to be solved by this invention is achieved through the following technical solution: This invention provides a method for solving the transient temperature of tensor analysis networks with three-dimensional interconnect structures, the method comprising: S1, Based on the layout, vertical structure and heat source distribution of the three-dimensional interconnect structure, thermal units are divided and corresponding equivalent thermal paths are constructed; wherein, the three-dimensional interconnect structure includes a GSG TSV-RDL-TSV interconnect structure; S2, connect the equivalent thermal paths of each thermal unit, and add excitation source branches and thermal boundary conditions to obtain the equivalent thermal path model of a complex interconnected structure with multiple units and multiple excitations, and construct the branch space-time tensor analysis network of the equivalent thermal path model. S3. For the obtained equivalent thermal circuit model, generate independent meshes based on the spanning tree algorithm to generate the correlation matrix, and use the branch spatial-temporal tensor analysis network to construct the mesh spatial-temporal tensor analysis network of the equivalent thermal circuit model. S4. A time-domain thermal network equation is constructed using a mesh spatial-temporal tensor analysis network. The temperature-changing material parameters are updated iteratively in the time domain, and the transient temperature response curves of the nodes of the three-dimensional interconnected structure are calculated.

[0006] Compared with the prior art, the present invention has the following advantages: First, by using an equivalent circuit model to model the thermal path of the interconnect structure and solve for the temperature response, this invention improves the speed of temperature response calculation, reduces resource consumption, and lowers the performance requirements of computing devices. Second, when generating a three-dimensional directed unweighted graph, the present invention adopts a continuous numbering rule within the layer, the branch direction is determined by the natural conduction direction of heat flow, and the node-branch association table contains the starting node, ending node and direction identifier of each branch, which reduces the complexity of model construction and saves the time cost of model construction. Third, this invention realizes the transformation of tensor analysis networks from branch space to mesh space based on the spanning tree algorithm, saving the time cost of transformation from branch space to mesh space and reducing the model complexity when applying tensor analysis network methods. Fourth, this invention uses the block matrix method to solve the thermal network equations where the independent and dependent variables are partially known, which improves the thermal coupling and parallel computing capabilities between multi-excitation and complex interconnected structures. Fifth, the present invention adopts a time-domain iterative tensor analysis network solution, which can update the temperature-changing material parameters in each iteration, thereby improving the accuracy of temperature response calculation. Attached Figure Description

[0007] Figure 1 This is a flowchart illustrating a method for solving transient temperatures in tensor analysis networks for three-dimensional interconnected structures, provided in an embodiment of the present invention. Figure 2 This is a cross-sectional schematic diagram of the GSG TSV-RDL-TSV interconnect structure in an embodiment of the present invention; Figure 3 This is a top view schematic diagram of the GSG TSV-RDL-TSV interconnect structure in an embodiment of the present invention; Figure 4 This is a schematic diagram showing the thermal component partitioning of the GSG TSV-RDL-TSV interconnect structure in an embodiment of the present invention; Figure 5 This is a schematic diagram of the vertical thermal unit division of the GSG TSV-RDL-TSV interconnect structure in an embodiment of the present invention; Figure 6 This is an equivalent thermal path model for a single thermal unit in an embodiment of the present invention; Figure 7 This is a schematic diagram of the thermal circuit connection of a single thermal component in an embodiment of the present invention; Figure 8 This is a schematic diagram of constructing a spanning tree on the GSG TSV-RDL-TSV interconnect structure model in an embodiment of the present invention; Figure 9 The results show the thermal node temperature response of the GSG TSV-RDL-TSV interconnect structure under multiple excitation conditions in this embodiment of the invention. Figure 10 This refers to the error in the thermal node temperature response of the GSG TSV-RDL-TSV interconnect structure under multiple excitation conditions in the embodiments of the present invention. Figure 11 The temperature response results of the GSG TSV-RDL-TSV interconnect structure under different boundary conditions in the embodiments of the present invention; Figure 12 The temperature response results of the GSG TSV-RDL-TSV interconnect structure in this embodiment of the invention are shown at different TSV heights. Detailed Implementation

[0008] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0009] This invention provides a method for solving transient temperature in tensor analysis networks with three-dimensional interconnect structures, such as... Figure 1As shown, the method may include the following steps S1 to S4: S1, based on the layout, vertical structure and heat source distribution of the three-dimensional interconnection structure, divide the thermal units and construct the corresponding equivalent thermal paths; This invention applies to three-dimensional packaged interconnect structures, including the standard interconnect structure GSG TSV-RDL-TSV interconnect structure (full name: Ground-Signal-Ground Through-Silicon Via - Redistribution Layer - Ground-Signal-Ground Through-Silicon Via - Redistribution Layer - Through-Silicon Via) for high-speed, high-frequency signal transmission, but is not limited to this structure.

[0010] For ease of understanding, the following text will use the GSG TSV-RDL-TSV interconnect structure as an example.

[0011] Figure 2 The diagram shows a cross-sectional view of the GSG TSV-RDL-TSV interconnect structure. The interconnect structure consists of TSV (Through Silicon Via), RDL (Redistribution Layer), upper and lower Pads, oxide layer, passivation layer, insulator layer, and silicon substrate. Figure 3 The diagram shown is a top view of the GSG TSV-RDL interconnect structure, indicating that the GSG TSV-RDL-TSV interconnect structure consists of three sets of TSV-RDL-TSV structures arranged in parallel, from left to right as ground-signal-ground channels.

[0012] The interconnection structure parameters of GSG TSV-RDL are shown in Table 1: Table 1. GSG TSV-RDL-TSV Interconnection Structure Parameters

[0013] In one specific embodiment of the present invention, S1 includes: S11, the layout of the interconnect structure is divided into different components according to type and size; S12, the longitudinal structure of each component is divided into thermal units according to the distribution of heat sources; S13, construct the equivalent thermal path for each thermal unit divided by each component.

[0014] Specifically, in the three-dimensional interconnect structure, heat is mainly generated by the TSV and RDL, and diffuses horizontally and vertically to adjacent layers.

[0015] First, thermal components are identified based on the planar structure and heat flow of the three-dimensional interconnect structure. (See [link to relevant documentation]). Figure 3 The layout of the three-dimensional interconnect structure is divided into different components according to type and size. The component division results are as follows: Figure 4 As shown, component 1 is a component containing a TSV (the planar division area is centered at the center of the TSV, with a side length of 2). Component 2 is a component containing an RDL (the planar division area is centered at the center of the RDL, with a length of...). , width is (The rectangle in the diagram represents the substrate components, 2 through 9, which are substrate components of different sizes.) The undivided areas in the diagram can be equivalently represented by the already divided components 1 through 9.

[0016] Then, based on the longitudinal structure of the thermal components, thermal units are divided into individual thermal units for each thermal component. The division of thermal units in the longitudinal structures of components 1 and 2 illustrates the division method of this embodiment of the invention. The thermal unit division results are as follows: Figure 5 As shown, component 1 is divided into three thermal units, from top to bottom: A1, B1, and C1.

[0017] A1 contains: a radius of Gao Wei The upper pad has an outer diameter of The inner diameter is Gao Wei The dielectric layer, and the radius of Gao Wei Some TSVs; B1 includes: a radius of Gao Wei -2 Partial TSV; outer diameter is + The inner diameter is Gao Wei -2 The oxide layer, and the outer diameter is The inner diameter is + Gao Wei -2 A cylindrical layer on a silicon substrate; The structure of C1 is the same as that of A1 (the thermal units here are all cylinders, which is different from the square regions divided by the plane, because in the subsequent calculations, the thermal resistance and thermal capacity values ​​calculated by cuboids and cylinders are close. For the convenience of calculation, only the cylindrical part is calculated when dividing the components containing TSVs into thermal units).

[0018] For component 2, which is the part between the two interconnected TSVs, it is divided into A2, B2 and C2 from top to bottom.

[0019] A2 contains: a length of , width is Gao Wei The RDL metal layer is long. , width is Gao Wei - The passivation layer, and the length of which is , width is Gao Wei The dielectric layer; B2 contains only those of length [missing information]. , width is Gao Wei -2 silicon substrate layer; C2 contains a length of , width is Gao Wei The passivation layer, and the length of which is , width is Gao Wei The dielectric layer.

[0020] The thermal unit divisions for the remaining components are similar.

[0021] Each thermal unit is equivalently represented using a first-order or multi-order RC-Cauer model; taking component 1 as an example, its equivalent thermal path is constructed as follows: 1) Construct the equivalent thermal path for thermal unit A1: For the upper cylindrical pad in the component, heat flows radially and vertically to other areas, and its radial thermal resistance can be calculated as follows: The copper region is the area where the heat source is generated, and it is assumed that the heat is evenly distributed in this region.

[0022] The formula for calculating its radial thermal resistance is: ; The formula for calculating its longitudinal thermal resistance is: ; The formula for calculating the heat capacity in this part is: ; in, Indicates the radial thermal resistance of the copper region; Indicates the longitudinal thermal resistance of the copper region; This indicates the heat capacity of the copper region; Indicates temperature rise; Indicates temperature rise as The amount of heat required at that time; Indicates the radius of the cylindrical pad (i.e., the pad radius); This indicates the height of the cylinder (i.e., the height of the passivation layer). express The direction of integration in the formula calculation is along the direction from 0 to... (refer to the formula itself). The radial direction; express The direction of integration in the formula calculation is along the direction from 0 to... (refer to the formula itself). The height (vertical) direction; This indicates the thermal conductivity of copper; This indicates the specific heat capacity of copper; This indicates the density of copper.

[0023] To reflect the multidirectional nature of heat flow and to facilitate connection with the thermal network of other adjacent areas, its radial thermal resistance is divided into four equal parts of horizontal thermal resistance, and its longitudinal thermal resistance is divided into two equal parts.

[0024] For the dielectric layer and part of the TSV in the A1 thermal unit, since they are thin and have a large radial thermal resistance, the heat flowing through this path can be ignored. Therefore, the embodiment of the present invention does not consider the influence of radial thermal resistance.

[0025] The formula for calculating its longitudinal thermal resistance is: ; ; in, Indicates the radius of the through-silicon via; Indicates the longitudinal thermal resistance of the TSV region; Indicates the longitudinal thermal resistance of the dielectric layer; This indicates the height of the dielectric thin layer, where the TSV thin layer height is equal to the dielectric thin layer height. This indicates the thermal conductivity of silicon dioxide; The outer diameter of the dielectric layer in thermal unit A1 is [value missing]. , Its inner diameter, value .

[0026] The formulas for calculating the heat capacity of dielectric thin layers and TSV thin layers are as follows: ; ; in, This indicates the heat capacity of the TSV thin film; This indicates the heat capacity of a thin dielectric layer; and These are the specific heat capacities of copper and silicon dioxide, respectively. and These are the densities of copper and silicon dioxide, respectively. When the hot spot is selected at the center of the upper Pad, its thermal resistance in six directions is as follows: ; ; ; , These are the A1 thermal units. Thermal resistance in the positive and negative directions , They are respectively Thermal resistance in the positive and negative directions , These are the thermal resistances in the positive and negative directions, respectively; in the above formula... This indicates that the resistors are connected in parallel.

[0027] Since the total heat capacity (i.e., heat storage capacity) of the system is equal to the algebraic sum of the heat capacities of its individual components, the heat capacity of heat unit A1 is calculated as follows: ; Connect the calculated thermal resistance and thermal capacity values ​​in the correct directions to obtain the following: Figure 6 The equivalent thermal path diagram of thermal element A1 is shown. Thermal element C1 has the same structure as A1, and its equivalent thermal path is also the same as A1.

[0028] 2) Construct the equivalent thermal path for thermal unit B1: Considering the B1 thermal unit, it can be observed that this component consists of three regions: the TSV, the oxide layer, and the silicon substrate layer. This represents the radial thermal resistance of the TSV region in thermal element B1, and its calculation formula is the same as that in thermal element A1. The calculation formulas remain consistent, and the formulas for calculating the radial thermal resistance of the oxide layer and the silicon substrate layer are as follows: ; ; in, Indicates the radial thermal resistance of the oxide layer; Indicates the radial thermal resistance of the silicon substrate layer; This indicates the height of the thermal element, with a value of [value missing]. ; This represents the outer diameter of the oxide layer (i.e., the dielectric layer), with a value of [value missing]. + ; This represents the outer diameter of the silicon substrate, with a value of [value missing]. ; This indicates the thermal conductivity of silicon.

[0029] by , , These represent the longitudinal thermal resistances of the TSV region, oxide layer, and silicon substrate in thermal unit B1, respectively. The calculation process is the same as that in thermal unit A1. To maintain consistency, further details will not be elaborated upon here. , , These represent the heat capacities of the TSV region, oxide layer, and silicon substrate in thermal cell B1, respectively. The calculation process is the same as that in thermal cell A1. To maintain consistency, this will not be repeated here. The formula for calculating the thermal resistance of thermal unit B1 is as follows: ; ; , These are the B1 thermal units. Thermal resistance in the positive and negative directions , These are the B1 thermal units. Thermal resistance in the positive and negative directions , These are the B1 thermal units. Thermal resistance in the positive and negative directions; in the above formula This indicates that the resistors are connected in parallel.

[0030] The formula for calculating the heat capacity of heat unit B1 is as follows: ; The equivalent thermal path construction method for the other components is similar to that of component 1, and will not be described in detail here.

[0031] S2, connect the equivalent thermal paths of each thermal unit, and add excitation source branches and thermal boundary conditions to obtain the equivalent thermal path model of a complex interconnected structure with multiple units and multiple excitations, and construct the branch space-time tensor analysis network of the equivalent thermal path model. In one specific implementation, S2 includes the following steps S21 to S24: S21, connect the equivalent thermal paths of each thermal unit under each component according to the positional relationship in the physical model to obtain the equivalent thermal path of the corresponding component; The various thermal units are connected according to their positional relationships in the physical model. Specifically, the equivalent thermal paths of each thermal unit in component 1 are connected to form the equivalent thermal path of component 1. Then, the equivalent thermal paths of the remaining components are constructed. For example... Figure 7 The diagram shown is a schematic of the thermal circuit connection of a single thermal component.

[0032] S22, connect the equivalent thermal paths of each component according to the positional relationship between the components to form the equivalent thermal path of the interconnection structure as a whole; The equivalent thermal paths are connected according to the positional relationship between the components to form the equivalent thermal paths of the overall interconnected structure.

[0033] S23, add a grounded current source as an excitation source to the conductor node in the equivalent thermal circuit of the interconnect structure as a representation of the conductor's thermal power to obtain the equivalent thermal circuit model of the interconnect structure, and add thermal boundary conditions to the equivalent thermal circuit model of the interconnect structure to obtain the processed equivalent thermal circuit model. A node is a connection endpoint in a topology network. All branches are connected to nodes. In the physical model, it is represented as a point at a specific location. A conductor node is a node in the physical model that is located in a metallic region and is where heat power is generated, such as the node to which thermal element B1 belongs. By adding a grounded current source as an excitation source to the conductor node in the equivalent thermal circuit of the overall interconnect structure, we can represent the heat power of the conductor and obtain an equivalent thermal circuit model of a complex structure with multiple elements and multiple excitations (equivalent thermal circuit model of interconnect structure).

[0034] Then, thermal boundary conditions are added to the equivalent thermal path model of the interconnection structure.

[0035] Thermal boundary conditions include: adiabatic boundary, isothermal boundary, and convective boundary; Specifically, when adding an adiabatic boundary to the equivalent thermal path model of the interconnected structure, no processing is required on the equivalent thermal path model; when adding an isothermal boundary to the equivalent thermal path model of the interconnected structure, the corresponding boundary thermal nodes are connected to a grounded voltage source, and the voltage magnitude is set to the difference between the temperature of the set isothermal boundary and the ambient temperature; when adding a convective boundary to the equivalent thermal path model of the interconnected structure, the convective boundary is equivalent to a series connection of a convective thermal resistance and a constant voltage source, and the magnitude of the constant voltage source is the fluid temperature. , The convective thermal resistance is determined based on the external convective environment, typically the ambient air temperature or the coolant temperature. The formula for calculating convective thermal resistance is: ;in, The surface area of ​​the three-dimensional interconnect structure in contact with the fluid; This is the convection coefficient, set according to the external convection boundary conditions.

[0036] In this embodiment of the invention, thermal boundary conditions are added to the equivalent thermal path model of the interconnect structure, including: A convection boundary is added to the lower boundary of the GSG TSV-RDL-TSV interconnect structure, and an adiabatic boundary is added to the remaining parts. That is, based on the equivalent thermal circuit model of the interconnect structure, the corresponding convection thermal resistance and constant voltage source are connected in series to the lower boundary nodes (such as the thermal nodes corresponding to thermal elements C1 and C2).

[0037] S24. Abstract the node-branch three-dimensional network of the equivalent thermal circuit from the processed equivalent thermal circuit model, thereby constructing the branch space-time tensor analysis network of the processed equivalent thermal circuit model.

[0038] In one specific implementation, S24 includes: S241, for the processed equivalent thermal path model, all thermal nodes are marked with a three-dimensional index, and node pairs with heat conduction or heat capacity relationship are connected by line segments as branches, so as to simplify the processed equivalent thermal path model into the connection of nodes and line segments, and construct a node-branch three-dimensional network that intuitively shows the heat flow path and network connection relationship. In this context, a hot node refers to the connection endpoint in the equivalent thermal circuit model. All thermal resistance branches and thermal capacity branches are connected to hot nodes, which are represented as points at specific locations in the physical model.

[0039] S242, using the branches in the node-branch three-dimensional network as basic units, the branch voltages and currents are respectively composed into tensors according to the branch sequence to obtain the covariant tensors required to construct the branch space-time domain tensor analysis network for the processed equivalent thermal circuit model. Covariant tensor Inverse tensor ; ; Among them, the inverse tensor Branch current vector, inverter tensor middle Indicates the first Current in a branch; covariant tensor For branch voltage vectors, in the covariant tensor Indicates the first Voltage on a branch; covariant tensor For branch voltage source vectors, covariant tensors middle Indicates the first Voltage source on the branch; , The number of branches in a node-branch 3D network; S243, arrange the impedances on the branches into a matrix according to the branch order to obtain the quadratic covariant tensor required to construct the spatial-temporal tensor analysis network of the branches. ; ; Among them, diagonal elements For the first obtained The self-impedance of the branch, Since there is no coupling effect between branches in the branch space-time tensor analysis network, all elements except the diagonal are 0. It should be noted that diagonal elements When its branch is a thermal resistance, the value is When the branch is the heat capacity value , The step size is calculated for time-domain iteration. It is the total thermal resistance of the branch after connecting the thermal units based on the thermal resistance calculated from each thermal unit in S13. This is the total heat capacity of the branch after connecting the heat units, based on the heat capacity calculated for each heat unit in S13. Figure 7 Taking node B1 as an example, the self-impedance value of the thermal resistance branch above node B1 is The impedance value of the thermal capacitance branch connecting node B1 is .

[0040] S244, based on the covariant tensor Covariant tensor Inverse tensor and the second covariant tensor Based on the computational relationships between them, the branch space-time tensor analysis network of the equivalent thermal circuit model is constructed as an analytical framework for iteratively solving the temperature field in the time domain.

[0041] Covariant tensor Covariant tensor Inverse tensor and the second covariant tensor Combining Kirchhoff's heat flux law with tensor operations, an analytical framework for iteratively solving the temperature field in the time domain can be constructed, namely the branch space-time tensor analysis network of the processed equivalent thermal circuit model. For the specific construction process, please refer to the relevant technical explanations, which will not be described here.

[0042] S3. For the obtained equivalent thermal circuit model, generate independent meshes based on the spanning tree algorithm to generate the correlation matrix, and use the branch spatial-temporal tensor analysis network to construct the mesh spatial-temporal tensor analysis network of the equivalent thermal circuit model. In a specific embodiment of the present invention, S3 includes the following steps: S31. All nodes in the node-branch three-dimensional network are uniquely numbered by layer. A graph structure is constructed with nodes as vertices and branches as edges. A direction from the high temperature end to the low temperature end is set for each branch. A three-dimensional directed unweighted graph is generated, and a node-branch association table is generated simultaneously. The node-branch association table contains the starting node, ending node and direction identifier of each branch. In generating a three-dimensional directed unweighted graph, the node numbering follows a continuous numbering rule within the layer, and the branch direction is determined by the natural conduction direction of heat flow.

[0043] S32, A spanning tree algorithm is used to generate a spanning tree of the three-dimensional topological network from the three-dimensional directed unweighted graph; wherein, the spanning tree contains the generation relationship between nodes; The three-dimensional directed unweighted graph generated in S31 is used to generate a spanning tree of the three-dimensional topological network using the spanning tree algorithm. The spanning tree contains the generation relationship between nodes, such as the parent-child node membership relationship of a node. Figure 8 5 built on the interconnect structure model 7 A schematic diagram of the spanning tree of a 3D network with 3 nodes and branches (directed spanning tree of 3D mesh), with 105 vertices and 244 edges (excluding thermal capacity branches, convection thermal resistance branches and thermal excitation source branches), 104 edges and 140 chords, corresponding to 140 independent meshes.

[0044] S33, generate independent meshes based on the spanning tree, and generate an association matrix based on the independent meshes; First, combining the spanning tree in S32, non-tree edges (chords) are extracted from the edge set of the original 3D directed unweighted graph. Then, by tracing back the parent nodes in the spanning tree, a unique directed path between the endpoints of each chord is found. Finally, the chords and their corresponding paths are combined to form directed independent meshes. That is, for each chord branch outside the spanning tree, the unique path between its two endpoints in the spanning tree is determined, and the chords and these paths are combined to form independent meshes. Simultaneously, independence is verified by checking the rank of the loop matrix, closure is verified by checking the consistency of the start and end points of the loops, and directionality is verified by confirming the continuity of the edge directions. A unique number is assigned to each independent mesh, and all independent meshes are generated by traversing all chord branches. Then, based on the consistency of the direction of the branch and the mesh, a branch-mesh correlation matrix is ​​constructed. The element of this matrix is ​​1 to indicate that the direction of the branch is consistent with the direction of the mesh, -1 to indicate that the direction is opposite, and 0 to indicate that the branch does not belong to the mesh.

[0045] S34. Based on the branch spatial-temporal tensor analysis network and the correlation matrix, construct the mesh spatial-temporal tensor analysis network of the equivalent thermal circuit model.

[0046] In a specific embodiment of the present invention, step S34 includes the following steps: S341, the covariant tensor corresponding to the branch space-time tensor analysis network. Covariant tensor Inverse tensor and the second covariant tensor The correlation matrix is ​​used to transform the network to mesh space, thereby obtaining the covariant tensor required to construct the mesh space temporal tensor analysis network. Inverse tensor and the second covariant tensor ;in: ; Among them, covariant tensor The mesh voltage source vector is used to represent the mesh temperature difference, and the covariant tensor is... middle For the first Voltage source excitation on each mesh; inverter tensor The current vector is used to represent the thermal power input in the mesh spatial-temporal tensor analysis network, and is an inverted tensor. middle For the first The current on each mesh hole , The number of meshes in a mesh space-time tensor analysis network; the second-order covariant tensor. Represents the time-domain mesh impedance matrix. Diagonal elements For the first The self-impedance of each mesh aperture The remaining elements are the mutual impedances between meshes; When transforming to mesh space using the correlation matrix, the transformation relationship between tensors is as follows: ; ; ; in, It is the incidence matrix operator The transpose of; the embodiments of the present invention use the correlation matrix operator The term "incidence matrix" is used to represent the incidence matrix, which is its mathematical form (matrix). The operator emphasizes the role of the matrix in this context, namely, its operation with other tensors.

[0047] S342, based on the covariant tensor Inverse tensor and the second covariant tensor The network of mesh space-time tensor analysis for equivalent thermal circuit model is constructed based on the computational relationships between the components, serving as an analytical framework for iteratively solving the temperature field in the time domain.

[0048] Covariant tensor of hot-circuit network mesh space Inverse tensor and the second covariant tensor Covariant tensor Inverse tensor and the second covariant tensor Combining Kirchhoff's heat flux law with tensor operations, an analytical framework for iteratively solving the temperature field in the time domain is constructed, namely, a mesh-space time-domain tensor analysis network of the equivalent thermal path. This part should be understood in conjunction with relevant technologies and will not be elaborated upon here.

[0049] S4. A time-domain thermal network equation is constructed using a mesh spatial-temporal tensor analysis network. The temperature-changing material parameters are updated iteratively in the time domain, and the transient temperature response curves of the nodes of the three-dimensional interconnected structure are calculated.

[0050] In a specific embodiment of the present invention, S4 includes the following steps: S41. Based on the covariant and contravariant tensor relationship of the mesh space-time tensor analysis network, and by introducing the Wronskian internal source vector, a time-domain thermal network equation is constructed. Then, the implicit Euler method is used for discretization to obtain the discrete time-domain thermal network equation. Since the current state of the time-domain heat network equation depends not only on the current input but also on the historical state of the equation, a Wronskian internal source vector is introduced into the equation. , representing the excitation source vector that influences the current state of the equation from the historical state, is used in S41 to discretize the time-domain equation based on the covariant and contravariant tensor relationship of the tensor analysis network. The discrete-time heat network equation is expressed as: ; in, Indicates the current time; Indicates the current time The mesh voltage source vector at that time; Represents the time-domain mesh impedance matrix; Indicates the current time The mesh current vector at that time; The introduced Wronskian internal source vector is the excitation source vector used to represent the influence of historical states on the current state in the time-domain thermal network equation; Indicates the previous moment Wronskian internal source vector at time; time , This represents the value in the initial conditions, i.e., the initial time.

[0051] S42, by introducing multiple intermediate vectors, constructs the iterative formula for the internal source vectors of Wronskian; S42 includes: S421, Introducing branch charge vector Mesh charge vector Internal components of branch capacitors Total internal source vector in branch space As an intermediate vector; set the mesh charge vector Update according to the following rules: ; Among them, the branch charge vector Mesh charge vector These represent the amount of charge flowing into the branch and the mesh, respectively; Indicates the current time The mesh charge vector at that time; Indicates the previous moment The mesh charge vector at that time; Indicates the step size of the time-domain iterative calculation; Indicates the previous moment The mesh current vector at that time; S422, the previous moment Mesh charge vector at time Mesh current vector Through the correlation matrix operator Mapped to branch charge vector Branch current vector , is represented as: ; ; S423, Calculate the intrinsic components of the branch capacitance based on the branch capacitance characteristics. for: ; This is a vector of branch capacitance values, with a size of , The number of branches in a node-branch 3D network. The value of the middle element is When the element is 0, it indicates that the branch is not a heat capacity branch. For the first Branch heat capacity; vector Let be a vector representing the heat capacity in the branch network, with a size of The element value is When an element is 1, it indicates that the branch is a heat capacity branch; when an element is 0, it indicates that the branch is not a heat capacity branch. Indicates the previous moment The internal component of the branch capacitor at that time; This indicates the calculation of the Hadamard product; Indicates the previous moment The branch charge vector at that time; S424, through the correlation matrix operator The Wronskian interior source direction mapped to the mesh space is represented as: ; Since the equivalent thermal path is an RC model, only the heat capacity branch can remember the historical state, and the internal heat capacity component... Equivalent to the total internal source vector in the branch space .

[0052] S43, set the initial conditions for iteration to calculate the initial time value of the source vector inside Wronskian, solve the discrete time domain thermal network equation through multiple rounds of iteration, update the mesh current vector and temperature-changing material parameters, obtain the transient temperature value of each node, and thus output the node transient temperature response curve of the three-dimensional interconnection structure.

[0053] The embodiments of the present invention employ the block matrix method to solve for the independent variables. and dependent variable part Known heat network equations: Solving the equation yields... All elements are known at any given time. and Vector, using this result to obtain all hot nodes of the equivalent thermal path. The temperature value at any given time is updated based on this temperature value and material properties. According to the internal source vector of Wronskian Iterative formula update Repeat this process to finally output the transient temperature response curves of the three-dimensional interconnected structure nodes.

[0054] In a specific embodiment of the present invention, S43 includes the following steps: S431, Set the initial conditions for iteration as follows: , Based on the internal source vectors of Wronskian The iterative formula is used to calculate the internal source vector of Wronskian. initial time value ; S432 uses the block matrix method to solve the corresponding discrete-time thermal network equations to obtain the equivalent thermal path and thermal nodes. The temperature value at any given time is determined based on the equivalent thermal path hot nodes. Update the time-domain mesh aperture impedance matrix based on temperature values ​​and material properties at each moment. And based on the internal source vectors of Wronskian Iterative formula update This process is repeated continuously, ultimately outputting the transient temperature response curves of the nodes in the three-dimensional interconnect structure.

[0055] In a specific embodiment of the present invention, the process of solving the corresponding discrete-time heat network equation using the block matrix method in S432 includes the following steps: S4321, Extract Mesh Current Vector Mesh index of known current and mesh voltage source vector Given the known voltage source mesh index, based on the known current mesh index and the known voltage source mesh index, determine the unknown current mesh index and the unknown voltage source mesh index, and then vectorize the mesh current vector. Mesh voltage source vector The elements are reordered to complete the partitioning of the index; For ease of understanding, an example of S432 is provided below: Assuming the number of mesh openings... =6, and Mesh current is known ( =2,4 (This indicates the mesh index, i.e., which mesh number), while the currents of the remaining meshes are unknown. The mesh voltage source is known ( =2,4), the voltage sources for the remaining meshes are unknown.

[0056] Specifically, the mesh current vector Mesh voltage source vector Reordering the elements in the middle is: Will Rearranged as ; Will Rearranged as ; S4321 is a column vector of normalized input known current values ​​and known voltage source values. The known current index and known voltage source index are extracted, and the unknown current index and unknown voltage index are determined based on the known current index and known voltage source index, thus completing the partitioning of the solution index. make , , , . It is a known current vector composed of known current values. It is an unknown current vector composed of unknown current values. It is a known voltage source vector composed of known voltage source values. It is an unknown voltage source vector composed of unknown voltage source values.

[0057] S4322, based on the index partitioning results of S4321, divides the time-domain mesh impedance matrix. After rearrangement, the blocks are divided into four parts, the first being the unknown voltage row located in the upper left corner. Given the submatrix of the current column Unknown voltage row located in the upper right corner Submatrix of unknown current column The known voltage row located in the lower left corner Given the submatrix of the current column The known voltage row located in the lower right corner Submatrix of unknown current column At the same time, the source vectors inside Wronskian are... Correspondingly, it is divided into internal components of unknown voltage terminals. and known voltage terminal internal components ; in, Represents matrix multiplication; Specifically, based on the above indexing results, the time-domain mesh impedance matrix is... , Rearranged as ; Divide it into blocks, unknown voltage row Given current sequence (top left corner 2) Submatrix of size 2 Unknown voltage line Unknown current column (top right corner 2) 4-submatrix Given voltage line Given current sequence (bottom left 4) Submatrix of size 2 Given voltage line Unknown current column (bottom right 4) 4-submatrix At the same time, the source vectors inside Wronskian are... Correspondingly, it is divided into internal components of unknown voltage terminals. (Right now ) and known voltage terminal internal source components (Right now ); S4323, calculate the product term of the known current vector and its corresponding submatrix. If the known current vector is empty, set the product term to zero. Combine this with the known voltage source vector and the known voltage terminal internal source components. Construct the right-hand vector for solving the unknown current, expressed as: ; in, This represents the right-hand vector from which the unknown current needs to be solved; Represents a known voltage source vector; Represents a known current vector; S4324, based on submatrix With the right-hand vector The unknown current vector is obtained by solving the matrix. If there is no non-unknown current, then set it to empty; S4325 calculates the product terms of the known current vector, the unknown current vector, and the corresponding submatrix. If the corresponding current vector is empty, the product term is set to zero. The unknown voltage source vector is then obtained by solving the problem using a preset formula. If there is no non-unknown voltage, then leave it blank; the preset formula is: ; S4326, assemble the known current and unknown current into a complete current vector according to each index. Assemble known voltage sources and unknown voltage sources into a complete voltage source vector. Complete the solution of the single-stage heat network equation.

[0058] It is understandable that S4 can obtain the temperature of all nodes at all times through iterative calculation, and the curve obtained by plotting the node temperature change over time is the transient temperature response curve of the node in the three-dimensional interconnection structure.

[0059] This invention primarily addresses the problem of low efficiency in existing three-dimensional interconnected electrothermal transient temperature simulations. Compared with existing technologies, this invention has the following advantages: First, by using an equivalent circuit model to model the thermal path of the interconnect structure and solve for the temperature response, this invention improves the speed of temperature response calculation, reduces resource consumption, and lowers the performance requirements of computing devices. Second, when generating a three-dimensional directed unweighted graph, the present invention adopts a continuous numbering rule within the layer, the branch direction is determined by the natural conduction direction of heat flow, and the node-branch association table contains the starting node, ending node and direction identifier of each branch, which reduces the complexity of model construction and saves the time cost of model construction. Third, this invention realizes the transformation of tensor analysis networks from branch space to mesh space based on the spanning tree algorithm, saving the time cost of transformation from branch space to mesh space and reducing the model complexity when applying tensor analysis network methods. Fourth, this invention uses the block matrix method to solve the thermal network equations where the independent and dependent variables are partially known, which improves the thermal coupling and parallel computing capabilities between multi-excitation and complex interconnected structures. Fifth, the present invention adopts a time-domain iterative tensor analysis network solution, which can update the temperature-changing material parameters in each iteration, thereby improving the accuracy of temperature response calculation.

[0060] The effectiveness of the method of the present invention can be further illustrated by the following simulation results.

[0061] Simulation conditions: The simulation equipment uses an Intel(R) Xeon(R) Gold 6130 CPU @ 2.10GHz processor and 256GB of memory. Figure 2 and Figure 3 The GSG TSV-RDL three-dimensional interconnect structure shown employs constant thermal power injection (G TSV injected thermal power is 3mW, G RDL injected thermal power is 4mW, S TSV injected thermal power is 6mW, and S RDL injected thermal power is 8mW); the lower boundary of the model is a convection boundary condition, and the convection coefficient is... The remaining boundaries are adiabatic boundaries.

[0062] Simulation results: Under the above simulation conditions, the parallel calculation of the transient temperature of the double-layer interconnect structure under multiple excitations was performed using the present invention and existing thermal field calculation methods. The simulation results of the transient temperature of all thermal nodes were obtained, as shown in the figure. The time consumption of the parallel simulation calculation is compared in Table 2. Table 2 Comparison of parallel computing time between the present invention and existing technologies

[0063] from Figure 9 (Representing transient temperature rise at different locations) and Figure 10 It can be seen that the maximum error between the present invention and the prior art in the transient temperature results at different nodes is 0.5K; however, as shown in Table 2, the parallel computation time of the prior art is 194 seconds, while the total parallel computation time of the present invention is only 1 second, indicating that the method of the present invention saves 99% of the computation time compared with the prior art while maintaining comparable accuracy; from Figure 11 and Figure 12 It is evident that this invention supports transient temperature calculations for models with different boundary conditions and structural parameters.

[0064] Figure 9 middle, This indicates the temperature at the center of the signal redistribution layer. This indicates the temperature at the center of the grounding redistribution layer. This indicates the temperature at the center of the signal through-silicon via. This indicates the temperature of the signal via relative to the center of the intermediate silicon substrate; COMSOOL indicates prior art. Figure 10 middle, This indicates the temperature error at the center of the signal redistribution layer. This indicates the temperature error at the center of the grounding redistribution layer. This indicates the temperature error at the center of the signal through-silicon via. This indicates the temperature error of the signal through-silicon via relative to the center of the intermediate silicon substrate.

[0065] This invention combines the spanning tree algorithm with tensor analysis networks to achieve rapid and accurate modeling of three-dimensional thermal topology, significantly improving the calculation efficiency and accuracy of transient temperatures in complex interconnect structures. It can be widely applied to thermal analysis and design of integrated circuit interconnects and package interconnects.

[0066] It should be noted that, in the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0067] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A method for solving transient temperature in tensor analysis networks with three-dimensional interconnected structures, characterized in that, include: S1, Based on the layout, vertical structure and heat source distribution of the three-dimensional interconnect structure, thermal units are divided and corresponding equivalent thermal paths are constructed; wherein, the three-dimensional interconnect structure includes a GSG TSV-RDL-TSV interconnect structure; S2, connect the equivalent thermal paths of each thermal unit, and add excitation source branches and thermal boundary conditions to obtain the equivalent thermal path model of a complex interconnected structure with multiple units and multiple excitations, and construct the branch space-time tensor analysis network of the equivalent thermal path model. S3. For the obtained equivalent thermal circuit model, generate independent meshes based on the spanning tree algorithm to generate the correlation matrix, and use the branch spatial-temporal tensor analysis network to construct the mesh spatial-temporal tensor analysis network of the equivalent thermal circuit model. S4. A time-domain thermal network equation is constructed using a mesh spatial-temporal tensor analysis network. The temperature-changing material parameters are updated iteratively in the time domain, and the transient temperature response curves of the nodes of the three-dimensional interconnected structure are calculated.

2. The method according to claim 1, characterized in that, S1 includes: S11, the layout of the interconnect structure is divided into different components according to type and size; S12, the longitudinal structure of each component is divided into thermal units according to the distribution of heat sources; S13, construct the equivalent thermal path for each thermal unit divided by each component.

3. The method according to claim 2, characterized in that, S2 includes: S21, connect the equivalent thermal paths of each thermal unit under each component according to the positional relationship in the physical model to obtain the equivalent thermal path of the corresponding component; S22, connect the equivalent thermal paths of each component according to the positional relationship between the components to form the equivalent thermal path of the interconnection structure as a whole; S23, add a grounded current source as an excitation source to the conductor node in the equivalent thermal circuit of the interconnect structure as a representation of the conductor's thermal power to obtain the equivalent thermal circuit model of the interconnect structure, and add thermal boundary conditions to the equivalent thermal circuit model of the interconnect structure to obtain the processed equivalent thermal circuit model. S24. Abstract the node-branch three-dimensional network of the equivalent thermal circuit from the processed equivalent thermal circuit model, thereby constructing the branch space-time tensor analysis network of the processed equivalent thermal circuit model.

4. The method according to claim 3, characterized in that, S24 includes: S241, for the processed equivalent thermal path model, all thermal nodes are marked with a three-dimensional index, and node pairs with heat conduction or heat capacity relationship are connected by line segments as branches, so as to simplify the processed equivalent thermal path model into the connection of nodes and line segments, and construct a node-branch three-dimensional network that intuitively shows the heat flow path and network connection relationship. S242, using the branches in the node-branch three-dimensional network as basic units, the branch voltages and currents are respectively composed into tensors according to the branch sequence to obtain the covariant tensors required to construct the branch space-time domain tensor analysis network for the processed equivalent thermal circuit model. Covariant tensor Inverse tensor ; ； Among them, the inverse tensor Branch current vector, inverter tensor middle Indicates the first Current in a branch; covariant tensor For branch voltage vectors, in the covariant tensor Indicates the first Voltage on a branch; covariant tensor For branch voltage source vectors, covariant tensors middle Indicates the first Voltage source on the branch; , The number of branches in a node-branch 3D network; S243, arrange the impedances on the branches into a matrix according to the branch order to obtain the quadratic covariant tensor required to construct the spatial-temporal tensor analysis network of the branches. ; ； Among them, diagonal elements For the first obtained The self-impedance of the branch, Since there is no coupling effect between branches in the branch space-time tensor analysis network, all elements except the diagonal are 0. S244, based on the covariant tensor Covariant tensor Inverse tensor and the second covariant tensor Based on the computational relationships between them, the branch space-time tensor analysis network of the equivalent thermal circuit model is constructed as an analytical framework for iteratively solving the temperature field in the time domain.

5. The method according to claim 4, characterized in that, S3 includes: S31. All nodes in the node-branch three-dimensional network are uniquely numbered by layer. A graph structure is constructed with nodes as vertices and branches as edges. A direction from the high temperature end to the low temperature end is set for each branch. A three-dimensional directed unweighted graph is generated, and a node-branch association table is generated simultaneously. The node-branch association table contains the starting node, ending node and direction identifier of each branch. S32, A spanning tree algorithm is used to generate a spanning tree of the three-dimensional topological network from the three-dimensional directed unweighted graph; wherein, the spanning tree contains the generation relationship between nodes; S33, generate independent meshes based on the spanning tree, and generate an association matrix based on the independent meshes; S34. Based on the branch spatial-temporal tensor analysis network and the correlation matrix, construct the mesh spatial-temporal tensor analysis network of the equivalent thermal circuit model.

6. The method according to claim 5, characterized in that, S34 includes: S341, the covariant tensor corresponding to the branch space-time tensor analysis network. Covariant tensor Inverse tensor and the second covariant tensor The correlation matrix is ​​then used to transform the network to mesh space, yielding the covariant tensor required for constructing a mesh space temporal tensor analysis network. Inverse tensor and the second covariant tensor ;in: ； Among them, covariant tensor The mesh voltage source vector is used to represent the mesh temperature difference, and the covariant tensor is... middle For the first Voltage source excitation on each mesh; inverter tensor The current vector is used to represent the thermal power input in the mesh spatial-temporal tensor analysis network, and is an inverted tensor. middle For the first The current on each mesh hole , The number of meshes in a mesh space-time tensor analysis network; the second-order covariant tensor. Represents the time-domain mesh impedance matrix. Diagonal elements For the first The self-impedance of each mesh aperture The remaining elements are the mutual impedances between meshes; When transforming to mesh space using the correlation matrix, the transformation relationship between tensors is as follows: ； ； ； in, It is the incidence matrix operator transpose; S342, based on the covariant tensor Inverse tensor and the second covariant tensor The network of mesh space-time tensor analysis for equivalent thermal circuit model is constructed based on the computational relationships between the components, serving as an analytical framework for iteratively solving the temperature field in the time domain.

7. The method according to claim 6, characterized in that, S4 includes: S41. Based on the covariant and contravariant tensor relationship of the mesh space-time tensor analysis network, and by introducing the Wronskian internal source vector, a time-domain thermal network equation is constructed. Then, the implicit Euler method is used for discretization to obtain the discrete time-domain thermal network equation. S42, by introducing multiple intermediate vectors, constructs the iterative formula for the internal source vectors of Wronskian; S43, set the initial conditions for iteration to calculate the initial time value of the source vector inside Wronskian, solve the discrete time domain thermal network equation through multiple rounds of iteration, update the mesh current vector and temperature-changing material parameters, obtain the transient temperature value of each node, and thus output the node transient temperature response curve of the three-dimensional interconnection structure.

8. The method according to claim 7, characterized in that, In S41, the discrete-time heat network equation is expressed as: ； in, Indicates the current moment; Indicates the current time The mesh voltage source vector at that time; Represents the time-domain mesh impedance matrix; Indicates the current time The mesh current vector at that time; The introduced Wronskian internal source vector is the excitation source vector used to represent the influence of historical states on the current state in the time-domain thermal network equation; Indicates the previous moment Wronskian internal source vector at time; S42 includes: S421, Introducing branch charge vector Mesh charge vector Internal components of branch capacitors Total internal source vector in branch space As an intermediate vector; set the mesh charge vector Update according to the following rules: ； in, Indicates the current time The mesh charge vector at that time; Indicates the previous moment The mesh charge vector at that time; This represents the step size of the time-domain iterative calculation; Indicates the previous moment The mesh current vector at that time; S422, the previous moment Mesh charge vector at time Mesh current vector Through the correlation matrix operator Mapped to branch charge vector Branch current vector , represented as: ； ； S423, Calculate the intrinsic components of the branch capacitance based on the branch capacitance characteristics. for: ； This is a vector of branch capacitance values, with a size of , The number of branches in a node-branch 3D network. The value of the middle element is When the element is 0, it indicates that the branch is not a heat capacity branch. For the first Branch heat capacity; vector Let be a vector representing the heat capacity in the branch network, with a size of The element value is When an element is 1, it indicates that the branch is a heat capacity branch; when an element is 0, it indicates that the branch is not a heat capacity branch. Indicates the previous moment The intrinsic component of the branch capacitor at that time; This indicates the calculation of the Hadamard product; Indicates the previous moment The branch charge vector at that time; S424, through the correlation matrix operator Mapped to Wronskian interior source vectors in mesh space , represented as: ； Since the equivalent thermal path is an RC model, only the heat capacity branch can remember the historical state, and the internal heat capacity component... Equivalent to the total internal source vector in the branch space .

9. The method according to claim 8, characterized in that, S43 includes: S431, Set the initial conditions for iteration as follows: , Based on the internal source vectors of Wronskian The iterative formula is used to calculate the internal source vector of Wronskian. initial time value ; S432 uses the block matrix method to solve the corresponding discrete-time thermal network equations to obtain the equivalent thermal path and thermal nodes. The temperature value at any given time is determined based on the equivalent thermal path hot nodes. Update the time-domain mesh aperture impedance matrix based on temperature values ​​and material properties at each moment. And based on the internal source vectors of Wronskian Iterative formula update This process is repeated continuously, ultimately outputting the transient temperature response curves of the nodes in the three-dimensional interconnect structure.

10. The method according to claim 9, characterized in that, The process of solving the corresponding discrete-time heat network equations using the block matrix method in S432 includes: S4321, Extract Mesh Current Vector Mesh index of known current and mesh voltage source vector Given the known voltage source mesh index, based on the known current mesh index and the known voltage source mesh index, determine the unknown current mesh index and the unknown voltage source mesh index, and then vectorize the mesh current vector. Mesh voltage source vector The elements are reordered to complete the partitioning of the index; S4322, based on the index partitioning results of S4321, divides the time-domain mesh impedance matrix. After rearrangement, the blocks are divided into four parts, the first being the unknown voltage row located in the upper left corner. Given the submatrix of the current column Unknown voltage row located in the upper right corner Submatrix of unknown current column The known voltage row located in the lower left corner Given the submatrix of the current column The known voltage row located in the lower right corner Submatrix of unknown current column At the same time, the source vectors inside Wronskian are... Correspondingly, it is divided into internal components of unknown voltage terminals. and known voltage terminal internal components ;in, Represents matrix multiplication; S4323, calculate the product term of the known current vector and its corresponding submatrix. If the known current vector is empty, set the product term to zero. Combine this with the known voltage source vector and the known voltage terminal internal source components. Construct the right-hand vector for solving the unknown current, expressed as: ； in, This represents the right-hand vector from which the unknown current needs to be solved; Represents a known voltage source vector; Represents a known current vector; S4324, based on submatrix With the right-hand vector The unknown current vector is obtained by solving the matrix. If there is no non-unknown current, then set it to empty; S4325 calculates the product terms of the known current vector, the unknown current vector, and the corresponding submatrix. If the corresponding current vector is empty, the product term is set to zero. The unknown voltage source vector is then obtained by solving the problem using a preset formula. If there is no non-unknown voltage, then leave it blank; the preset formula is: ； S4326, assemble the known current and unknown current into a complete current vector according to each index. Assemble known voltage sources and unknown voltage sources into a complete voltage source vector. Complete the solution of the single-stage heat network equation.

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