限幅缓冲驱动电路、通信接口信号接收电路及存储系统

By introducing a transmission gate control circuit into the limiting buffer drive circuit, the problem of the output voltage of the resistor output isolation structure recovering to a high voltage in the off state is solved, which improves the circuit stability and the reliability of the LVT MOS transistor, and realizes effective control of the output node voltage.

CN122224245BActive Publication Date: 2026-07-17KINGTIGER TESTING TECH (SZ) LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
KINGTIGER TESTING TECH (SZ) LTD
Filing Date
2026-05-14
Publication Date
2026-07-17

AI Technical Summary

Technical Problem

The existing resistor output isolation structure may cause the output voltage to recover to a high voltage level when the circuit is off, which leads to a decrease in the reliability of low threshold voltage MOSFETs (LVT MOSFETs).

Method used

A transmission gate control circuit is introduced into the limiting buffer drive circuit, which enables the output node to be connected or isolated from the subsequent logic circuit according to the working state. Through the linkage control of the transmission gate and the differential circuit, the output node is prevented from returning to a high voltage level or from becoming floating under abnormal conditions.

Benefits of technology

This improves circuit stability, reduces the risk of high-voltage signals impacting LVT MOSFETs, ensures the reliability of subsequent logic circuits, and achieves effective control of output node voltage without affecting the high-speed signal transmission capability of differential circuits.

✦ Generated by Eureka AI based on patent content.

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Abstract

本发明公开一种限幅缓冲驱动电路、通信接口信号接收电路及存储系统,该限幅缓冲驱动电路包括:高压域接入端;限幅负载;差分电路,差分电路的两个差分信号输出端分别与限幅负载的另一端连接,差分电路的两个输入端分别用于接入输入信号和参考信号,差分电路的接地端通过电流源接地;差分电路用于将限幅电压转换为差分输出信号;传输门控制电路,其两个输入端分别与差分电路的两个差分信号输出端一一对应连接,传输门控制电路的两个输出端用于接入后级逻辑电路。本发明解决了现有电阻输出隔离结构在关断状态下输出电压可能恢复至高电压电平,从而导致LVT MOS管可靠性下降的问题。
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