Ads-b receiver system based on software radio componentization design

Abstract

The application relates to the technical field of communication, and provides an ADS-B receiver system based on software radio component design, which is built by adopting a general software radio architecture, combining programmable radio frequency hardware and a matching drive and the like to build a sensing-decision-execution adaptive receiver system, reversely controlling the working parameters of each unit and even SDR hardware according to real-time monitored signal quality and spectrum environment indexes, such as improving a signal-to-noise ratio, adaptively adjusting a gain and a decision threshold and the like, which is helpful to more accurately restore an original signal and reduce a bit error rate, so that the receiving parameters can be dynamically adjusted, the anti-interference capability is enhanced, the receiving performance is stabilized, and the defects of performance rigidity and poor environmental adaptability of a traditional solidified receiver are fundamentally solved.

Description

Technical Field

[0001] This invention belongs to the field of communication technology and relates to an ADS-B receiver system based on software radio modular design. Background Technology

[0002] Traditional ADS-B receivers typically use FPGAs or application-specific integrated circuits (ASICs) as their core processing solution. Their sampling rate is fixed. When using FPGAs, the functionality is fixed, and updates require reprogramming, resulting in long development cycles. ADS-B receivers based on FPGAs or ASICs are susceptible to multipath interference in low signal-to-noise ratio (SNR) or poor signal quality environments. The fixed receiving parameters are difficult to adapt to various scenarios, leading to signal distortion and decoding failures. Furthermore, traditional FPGA- or ASIC-based ADS-B receiver systems cannot dynamically adjust receiving parameters, have limited anti-interference capabilities, and exhibit unstable receiving performance. Summary of the Invention

[0003] To address the problems existing in the above-mentioned traditional methods, this invention proposes an ADS-B receiver system based on software radio modular design. It can be applied to hardware platforms that conform to standardized software radio architecture, and can dynamically adjust reception parameters, enhance anti-interference capabilities, and stabilize reception performance.

[0004] To achieve the above objectives, the embodiments of the present invention adopt the following technical solutions: On the one hand, an ADS-B receiver system based on software radio modular design is provided, including an FPGA and a CPU. The FPGA is configured with a radio frequency front-end unit and a sampling unit using a general software radio architecture. The CPU is configured with an SDR signal processing unit and a data processing unit. The output of the radio frequency front-end unit is connected to the input of the sampling unit. The output of the sampling unit is connected to the input of the SDR signal processing unit. The output of the SDR signal processing unit is connected to the input of the data processing unit. The output of the data processing unit is fed back to the control terminals of the radio frequency front-end unit, the sampling unit and the SDR signal processing unit respectively. The radio frequency front-end unit is used to receive radio frequency signals from air targets, amplify and filter the radio frequency signals, and convert them into baseband signals. The sampling unit is used to convert the baseband signals output by the radio frequency front-end unit into discrete digital signals through ADC sampling. The SDR signal processing unit is used to accurately find and interpret the structured data stream carrying the state information of the air targets from the digital signals output by the sampling unit. The data processing unit is used to perform data fusion, trajectory tracking, performance monitoring, feedback control, and data distribution based on the structured data stream.

[0005] In one embodiment, the radio frequency front-end unit includes an antenna assembly, a low-noise amplifier assembly, a tunable filter assembly, a down-conversion assembly, a bandpass filter assembly, and a variable gain amplifier assembly connected in sequence. The antenna assembly is used to receive radio frequency signals from air targets. The low-noise amplifier assembly is used to initially amplify the radio frequency signals. The tunable filter assembly is used to initially filter the initially amplified radio frequency signals. The down-conversion assembly is used to shift the high-frequency analog signal obtained after the initial filtering to the baseband through mixing. The bandpass filter assembly is used to restore the signal shifted to the baseband into a clean baseband signal that can be processed by the digital chip. The variable gain amplifier assembly is used to amplify the baseband signal again.

[0006] In one embodiment, the SDR signal processing unit includes a timing synchronization component, a threshold detection component, a PPM demodulation component, a frame synchronization component, a CRC check component, and a decoder component. The timing synchronization component is used to resample or adjust the phase of the sampling points in the sampling unit; the threshold detection component is used to detect the pulse marker signal corresponding to the aerial target from the continuous noise background; the PPM demodulation component is used to receive the pulse marker signal and convert the pulse position information into binary bit stream information; the frame synchronization component is used to continuously scan the binary bit stream information and match it with the known synchronization header. If the bit stream information matches the synchronization header successfully, it accurately locks the start position of a frame of data and outputs a frame-aligned bit stream signal with a fixed length. The CRC check component is used to perform cyclic redundancy check on the bit stream signal of a complete frame after frame synchronization. The decoder component is used to parse the bit stream signal of a frame that has been successfully checked by the CRC check component and output a structured data stream carrying the status information of the air target.

[0007] In one embodiment, during cyclic redundancy check, if the check is successful, the bitstream signal of the current frame is retained and output; if the check fails, the bitstream signal of the current frame is discarded directly.

[0008] In one embodiment, the sensing metrics in the adaptive sensing table of the ADS-B receiver system include: signal-to-noise ratio, received signal strength indication, ADC overflow, bit error rate, frame synchronization success rate, message decoding success rate, CRC check failure rate, spectral shape, energy surge at a specific frequency point, pulse waveform broadening, trailing, and ghosting pulses.

[0009] In one embodiment, the decisions in the adaptive decision table of the ADS-B receiver system include: Dynamically adjust the gain, optimize the signal dynamic range, and dynamically adjust the sampling rate; Adjust the sensitivity of the demodulation algorithm; Enable or adjust the filtering strategy to suppress interference; Adjust the timed synchronization.

[0010] In one embodiment, the decision execution in the adaptive execution table of the ADS-B receiver system includes: If the signal-to-noise ratio is low and the ADC is not saturated, increase the SDR gain or increase the sampling rate; Lower the threshold voltage of the PPM demodulation component or switch the pulse shaping filter; Narrowband interference is detected, and the notch of the digital filter is adaptively adjusted to align with the interference frequency. Enable the anti-multipath synchronization algorithm.

[0011] In one embodiment, the closed-loop mechanism of the PPM demodulation component in the SDR signal processing unit includes the following steps: The amplitude or power of the raw sampling data transmitted from the sampling unit is calculated in real time using a sliding time window; The instantaneous threshold value is calculated based on the average value and standard deviation of the data within the time window obtained in real time. The calculated instantaneous threshold value is directly fed into the pulse decision comparator in the PPM demodulation component; if the amplitude or power of the original sampled data exceeds the instantaneous threshold value, it is determined that a pulse leading edge has been detected.

[0012] In one embodiment, the closed-loop mechanism of the timing synchronization component in the SDR signal processing unit includes the following steps: Cross-correlation processing is performed between the baseband signal received from the radio frequency front-end unit and the preamble sequence; The actual sampling position of the relevant peak in the current frame is compared with the ideal peak position predicted by the preamble structure during frame synchronization to estimate the symbol timing error of the received signal. The estimated symbol timing error is fed back to the digital interpolator or phase adjuster of the SDR signal processing unit, which then performs real-time phase correction on the subsequent baseband sampling data based on the symbol timing error.

[0013] In one embodiment, the aerial target is a manned or unmanned aircraft.

[0014] One of the above technical solutions has the following advantages and beneficial effects: The aforementioned ADS-B receiver system based on software-defined radio modular design employs a general software-defined radio architecture, combined with programmable RF hardware and its supporting drivers to build a sensing-decision-execution adaptive receiver system. It reverse-controls the operating parameters of each unit and even the SDR hardware based on real-time monitored signal quality and spectral environment indicators. This includes improving the signal-to-noise ratio, adaptively adjusting gain and decision thresholds, etc., which helps to more accurately recover the original signal, reduce the bit error rate, and thus dynamically adjust the receiving parameters, enhance anti-interference capabilities, and stabilize receiving performance. This fundamentally solves the shortcomings of traditional fixed receivers, such as rigid performance and poor environmental adaptability. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 A schematic diagram of an ADS-B receiver system based on software radio modular design; Figure 2 This is a schematic diagram illustrating the operational relationships of an ADS-B receiver system based on software radio modular design in one embodiment. Figure 3 This is a schematic diagram of the closed-loop mechanism of the PPM demodulation component in one embodiment; Figure 4 This is a schematic diagram of the closed-loop mechanism of the timing synchronization component in one embodiment; Figure 5 This is a schematic diagram of the system-level closed loop for one embodiment of the aircraft distance, where (a) is the system-level closed loop for a long-distance aircraft scenario and (b) is the system-level closed loop for a short-distance aircraft scenario. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention.

[0018] It should be noted that, in this document, the reference to "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The presentation of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will understand that the embodiments described herein can be combined with other embodiments. The term "and / or" as used herein refers to any combination of one or more of the associated listed items, and all possible combinations, including such combinations.

[0019] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0020] With the maturity and widespread adoption of Software-Defined Radio (SDR) technology, more flexible and intelligent receiving solutions have become possible. SDR shifts the core of signal processing from dedicated hardware to software on a general-purpose processor, implementing various radio functions through software algorithms. This provides an ideal path to overcome the inherent shortcomings of traditional FPGA-based or application-specific integrated circuit-based solutions.

[0021] In one embodiment, this embodiment adopts a general software-defined radio architecture, programmable radio frequency hardware and its supporting drivers, such as... Figure 1 As shown, an ADS-B receiver system based on software radio modular design is constructed, including an FPGA and a CPU. The FPGA adopts a general software radio architecture and is configured with an RF front-end unit and a sampling unit. The CPU is configured with an SDR signal processing unit and a data processing unit. The output of the RF front-end unit is connected to the input of the sampling unit, the output of the sampling unit is connected to the input of the SDR signal processing unit, the output of the SDR signal processing unit is connected to the input of the data processing unit, and the output of the data processing unit is fed back to the control terminals of the RF front-end unit, the sampling unit, and the SDR signal processing unit, respectively.

[0022] The radio frequency front-end unit is used to receive radio frequency signals from air targets, amplify and filter the radio frequency signals, and convert them into baseband signals. The sampling unit is used to convert the baseband signals output by the radio frequency front-end unit into discrete digital signals through ADC sampling. The SDR signal processing unit is used to accurately find and interpret the structured data stream carrying the state information of the air targets from the digital signals output by the sampling unit. The data processing unit is used to perform data fusion, trajectory tracking, performance monitoring, feedback control, and data distribution based on the structured data stream.

[0023] Understandable, such as Figure 1 and Figure 2As shown, the system can be divided into two general-purpose hardware parts: a CPU and an FPGA. The FPGA part includes a radio frequency (RF) front-end unit and a sampling unit deployed on a general-purpose processor using a general-purpose software radio architecture. The CPU part includes an SDR signal processing unit and a data processing unit. The RF front-end unit receives air signals, the sampling unit converts the analog signals output by the RF front-end unit into discrete digital signals, and the SDR signal processing unit accurately identifies the target signal corresponding to the air target from the digital signals output by the sampling unit and interprets the ADS-B telegram. Simultaneously, it senses signal quality and spectral environment indicators to prepare for the data processing unit to make corresponding decisions. The data processing unit converts the decoded ADS-B telegram data into valid information output, performs data fusion, trajectory tracking, performance monitoring, feedback control, and data distribution. The data processing unit can feed back information (such as deciding to execute corresponding instructions) to the RF front-end unit, the sampling unit, and the SDR signal processing unit.

[0024] The aforementioned ADS-B receiver system based on software-defined radio modular design employs a general software-defined radio architecture, combined with programmable RF hardware and its supporting drivers to build a sensing-decision-execution adaptive receiver system. It reverse-controls the operating parameters of each unit and even the SDR hardware based on real-time monitored signal quality and spectral environment indicators. This includes improving the signal-to-noise ratio, adaptively adjusting gain and decision thresholds, etc., which helps to more accurately recover the original signal, reduce the bit error rate, and thus dynamically adjust the receiving parameters, enhance anti-interference capabilities, and stabilize receiving performance. This fundamentally solves the shortcomings of traditional fixed receivers, such as rigid performance and poor environmental adaptability.

[0025] In one embodiment, the radio frequency (RF) front-end unit includes an antenna assembly, a low-noise amplifier assembly, a tunable filter assembly, a down-conversion assembly, a bandpass filter assembly, and a variable gain amplifier assembly connected in sequence. The antenna assembly is used to receive RF signals from an airborne target. The low-noise amplifier assembly is used to initially amplify the RF signals. The tunable filter assembly is used to initially filter the initially amplified RF signals. The down-conversion assembly is used to shift the high-frequency analog signal obtained after the initial filtering to the baseband via mixing. The bandpass filter assembly is used to restore the signal shifted to the baseband to a clean baseband signal that can be processed by a digital chip. The variable gain amplifier assembly is used to amplify the baseband signal again.

[0026] It is understood that the radio frequency front-end unit is used to physically interact with the radio frequency signals of air targets. Its functional components configured using a general software-defined radio architecture mainly include antenna components, low noise amplifier (LNA) components, tunable filter components, down-conversion components, bandpass filter components, and variable gain amplifier components. The basic functions of these components can be understood by referring to the basic functions of the corresponding hardware units inherent in the radio frequency front-end in this field. In this embodiment, these functional components are configured using a general software-defined radio architecture. Other functional components configured using a general software-defined radio architecture in other embodiments are configured similarly.

[0027] In this embodiment, the RF front-end unit can control the center frequency or bandwidth of the tunable filter component (equivalent to a filter with dynamically adjustable parameters) or dynamically adjust the gain of the low-noise amplifier component via software to cope with input signals of different strengths. The extremely weak and noisy RF signal received by the RF front-end unit through the antenna component is then sent to the low-noise amplifier component for initial amplification. The RF signal after initial amplification enters the tunable filter component for initial filtering to obtain a relatively clean high-frequency analog signal. The down-conversion component shifts the high-frequency analog signal to the baseband through mixing, and then the bandpass filter component restores it to a clean baseband signal that can be processed by the digital chip (i.e., the chip / component that processes digital signals). The variable gain amplifier component amplifies the baseband signal again, and its gain can be controlled and adjusted to ensure that the signal input to the subsequent sampling unit is stable within the optimal range.

[0028] Furthermore, the sampling unit is used to convert analog signals into discrete digital signals. The core components of the sampling unit include the ADC (Analog-to-Digital Converter) and its commonly used driver. The performance of the ADC (such as sampling rate, dynamic range, and bit width) is crucial. Although the ADC samples at an inherently high rate, it can perform common signal processing operations such as digital mixing, filtering, and decimation in real time in the FPGA, which is equivalent to outputting a digital signal stream with a variable center frequency, variable bandwidth, and variable output rate.

[0029] In one embodiment, the SDR signal processing unit includes a timing synchronization component, a threshold detection component, a PPM demodulation component, a frame synchronization component, a CRC check component, and a decoder component. The timing synchronization component resamples or adjusts the phase of the sampling points in the sampling unit. The threshold detection component detects the pulse marker signal corresponding to an airborne target from a continuous noise background. The PPM demodulation component receives the pulse marker signal and converts the pulse position information into binary bitstream information. The frame synchronization component continuously scans the binary bitstream information and matches it with a known synchronization header. If a bitstream information matches the synchronization header successfully, it precisely locks the start position of a frame of data and outputs a frame-aligned bitstream signal of fixed length. The CRC check component performs cyclic redundancy check on the bitstream signal of a complete frame after frame synchronization. The decoder component parses the bitstream signal of a frame that has been successfully checked by the CRC check component and outputs a structured data stream carrying the status information of the airborne target.

[0030] It can be understood that the SDR signal processing unit is used to accurately locate and interpret the ADS-B telegram corresponding to an airborne target from digital signals, such as message data carrying status information like ADS-B location, identity, altitude, and speed. Specifically, the SDR signal processing unit includes a timing synchronization component, a threshold detection component, a PPM (Pulse Phase Modulation) demodulation component, a frame synchronization component, a CRC check component, and a decoder component. The SDR signal processing unit can automatically adjust the threshold detection, estimate the noise level in real time, and dynamically adjust the pulse detection threshold, etc.

[0031] In the SDR signal processing unit, the timing synchronization component is used to resample or adjust the phase of the sampling points in the sampling unit. The threshold detection component is used to detect the target pulse corresponding to the airborne target from a continuous noise background, called the pulse marker signal. The PPM demodulation component receives the pulse marker signal from the threshold detection component and converts the pulse position information into binary bit stream information. The frame synchronization component continuously scans the binary bit stream information and matches it with a known synchronization header. If the bit stream information matches the synchronization header successfully, it accurately locks the start position of a frame of data and outputs a frame-aligned bit stream signal with a fixed length. The CRC check component performs cyclic redundancy check on the bit stream signal of a complete frame after frame synchronization. If the check is successful, it indicates that the message has no errors in transmission, and the current frame's bit stream signal is retained and output. Furthermore, if the check fails, it indicates that the message has errors in transmission, and the current frame's bit stream signal can be directly discarded. The decoder component parses the frame's bit stream signal that has been successfully checked by the CRC check component and outputs a structured data stream carrying the airborne target's status information.

[0032] The data processing unit converts the decoded structured data stream into valid information. Its core functions include data fusion, trajectory tracking, performance monitoring, feedback control, and data distribution. Data fusion and trajectory tracking are based on the principle that the trajectory of an aerial target is a straight line with a constant speed within a short timeframe (e.g., but not limited to 1 second, 3 seconds, or 5 seconds). Using methods such as Kalman filtering, the Kalman filter can rely entirely on its internally loaded motion model of the aerial target to predict and continuously output estimated motion positions during periods of missing structured data streams. This ensures that the aerial target's trajectory does not disappear or jump due to brief data loss, resulting in a smooth and stable tracked flight path.

[0033] Performance monitoring and feedback control is a closed-loop adaptive system design that ensures the system is always in an optimal or near-optimal operating state to adapt to complex and ever-changing radio environments. Specifically, it is implemented by using metrics such as bit error rate and signal-to-noise ratio to inversely control the SDR signal processing unit and RF front-end unit. For example, the results from the data processing unit are fed back to the preceding units to adaptively adjust their operating parameters, thus ensuring the system operates at its optimal state. Data distribution uses standard protocols to output valid information and other data to displays and databases.

[0034] Understandably, the ADS-B receiver system can sense signal quality and spectral environment indicators. Signal quality indicators can include those sensed by the SDR signal processing unit, such as signal-to-noise ratio, received signal strength indication, ADC overflow, bit error rate, frame synchronization success rate, message decoding success rate, and CRC check failure rate. Spectral environment indicators can include those sensed by the SDR signal processing unit, such as interference signal characteristics (e.g., spectral shape, sudden increases in capability at specific frequency points) and multipath effect indications (e.g., pulse waveform broadening, tailing, and ghosting pulses). The calculation methods for these indicators can be understood by referring to existing methods for calculating similar indicators in the field. For example, the SDR signal processing unit can compare the CRC result carried by the received current frame bitstream signal with the CRC result directly calculated from the current frame bitstream signal, and directly calculate the bit error rate. For instance, it can count the total number of transmitted frames (or total number of transmitted bits) over a period of time, and the number of erroneous frames (or the total number of bits in erroneous frames) with inconsistent CRC comparisons, using "number of erroneous bits / total number of bits" to calculate the bit error rate. The adaptive sensing table designed accordingly is shown in Table 1. Table 1

[0035] The received signal strength indicator (RSS) is the total power of the current RF signal measured by the receiver at the RF baseband end, expressed numerically (e.g., dBm), reflecting only the signal strength. Spectral shape (FFT analysis) examines, for example, the overall contour, smoothness, and distortion of the signal's spectral energy distribution, indicating a bias towards broadband and global interference characteristics; a sudden increase in energy at a specific frequency point examines, for example, a sudden spike at a single fixed frequency, indicating a bias towards narrowband or single-point interference characteristics. Widening refers to pulses becoming thicker, wider, or having blunter edges; tailing refers to pulses ending in abruptly, with a gradually decaying tail; and ghosting refers to an extra, independent copy of a pulse following a single pulse.

[0036] Based on the above perception, the ADS-B receiver system can make corresponding decisions. For example, if the signal-to-noise ratio (SNR) is lower than a preset threshold A, it is determined to be a "weak signal environment," and the decision is to "increase SDR gain." If the SNR is higher than a preset threshold B and the ADC saturates, the decision is to "decrease SDR gain." If strong pulse interference is detected, it is determined to be "intermittent strong interference," and the decision is to activate the "adaptive threshold algorithm." The output of the decision is one or more specific, executable action commands, such as, but not limited to, "adjusting the demodulation threshold from 0.5V to 0.3V" or "increasing the SDR hardware gain by 10dB." The adaptive decision table designed accordingly is shown in Table 2. Table 2

[0037] After making a decision, the ADS-B receiver system needs to execute that decision, thus putting the action instructions generated during the decision-making stage into practice to change the system's operating parameters and improve its performance. The adaptive execution table designed accordingly is shown in Table 3. Table 3

[0038] In the aforementioned perception-decision-execution process, some parameters can be fed back within the unit, enabling rapid and local problem-solving and significantly improving the efficiency and response speed of the ADS-B receiver system. The anti-multipath synchronization algorithm can be a commonly used existing synchronization algorithm in this field, such as synchronization algorithms based on training sequences, synchronization algorithms based on cyclic prefixes (CP), synchronization algorithms based on maximum likelihood (ML), or frequency offset estimation algorithms based on pilots (such as the Classen algorithm).

[0039] In some implementations, such as Figure 2As shown, the antenna assembly of the RF front-end unit first receives the RF signal from the air target. For example, the RF front-end unit can be configured to receive the ADS-B analog signal in the 1090MHz band. The received RF signal is sent to the low-noise amplifier assembly for processing. After the low-noise amplifier assembly initially amplifies the received RF signal, it is processed by the tunable filter assembly, down-conversion assembly, and bandpass filter assembly in sequence to remove spurious signals outside the RF signal band, resulting in a clean baseband signal that can be processed by the digital chip. Then, the baseband signal is amplified with controllable gain by the variable gain amplifier assembly to ensure that the signal input to the ADC in the subsequent sampling unit is stable within the optimal range.

[0040] The sampling unit converts analog radio frequency signals into digital signals. The sampling rate of the analog-to-digital converter (ADC) in the sampling unit can be effectively increased or decreased according to the quality of the current radio frequency signal. The AGC algorithm, or Automatic Gain Control algorithm, is implemented by the data processing unit detecting signal strength and quality indicators in real time, generating corresponding decisions, and executing corresponding feedback control, such as automatically adjusting the ADC sampling rate to stabilize the signal quality within the optimal operating range.

[0041] The data processing unit can more intuitively evaluate the performance of the current ADS-B receiver system. For example, it can directly observe changes in the spectrum shape through spectrum analysis and determine the signal strength through the signal-to-noise ratio. The entire ADS-B receiver system architecture employs a unit-level closed loop and a system-level closed loop, with internal units implementing perception, decision-making, and execution mechanisms. The data processing unit can be directly controlled by the CPU core to achieve its required functions.

[0042] In one embodiment, such as Figure 3 The diagram illustrates the closed-loop mechanism of the PPM demodulation component in the SDR signal processing unit. Its core is: during the pulse gap, the statistical characteristics of the background noise are estimated in real time, and based on this, the detection threshold for the next pulse is dynamically set according to the perception-decision-execution logic shown in Tables 1 to 3. The amplitude or power of the raw I / Q sampling data (or one channel, such as the I channel) transmitted from the ADC in the sampling unit is calculated in real time, typically using a sliding time window. The average value (denoted as Mean) and standard deviation (denoted as c) of the data within the time window are calculated, using an instantaneous threshold value. The decision is made, where K is a preset constant; finally, the calculated instantaneous threshold value Threshold is directly sent to the pulse decision comparator in the PPM demodulation component. Once the amplitude or power of the sampled data exceeds the instantaneous threshold value Threshold, it is determined that a pulse leading edge has been detected.

[0043] In one embodiment, such as Figure 4The diagram illustrates the closed-loop mechanism of the timing synchronization component, employing an "open-loop estimation, feedback correction" approach. The SDR signal processing unit cross-correlates the baseband signal received from the RF front-end unit with the preamble sequence. It compares the actual sampling position of the correlation peak of the current frame (i.e., the sampling point index where the peak appears after cross-correlation between the received signal and the preamble) with the ideal peak position (i.e., the zero-bias estimation position) predicted during frame synchronization based on the preamble structure (i.e., the local preamble template). The positional deviation between the two is calculated as the symbol timing error Δτ. This symbol timing error reflects the time offset caused by the RF signal propagation delay. This symbol timing error is fed back to the digital interpolator or phase adjuster of the SDR signal processing unit. The digital interpolator or phase adjuster performs real-time phase correction on the subsequently received baseband sampling data based on the symbol timing error, ultimately achieving timing synchronization. This means that each symbol is adjusted to the optimal sampling time, thereby significantly reducing the bit error rate.

[0044] In some implementations, in examples where manned / unmanned aircraft are the aerial targets, the system-level closed loop regarding the distance to the aircraft is as follows: Figure 5 As shown.

[0045] The aforementioned ADS-B receiver system based on software radio modular design adopts an adaptive architecture of perception-decision-execution. This system dynamically adjusts the receiving parameters by monitoring indicators such as signal quality in real time to cope with changes in the signal strength of aircraft at different distances.

[0046] like Figure 5 As shown in (a), in a long-range aircraft scenario (weak signal environment): the RF front-end unit continuously receives signals. When in a weak signal environment, the sensing phase exhibits the following characteristics: the ADS-B receiver system detects in real time that the signal-to-noise ratio is lower than the preset threshold A; the sampling data of the ADC in the sampling unit shows no saturation phenomenon; the CRC check result shows an increased bit error rate and a decreased decoding success rate. The ADS-B receiver system will enter a "high sensitivity" mode, and the corresponding decision-making phase will have the following results: determining that it is currently in a "weak signal environment," deciding to initiate a sensitivity enhancement strategy, and the data processing unit outputs specific instructions: "increase the gain of the amplifier component of the RF front-end unit by 10dB" and "adjust the demodulation threshold of the PPM demodulation component in the SDR signal processing unit from 0.5V to 0.3V." After the decision instructions are issued, the execution phase may include: the RF front-end unit increasing the gain of the low-noise amplifier component; and the SDR signal processing unit lowering the demodulation threshold of the PPM demodulation component to improve detection sensitivity.

[0047] like Figure 5As shown in (b), in a close-range aircraft scenario (strong signal environment), when the ADS-B receiver system is in a strong signal environment, the following will occur during the sensing phase: the signal-to-noise ratio is detected to be higher than the preset threshold B and the ADC in the sampling unit shows saturation counting; the CRC check error increases, indicating that the signal overload causes waveform distortion; the data processing unit shows through spectrum analysis that the signal strength exceeds the linear operating range, etc.

[0048] At this time, the ADS-B receiver system will enter the "high dynamic" mode, and the corresponding decision-making stage will have the following results: it is determined to be a "strong signal overload environment", and the dynamic range optimization strategy will be initiated. The data processing unit outputs the instructions: "The RF front-end unit will quickly reduce the target signal strength by 10dB" and "Enable the pulse waveform distortion correction algorithm"; the SDR signal processing unit increases the demodulation threshold of the PPM demodulation component and enables the digital nonlinear correction algorithm.

[0049] After the decision instruction is issued, the execution phase includes the following: the RF front-end unit will reduce the gain of the low-noise amplifier component or enable the digitally controlled attenuator; the data processing unit will use anti-saturation processing technology to restore signal quality.

[0050] The pulse waveform distortion correction algorithm is implemented as follows: The pulse waveform distortion correction algorithm is used to address waveform distortion issues caused by radio frequency signals passing through analog devices such as low-noise amplifiers and down-conversion components. This algorithm utilizes both the effective bandwidth and the frequency response in the out-of-band high-frequency region to solve for the correction filter. The specific processing flow includes the following: The distorted pulse signal after passing through the analog channel is acquired and compared with the ideal pulse signal to obtain the system's amplitude-frequency response A(ω) and phase-frequency response θ(ω); ω is the angular frequency. Then, the target transfer function H_target(ω) is determined according to the inherent response requirements of the system, which is usually a flat amplitude-frequency response plus a linear phase-frequency response. A flat amplitude-frequency response means that the system maintains a consistent gain (or attenuation) for all frequency components throughout the entire operating frequency band, and a linear phase-frequency response means that the phase delay of the system output signal is proportional to the frequency. Next, the transfer function of the correction filter G(ω) = H_target(ω) / H_distortion(ω) is solved, that is, the correction function is the inverse of the distorted system transfer function H_distortion(ω). Then, median filtering is applied to the amplitude-frequency response correction curve to eliminate out-of-band high-frequency spikes and glitches, and polynomial fitting is performed on the phase-frequency response correction curve. Finally, the unit sample response h(n) is calculated using the inverse discrete Fourier transform (IDFT) to optimize the filter order to meet the correction performance requirements. Finally, the distorted pulse signal is convolved with the correction filter in the time domain to output the corrected pulse waveform.

[0051] Digital nonlinear correction algorithms are methods for compensating for nonlinear distortion in the receiving channel (mainly caused by the saturation characteristics of devices such as low-noise amplifier components, variable gain amplifier components, and ADCs). This algorithm applies an "inverse" correction to the sampled signal in the baseband, opposite to the nonlinear characteristics of the receiving channel, making the overall cascade of the receiving channel and digital correction exhibit linear characteristics, thereby restoring the signal waveform. The specific processing flow of the digital nonlinear correction algorithm is as follows: The input and output data of the receiving channel are captured: the baseband signal x(n) before correction and the output signal y(n) after passing through the receiving channel are collected; x(n) and y(n) are time-aligned and normalized to ensure data synchronization; a nonlinear model of the receiving channel is established, using memory polynomials (MP) or Wolterra series to describe the nonlinear mapping relationship between the output and input, resulting in the inverse model; with the goal of minimizing the modeling error, the correction coefficients of the inverse model are solved using the least squares method or the recursive prediction error method (RPEM); the original sampled signal is input into the inverse model for correction processing to generate the corrected output signal; an adaptive iterative mechanism is adopted, that is, the correction coefficients of the inverse model are dynamically updated according to the system performance indicators and the aforementioned calculation process to continuously maintain the linearization performance of the receiving channel.

[0052] Anti-saturation processing technology is used to solve the saturation (clipping) distortion problem caused by signal amplitude exceeding the dynamic range during ADC sampling. This technology employs a method based on direct reconstruction of saturated samples, utilizing prior knowledge of the frequency band-limited signal to recover the original value of the clipped sample from the unsaturated sample. The specific processing flow of anti-saturation processing technology is as follows: Traverse the ADC sampled data, mark the positions of all samples that reach or exceed the saturation threshold ±V_max, and record the saturated sample index set S, while retaining the unsaturated sample index set U. Assume that the original band-limited signal can be represented as a linear combination of sinc basis functions: x(t)=Σc_k·sinc(t / Tk), where T is the sampling period, c_k is the expansion coefficient to be estimated, and k is an integer index. Establish a system of linear equations and use the least squares method to solve for the expansion coefficient c_k to be estimated, minimizing the error between the model prediction and the measured value of the unsaturated sample. Calculate the reconstructed value of the saturation position using the estimated expansion coefficient c_k: x_recon[i]=Σc_k·sinc(ik), i∈S. Replace the original saturated sample with the reconstructed value, merge it with the unsaturated sample, and output the recovered complete signal. If the reconstruction effect does not meet the design requirements, the model parameters can be adjusted and iteratively optimized until the output signal quality meets the standards.

[0053] Each module in the ADS-B receiver system based on software-defined radio modular design described above can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware or independently of a device with data processing capabilities, or stored in software within the memory of the aforementioned device, so that the processor can call and execute the operations corresponding to each module. The aforementioned device can be, but is not limited to, various types of communication devices already existing in the art.

[0054] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0055] The above embodiments merely illustrate several implementation methods of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of protection of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and all such modifications and improvements fall within the scope of protection of the present invention.

Claims

1. An ADS-B receiver system based on software radio modular design, characterized in that, It includes an FPGA and a CPU. The FPGA adopts a general software radio architecture and is configured with an RF front-end unit and a sampling unit. The CPU is configured with an SDR signal processing unit and a data processing unit. The output of the RF front-end unit is connected to the input of the sampling unit. The output of the sampling unit is connected to the input of the SDR signal processing unit. The output of the SDR signal processing unit is connected to the input of the data processing unit. The output of the data processing unit is fed back to the control terminals of the RF front-end unit, the sampling unit and the SDR signal processing unit respectively. The radio frequency front-end unit is used to receive radio frequency signals from air targets, amplify and filter the radio frequency signals, and convert them into baseband signals. The sampling unit is used to convert the baseband signals output by the radio frequency front-end unit into discrete digital signals through ADC sampling. The SDR signal processing unit is used to accurately find and interpret the structured data stream carrying the state information of the air targets from the digital signals output by the sampling unit. The data processing unit is used to perform data fusion, trajectory tracking, performance monitoring, feedback control, and data distribution based on the structured data stream. The SDR signal processing unit includes a timing synchronization component, a threshold detection component, a PPM demodulation component, a frame synchronization component, a CRC check component, and a decoder component. The timing synchronization component is used to resample or adjust the phase of the sampling points in the sampling unit; the threshold detection component is used to detect the pulse marker signal corresponding to the aerial target from the continuous noise background; the PPM demodulation component is used to receive the pulse marker signal and convert the pulse position information into binary bit stream information; the frame synchronization component is used to continuously scan the binary bit stream information and match it with the known synchronization header. If the bit stream information matches the synchronization header successfully, it accurately locks the start position of a frame of data and outputs a frame-aligned bit stream signal with a fixed length. The CRC check component is used to perform cyclic redundancy check on the bit stream signal of a complete frame after frame synchronization. The decoder component is used to parse the bit stream signal of a frame that has been successfully checked by the CRC check component and output a structured data stream carrying the status information of the air target.

2. The ADS-B receiver system based on software radio modular design according to claim 1, characterized in that, The radio frequency front-end unit includes an antenna assembly, a low-noise amplifier assembly, a tunable filter assembly, a down-conversion assembly, a bandpass filter assembly, and a variable gain amplifier assembly connected in sequence. The antenna assembly is used to receive radio frequency signals from air targets. The low-noise amplifier assembly is used to initially amplify the radio frequency signals. The tunable filter assembly is used to initially filter the initially amplified radio frequency signals. The down-conversion assembly is used to shift the high-frequency analog signal obtained after the initial filtering to the baseband through mixing. The bandpass filter assembly is used to restore the signal shifted to the baseband into a clean baseband signal that can be processed by the digital chip. The variable gain amplifier assembly is used to amplify the baseband signal again.

3. The ADS-B receiver system based on software radio modular design according to claim 1, characterized in that, During cyclic redundancy check, if the check is successful, the bitstream signal of the current frame is retained and output; if the check fails, the bitstream signal of the current frame is discarded.

4. The ADS-B receiver system based on software radio modular design according to claim 1, characterized in that, The sensing metrics in the adaptive sensing table of an ADS-B receiver system include: signal-to-noise ratio, received signal strength indication, ADC overflow, bit error rate, frame synchronization success rate, message decoding success rate, CRC check failure rate, spectrum shape, energy surge at a specific frequency point, pulse waveform broadening, trailing, and ghosting pulses.

5. The ADS-B receiver system based on software radio modular design according to claim 1, characterized in that, The decisions in the adaptive decision table of the ADS-B receiver system include: Dynamically adjust the gain, optimize the signal dynamic range, and dynamically adjust the sampling rate; Adjust the sensitivity of the demodulation algorithm; Enable or adjust the filtering strategy to suppress interference; Adjust the timed synchronization.

6. The ADS-B receiver system based on software radio modular design according to claim 1, characterized in that, The decision execution in the adaptive execution table of the ADS-B receiver system includes: If the signal-to-noise ratio is low and the ADC is not saturated, increase the SDR gain or increase the sampling rate; Lower the threshold voltage of the PPM demodulation component or switch the pulse shaping filter; Narrowband interference is detected, and the notch of the digital filter is adaptively adjusted to align with the interference frequency. Enable the anti-multipath synchronization algorithm.

7. The ADS-B receiver system based on software radio modular design according to claim 1, characterized in that, The closed-loop mechanism of the PPM demodulation component in the SDR signal processing unit includes the following steps: The amplitude or power of the raw sampling data transmitted from the sampling unit is calculated in real time using a sliding time window; The instantaneous threshold value is calculated based on the average value and standard deviation of the data within the time window obtained in real time. The calculated instantaneous threshold value is directly fed into the pulse decision comparator in the PPM demodulation component; if the amplitude or power of the original sampled data exceeds the instantaneous threshold value, it is determined that a pulse leading edge has been detected.

8. The ADS-B receiver system based on software radio modular design according to claim 1, characterized in that, The closed-loop mechanism of the timing synchronization component in the SDR signal processing unit includes the following steps: Cross-correlation processing is performed between the baseband signal received from the radio frequency front-end unit and the preamble sequence; The actual sampling position of the relevant peak in the current frame is compared with the ideal peak position predicted by the preamble structure during frame synchronization to estimate the symbol timing error of the received signal. The estimated symbol timing error is fed back to the digital interpolator or phase adjuster of the SDR signal processing unit, which then performs real-time phase correction on the subsequently received baseband sampling data based on the symbol timing error.

9. The ADS-B receiver system based on software radio modular design according to claim 1, characterized in that, The aerial targets are manned or unmanned aircraft.

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