A batch testing system and method for audio matrix modules

Abstract

This invention provides a batch testing system and method for audio matrix modules, relating to the field of audio device testing technology. The method includes the following steps: S1, a host computer sends a TDM group number detection command; S2, after receiving the "group number detection" command, the audio matrix module enters test mode to obtain the correspondence between group numbers and IP addresses, and reports this correspondence back to the host computer; S3, the digital audio serial bus output interface of the audio matrix module is tested; S5, the host computer generates a test report based on the test results. This invention uses an FPGA as the slave interface of the digital audio transmission bus and employs a digital domain detection method, enabling simultaneous testing of all channels of multiple modules and marking of abnormal audio matrix modules. It eliminates the need for numerous analog components, significantly reducing hardware costs.

Description

Technical Field

[0001] This invention relates to the field of audio device testing technology, and more specifically, to a batch testing system and method for audio matrix modules. Background Technology

[0002] An audio matrix module is an audio transmission device that can receive audio data collected by an AD chip via a digital audio transmission bus and send it to other devices via Ethernet. It can also receive network audio packets from other devices via Ethernet and then send them to the DA chip.

[0003] Existing methods for testing multiple (N, N>3) audio matrix modules primarily employ a daisy-chain subscription approach. This means that audio matrix module 1 uses an AD chip to collect data, which is then routed through the network to audio matrix module 2 for playback via a DA chip. Similarly, audio matrix module 3 uses an AD chip to collect data, which is then routed through the network to audio matrix module N for playback via a DA chip. Measuring N multi-channel audio matrix devices requires a large number of analog components, resulting in extremely high hardware costs, especially for 128- or 256-channel modules. Furthermore, the waveforms of the played analog channels require spectrum analyzers or manual analysis using voice recorders, which is costly and inefficient, and prevents simultaneous analysis of multiple channels. Finally, digital audio transmission bus modes are diverse, including TDM8 / 16 and I2S interface modes, sampling rates of 44.1kHz, 48kHz, 96kHz, and 192kHz, and data formats such as left-aligned, right-aligned, and I2S-compatible modes, with data bit widths of 16, 24, and 32 bits. An AD / DA chip may not support multiple modes, or switching modes may require modifications to the hardware circuitry, making it difficult to test digital audio transmission buses in different modes. Summary of the Invention

[0004] To address the aforementioned technical problems in related technologies, this invention proposes a batch testing system for audio matrix modules, comprising:

[0005] Host computer;

[0006] The main test module consists of an FPGA and an ARM processor, which communicate with each other via an FSMC interface; the FPGA is connected to the audio matrix module via a TDM / I2S bus.

[0007] The main test module's PHY module and its corresponding main test module RJ45 interface are connected to the router.

[0008] N audio matrix modules; each of the N audio matrix modules includes a PHY module for an audio module and a corresponding RJ45 interface; the RJ45 interface is connected to the router;

[0009] There are N audio matrix module switches, and each of the N audio matrix module switches corresponds one-to-one with one of the N audio matrix modules.

[0010] Secondly, another embodiment of the present invention discloses a batch testing method for an audio matrix module, which is applied to the aforementioned batch testing system for the audio matrix module, and includes the following steps:

[0011] S1, The host computer sends a TDM group number detection command;

[0012] S2, after receiving the "group number detection" command, the audio matrix module enters the test mode to obtain the correspondence between the group number and the IP address; and reports the correspondence between the group number and the IP address to the host computer.

[0013] S3, Test the digital audio serial bus output interface of the audio matrix module; specifically, S31, after the audio matrix module receives data with group number 1 from the main test module FPGA, the host computer configures it to output the data in a fixed multicast stream, sending only one multicast stream, which contains at least K channels; where K represents the number of audio serial bus data lines used.

[0014] S32, the host computer software sends the "Subscribe to Test A" command to the audio matrix module 2-N, and the audio matrix module 2-N will subscribe to the network multicast stream sent by the audio matrix module 1; after receiving the multicast stream data, the audio matrix module 2-N sends it to the FPGA of the main test module from the digital audio serial bus output interface;

[0015] S33, after waiting for a preset time, the host computer software sends a "subscribe to test A" command to the ARM of the main test module; the ARM of the main test module sets the FPGA to start testing flag, and after the FPGA receives the testing flag, it tests the TDM data; if it conforms to the pattern of data format B, the test result is saved as correct, otherwise it is incorrect;

[0016] S34, after waiting for a preset time, the host computer software sends the "Subscribe to test result query" command to the ARM of the main test module. The ARM reads the test results saved by the FPGA and sends them to the host computer software.

[0017] S5, the host computer generates a test report based on the test results.

[0018] Specifically, before step S1, the process includes: controlling only one of the audio matrix module switches to be on, then starting the serial number burning process of the host computer software. The host computer software discovers the audio matrix module through multicast, configures the corresponding serial number and MAC address, and writes the serial number and MAC address into the FLASH of the audio matrix module through network multicast. The serial number and MAC address of the remaining audio matrix modules can be burned by turning on the switches of the other audio matrix modules in sequence and performing the same operation.

[0019] Specifically, the FPGA of the main test module outputs data on the digital audio transmission bus output interface according to data format B. The rules of data format B are as follows: the interface output data is divided into two parts, the high four bits indicate the group number, and the latter is used as a counter field to detect the correctness of the data result.

[0020] Specifically, step S2 is as follows:

[0021] S22, after receiving the "group number detection" command, the audio matrix module enters the test mode to obtain the correspondence between the group number and the IP.

[0022] S23, the audio matrix module sets the test start flag and receives data from the digital audio transmission bus input interface;

[0023] S24, the audio matrix module detects and judges the received data of all channels. The software code of the audio matrix module will save the high 4 bits of the channel according to data format B. If the high 4 bits of all channels are consistent and do not change, the group number is considered to be correct. The high 4 bits are saved as the group number. The test results are updated in the register every preset time.

[0024] S25, after the host computer software sends the "group number detection" command, it waits for a preset time and then sends the "group number result query command" to all audio matrix modules; after receiving the "group number result query command", the audio matrix module exits the test mode and reports the test results to the host computer software;

[0025] S26, the host computer software analyzes the test results based on the reply packet and provides the correspondence between the group number and the IP.

[0026] Specifically, it also includes: S4, testing the digital audio serial bus input port of the audio matrix module;

[0027] S41, the host computer software sends a "send multicast stream" command to the audio matrix module 2-N. The audio matrix module 2-N begins to send the data received from the FPGA of the main test module on the network in the form of a multicast stream, which contains at least K channels.

[0028] S42, the host computer software configures audio matrix module 1 to subscribe to the multicast streams of audio matrix modules 2-N, and sends the subscribed data to the FPGA of the main test module through the TDM output interface.

[0029] S43, after waiting for a preset time, the host computer software sends a "subscribe to test B" command to the ARM of the main test module; the ARM of the main test module sets the FPGA to start testing flag. After receiving the testing flag, the FPGA tests the TDM data. If it conforms to the pattern of data format B, the test result B is correct; otherwise, it is incorrect.

[0030] S44, after waiting for a preset time, the host computer software sends the "Subscribe to Test Result Query" command to the ARM of the main test module. The ARM reads the test results saved by the FPGA and sends them to the host computer software.

[0031] Specifically, step S5 is as follows: the host computer software generates a test report by performing two group number checks and input / output test response packets.

[0032] Specifically, step S5 is as follows:

[0033] S51 is the module that records the first correct group number reply packet of the audio serial bus;

[0034] S52, the module that records the correct response package for the second "Subscription Test Result Query";

[0035] S53. Only modules that are normal in both tests are considered to be functionally normal. A test report is generated, indicating whether the erroneous module is due to a subscription error, an incorrect TDM group number, or an error in sending a multicast stream.

[0036] Specifically, in step S34, the FPGA simultaneously detects and saves the clock line frequency value output by the audio matrix module.

[0037] Specifically, this also includes: performing ping packet tests on the audio matrix modules. The host computer software performs ping tests on each audio matrix module and records the number of lost packets. If the packet loss rate reaches a threshold, the audio matrix module is considered to have a problem.

[0038] This invention uses an FPGA as the slave interface of a digital audio transmission bus (TDM / I2S) and employs a digital domain detection method. It can simultaneously test all channels of multiple modules and mark audio matrix modules with malfunctions, eliminating the need for numerous analog components and significantly reducing hardware costs. The number of audio matrix modules N to be tested can be designed based on the FPGA's pin count, and the multi-channel data analysis can be automatically completed by the FPGA. Test results are then reported to the host computer software via an ARM processor, greatly improving testing efficiency. Furthermore, as the slave interface of the digital audio transmission bus, the FPGA can switch the mode of the digital audio transmission bus via network packets sent by the host computer software to adapt to the audio interface modes of different types of audio matrix modules, offering wide applicability and high reusability. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 This invention provides a batch testing system for audio matrix modules.

[0041] Figure 2 This is an overall schematic diagram of a batch testing method for an audio matrix module provided in an embodiment of the present invention;

[0042] Figure 3 This is a flowchart of a batch testing method for an audio matrix module provided by an embodiment of the present invention. Detailed Implementation

[0043] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention are within the scope of protection of the present invention.

[0044] Example 1

[0045] refer to Figure 1 This embodiment discloses a batch testing system for audio matrix modules, which includes:

[0046] A host computer; the host computer can be a PC, server, etc. This embodiment develops corresponding host computer software for testing audio matrix modules. This software runs on the host computer and is used to test N audio matrix modules. The host computer issues test commands and generates test reports based on the test results.

[0047] The main test module consists of an FPGA and an ARM processor, which communicate via an FSMC interface. The FPGA is connected to the audio matrix module via a TDM / I2S bus.

[0048] The PHY module of the main test module; the PHY module of the main test module in this implementation, as well as the PHY modules of the N audio modules, are all network interface cards (NICs) used to provide the basic hardware for network communication. The PHY module has switching capabilities and forms a gigabit Ethernet link with the RJ45.

[0049] N is a positive integer. N is mainly limited by the FPGA and network bandwidth. If the FPGA has more pins and the network bandwidth is larger, more audio matrix modules can be designed and tested.

[0050] The main test module has an RJ45 interface, which is connected to the router.

[0051] N audio matrix modules; each of the N audio matrix modules includes a PHY module for an audio module and a corresponding RJ45 interface; the RJ45 interface is connected to the router.

[0052] In another implementation, when N is large, the router's network ports may not be sufficient to connect all the devices. In this embodiment, the main test module can have two RJ45 interfaces, and each audio matrix module can also have two RJ45 interfaces. The host computer's network port connects to the first RJ45 of the main test module, the second RJ45 of the main test module connects to the first RJ45 of audio matrix module 1, the second RJ45 of audio matrix module 1 connects to the first RJ45 of audio matrix module 2, and so on, finally connected to a router. Similar to humans holding hands to pass messages, all devices can communicate with each other, including the host computer, the main test module, and any two of the N audio matrix modules. This requires the PHY to have switching capabilities. To ensure all devices are on the same network segment, a router can be used to assign IP addresses.

[0053] There are N audio matrix module switches, each corresponding to one of the N audio matrix modules, used to control the power supply of the audio matrix modules.

[0054] In this embodiment, the main test module, its PHY module, its RJ45 interface, and the PHYs and all RJ45 interfaces of the N audio matrix modules are integrated onto a single large baseplate. The baseplate also provides multiple slots, one for each of the N audio matrix modules, through which the main test module connects to the audio matrix modules. This allows the N audio matrix modules to be tested to be easily attached to the large baseplate after testing. In another embodiment, the main test module can also be connected to the large baseplate via a slot.

[0055] This embodiment further includes a main switch and a main test module switch. The main switch is used to power on the entire base plate. The main test module switch is used to control the power supply to the main test module.

[0056] In this embodiment, the router is responsible for assigning IP addresses to each device. That is, after the router assigns the IP addresses of the main test module, the audio matrix module and the PC to the same network segment, the main test module, the audio matrix module and the PC can communicate with each other through the Gigabit Ethernet protocol.

[0057] The main functions of the system in this embodiment can be divided into two parts: the first function is to burn the proprietary serial number and MAC address of the newly produced audio matrix module; the second function is to simultaneously perform network and audio transmission bus input and output tests on N audio matrices that have already had their serial numbers and MAC addresses burned. The network test mainly tests whether there is packet loss or connection failure in the network, while the audio interface input and output mainly tests whether the data of each channel is correct.

[0058] For Function 1: First, the main switch powers on the entire baseboard, while the individual module switches power the main test module and the audio matrix module separately. For newly manufactured audio matrix modules, their serial numbers and MAC addresses are pre-installed in the program (each audio matrix module is unique). If all modules are powered on simultaneously and connected to the network, they will be indistinguishable. Therefore, to program the serial number and MAC address, power on one audio matrix module separately, and turn off the switches of the other audio matrix modules and the main test module. Then, click the serial number programming option in the host computer software. The host computer software will discover the module via multicast, configure the specific serial number and MAC address to the host computer software, and write the serial number and MAC address to the audio matrix module's FLASH via network multicast. At this point, the serial number and MAC address programming for one audio matrix module is complete. Repeat the same operation to program the serial numbers and MAC addresses for the remaining audio matrix modules.

[0059] For Function Two: Turn on the main switch, the main test module, and the switches of N audio matrix modules. Test the network and audio interface input / output of the N audio matrix modules whose serial numbers and MAC addresses have been burned in. The router will assign IPs to the main test module and each audio matrix module. The host computer interacts with the main test module and the audio matrix modules as follows: Figure 2 As shown, the test steps are as follows:

[0060] (1) After powering on the baseboard and all modules, the FPGA of the main test module outputs data according to data format B on the digital audio transmission bus (TDM / I2S) output interface (data output can only be performed after the audio matrix module provides the clock). The rules for data format B are as follows: the interface output data is divided into two parts, the high four bits indicating the group number (e.g., Figure 1 The high four bits of TDM / I2S in Group 1 are 1, and the high four bits of Group 2 are 2. The latter are used as counter fields to check the correctness of the data results (in order to make the counter change faster, it can be divided into 2 counter fields, and the two segments use the same value).

[0061] (2) The host computer software obtains the correspondence between the group number and IP address of the audio matrix module (so that when the host computer software indicates that a certain module has an error, it can locate which module has a problem based on the group number. If only the IP information of the erroneous module is given without the group number information, it is impossible to visually determine which module the IP corresponds to since there is no corresponding indication for the audio module). The steps are as follows (assuming that the main test module is already consistent with the audio transmission bus mode of the audio matrix module; otherwise, the host computer software needs to send a network packet to modify the mode of the main test module first):

[0062] ① The host computer software sends a "group number detection" command to all audio matrix modules.

[0063] ② After receiving the "Group Number Detection" command, the audio matrix module enters test mode to obtain the correspondence between group number and IP.

[0064] The audio matrix module sets the test start flag and receives data from the digital audio transmission bus input interface.

[0065] The audio matrix module detects and judges the received data from all channels. The software code of the audio matrix module saves the high 4 bits of the channel according to data format B. If the high 4 bits of all channels are consistent and do not change, the group number is considered to be correct, and the high 4 bits are saved as the group number. Every 1ms, the test result is updated in the register (group number, value is 0-N, where 0 indicates that there is an error in the group number detection process).

[0066] ③ After the host computer software sends the "Group Number Detection" command, it waits 2 seconds before sending the "Group Number Result Query Command" to all audio matrix modules. Upon receiving the "Group Number Result Query Command," the audio matrix module exits the test mode and reports the test results back to the host computer software.

[0067] ④ The host computer software analyzes the test results based on the reply packets and gives the correspondence between the group number and the IP (this allows us to know which module is in which location, making it easier for the host computer software to give the final result).

[0068] (3) Ping packet test:

[0069] ① The host computer software performs ping tests on each audio matrix module, sending 1000 packets and recording the number of lost packets. If the packet loss rate is greater than 1%, the audio matrix module is considered to have a problem.

[0070] (4) Test A of the digital audio serial bus output interface of the audio matrix module:

[0071] ① After receiving the data with group number 1, the host computer configures the audio matrix module 1 to output the data in a fixed multicast stream, sending only one multicast stream, which contains at least K channels (K represents the number of audio serial bus data lines used, such as a 32-channel audio matrix module using 4 lines in TDM8, where K is 4).

[0072] ② The host computer software sends the "Subscribe to Test A" command to audio matrix module 2-N, and audio matrix module 2-N will subscribe to the network multicast stream sent by audio matrix module 1. After receiving the multicast stream data, it is sent from the digital audio serial bus output interface to the FPGA of the main test module.

[0073] ③ The host computer software waits 1 second before sending a "Subscribe to Detection A" command to the ARM of the main test module. The ARM of the main test module sets the FPGA to start detection. After receiving the detection flag, the FPGA detects the TDM data (until the ARM stops detection). If it conforms to the pattern of data format B (the high four bits are group 1, and the following bits are the counter), the test result is saved as correct; otherwise, it is considered incorrect (1 indicates a correct result, 0 indicates an incorrect result). At the same time, the clock line frequency value output by the audio matrix module is detected and saved (bick, mclk, lrck). The result register is updated every 8ms for the ARM to read.

[0074] (5) Test B of the digital audio serial bus input port of the audio matrix module (can be performed simultaneously with A):

[0075] ① The host computer software sends the "Send Multicast Stream" command to the audio matrix module 2-N. The audio matrix module 2-N then sends the data received from the FPGA of the main test module on the network in the form of a multicast stream. The multicast stream contains at least K channels (K represents the number of data lines of the digital audio serial bus).

[0076] ② The host computer software configures audio matrix module 1 to subscribe to the multicast streams of audio matrix modules 2-N, and sends the subscribed data to the FPGA of the main test module through the TDM output interface.

[0077] ④ After waiting 1 second, the host computer software sends a "Subscribe to Detection B" command to the ARM of the main test module. The ARM of the main test module sets the FPGA to start detection. After receiving the detection flag, the FPGA detects the TDM data (until the ARM closes the detection). If it conforms to the pattern of data format B (the high 4 bits are the group number, and the following bits are the counter), the test result B is correct; otherwise, it is incorrect (1 indicates the result is correct, 0 indicates the result is incorrect). The result register is updated every 8ms for the ARM to read.

[0078] (6) The host computer software waits for 10 seconds (configurable) and sends the "Subscribe to test result query" command to the ARM of the main test module. The ARM reads the test results saved by the FPGA (the results are the frequency values ​​of bick, mclk, lrck of audio matrix modules 1-N and the correctness of subscribing to and sending multicast streams) and sends them to the host computer software.

[0079] (7) The host computer software generates a test report through two response packets (group number detection and input / output test A / B).

[0080] ① Record the module that correctly receives the first audio serial bus group number reply packet.

[0081] ② Record the module that received the correct reply package for the second "Subscription Test Result Query" (the frequency value must match the settings).

[0082] ③ Only modules that pass both tests are considered to be functionally normal, and a test report is generated (the report indicates whether the error is due to a subscription error, an incorrect TDM group number, or an error in sending a multicast stream).

[0083] Example 2

[0084] refer to Figure 3 This embodiment discloses a batch testing method for an audio matrix module, which includes the following steps:

[0085] S1, The host computer sends a TDM group number detection command;

[0086] Specifically, the FPGA in this embodiment has N digital audio transmission bus interfaces, and each digital audio transmission bus interface has a corresponding number, such as 1, 2, 3, ..., N.

[0087] When testing audio matrix modules, a maximum of N audio matrix modules can be tested at a time. That is, m audio matrix modules are tested in a single run, where m is less than or equal to N.

[0088] Because the audio matrix module has network communication capabilities, its MAC address and serial number need to be programmed before conducting network and audio tests.

[0089] Before writing the MAC address, the audio matrix modules under test need to be connected to the main test module through the slot. That is, after inserting the m audio matrix modules to be tested into the main baseboard, power on the system and perform the MAC address and serial number burning.

[0090] The method for burning the MAC address is as follows: turn on the main switch and turn off the main test module switch;

[0091] Only one of the audio matrix modules can be turned on. Then, click the serial number burning option in the host computer software. The host computer software will discover the module through multicast, configure a specific serial number and MAC address to the host computer software, and write the serial number and MAC address to the audio matrix module FLASH via network multicast. The serial number and MAC address of the remaining audio matrix modules can be burned by turning on the switches of the other audio matrix modules in sequence and performing the same operation.

[0092] For newly manufactured audio matrix modules, their serial numbers and MAC addresses are pre-installed in the program, meaning each module is identical. If all modules are powered on and connected to the network simultaneously, they will be indistinguishable. Therefore, to program the serial number and MAC address, power on one audio matrix module at a time, and turn off the other audio matrix modules and the main test module. Then, click the serial number programming option in the host computer software. The host computer software will discover the module via multicast, configure the specific serial number and MAC address, and write the serial number and MAC address to the audio matrix module's FLASH memory via network multicast. At this point, the serial number and MAC address programming for one audio matrix module is complete. Repeat the same operation to program the serial numbers and MAC addresses for the remaining audio matrix modules.

[0093] When conducting network testing, first turn on the main switch, the main test module, and the switches of the N audio matrix modules. Test the network and audio interface input and output of the N audio matrix modules that have been programmed with serial numbers and MAC addresses. The router will assign IP addresses to the main test module and each audio matrix module.

[0094] Then the host computer sends a TDM group number detection command.

[0095] Before testing the audio matrix module, by... Figure 1 The test system is powered on by turning on the main switch and the switches for the main test module and N audio matrix modules, thus powering on the entire baseboard. At this time, the router will assign IP addresses to the main test module and each audio matrix module.

[0096] After power-on, the FPGA of the main test module outputs data according to data format B on the digital audio transmission bus (TDM / I2S) output interface (data output can only be performed after the audio matrix module provides the clock). Data format B rules are as follows: the interface output data is divided into two parts, with the high four bits indicating the group number (e.g., ...). Figure 1 In Group 1, the high four bits of the TDM / I2S are 1, and in Group 2, the high four bits are 2 (the group numbers correspond one-to-one with the FPGA's I / O ports). These are then used as a counter field to check the correctness of the data results. In another implementation, to make the counter change faster, it can be divided into two counter fields, both using the same value.

[0097] Then, the host computer sends a TDM group number detection command so that the audio matrix module can detect its own group number.

[0098] S2, after receiving the "group number detection" command, the audio matrix module enters the test mode to obtain the correspondence between the group number and the IP address; and reports the correspondence between the group number and the IP address to the host computer.

[0099] The host computer software obtains the mapping between the group number and IP address of the audio matrix module (this way, when the host computer software indicates that a module has an error, it can locate which module is problematic based on the group number. If only the IP information of the erroneous module is given without the group number information, it is impossible to visually determine which module the IP corresponds to since there is no corresponding indication for the audio module). The steps are as follows (assuming that the main test module is already consistent with the audio transmission bus mode of the audio matrix module; otherwise, the host computer software needs to send a network packet to modify the mode of the main test module first):

[0100] S21, the host computer software sends a "group number detection" command to all audio matrix modules.

[0101] S22, after receiving the "group number detection" command, the audio matrix module enters the test mode to obtain the correspondence between the group number and the IP.

[0102] S23, the audio matrix module sets the test start flag and receives data from the digital audio transmission bus input interface.

[0103] S24, the audio matrix module detects and judges the received data of all channels. The software code of the audio matrix module will save the high 4 bits of the channel according to data format B. If the high 4 bits of all channels are consistent and do not change, the group number is considered to be correct. The high 4 bits are saved as the group number. The test result is updated in the register (group number, value is 0-N, where 0 indicates that there is an error in the group number detection process) every 1ms.

[0104] In this embodiment, the audio matrix module parses data format B sent by the FPGA and obtains the corresponding group number by acquiring the high four bits of data format B. After power-on, the FPGA in this embodiment sends data to the module under test according to data format B via its TDM / I2S bus.

[0105] After the baseboard and all modules are powered on, the FPGA of the main test module outputs data according to data format B on the digital audio transmission bus (TDM / I2S) output interface (data output can only be performed after the module under test provides a clock). Data format B rules are as follows: the interface output data is divided into two parts, the high four bits indicating the group number (e.g., ...). Figure 1 The high four bits of TDM / I2S in Group 1 are 1, and the high four bits of Group 2 are 2. The latter are used as counter fields to check the correctness of the data results (in order to make the counter change faster, it can be divided into 2 counter fields, and the two segments use the same value).

[0106] S25, after the host computer software sends the "Group Number Detection" command, it waits 2 seconds before sending the "Group Number Result Query Command" to all audio matrix modules. Upon receiving the "Group Number Result Query Command," the audio matrix module exits the test mode and reports the test results back to the host computer software.

[0107] S26, the host computer software analyzes the test results based on the reply packet and provides the correspondence between the group number and the IP.

[0108] S3, Test the digital audio serial bus output interface of the audio matrix module; specifically:

[0109] S31, after the audio matrix module receives data with group number 1 from the main test module FPGA, the host computer configures it to output the data in a fixed multicast stream, sending only one multicast stream, which contains at least K channels;

[0110] Where K represents the number of audio serial bus data lines used; for example, a 32-channel audio matrix module uses 4 lines in TDM8, and K is 4 in this case.

[0111] S32, the host computer software sends the "Subscribe to Test A" command to the audio matrix module 2-N, and the audio matrix module 2-N will subscribe to the network multicast stream sent by the audio matrix module 1; after receiving the multicast stream data, the audio matrix module 2-N sends it to the FPGA of the main test module from the digital audio serial bus output interface;

[0112] S33, after waiting for a preset time, the host computer software sends a "subscribe to test A" command to the ARM of the main test module; the ARM of the main test module sets the FPGA to start testing flag, and after the FPGA receives the testing flag, it tests the TDM data; if it conforms to the pattern of data format B, the test result is saved as correct, otherwise it is incorrect;

[0113] S34, after waiting for a preset time, the host computer software sends the "Subscribe to Test Result Query" command to the ARM of the main test module. The ARM reads the test results saved by the FPGA and sends them to the host computer software.

[0114] Furthermore, the FPGA simultaneously detects and saves the clock line frequency values ​​output by the audio matrix module (bick, mclk, lrck), and updates the result register every 8ms for the ARM to read.

[0115] S5, the host computer generates a test report based on the test results.

[0116] Furthermore, this embodiment also includes:

[0117] S4, Test the digital audio serial bus input port of the audio matrix module;

[0118] S41, the host computer software sends a "send multicast stream" command to the audio matrix module 2-N. The audio matrix module 2-N begins to send the data received from the FPGA of the main test module on the network in the form of a multicast stream, which contains at least K channels.

[0119] S42, the host computer software configures audio matrix module 1 to subscribe to the multicast streams of audio matrix modules 2-N, and sends the subscribed data to the FPGA of the main test module through the TDM output interface;

[0120] S43, after waiting for a preset time, the host computer software sends a "subscribe to test B" command to the ARM of the main test module; the ARM of the main test module sets the FPGA to start testing flag. After receiving the testing flag, the FPGA tests the TDM data. If it conforms to the pattern of data format B, the test result B is correct; otherwise, it is incorrect.

[0121] The result register is updated every 8ms for the ARM to read.

[0122] S44, after waiting for a preset time, the host computer software sends the "Subscribe to Test Result Query" command to the ARM of the main test module. The ARM reads the test results saved by the FPGA and sends them to the host computer software.

[0123] Specifically, step S5 is as follows: the host computer software generates a test report through two group number checks and input / output test response packets; specifically:

[0124] S51 is the module that records the first correct group number reply packet of the audio serial bus;

[0125] S52, the module that records the correct response package for the second "Subscription Test Result Query";

[0126] S53. Only modules that are normal in both tests are considered to be functionally normal. A test report is generated, indicating whether the erroneous module is due to a subscription error, an incorrect TDM group number, or an error in sending a multicast stream.

[0127] This embodiment also includes ping packet testing of the audio matrix modules. The host computer software performs ping tests on each audio matrix module and records the number of lost packets. If the packet loss rate reaches a threshold, the audio matrix module is considered to have a problem.

[0128] This invention uses an FPGA as the slave interface of a digital audio transmission bus (TDM / I2S) and employs a digital domain detection method. It can simultaneously test all channels of multiple modules and mark audio matrix modules with malfunctions, eliminating the need for numerous analog components and significantly reducing hardware costs. The number of audio matrix modules N to be tested can be designed based on the FPGA's pin count, and the multi-channel data analysis can be automatically completed by the FPGA. Test results are then reported to the host computer software via an ARM processor, greatly improving testing efficiency. Furthermore, as the slave interface of the digital audio transmission bus, the FPGA can switch the mode of the digital audio transmission bus via network packets sent by the host computer software to adapt to the audio interface modes of different types of audio matrix modules, offering wide applicability and high reusability.

[0129] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A batch testing system for audio matrix modules, comprising: Host computer; characterized in that: The main test module consists of an FPGA and an ARM processor, which communicate with each other via an FSMC interface. The FPGA is connected to the audio matrix module via a digital audio serial bus (TDM / I2S). The main test module's PHY module and its corresponding main test module RJ45 interface are connected to the router. N audio matrix modules; each of the N audio matrix modules includes a PHY module for an audio module and a corresponding RJ45 interface; the RJ45 interface is connected to the router; There are N audio matrix module switches, and each of the N audio matrix module switches corresponds one-to-one with one of the N audio matrix modules.

2. A batch testing method for an audio matrix module, applied to the batch testing system for the audio matrix module as described in claim 1, characterized in that: Includes the following steps: S1, The host computer sends a TDM group number detection command; S2, after receiving the "group number detection" command, the audio matrix module enters the test mode to obtain the correspondence between the group number and the IP address; and reports the correspondence between the group number and the IP address to the host computer. S3, Test the digital audio serial bus output interface of the audio matrix module; specifically, S31, after the audio matrix module receives data with group number 1 from the main test module FPGA, the host computer configures it to output the data in a fixed multicast stream, sending only one multicast stream, which contains at least K channels; where K represents the number of audio serial bus data lines used. S32, the host computer software sends the "Subscribe to Test A" command to the audio matrix module 2-N, and the audio matrix module 2-N will subscribe to the network multicast stream sent by the audio matrix module 1; after receiving the multicast stream data, the audio matrix module 2-N sends it to the FPGA of the main test module from the digital audio serial bus output interface; S33, after waiting for a preset time, the host computer software sends a "Subscribe to Detection A" command to the ARM of the main test module; the ARM of the main test module sets the FPGA to start detection flag, and after the FPGA receives the detection flag, it detects the TDM data; if it conforms to the pattern of data format B, the test result is saved as correct, otherwise it is incorrect; S34, after waiting for a preset time, the host computer software sends the "Subscribe to test result query" command to the ARM of the main test module. The ARM reads the test results saved by the FPGA and sends them to the host computer software. S5, the host computer generates a test report based on the test results.

3. The test method according to claim 2, characterized in that: Before step S1, the process includes: controlling only one of the audio matrix module switches to be on, then starting the serial number burning process of the host computer software. The host computer software discovers the audio matrix module through multicast, configures the corresponding serial number and MAC address, and writes the serial number and MAC address into the FLASH of the audio matrix module through network multicast. The serial number and MAC address of the remaining audio matrix modules can be burned by turning on the switches of the other audio matrix modules in sequence and performing the same operation.

4. The test method according to claim 2, characterized in that: The FPGA of the main test module outputs data on the digital audio transmission bus output interface according to data format B. The rules of data format B are as follows: the interface output data is divided into two parts, the high four bits indicate the group number, and the latter is used as a counter field to detect the correctness of the data result.

5. The test method according to claim 4, characterized in that: Step S2 specifically involves: S22, after receiving the "group number detection" command, the audio matrix module enters the test mode to obtain the correspondence between the group number and the IP. S23, the audio matrix module sets the test start flag and receives data from the digital audio transmission bus input interface; S24, the audio matrix module detects and judges the received data of all channels. The software code of the audio matrix module will save the high 4 bits of the channel according to data format B. If the high 4 bits of all channels are consistent and do not change, the group number is considered to be correct. The high 4 bits are saved as the group number. The test results are updated in the register every preset time. S25, after the host computer software sends the "group number detection" command, it waits for a preset time and then sends the "group number result query command" to all audio matrix modules; after receiving the "group number result query command", the audio matrix module exits the test mode and reports the test results to the host computer software; S26, the host computer software analyzes the test results based on the reply packet and provides the correspondence between the group number and the IP.

6. The test method according to claim 2, characterized in that: Also includes: S4, Test the digital audio serial bus input port of the audio matrix module; S41, the host computer software sends a "send multicast stream" command to the audio matrix module 2-N. The audio matrix module 2-N begins to send the data received from the FPGA of the main test module on the network in the form of a multicast stream, which contains at least K channels. S42, the host computer software configures audio matrix module 1 to subscribe to the multicast streams of audio matrix modules 2-N, and sends the subscribed data to the FPGA of the main test module through the TDM output interface; S43, after waiting for a preset time, the host computer software sends a "subscribe to test B" command to the ARM of the main test module; the ARM of the main test module sets the FPGA to start testing flag. After receiving the testing flag, the FPGA tests the TDM data. If it conforms to the pattern of data format B, the test result B is correct; otherwise, it is incorrect. S44, after waiting for a preset time, the host computer software sends the "Subscribe to Test Result Query" command to the ARM of the main test module. The ARM reads the test results saved by the FPGA and sends them to the host computer software.

7. The test method according to claim 6, characterized in that: Step S5 is as follows: The host computer software generates a test report by performing two group number checks and input / output test response packets.

8. The test method according to claim 7, characterized in that: Step S5 specifically involves: S51 is the module that records the first correct group number reply packet of the audio serial bus; S52, the module that records the correct response package for the second "Subscription Test Result Query"; S53. Only modules that are normal in both tests are considered to be functionally normal. A test report is generated, indicating whether the erroneous module is due to a subscription error, an incorrect TDM group number, or an error in sending a multicast stream.

9. The test method according to claim 2, characterized in that: In step S34, the FPGA simultaneously detects and saves the clock line frequency value output by the audio matrix module.

10. The test method according to claim 2, characterized in that: Also includes: The audio matrix modules are subjected to ping packet tests. The host computer software performs ping tests on each audio matrix module and records the number of lost packets. If the packet loss rate reaches a threshold, the audio matrix module is considered to have a problem.

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