Integrated radio frequency PIN switch with electrostatic protection function
By integrating a PIN RF switch module and an electrostatic discharge (ESD) protection module into the RF PIN switch, and adopting an integrated structure and process design, the problem of deep integration between PIN diodes and ESD protection devices is solved, achieving the effects of low insertion loss, high isolation, and high ESD protection level.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN JINGYANG ELECTRONICS CO LTD
- Filing Date
- 2026-05-19
- Publication Date
- 2026-06-16
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Figure CN122227650A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of radio frequency switch technology, and more specifically to an integrated radio frequency PIN switch with electrostatic discharge protection. Background Technology
[0002] A PIN switch is a type of switch that uses the characteristics of a PIN diode to control the on / off state of a radio frequency (RF) signal. Its working principle is to control the RF signal by changing the bias voltage of the PIN diode. When forward biased, the PIN diode exhibits a low impedance state, similar to a short circuit, thus acting as the switch's on function; when reverse biased, it exhibits a high impedance state, similar to an open circuit, thus acting as the switch's off function.
[0003] Electrostatic discharge (ESD) is a common physical phenomenon and is often a major factor causing reliability degradation or performance damage in electronic products. During events such as lightning strikes, large amounts of static charge can couple to exposed antenna ports through various pathways, causing permanent burnout of critical components in the subsequent transmit (Tx) or receive (Rx) circuits. Therefore, antenna ports typically require ESD or TVS (Transient Voltage Suppressor) products for electrostatic protection. Typical antenna ESD protection products include polymer TVS and semiconductor TVS. The former has superior parasitic capacitance but lower reliability and a limited number of electrostatic shocks it can withstand; the latter is usually developed based on silicon single-chip wafers and has far superior reliability compared to polymer TVS, but its parasitic capacitance is typically larger.
[0004] In radio frequency (RF) front-end systems, RF switches are typically used to isolate and switch between the transmit branch (Tx) and the receive branch (Rx). To ensure signal integrity, the parasitic capacitance of ESD components must be very low (typically <0.1pF). For RF switches, to ensure superior insertion loss and isolation, the capacitance of the PIN diodes must also be sufficiently low (typically <0.2pF). In traditional discrete ESD components and RF switches, the parasitic capacitances accumulate, causing a double blow to the RF signal. Furthermore, these discrete solutions also lead to problems such as large size and complex component management.
[0005] Figure 1(a) shows the existing series-parallel PIN RF switch circuit structure. In this circuit, 111, 112, 113, and 114 are PIN diodes; capacitors 101, 102, and 103 are DC blocking capacitors; capacitors 104 and 105 are decoupling capacitors; inductors 151 and 152 act as RF chokes; and bias_1 (121) and bias_2 (122) are both DC biased, controlling the conduction state of each PIN diode. In transmit mode (high power), 121 is positive and 122 is negative, which forward-biased conducts PIN diodes 111 and 114, and reverse-biased cuts off PIN diodes 112 and 113. The transmit branch 132 is turned on, and the receive branch 131 is turned off, allowing the radio frequency signal to be transmitted via the antenna. In receive mode (high sensitivity), 121 is negative and 122 is positive, which reverse-biased cuts off PIN diodes 111 and 114, and forward-biased conducts PIN diodes 112 and 113. The transmit branch 132 is turned off, and the receive branch 131 is turned on, receiving the weak signal sensed from the antenna.
[0006] Figure 1(b) is a block diagram of an existing RF front-end local system with electrostatic discharge protection. In the figure, antenna 141 is a signal transceiver port; ESD module 161 is an electrostatic discharge protection device or chip, which is mounted between the antenna port and ground to suppress electrostatic discharge damage to subsequent circuits; RF switch 100 is a switching unit between transmit branch 132 and receive branch 131 to realize path switching in transmit / receive mode.
[0007] In summary, electrostatic discharge (ESD) can easily couple to downstream circuits through exposed antenna ports, damaging critical components in the transmit / receive branches. Therefore, antenna ports need to be protected with ESD or TVS products (such as polymer TVS or semiconductor TVS). The former has low parasitic capacitance but poor reliability, while the latter, developed based on single-crystal silicon wafers, offers high reliability but has large parasitic capacitance. Consequently, existing integrated solutions struggle to achieve deep integration of PIN diodes and ESD protection devices without increasing parasitic capacitance, failing to simultaneously meet the requirements of low insertion loss, high isolation, and high ESD protection levels. Summary of the Invention
[0008] To address the problems in existing technologies, this invention provides an integrated RF PIN switch with electrostatic discharge (ESD) protection. By incorporating a PIN RF switch module and an ESD protection module within the integrated RF PIN switch, and employing an integrated structure and process design, the PIN RF switch module and ESD protection module are deeply integrated. The low-capacitance PN junction of the PIN diode is reused, simultaneously enabling RF channel switching and constructing an efficient ESD discharge path. This significantly reduces overall parasitic capacitance, shrinks product size, and optimizes RF signal integrity and ESD protection reliability. It simultaneously meets the requirements of low insertion loss, high isolation, and high ESD protection level, solving the problem in existing technologies where it is difficult to achieve deep integration of PIN diodes and ESD protection devices without increasing parasitic capacitance.
[0009] This invention provides an integrated radio frequency PIN switch with electrostatic discharge (ESD) protection, comprising an integrated PIN radio frequency switch module and an ESD protection module. The radio frequency switch module and the ESD protection module are compatible. The PIN radio frequency switch module contains at least one PIN diode, and the ESD protection module contains at least one ESD protection device. The PIN diode in the PIN radio frequency switch module and the ESD protection device in the ESD protection module are integrally formed and share the same PN junction. The PN junction can participate in the channel switching of radio frequency signals when the radio frequency switch module is working, and the PN junction can participate in the formation of an ESD discharge path when the ESD protection module is working.
[0010] The present invention is further improved in that the PIN radio frequency switch module is a radio frequency switch device with built-in electrostatic protection function, eliminating the need to set up an independent electrostatic protection module at the antenna port. The electrostatic protection module is an ESD protection device or a TVS device.
[0011] In a further improvement of the present invention, the PIN diode in the PIN radio frequency switch module is a multi-electrode PIN diode, which includes one anode and multiple cathodes, or multiple anodes and one cathode, and at least one anode or cathode is connected to the ESD protection device to form the electrostatic discharge path.
[0012] The present invention is further improved in that the multi-electrode PIN diode is a single-anode and multi-cathode type PIN diode, wherein the first cathode in the multi-cathode is used to connect the radio frequency signal path, and the second cathode in the multi-cathode is connected to the ESD protection device, wherein the ESD protection device is an NPN type bipolar transistor or a PNP type bipolar transistor.
[0013] The present invention is further improved in that the multi-electrode PIN diode is a single-anode and dual-cathode type PIN diode, wherein the first cathode of the dual cathode is connected to the subsequent receiving or transmitting branch through a DC blocking capacitor, and the second cathode of the dual cathode is connected to the ESD protection device. The PIN diode and the ESD protection device are connected in series to form at least two electrostatic discharge paths, and the two electrostatic discharge paths are configured to keep at least one electrostatic discharge path conducting in the transmitting mode and the receiving mode of the PIN RF switch module.
[0014] In a further improvement to the present invention, the multiple PIN diodes in the PIN RF switch module are connected in any one of the following topologies: series topology, series-parallel topology, single-pole multi-throw series topology, star topology, ring topology, or T-topology.
[0015] In a further improvement to this invention, the ESD protection device is one or more of a PIN diode, Zener diode, bipolar transistor, metal-oxide-semiconductor field-effect transistor, or silicon controlled rectifier, and the electrostatic protection module is composed of multiple ESD protection devices connected in series or in parallel.
[0016] In a further improvement, the PIN diode and the ESD protection device are integrated on the same semiconductor substrate using any one of silicon, gallium arsenide, gallium nitride, or silicon carbide processes. Alternatively, a heterogeneous integration process can be used to integrate the integrally designed PIN diode and the ESD protection device with at least one of gallium arsenide or gallium nitride high electron mobility transistors, silicon-based or silicon carbide metal-oxide-semiconductor field-effect transistors on the same semiconductor substrate, with the latter replacing part of the PIN diode to achieve radio frequency switching functionality. Multiple epitaxial layers and heavily doped buried layers are sequentially grown on the semiconductor substrate. The PIN diode consists of a P-type active region, a high-resistivity epitaxial layer, an N-type active region, or an N-type buried layer. The ESD protection device is formed by vertically stacking the N-type buried layer, the epitaxial layer, the P-type buried layer, and the semiconductor substrate. The PIN diode and the ESD protection device are physically isolated using a mesa silicon structure or a deep trench isolation structure.
[0017] In a further improvement to the present invention, the integrated radio frequency PIN switch is further provided with multiple passive devices, including DC blocking capacitors, decoupling capacitors and / or radio frequency chokes. The passive devices are integrated with the PIN diode and the ESD protection device using an integrated process, or are assembled and connected separately.
[0018] In a further improvement, the electrostatic protection module is further provided with a bidirectional electrostatic discharge path directly connected between the antenna port and the ground port. The bidirectional electrostatic discharge path is used to protect the DC blocking capacitor at the antenna port.
[0019] Compared with existing technologies, the advantages of this invention are as follows: It provides an integrated RF PIN switch with electrostatic discharge (ESD) protection. By setting a PIN RF switch module and an ESD protection module that cooperate with each other within the integrated RF PIN switch with ESD protection, and adopting an integrated structure and process design, the PIN RF switch module and ESD protection module are deeply integrated. The low-capacitance PN junction of the PIN diode is reused, and an efficient ESD discharge path is constructed while realizing RF channel switching. This significantly reduces the overall parasitic capacitance, shrinks the product size, and optimizes RF signal integrity and ESD protection reliability. It can simultaneously meet the requirements of low insertion loss, high isolation, and high ESD protection level. Moreover, it is configured with multiple parallel ESD discharge paths, ensuring that at least one ESD discharge path is effectively conductive in power-down, power-on transmit, and power-on receive modes, resulting in high ESD protection reliability. It can be adapted to various RF switch topologies and semiconductor processes, and is compatible with multi-level ESD protection, multi-port expansion, and other designs, making it widely applicable. It uses a mesa silicon structure or deep trench isolation structure to achieve device isolation, reducing manufacturing costs and improving the isolation effect between channels. This solves the problem in existing technologies of the difficulty in achieving deep integration of PIN diodes and ESD protection devices without increasing parasitic capacitance. Attached Figure Description
[0020] To more clearly illustrate the solutions in this invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0021] Figure 1(a) is a circuit diagram of an existing series-parallel PIN RF switch circuit; Figure 1(b) shows a partial circuit diagram of an existing radio frequency front-end system; Figure 2(a) is a schematic diagram of the first embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention; Figure 2(b) is a schematic diagram of the first embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention; Figure 3(a) is a schematic diagram of the structure of the standard PIN diode of the present invention; Figure 3(b) is a schematic diagram of the structure of the "single anode-multiple cathode" type PIN diode of the present invention; Figure 3(c) is a schematic diagram of the structure of the "multi-anode-single cathode" type PIN diode of the present invention; Figure 4(a) is a circuit diagram of a second embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention; Figure 4(b) is a schematic diagram of the second embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention; Figure 5(a) is a schematic diagram of the second embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention; Figure 5(b) is a schematic diagram of the second embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention; Figure 5(c) is a schematic diagram of the second embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention; Figure 6(a) is a schematic diagram of the third embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention; Figure 6(b) is a schematic diagram of the third embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention; Figure 7(a) is a circuit diagram of the fourth embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention; Figure 7(b) is a schematic diagram of the fourth embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention; Figure 8(a) is a circuit diagram of the fifth embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention; Figure 8(b) is a schematic diagram of the fifth embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention; Figure 9(a) is a circuit diagram of the sixth embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention; Figure 9(b) is a circuit diagram of the sixth embodiment of the integrated radio frequency PIN switch with electrostatic protection function of the present invention. Detailed Implementation
[0022] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs; the terminology used herein and in the specification of the application is for the purpose of describing particular embodiments only and is not intended to limit the invention; the terms "comprising" and "having," and any variations thereof, in the specification, claims, and foregoing drawings are intended to cover non-exclusive inclusion. The terms "first," "second," etc., in the specification, claims, or foregoing drawings are used to distinguish different objects and not to describe a particular order.
[0023] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0024] To enable those skilled in the art to better understand the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings.
[0025] As shown in Figures 2(a)-9(b), the present invention provides an integrated radio frequency PIN switch with electrostatic discharge (ESD) protection, comprising an integrated PIN radio frequency switch module and an ESD protection module. The radio frequency switch module and the ESD protection module are compatible. The PIN radio frequency switch module contains at least one PIN diode, and the ESD protection module contains at least one ESD protection device. The PIN diode in the PIN radio frequency switch module and the ESD protection device in the ESD protection module are integrally formed and share the same PN junction. The PN junction can participate in the channel switching of radio frequency signals when the radio frequency switch module is working, and can participate in the formation of an ESD discharge path when the ESD protection module is working. The PIN radio frequency switch module is a radio frequency switch device with built-in ESD protection, eliminating the need for an additional independent ESD protection module at the antenna port. The ESD protection module is an ESD protection device or a TVS device. Alternatively, the PIN diode in the PIN radio frequency switch module is a multi-electrode PIN diode, which includes one anode and multiple cathodes, or multiple anodes and one cathode, with at least one anode or cathode connected to the ESD protection device to form an ESD discharge path. The multi-electrode PIN diode can be a single-anode or multi-cathode type. In one type, the first cathode connects to the RF signal path, and the second cathode connects to an ESD protection device, which can be an NPN or PNP bipolar transistor. Alternatively, the multi-electrode PIN diode can be a single-anode or dual-cathode type. In this case, the first cathode of the dual-cathode configuration is connected to the subsequent receive or transmit branch via a DC blocking capacitor, and the second cathode connects to the ESD protection device. The PIN diode and ESD protection device are connected in series to form at least two electrostatic discharge (ESD) paths, and at least one ESD path is configured to remain open in both transmit and receive modes of the PIN RF switch module. The multiple PIN diodes within the PIN RF switch module can be connected using any of the following topologies: series topology, series-parallel topology, single-pole multi-throw series topology, star topology, ring topology, or T-topology. ESD protection devices are one or more of PIN diodes, Zener diodes, bipolar transistors, metal-oxide-semiconductor field-effect transistors, or silicon controlled rectifiers. The electrostatic protection module is composed of multiple ESD protection devices connected in series or in parallel.The PIN diode and ESD protection device are integrated on the same semiconductor substrate using any one of the following processes: silicon, gallium arsenide, gallium nitride, or silicon carbide. Alternatively, a heterogeneous integration process can be used to integrate an integrally designed PIN diode and ESD protection device with at least one of gallium arsenide or gallium nitride high electron mobility transistors, silicon-based or silicon carbide metal-oxide-semiconductor field-effect transistors on the same semiconductor substrate. The latter replaces part of the PIN diode to achieve the RF switching function. Multiple epitaxial layers and heavily doped buried layers are sequentially grown on the semiconductor substrate. The PIN diode consists of a P-type active region, a high-resistivity epitaxial layer, an N-type active region, or an N-type buried layer. The ESD protection device consists of an N-type buried layer, an epitaxial layer, a P-type buried layer, and the semiconductor substrate stacked vertically. The PIN diode and ESD protection device are physically isolated using a mesa silicon structure or a deep trench isolation structure. The integrated RF PIN switch also includes multiple passive devices, including DC blocking capacitors, decoupling capacitors, and / or RF chokes. These passive devices are integrated with the PIN diode and ESD protection device using an integrated process or assembled and connected separately. The electrostatic discharge module also includes a bidirectional electrostatic discharge path that is directly connected between the antenna port and the ground port. This bidirectional electrostatic discharge path is used to protect the DC blocking capacitor at the antenna port.
[0026] As shown in Figures 2(a) and 2(b), as a first embodiment of the present invention, Figure 2(a) shows an integrated RF PIN switch 200 with electrostatic discharge (ESD) protection, comprising two parts: a "PIN RF switch module 211" and an "ESD protection module 212". By integrating the PIN diode with the ESD protection device into a single structure and process design, the critical low-capacitance PN junction can be reused, effectively reducing the parasitic capacitance of the overall structure, shrinking the product size, and optimizing reliability. Figure 2(b) is a novel ESD-enhanced RF switch, which is basically similar to the integration method of the conventional RF switch in Figure 1(b). The difference is that the novel RF switch 200 has a built-in ESD protection module, eliminating the need to mount additional ESD or TVS materials at the antenna port, saving PCB board space and simplifying material management. Here, 231 is the receiving branch (Rx), 232 is the transmitting branch (Tx), and 241 is the RF antenna.
[0027] As shown in Figures 3(a)-3(c), Figure 3(a) shows a standard PIN diode 311, which has an anode 371 and a cathode 372. Figure 3(b) shows the "single anode-multiple cathode" PIN diode 312 proposed in this invention, which has an anode 373 and cathodes 374 and 375, applicable to subsequent embodiments two, three, five, and six; Figure 3(c) shows the "multiple anode-single cathode" PIN diode 313 proposed in this invention, which has an anode 376, an anode 377, and a cathode 378, applicable to subsequent embodiment four. Each of the above three types of PIN diodes contains only one PN junction for rectification and reducing capacitance. The key innovation of this invention lies in the introduction of a multi-electrode structure (multiple anodes or multiple cathodes) for the PIN diode while reusing the critical low-capacitance PN junction. This provides an additional ESD protection path while ensuring the normal circuit function of the PIN diode, providing electrostatic discharge protection for the RF switch without incurring additional parasitic capacitance, thus optimizing the overall RF system's capacitive load and improving signal integrity.
[0028] As shown in Figures 4(a) and 4(b), Figure 4(a) is a circuit diagram of the second embodiment of the present invention. Based on the "series-type PIN RF switch" topology, the present invention optimizes the structure and process to transform each PIN diode into a "single anode-dual cathode structure," that is, 413 and 414 each have two cathodes. The first cathode of 413 is connected to the subsequent receiving branch 431 through a DC blocking capacitor 402, and the first cathode of 414 is connected to the subsequent transmitting branch 432 through a DC blocking capacitor 403; while the second cathode of 413 is connected to the ESD protection device NPN415, and the second cathode of 414 is connected to the ESD protection device NPN416, forming two electrostatic discharge channels 493 and 494. Ultimately, the ESD protection device and the PIN diode can reuse the same low-capacitance PN junction, effectively reducing the total parasitic capacitance of the overall structure. Note that all electrostatic discharge channels must have bidirectional withstand voltage capability to ensure a good cutoff state when transmitting RF signals in the transmitting branch (Tx), thus avoiding abnormal clipping of the RF signal. Figure 4(b) is a device structure diagram of Embodiment 2 of the present invention. A first N-type epitaxial layer 481 and a second N-type epitaxial layer 482 are grown sequentially on an N-type substrate 492, wherein the resistivity of the second N-type epitaxial layer 482 is preferably >= 10 Ohm•cm, and various heavily doped buried layer structures are constructed (wherein the doping concentration of the first N-type buried layer 471 is preferably 1e18cm). - ³~5e19cm - ³, the doping concentration of the first P-type buried layer 473 is preferably 5e16cm. - ³~5e18cm -³), achieving integrated manufacturing of PIN diodes and ESD protection devices. A deep trench isolation structure 491 is used for effective physical isolation of multiple devices. A PIN diode is formed by P-type active region 462, P-type active region 463, a second N-type epitaxial layer 482, N-type active region 461, N-type active region 464, and a first N-type buried layer 471. N-type active regions 461 and 464 serve as the first cathode of the PIN diode, connected to the subsequent receiving branch (Rx) 431 or transmitting branch (Tx) 432 via DC blocking capacitors 402 and 403 for transmitting radio frequency signals. The corresponding PIN diode is horizontal. The current paths are 413-1 and 414-1; the first N-type buried layer 471 serves as the second cathode of the PIN diode, forming a vertical stacked structure with the NPN transistor below it (first N-type buried layer 471, first N-type epitaxial layer 481, first P-type buried layer 473, N-type substrate 492), together constituting the ESD protection module (containing two parallel electrostatic discharge channels 493 and 494), providing reliable electrostatic protection for the RF switch and even the entire RF front-end circuit. During manufacturing, by adjusting the doping morphology of the first P-type buried layer 473, such as doping concentration and annealing time, the electrical characteristics of the ESD protection module, such as the turn-on voltage and sustaining voltage, can be optimized individually. In Figure 4(b), in addition to the PIN diode and ESD protection device, other passive devices, such as various capacitors and inductors, can be integrated through wire bonding packaging, low-temperature co-fired ceramic (LTCC), high-temperature co-fired ceramic (HTCC), integrated passive device (IPD), etc.
[0029] As shown in Figures 5(a) and 5(c), the second embodiment of the present invention operates in different states of the ESD protection module. In the power-down state, when an ESD event occurs, since both DC bias 421 and DC bias 422 are floating, the two ESD discharge paths 493 and 494 in the ESD protection module can be successfully triggered to discharge ESD charge, as shown in Figure 5(a). In the power-on state, the potential polarities of DC bias 421 and DC bias 422 are always opposite, alternating between high and low potentials. When an ESD event occurs, if the system is in the transmitting mode (DC bias 421 is at a high potential, DC bias 422 is at a negative potential), then the ESD current path 494 (near the transmitting branch (Tx) 432) can be triggered normally, while the ESD current path 493 (near the receiving branch (Rx) 431) will shift to the right due to the strong reverse bias of PIN diode 413, as the entire IV electrical curve will be superimposed on the DC bias 421 level. Ultimately, the ESD charge is discharged to ground primarily through ESD current path 494 (near the transmitting branch (Tx) 432), as shown in Figure 5(b). In the power-on state, DC bias 421 is at a high potential, and DC bias 422 is at a negative potential. When an ESD event occurs, ESD current path 493 (near the receiving branch (Rx) 431) can be normally triggered and turned on. However, because the PIN diode 414 of ESD current path 494 (near the transmitting branch (Tx) 432) is strongly reverse biased, the IV electrical curve will be superimposed on the DC bias 422 level and shifted to the right. Ultimately, the ESD charge is discharged to ground primarily through ESD current path 493 (near the receiving branch (Rx) 431), as shown in Figure 5(c). In summary, regardless of whether the system is in a power-on or power-off state, and regardless of whether it is in transmitting or receiving mode, this invention can always ensure that at least one ESD discharge path can be triggered in a timely and effective manner for electrostatic protection.
[0030] As shown in Figures 6(a) and 6(b), in the third embodiment of the present invention, compared with the second embodiment, the circuit topology of the RF switch is changed from "series type" to "series-parallel type". In this case, the PIN diodes configured in series are 613 and 614, and the PIN diodes configured in parallel are 611 and 612. Furthermore, the forward ESD current path 693, forward ESD current path 694, and reverse ESD current path 695 are no longer reused, remaining independent and connected in parallel. This newly added reverse ESD discharge path is composed of an NPN transistor 617 with its base floating. Its bidirectional withstand voltage capability must also ensure a good cutoff state when the transmit branch (Tx) transmits RF signals to avoid abnormal clipping of the RF signal. Compared with Figure 4(a), the advantage of Figure 6(a) is that the designs of the forward and reverse ESD devices are decoupled, resulting in a more flexible structure; the disadvantage is that the newly added reverse ESD device sacrifices some parasitic capacitance, compromising the integrity of the RF signal. Figure 6(b) is a device structure diagram of Embodiment 3 of the present invention. Compared with Embodiment 2, a PIN diode 612 connected in parallel to ground is added to the transmitting branch (Tx) 632, and a PIN diode 611 connected in parallel to ground is added to the receiving branch (Rx) 631. The corresponding ESD current paths are 612-1 and 611-1, flowing vertically. The original series-connected PIN diodes are now PIN diodes 614 and 613, with corresponding current paths 614-1 and 613-1, flowing horizontally. In addition, a vertical NPN device with a floating base (composed of an N-type active region 666, a second N-type epitaxial layer 682, a second P-type buried layer 675, a first N-type epitaxial layer 681, and an N-type substrate 692) is added between the antenna port and ground for additional ESD charge discharge. The doping concentration of the second P-type buried layer 675 is preferably 1e16cm⁻¹ by independently adjusting the doping concentration. - ³~1e19cm - ³, the withstand voltage and ESD protection characteristics of this vertical NPN device can be adjusted, increasing the flexibility of device design. Furthermore, it is worth noting that the trigger turn-on voltage of the newly added NPN device is completely unaffected by the DC bias 621 and DC bias 622 potentials, further enhancing the stability of ESD protection. In Figure 6(b), the device structure of multiple PIN diodes can be freely adjusted according to requirements. For example, on the same process platform, the effective intrinsic region thickness of each PIN diode can be individually adjusted by using P+ active regions with different junction depths, thereby optimizing its insertion loss and isolation performance. In addition to PIN diodes and ESD protection devices, other passive devices, such as various capacitors and inductors, can also be integrated through wire bonding packaging, low-temperature co-fired ceramic (LTCC), high-temperature co-fired ceramic (HTCC), integrated passive device (IPD), etc.
[0031] As shown in Figures 7(a) and 7(b), as the fourth embodiment of the present invention, Embodiment 4 is based on Embodiment 3, but the doping type of all regions of the semiconductor structure is reversed, resulting in a complementary structure. Furthermore, the electrostatic protection of the DC blocking capacitor 701 at the antenna port is further optimized. As shown in Figure 7(a), in the circuit topology of the RF switch, the connection polarities of PIN diodes 711, 712, 713, and 714 are all reversed. Correspondingly, the potentials of DC bias 721 and DC bias 722 also need to be reversed according to the operating mode: that is, when DC bias 721 is high and DC bias 722 is negative, the system operates in receive mode. At this time, the receive branch (Rx) 731 is turned on, and the transmit branch (Tx) 732 is turned off; when DC bias 721 is negative and DC bias 722 is high, the system operates in transmit mode. At this time, the receive branch (Rx) 731 is turned off, and the transmit branch (Tx) 732 is turned on. Furthermore, the two PIN diodes 713 and 714, configured in series, are modified into a "dual-anode-single-cathode structure" to facilitate the integration of the ESD protection module. The bidirectional ESD discharge path 793 is now composed of a PNP transistor 717 with its base floating, providing bidirectional DC blocking capability and electrostatic discharge protection. Note that it is directly mounted between the antenna port 741 and the ground port. Compared to the previous embodiment, this mounting method further protects the DC blocking capacitor 701, preventing damage during ESD discharge events. The ESD discharge path 794 is composed of PIN diode 713 and PNP transistor 715 connected in series, while the ESD discharge path 795 is composed of PIN diode 714 and PNP transistor 716 connected in series. Mounted after the DC blocking capacitor 701, it cannot directly protect the DC blocking capacitor and is mainly used for electrostatic protection of subsequent RF modules. As shown in Figure 7(b), at this time, the horizontal current paths of the PIN diodes 713 and 714 connected in series are 713-1 and 714-1, and the vertical current paths of the PIN diodes 711 and 712 connected in parallel are 711-1 and 712-1.Furthermore, the reverse ESD current path 794 is formed by vertically stacking a PNP transistor (P-type substrate 792, first N-type buried layer 771, first P-type epitaxial layer 781, first P-type buried layer 773) and a PIN diode 713 (first P-type buried layer 773, second P-type epitaxial layer 782, N-type active region 762), and the reverse ESD current path 795 is formed by vertically stacking a PNP transistor (P-type substrate 792, first N-type buried layer 772, first P-type epitaxial layer 762, first P-type epitaxial layer 773). The first P-type buried layer 781, the second P-type epitaxial layer 774, and the N-type active region 763 are stacked vertically. The bidirectional ESD discharge path 793 is composed of a PNP transistor (P-type active region 766, the second P-type epitaxial layer 782, the second N-type buried layer 775, the first P-type epitaxial layer 781, and the P-type substrate 792), which is directly mounted between the antenna port 741 and the ground port.
[0032] As shown in Figures 8(a) and 8(b), as the fifth embodiment of the present invention, this embodiment is based on the second embodiment and further employs PIN diodes 813 and 814 with a "single anode-three cathode structure" to construct more ESD discharge paths without increasing parasitic capacitance, thereby enhancing the electrostatic protection effect. As shown in the circuit diagram of Figure 8(a), PIN diodes 813 and 814 each have one anode and three cathodes. The connection method of the first two cathodes of PIN diode 813 is the same as in embodiment 2. The third cathode of PIN diode 813 is connected in series with a Zener diode 817 to form an additional horizontal bidirectional ESD discharge path 895. The connection method of the first two cathodes of PIN diode 814 is the same as in embodiment 2. The third cathode of PIN diode 814 is connected in series with a Zener diode 818 to form an additional horizontal bidirectional ESD discharge path 896. This "horizontal bidirectional ESD discharge path" can be combined with the existing vertical ESD discharge path 893 and vertical ESD discharge path 894 to form a multi-level ESD protection network when an ESD event occurs. This aims to achieve better electrostatic protection against various electrostatic discharge pulses (such as IEC gun discharge, human body model discharge (HBM), and ultra-fast transmission line pulse discharge (VF-TLP)). Simultaneously, due to the full reuse of the critical low-capacitance PN junction, no parasitic capacitance needs to be sacrificed throughout the process, ensuring the superior intrinsic performance of the RF switch. Figure 8(b) shows the device structure diagram of Embodiment 5. Compared to Embodiment 2, all buried layer structures are replaced with epitaxial layers of similar doping concentration to simplify the manufacturing process. The preferred doping concentration of the first P-type epitaxial layer 880 is 5e16cm. - ³~5e18cm - ³, the doping concentration of the second N-type epitaxial layer 882 is preferably 1e18cm. -³~5e19cm - ³, the third N-type epitaxial layer 883 is lightly doped, and its resistivity is preferably >=10 Ohm•cm. Furthermore, as shown in Figure 8(b), the vertical ESD discharge path 893 is formed by connecting a PIN diode 813 (P-type active region 862, third N-type epitaxial layer 883, second N-type epitaxial layer 882) and an NPN transistor (second N-type epitaxial layer 882, first epitaxial layer 881, first P-type epitaxial layer 880, N-type substrate 892) in series. The vertical ESD discharge path 894 is formed by connecting a PIN diode 814 (P-type active region 865, third N-type epitaxial layer 883, second N-type epitaxial layer 882) and an NPN transistor (second N-type epitaxial layer 882, first epitaxial layer 881, first P-type epitaxial layer 880, N-type substrate 892) in series. The newly added horizontal bidirectional ESD discharge paths 895 and 896 provide bidirectional electrostatic discharge protection. Path 895 consists of a P-type active region 862, a third N-type epitaxial layer 883, an N-type well region 867, and a P-type active region 863. Path 896 consists of a P-type active region 865, a third N-type epitaxial layer 883, an N-type well region 868, and a P-type active region 864. Overall, compared to the vertical ESD discharge paths 893 and 894, the horizontal bidirectional ESD discharge paths 895 and 896 have shorter current path lengths, thus potentially resulting in faster response speeds and lower clamping voltages, thereby improving the overall electrostatic protection effect.
[0033] As shown in Figures 9(a) and 9(b), in the sixth embodiment of the present invention, the topology of the PIN RF switch is not limited to the above embodiments, but should include various common switch topologies, such as single-pole multi-throw series topology, x-pole y-throw star topology, x-pole y-throw ring topology, x-pole y-throw T-type topology, etc., where x and y are both positive integers. As shown in Figure 9(a), based on the second embodiment, the sixth embodiment further extends the topology of the RF switch from "single-pole double-throw" to "single-pole N-throw" and adopts a "star network structure". At this time, there is a common antenna port 941 and N RF ports, RF port 942, RF port 943, and RF port 944, where N is a positive integer. In this embodiment, a "single-anode-multiple-cathode" type PIN diode is also used, which can equip each RF branch with an ESD discharge channel to ground. Therefore, theoretically, the ESD energy from the antenna port can be discharged to ground from any RF branch. However, in practical applications, considering that the DC bias state of each RF branch is different, the effectiveness of ESD discharge also has different degrees of impact. In fact, in different operating modes, only some ESD discharge paths can play an effective electrostatic protection role. In addition, compared with other embodiments, in this embodiment, the DC bias circuit on the antenna common path is simplified to grounding through an RF choke. Figure 9(b) shows the device structure diagram of Embodiment Six, which is different from Embodiment Two in two main ways. First, a "mesa silicon structure" is used instead of a "deep trench structure (DTI)" for isolation between channels, which is expected to further reduce manufacturing costs and improve isolation effect. Second, PIN diodes 913, PIN diodes 914 and PIN diodes 915 all adopt a "symmetrical" layout. At this time, the anode P-type heavily doped active region 967 is surrounded by the cathode N-type heavily doped active region 961. On the one hand, it can achieve a more uniform current distribution, and on the other hand, it can protect the key PN junction from damage during mesa manufacturing.
[0034] As can be seen from the above, this invention provides an integrated RF PIN switch with electrostatic discharge (ESD) protection. By incorporating a PIN RF switch module and an ESD protection module within the integrated RF PIN switch, and employing an integrated structure and process design, the PIN RF switch module and ESD protection module are deeply integrated. The low-capacitance PN junction of the PIN diode is reused, simultaneously achieving RF channel switching and constructing an efficient ESD discharge path. This significantly reduces overall parasitic capacitance, shrinks product size, and optimizes RF signal integrity and ESD protection reliability. It can simultaneously meet the requirements of low insertion loss, high isolation, and high ESD protection level. Furthermore, multiple parallel ESD discharge paths are configured, ensuring at least one ESD discharge path remains effectively conductive in power-down, power-on transmit, and power-on receive modes, resulting in high ESD protection reliability. It is adaptable to various RF switch topologies and semiconductor processes, compatible with multi-level ESD protection, multi-port expansion, and other designs, making it widely applicable. The use of a mesa silicon structure or deep trench isolation structure for device isolation reduces manufacturing costs and improves inter-channel isolation, solving the problem in existing technologies where deep integration of PIN diodes and ESD protection devices is difficult without increasing parasitic capacitance.
[0035] The specific embodiments described above are preferred embodiments of the present invention and are not intended to limit the specific scope of the present invention. The scope of the present invention includes, but is not limited to, these specific embodiments. All equivalent changes made in accordance with the present invention are within the protection scope of the present invention.
Claims
1. An integrated radio frequency PIN switch with electrostatic discharge protection, characterized in that: The device includes an integrated PIN radio frequency switch module and an electrostatic discharge (ESD) protection module. The radio frequency switch module and the ESD protection module are compatible. The PIN radio frequency switch module contains at least one PIN diode, and the ESD protection module contains at least one ESD protection device. The PIN diode in the PIN radio frequency switch module and the ESD protection device in the ESD protection module are integrally formed and share the same PN junction. The PN junction can participate in the channel switching of radio frequency signals when the radio frequency switch module is working, and the PN junction can participate in the formation of an electrostatic discharge path when the ESD protection module is working.
2. The integrated radio frequency PIN switch with electrostatic discharge protection function according to claim 1, characterized in that: The PIN RF switch module is an RF switch device with built-in electrostatic discharge (ESD) protection, eliminating the need for an additional independent ESD protection module at the antenna port. The ESD protection module is either an ESD protection device or a TVS device.
3. The integrated radio frequency PIN switch with electrostatic discharge protection function according to claim 1, characterized in that: The PIN diode in the PIN RF switch module is a multi-electrode PIN diode, which includes one anode and multiple cathodes, or multiple anodes and one cathode, and at least one anode or cathode is connected to the ESD protection device to form the electrostatic discharge path.
4. The integrated radio frequency PIN switch with electrostatic discharge protection function according to claim 3, characterized in that: The multi-electrode PIN diode is a single-anode and multi-cathode type PIN diode. The first cathode in the multi-cathode structure is used to connect the radio frequency signal path, and the second cathode in the multi-cathode structure is connected to the ESD protection device, which is an NPN bipolar transistor or a PNP bipolar transistor.
5. The integrated radio frequency PIN switch with electrostatic discharge protection function according to claim 3, characterized in that: The multi-electrode PIN diode is a single-anode and dual-cathode type PIN diode. The first cathode of the dual cathode is connected to the subsequent receiving or transmitting branch through a DC blocking capacitor, and the second cathode of the dual cathode is connected to the ESD protection device. The PIN diode and the ESD protection device are connected in series to form at least two electrostatic discharge paths, and the two electrostatic discharge paths are configured to keep at least one electrostatic discharge path conducting in the transmitting and receiving modes of the PIN RF switch module.
6. The integrated radio frequency PIN switch with electrostatic discharge protection according to claim 4 or 5, characterized in that: The multiple PIN diodes in the PIN RF switch module are connected in any one of the following topologies: series topology, series-parallel topology, single-pole multi-throw series topology, star topology, ring topology, or T-topology.
7. The integrated radio frequency PIN switch with electrostatic discharge protection function according to claim 6, characterized in that: The ESD protection device is one or more of the following: PIN diode, Zener diode, bipolar transistor, metal-oxide-semiconductor field-effect transistor, or silicon controlled rectifier. The electrostatic protection module is composed of multiple ESD protection devices connected in series or in parallel.
8. The integrated radio frequency PIN switch with electrostatic discharge protection function according to claim 7, characterized in that: The PIN diode and the ESD protection device are integrated on the same semiconductor substrate using any one of silicon, gallium arsenide, gallium nitride, or silicon carbide processes. Alternatively, a heterogeneous integration process can be used to integrate the PIN diode and the ESD protection device, along with at least one of gallium arsenide or gallium nitride high electron mobility transistors, silicon-based or silicon carbide metal-oxide-semiconductor field-effect transistors, onto the same semiconductor substrate. The latter replaces part of the PIN diode to achieve radio frequency switching functionality. Multiple epitaxial layers and heavily doped buried layers are sequentially grown on the semiconductor substrate. The PIN diode consists of a P-type active region, a high-resistivity epitaxial layer, an N-type active region, or an N-type buried layer. The ESD protection device is formed by vertically stacking the N-type buried layer, the epitaxial layer, the P-type buried layer, and the semiconductor substrate. The PIN diode and the ESD protection device are physically isolated using a mesa silicon structure or a deep trench isolation structure.
9. The integrated radio frequency PIN switch with electrostatic discharge protection function according to claim 8, characterized in that: The integrated RF PIN switch also includes multiple passive components, including DC blocking capacitors, decoupling capacitors, and RF chokes. The passive components are integrated with the PIN diode and the ESD protection device using an integrated process, or they are assembled and connected separately.
10. The integrated radio frequency PIN switch with electrostatic protection function according to claim 9, characterized in that: The electrostatic discharge module is also provided with a bidirectional electrostatic discharge path directly connected between the antenna port and the ground port. The bidirectional electrostatic discharge path is used to protect the DC blocking capacitor at the antenna port.