A bidirectional electrostatic protection device and a manufacturing method thereof

Abstract

A bidirectional electrostatic discharge (ESD) protection device and its manufacturing method are disclosed. The bidirectional ESD protection device includes: a substrate having a first conductivity type; a deeply buried doped region having a second conductivity type; a base region having the second conductivity type and having a ring structure, with the deeply buried doped region and the base region connected vertically; a central collector region, outer collector regions, and an emitter region formed in the inner region surrounded by the base region, all of which have the first conductivity type; wherein the central collector region is located at the center of the inner region, multiple outer collector regions are symmetrically distributed on both sides of the central collector region, and multiple emitter regions are located between the central collector region and the outer collector regions; the multiple outer collector regions are connected to a first port, and the central collector region is connected to a second port. The bidirectional ESD protection device of this application can provide bidirectional ESD protection and has a small layout area and high integration.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more specifically to a bidirectional electrostatic discharge (ESD) protection device and its manufacturing method. Background Technology

[0002] With the continuous advancement of integrated circuit (IC) manufacturing processes, circuit designs are becoming increasingly diverse and complex. In product applications, especially in power systems with AC components, such as power interface protection and wireless communication module protection, or systems that may generate reverse surges, circuit nodes often need to withstand negative voltage conditions. This bidirectional voltage stress scenario is particularly common in products based on the bipolar-CMOS-DMOS (BCD) platform. Therefore, circuit designs must not only consider the device's withstand capability for both positive and negative voltages, but also its bidirectional electrostatic discharge (ESD) protection capability.

[0003] However, conventional junction devices have inherent limitations in their voltage withstand characteristics. A diode exhibits reverse blocking characteristics in one direction, capable of withstanding a certain high voltage; however, in the other direction, it exhibits forward diode characteristics, with a breakdown voltage of only about 0.7 volts, unable to withstand high voltage. Metal-oxide-semiconductor field-effect transistors (such as GGNMOS) primarily utilize their parasitic bipolar junction transistor characteristics to withstand high voltage in one direction; however, in the opposite direction, their body diode will also conduct forward. Bipolar junction transistors (BJTs) also have a similar problem: they can withstand high voltage in one direction using their BJT characteristics, but in the other direction, their emitter junction or collector junction acts as a forward diode, with an extremely low breakdown voltage. Therefore, traditional basic devices only possess unidirectional voltage withstand capabilities and cannot directly meet the application requirements of bidirectional voltage withstand.

[0004] To address this issue, a common approach in existing technologies is to construct an equivalent bidirectional withstand voltage circuit by connecting multiple traditional basic components in series or parallel in opposite directions. However, this approach introduces a large number of additional components, resulting in a cumbersome and complex circuit structure, significantly increasing the chip's layout area and thus raising costs. More seriously, the complex circuit layout can easily introduce unexpected parasitic paths, causing the circuit to fail under certain conditions and reducing the overall reliability of the product. Summary of the Invention

[0005] The summary of this application introduces a series of simplified concepts, which will be further explained in detail in the detailed description section. This summary is not intended to limit the key features and essential technical features of the claimed technical solution, nor is it intended to determine the scope of protection of the claimed technical solution.

[0006] To address the existing problems, this application provides a bidirectional electrostatic discharge (ESD) protection device, which includes: Substrate having a first conductivity type; A deeply buried doped region formed within the substrate, the deeply buried doped region having a second conductivity type; A base region is formed in the substrate, the base region has the second conductivity type, the base region has a ring structure, and the buried doped region covers the base region and the internal region surrounded by the base region from below, and the buried doped region is vertically connected to the base region; A central collector region, an outer collector region, and an emitter region are formed in the internal region of the substrate, and the central collector region, the outer collector region, and the emitter region all have the first conductivity type; The central collector area is located at the center of the inner region, and there are multiple outer collector areas symmetrically distributed on both sides of the central collector area. The transmitting area is located between the central collector area and each of the outer collector areas on both sides. The base region is electrically connected to the emitter region, the multiple outer collector regions are connected to the first port of the bidirectional electrostatic discharge protection device, and the central collector region is connected to the second port of the bidirectional electrostatic discharge protection device.

[0007] In one embodiment, the outer collector region, the emitter region, and the central collector region are strip structures arranged in parallel along a first direction, with an isolation structure formed between adjacent strip structures, and an isolation structure formed between the base region and the outer collector region, wherein the first direction is parallel to the surface of the substrate.

[0008] In one embodiment, the outer collector area includes a first outer collector area and a second outer collector area, which are located on both sides of the central collector area, respectively; The transmission area includes a first transmission area and a second transmission area. The first transmission area is located between the central collector area and the first outer collector area, and the second transmission area is located between the central collector area and the second outer collector area.

[0009] In one embodiment, the first outer collector region, the first transmitter region, the central collector region, the second transmitter region, and the second outer collector region sequentially constitute a repeating unit, and the inner region contains a plurality of the repeating units.

[0010] In one embodiment, the central collector region and the outer collector region each include an upper heavily doped region of a first conductivity type and a lower lightly doped region of a first conductivity type; The base region includes an upper heavily doped region of the second conductivity type and a lower lightly doped region of the second conductivity type.

[0011] In one embodiment, the lightly doped region of the base region is connected to the deeply buried doped region; The lightly doped regions of the outer collector region and the central collector region are connected to or separated from the deeply buried doped region.

[0012] In one embodiment, the emitter region includes an upper heavily doped region of a first conductivity type, and a lightly doped region of a second conductivity type is formed below the emitter region. The lightly doped region of the second conductivity type is connected to the buried doped region, thereby isolating the central collector region from the outer collector region.

[0013] In one embodiment, a substrate contact region having a first conductivity type is further formed in the substrate, the substrate contact region surrounding the base region.

[0014] In one embodiment, the distance between the substrate contact area and the base area is greater than the distance between the outer collector area and the adjacent emitter area, and is also greater than the distance between the central collector area and the adjacent emitter area.

[0015] In one embodiment, the distance between the base region and the outer collector region is greater than the distance between the outer collector region and the adjacent transmitter region, and is also greater than the distance between the central collector region and the adjacent transmitter region.

[0016] In one embodiment, the withstand voltage value in the direction from the second port to the first port is positively correlated with the spacing between the outer collector region and the adjacent emitter region, and negatively correlated with the doping concentration of the lightly doped region of the outer collector region; The withstand voltage value in the direction from the first port to the second port is positively correlated with the spacing between the central collector region and the adjacent emitter region, and negatively correlated with the doping concentration of the lightly doped region of the central collector region.

[0017] Another aspect of this application provides a method for manufacturing a bidirectional electrostatic discharge (ESD) protection device, the method comprising: Provide a substrate having a first conductivity type; The substrate is implanted with ions of a second conductivity type to form a deeply buried doped region inside the substrate; The substrate is implanted with ions of a second conductivity type to form a base region in the substrate. The base region has a ring structure. The buried doped region covers the base region and the internal region surrounded by the base region from below, and the buried doped region is vertically connected to the base region. The substrate is implanted with ions of a first conductivity type to form a central collector region, an outer collector region, and an emitter region in the internal region of the substrate; The central collector area is located at the center of the inner region, and there are multiple outer collector areas symmetrically distributed on both sides of the central collector area. The transmitting area is located between the central collector area and each of the outer collector areas on both sides. The base region is electrically connected to the emitter region, the multiple outer collector regions are connected to the first port of the bidirectional electrostatic discharge protection device, and the central collector region is connected to the second port of the bidirectional electrostatic discharge protection device.

[0018] According to the embodiments of this application, the bidirectional electrostatic discharge (ESD) protection device and its manufacturing method adopt a symmetrical structure design. The central collector area is located in the center of the internal region, and the outer collector areas are symmetrically distributed on both sides. The emitting area is located between the central collector area and the outer collector areas. The circuit frame seen from the first port and the second port is consistent, which enables the device to effectively discharge electrostatic current in both directions, thereby achieving bidirectional ESD protection. This overcomes the defect of traditional unidirectional devices that require reverse series and parallel connection to achieve bidirectional protection. A single device can replace the traditional bidirectional ESD protection circuit composed of multiple devices connected in series and parallel, significantly reducing the chip layout area and improving integration. At the same time, the withstand voltage values ​​of the device in both directions can be adjusted independently. Attached Figure Description

[0019] The following drawings, which are incorporated herein by reference and are used to understand this application, illustrate embodiments of the invention and their descriptions to explain the principles of the invention.

[0020] In the attached image: Figure 1 A cross-sectional view of a bidirectional electrostatic discharge (ESD) protection device according to an embodiment of this application is shown; Figure 2 A top view of a bidirectional electrostatic discharge (ESD) protection device according to an embodiment of this application is shown; Figure 3 A schematic diagram of the first discharge path of a bidirectional electrostatic discharge protection device according to an embodiment of this application is shown; Figure 4 A schematic diagram of the second discharge path of a bidirectional electrostatic discharge protection device according to an embodiment of this application is shown; Figure 5 An equivalent circuit diagram of a bidirectional electrostatic discharge (ESD) protection device according to an embodiment of this application is shown; Figures 6A-6D The test curves of the bidirectional electrostatic discharge protection device according to an embodiment of this application are shown; Figure 7 A schematic flowchart illustrating a method for manufacturing a bidirectional electrostatic discharge (ESD) protection device according to an embodiment of this application is shown. Detailed Implementation

[0021] The following description provides numerous specific details to offer a more thorough understanding of this application. However, it will be apparent to those skilled in the art that this application can be practiced without one or more of these details. In other instances, certain technical features well-known in the art have not been described to avoid confusion with this application.

[0022] It should be understood that this application can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of this application to those skilled in the art. In the drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated. The same reference numerals denote the same elements throughout.

[0023] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or portion discussed below may be referred to as the second element, component, area, layer, or portion.

[0024] Spatial relation terms such as “below,” “under,” “below,” “below,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below” or “below” other elements or features will be oriented “above” other elements or features. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.

[0025] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0026] To fully understand this application, detailed steps and structures will be presented in the following description to illustrate the technical solutions proposed in this application. Preferred embodiments of this application are described in detail below; however, in addition to these detailed descriptions, this application may have other implementation methods.

[0027] Below, for reference Figures 1-2 The bidirectional electrostatic discharge protection device according to the embodiments of this application will be described in detail, wherein, Figure 1 A cross-sectional view of a bidirectional electrostatic discharge (ESD) protection device according to an embodiment of this application is shown; Figure 2 A top view of an electrostatic discharge protection device according to an embodiment of this application is shown. Figure 1 for Figure 2 A cross-sectional view at the position indicated by the dashed line.

[0028] like Figure 1 and Figure 2 As shown, the bidirectional electrostatic discharge (ESD) protection device provided in this embodiment includes a substrate 100, on which all other structures are formed. When the bidirectional ESD protection device is in operation, the substrate 100 is typically connected to a fixed potential, such as a ground terminal, to provide a stable reference potential for the device. The substrate 100 has a first conductivity type, which is P-type, and correspondingly a second conductivity type, which is N-type.

[0029] In this embodiment, the substrate 100 can be an epitaxial layer, i.e., an epitaxial growth layer formed on a semiconductor substrate. The thickness and doping concentration of the epitaxial layer are designed according to the voltage withstand requirements of the device. However, those skilled in the art should understand that the substrate in this embodiment can also be a bulk silicon substrate or other types of semiconductor substrates, as long as the basic semiconductor material requirements are met.

[0030] A buried doped region 101 is formed within the substrate. This buried doped region 101 has a second conductivity type, i.e., N-type, opposite to the first conductivity type. The buried doped region 101 extends laterally in a planar shape, covering a predetermined active region of the device. Its function is to connect all base regions and isolate the outer and central collector regions, electrically isolating the collector region of the device above from the substrate body below, preventing substrate parasitic effects from interfering with normal device operation, and also helping to suppress latch-up effects. The buried doped region 101 is formed through high-energy ion implantation combined with high-temperature push-in. The implantation energy needs to be high enough to allow the doped atoms to reach the required depth. After implantation, annealing activates and diffuses the impurities, forming a buried layer with a certain thickness and lateral extension.

[0031] A base region 102 is formed in the substrate 100 above the buried doped region 101. This base region 102 has a second conductivity type, namely N-type. The base region 102 is a ring structure surrounding an internal region. The function of the base region 102 is to form the common base of the device, providing base bias for the internal bipolar junction transistor. The base region 102 and the buried doped region 101 are vertically connected, and together they form an isolation wall surrounding the internal region of the device, effectively blocking interference and parasitic effects from the substrate 100. At the same time, the buried doped region 101 covers the base region 102 and its inner internal region, ensuring the integrity of the isolation.

[0032] like Figure 2 As shown in the top view, the base region 102 surrounds the inner region containing the central collector region 103, the outer collector region 104, and the emitter region 105, which will be described later. This surrounding structure ensures that the base region 102 can uniformly provide bias to the inner regions, which is the basis for achieving device symmetry.

[0033] Within the inner region surrounded by the base region 102, a central collector region 103, an outer collector region 104, and an emitter region 105 are formed. These regions are all formed above the buried doped region 101, that is, within the protective region isolated by the buried doped region 101.

[0034] The central collector region 103 and the outer collector regions 104 are the regions in a bipolar junction transistor (BJT) that collect charge carriers. The central collector region 103 is located at the center of the inner region and has a first conductivity type, i.e., P-type. The central collector region 103 is connected to the second port of a bidirectional electrostatic discharge (ESD) protection device. There are at least two outer collector regions 104, symmetrically distributed on both sides of the central collector region 103, and the outer collector regions 104 also have a first conductivity type, i.e., P-type. In this embodiment, as... Figure 2 As shown, the outer collector area 104 includes two, referred to as the first outer collector area 1041 and the second outer collector area 1042, respectively. The multiple outer collector areas 104 are connected in the circuit to the first port of the bidirectional electrostatic discharge (ESD) protection device.

[0035] In this embodiment, the first port and the second port are two external connection terminals of the device. In practical applications, the first port and the second port can be connected to the circuit node to be protected and the ground terminal, respectively. For example, the first port can be connected to the input / output pin of the chip, and the second port can be connected to the power supply ground; or, the first port can be connected to the power supply ground, and the second port can be connected to the input / output pin of the chip. When an electrostatic discharge event occurs, the device can automatically trigger conduction regardless of which port the electrostatic pulse is introduced from, providing a discharge path for the electrostatic current.

[0036] The outer collector region 104 can be vertically connected to the buried doped region 101, and / or the central collector region 103 can be electrically connected to the buried doped region 101. Such connections can further optimize device performance, but are not necessary.

[0037] For example, to balance the requirements of breakdown voltage characteristics and ohmic contacts, the central collector region 103 and the outer collector region 104 each include an upper heavily doped contact region and a lower lightly doped region, both of which have a first conductivity type. The base region 102 includes an upper heavily doped contact region and a lower lightly doped region, both of which have a second conductivity type. The lower lightly doped region is formed by ion implantation and has a relatively low doping concentration, used to adjust the breakdown voltage characteristics and electric field distribution of this region. The upper heavily doped contact region is located on top of the lightly doped region and has a higher doping concentration, used to form ohmic contacts, reduce contact resistance, and facilitate the connection of subsequent metal interconnect layers.

[0038] The emitter region 105 is located between the central collector region 103 and the outer collector regions 104 on each side. The emitter region 105 is a heavily doped region with a first conductivity type, namely a P+ region. The emitter region 105 is the source of hole injection when the transistor is turned on. Figure 2As shown, in this embodiment, the transmitting area 105 includes two areas, referred to as the first transmitting area 1051 and the second transmitting area 1052. The first transmitting area 1051 is located between the central collector area 103 and the first outer collector area 1041, and the second transmitting area 1052 is located between the central collector area 103 and the second outer collector area 1042.

[0039] Below the emitter region 105, a lightly doped region 106 of the second conductivity type, namely an N-well, is formed, which is vertically connected to the deeply buried doped region 101. The N-well isolates the central collector region 103 and the outer collector region 104 on both sides of the emitter region 105 from each other.

[0040] This application embodiment adopts a layout in which the central collector region 103 is located at the center, the outer collector regions 104 are symmetrically distributed on both sides, and the emitter region 105 is located between the two, forming a symmetrical structure from the center to both sides. Exemplarily, the outer collector regions 104, the emitter region 105 and the central collector region 103 are multiple strip structures arranged in parallel along a first direction (left-right direction), and the first direction is parallel to the surface of the substrate 100.

[0041] In one embodiment, a substrate contact region 107 is also formed in the substrate 100. This substrate contact region 107 has a first conductivity type, namely P-type, surrounds the base region 102, and is electrically connected to the substrate 100. The function of the substrate contact region 107 is to lead the potential of the substrate 100 to the outside, typically connected to a ground terminal or other fixed potential. Because this region is ring-shaped and surrounds the entire device, it can effectively collect minority carriers injected into the substrate, preventing them from interfering with other circuits, while providing a stable potential bias for the substrate. In electrostatic discharge events, this region can also help guide current, preventing localized overheating caused by current concentration. Exemplarily, the substrate contact region 107 also includes an upper heavily doped contact region and a lower lightly doped region.

[0042] In terms of electrical connections, the base region 102 is electrically connected to each emitter region 105, meaning that the common base region 102 and each emitter region 105 are connected to the same potential node. Multiple outer collector regions 104 are collectively connected to the first port, while the central collector region 103 is individually connected to the second port. The substrate contact region 107 is electrically connected to the substrate 100 and is typically connected to ground.

[0043] An isolation structure 108 is formed between adjacent doped regions. Specifically, isolation structures 108 are formed between the first outer collector region 1041 and the first emitter region 1051, between the first emitter region 1051 and the central collector region 103, between the central collector region 103 and the second emitter region 1052, and between the second emitter region 1052 and the second outer collector region 1042. In addition, an isolation structure 108 is also formed between the base region 102 and the outer collector region 104.

[0044] In this embodiment, the isolation structure 108 can be a shallow trench isolation structure. This structure is formed by etching trenches on the substrate 100 and then filling the trenches with an insulating medium (such as silicon dioxide). The function of the isolation structure 108 is to achieve electrical isolation between adjacent doped regions, prevent surface leakage and parasitic channel formation, and at the same time reduce device size and improve integration density.

[0045] Figure 5 The equivalent circuit of the bidirectional electrostatic discharge (ESD) protection device provided in an embodiment of this application is shown. This equivalent circuit includes three bipolar junction transistors, connected as follows: The collector of the first transistor T1 is connected to node C2 corresponding to the central collector region 103, the base is connected to node B corresponding to the base region 102, and the emitter is connected to node E corresponding to the emitter region 105.

[0046] The collector of the second transistor T2 is connected to node C1 corresponding to the outer collector region 104, the base is connected to node B corresponding to the base region 102, and the emitter is connected to node E corresponding to the emitter region 105.

[0047] The emitter of the third transistor T3 is connected to node C2 corresponding to the central collector region 103, the base is connected to node B corresponding to the base region 102, and the collector is connected to node C1 corresponding to the outer collector region 104.

[0048] Regarding port connections, node C1 corresponding to the outer collector region 104 is connected to the first port, and node C2 corresponding to the central collector region 103 is connected to the second port. The emitter region 105 and the base region 102 are directly connected through the buried doped region 101 and the metal interconnect layer. Therefore, in the equivalent circuit, nodes E and B are connected by internal wiring, indicating that they are at the same potential.

[0049] The equivalent circuit is divided into two parts, left and right, with node B as the boundary: the left side consists of transistors T1 and T2, and the right side consists of transistor T3. The left side forms the first discharge path with transistors T1 and T2, and the right side forms the second discharge path with transistor T3. The discharge paths in both directions are described below.

[0050] like Figure 3 As shown, when a forward electrostatic discharge pulse is applied to the second port, the central collector region 103 is at a high potential, the outer collector region 104 is at a low potential, and the base region 102 and emitter region 105 are connected through a buried layer and metal interconnects, and are at an intermediate potential. Under this bias condition, the device responds along the first discharge path.

[0051] At this time, the PN junction formed by the central collector region 103 and the base region 102 is in a forward bias state, and holes are injected into the base region 102 from C2. Since the emitter region 105 is equipotentially connected to the base region 102, the PN junction formed by the base region 102 and the outer collector region 104 is in a reverse bias state. As the voltage increases, when the voltage across the reverse-biased PN junction exceeds its breakdown voltage, avalanche breakdown occurs, forming a low-resistance path, and the holes are collected by the outer collector region 104. Therefore, the first discharge path is: second port, central collector region 103, emitter region 105, base region 102, outer collector region 104, first port.

[0052] like Figure 4 As shown, when a forward electrostatic discharge pulse is applied to the first port, the device responds along the second discharge path. At this time, transistor T3 operates independently. The second discharge path is: first port, outer collector region 104, base region 102, central collector region 103, second port.

[0053] The breakdown voltage in the direction from the second port to the first port is mainly determined by the outer collector region 104. The distance S1 between the outer collector region 104 and the adjacent emitter region 105, as well as the doping concentration of the lightly doped region of the outer collector region 104, jointly determine the breakdown voltage of the PN junction in this direction, thus determining the breakdown voltage value in this direction. Specifically, the distance between the outer collector region 104 and the adjacent emitter region 105 is positively correlated with the breakdown voltage in the direction from the second port to the first port; the larger the distance, the higher the breakdown voltage. Conversely, the doping concentration of the lightly doped region of the outer collector region 104 is negatively correlated with the breakdown voltage in the direction from the second port to the first port; the lower the doping concentration, the higher the breakdown voltage. Therefore, by adjusting the distance between the outer collector region 104 and the adjacent emitter region 105, and / or adjusting the doping concentration of the lightly doped region of the outer collector region 104, the breakdown voltage value in the direction from the second port to the first port can be independently controlled.

[0054] Based on a similar principle, the breakdown voltage in the direction from the first port to the second port is mainly determined by the central collector region 103. Specifically, it is positively correlated with the distance S2 between the central collector region 103 and the adjacent emitter region 105, and negatively correlated with the doping concentration of the lightly doped region of the central collector region 103. The two together determine the breakdown voltage of the PN junction in this direction, thereby determining the breakdown voltage in this direction.

[0055] Since the parameters affecting the breakdown voltage in both directions are located on opposite sides of the device, the breakdown voltage values ​​in both directions can be adjusted independently without interference. When consistent breakdown voltage in both directions is required, the spacing and doping concentration on both sides can be set to the same value; when asymmetric breakdown voltage characteristics are required, the parameters on both sides can be set independently, and the two can be set to different values.

[0056] For example, to ensure that breakdown preferentially occurs in the internal core region during an electrostatic discharge event, the spacing S3 between the base region 102 and the outer collector region 104 is set to be greater than the spacing S1 between the outer collector region 104 and the adjacent emitter region 105, and greater than the spacing S2 between the central collector region 103 and the adjacent emitter region 105. The spacing S4 between the substrate contact region 107 and the base region 102 is set to be greater than the spacing S1 between the outer collector region 104 and the adjacent emitter region 105, and greater than the spacing S2 between the central collector region 103 and the adjacent emitter region 105. This design rule ensures that the breakdown voltage of the peripheral PN junction is higher than that of the internal PN junction. Thus, when the voltage increases, breakdown occurs first in the internal core region, ensuring that the device operates as intended and improving reliability.

[0057] For example, to meet the need for higher electrostatic discharge protection capabilities, an extended structure can also be formed. Specifically, the first outer collector region 1041, the first emitter region 1051, the central collector region 103, the second emitter region 1052, and the second outer collector region 1042 sequentially constitute a repeating unit, and multiple repeating units can be arranged in the inner region surrounding the base region 102. Setting multiple repeating units provides more current discharge channels and has higher electrostatic discharge robustness.

[0058] To verify the technical effects of the embodiments of this application, based on Figure 1 and Figure 2 Four devices with different dimensional parameters were fabricated using the structure, denoted as STR1, STR2, STR3, and STR4, and DC breakdown voltage and transmission line pulse tests were performed. The four devices differ in the spacing between the outer collector region 104 and the adjacent emitter region 105, and the spacing between the central collector region 103 and the adjacent emitter region 105. The test results are summarized in Table 1.

[0059] Table 1 The total width of all the aforementioned devices is 2160 μm. (Refer to...) Figure 1 S1 is the distance between the outer collector area and the adjacent emitter area, and S2 is the distance between the center collector area and the adjacent emitter area. Vt1 is the trigger voltage, Vh is the sustaining voltage, Vt2 is the failure voltage, It2 is the failure current, and A is the reference distance, which is a set value.

[0060] Figure 6A , Figure 6B , Figure 6C and Figure 6DThe TLP curves for STR1, STR2, STR3 and STR4 are shown respectively, with the horizontal axis representing pulse voltage (Pulse V) or DC leakage current (DC leakage) and the vertical axis representing pulse current (Pulse A).

[0061] From the test data in Table 1 and Figures 6A-6D The test curves lead to the following conclusions: Symmetry verification of STR1 and STR2: The values ​​of S1 and S2 are identical in both STR1 and STR2. Test results show that the DC breakdown voltage and TLP characteristics in both directions (C1-C2 and C2-C1) are essentially equal. The breakdown voltages in STR1 in both directions are 21.12V and 21.00V, respectively, with failure currents of 4.49A and 4.51A. In STR2, the breakdown voltages in both directions are 32.88V and 32.82V, respectively, with failure currents of 3.58A and 3.59A. This indicates that when the parameters on both sides of the device are the same, the forward and reverse performance are completely identical, verifying the symmetrical structural design of the embodiments in this application.

[0062] Unidirectional withstand voltage regulation verification of STR3: STR3 reduces S1 compared to STR2, while keeping S2 unchanged. Test results show that the breakdown voltage in the C2-C1 direction decreases from 32.82V in STR2 to 16.08V, while the C1-C2 direction remains at 31.98V. This verifies that reducing S1 can independently reduce the forward (C2-C1) withstand voltage without affecting the reverse withstand voltage.

[0063] Unidirectional withstand voltage regulation verification of STR4: STR4 is based on STR2 with S2 reduced while S1 remains unchanged. Test results show that the breakdown voltage in the C1-C2 direction decreases from 32.88V in STR2 to 16.14V, while the C2-C1 direction remains at 32.76V. This verifies that reducing S2 can independently reduce the reverse (C1-C2) withstand voltage without affecting the forward withstand voltage.

[0064] The above results fully demonstrate that the devices in the embodiments of this application have independently adjustable forward and reverse withstand voltages, and the failure current It2 of all devices reaches more than 3.5A, indicating that the devices have good electrostatic discharge protection capabilities.

[0065] In summary, the embodiments of this application adopt a symmetrical structural design, with the central collector area located at the center of the internal region, and the outer collector areas symmetrically distributed on both sides. The emitter area is located between the central collector area and the outer collector areas. The circuit framework viewed from the first port and the second port is completely identical, enabling the device to effectively discharge electrostatic current in both directions, achieving bidirectional electrostatic protection. This overcomes the defect of traditional unidirectional devices that require reverse series and parallel connection to achieve bidirectional protection. A single device can replace the traditional bidirectional electrostatic protection circuit composed of multiple devices connected in series and parallel, significantly reducing the chip layout area and improving integration.

[0066] In this embodiment, the breakdown voltage from the second port to the first port can be independently controlled by adjusting the spacing between the outer collector region and the adjacent emitter region and / or the doping concentration of the lightly doped region of the outer collector region; similarly, the breakdown voltage from the first port to the second port can be independently controlled by adjusting the spacing between the central collector region and the adjacent emitter region and / or the doping concentration of the lightly doped region of the central collector region. This independent control mechanism provides great flexibility for circuit design and can meet the special requirements of inconsistent forward and reverse breakdown voltages in different application scenarios.

[0067] The embodiments of this application adopt a PNP type bipolar junction transistor structure, in which the minority carriers in the base region are holes, which have a low diffusion coefficient. This makes the sustaining voltage and trigger voltage of the device basically the same, effectively avoiding the latch-up effect and improving the reliability of the device.

[0068] The device structure of the embodiments of this application can be fabricated using standard integrated circuit technology. Each doped region can be achieved through conventional ion implantation and diffusion processes without the need for additional photomasks or process steps, thus not increasing manufacturing costs.

[0069] In summary, the embodiments of this application provide a compact, adjustable, process-compatible, and highly reliable bidirectional electrostatic discharge protection device, which can be widely used in integrated circuits requiring bidirectional electrostatic discharge protection, and has significant technological advancements and practical value.

[0070] Another aspect of this application provides a method for manufacturing a bidirectional electrostatic discharge (ESD) protection device, such as... Figure 7 As shown, the manufacturing method includes the following steps: In step S701, a substrate having a first conductivity type is provided; In step S702, ion implantation of the second conductivity type is performed on the substrate to form a deeply buried doped region inside the substrate; In step S703, ion implantation of the second conductivity type is performed on the substrate to form a base region in the substrate. The base region is a ring structure surrounding an inner region. The buried doped region covers the base region and the inner region from below, and the buried doped region is connected to the base region vertically. In step S704, ion implantation of a first conductivity type is performed on the substrate to form a central collector region, an outer collector region, and an emitter region in the inner region of the substrate; wherein, the central collector region is located at the center of the inner region, there are multiple outer collector regions symmetrically distributed on both sides of the central collector region, and the emitter region is located between the central collector region and each of the outer collector regions on both sides. The base region and the emitter region are electrically connected, multiple outer collector regions are connected to the first port of the bidirectional electrostatic discharge protection device, and the central collector region is connected to the second port of the bidirectional electrostatic discharge protection device.

[0071] It should be noted that the execution order of steps S703 and S704 is not limited in the embodiments of this application.

[0072] In one embodiment, the outer collector region, the emitter region, and the central collector region are strip structures arranged in parallel along a first direction, with an isolation structure formed between adjacent strip structures, and an isolation structure formed between the base region and the outer collector region, the first direction being parallel to the surface of the substrate.

[0073] In one embodiment, the outer collector area includes a first outer collector area and a second outer collector area, which are located on both sides of the central collector area, respectively; the transmitting area includes a first transmitting area and a second transmitting area, with the first transmitting area located between the central collector area and the first outer collector area, and the second transmitting area located between the central collector area and the second outer collector area.

[0074] In one embodiment, the first outer collector region, the first transmitter region, the central collector region, the second transmitter region, and the second outer collector region sequentially constitute a repeating unit, and the internal region contains multiple repeating units.

[0075] Furthermore, forming the base region includes: implanting lightly doped ions of a second conductivity type into the substrate to form a lightly doped region at the bottom, and implanting heavily doped ions of a second conductivity type into the substrate to form a heavily doped region at the top, wherein the lightly doped region of the base region is connected to the buried doped region.

[0076] The formation of the central collector region and the outer collector region each includes: implanting lightly doped ions of a first conductivity type into the substrate to form a lightly doped region located at the bottom, and implanting heavily doped ions of the first conductivity type into the substrate to form a heavily doped region located at the top. The lightly doped regions of the outer collector region and the central collector region are connected to or separated from the buried doped region.

[0077] Before forming the emitter region, the substrate below the emitter region is implanted with lightly doped ions of a second conductivity type to form a lightly doped region. This lightly doped region of the second conductivity type is connected to the buried doped region, isolating the central collector region from the outer collector regions. Forming the emitter region includes implanting heavily doped ions of a first conductivity type into the substrate above the lightly doped region to form a heavily doped region of the emitter region.

[0078] In one embodiment, the substrate is further subjected to ion implantation of a first conductivity type to form a substrate contact region surrounding the base region.

[0079] For example, the spacing between the substrate contact region and the base region is greater than the spacing between the outer collector region and the adjacent emitter region, and greater than the spacing between the central collector region and the adjacent emitter region; the spacing between the base region and the outer collector region is greater than the spacing between the outer collector region and the adjacent emitter region, and greater than the spacing between the central collector region and the adjacent emitter region.

[0080] For example, the spacing between the outer collector region and the adjacent emitter region is set to be the same as or different from the spacing between the central collector region and the adjacent emitter region; and / or, the doping concentration of the outer collector region is set to be the same as or different from the doping concentration of the central collector region.

[0081] The manufacturing method of this application embodiment can be used to manufacture the above-described bidirectional electrostatic discharge (ESD) protection device, and therefore has similar advantages. Specific details regarding this manufacturing method can be found in the above description, and will not be repeated here.

[0082] Furthermore, the device structure and manufacturing method of this application are fully compatible with existing integrated circuit processes, requiring no additional masks or process steps, and achieving bidirectional withstand voltage and bidirectional electrostatic protection without increasing production costs.

[0083] This application has been described through the above embodiments. However, it should be understood that the above embodiments are for illustrative purposes only and are not intended to limit this application to the scope of the described embodiments. Furthermore, those skilled in the art will understand that this application is not limited to the above embodiments, and many more variations and modifications can be made based on the teachings of this application, all of which fall within the scope of protection claimed in this application. The scope of protection of this application is defined by the appended claims and their equivalents.

Claims

1. A bidirectional electrostatic discharge protection device, characterized in that, The bidirectional electrostatic discharge protection device includes: Substrate having a first conductivity type; A deeply buried doped region formed within the substrate, the deeply buried doped region having a second conductivity type; A base region is formed in the substrate, the base region has the second conductivity type, the base region has a ring structure, and the buried doped region covers the base region and the internal region surrounded by the base region from below, and the buried doped region is vertically connected to the base region; A central collector region, an outer collector region, and an emitter region are formed in the internal region of the substrate, and the central collector region, the outer collector region, and the emitter region all have the first conductivity type; The central collecting area is located at the center of the inner region, and there are multiple outer collecting areas symmetrically distributed on both sides of the central collecting area. There are multiple transmitting areas located between the central collecting area and the outer collecting areas respectively. The base region is electrically connected to the emitter region, the multiple outer collector regions are connected to the first port of the bidirectional electrostatic discharge protection device, and the central collector region is connected to the second port of the bidirectional electrostatic discharge protection device. The outer collector region, the emitter region, and the central collector region are strip structures arranged in parallel along a first direction. An isolation structure is formed between adjacent strip structures, and an isolation structure is formed between the base region and the outer collector region. The first direction is parallel to the surface of the substrate.

2. The bidirectional electrostatic discharge protection device according to claim 1, characterized in that, The outer collector area includes a first outer collector area and a second outer collector area, which are located on both sides of the central collector area, respectively; The transmission area includes a first transmission area and a second transmission area. The first transmission area is located between the central collector area and the first outer collector area, and the second transmission area is located between the central collector area and the second outer collector area.

3. The bidirectional electrostatic discharge protection device according to claim 2, characterized in that, The first outer collector area, the first transmitter area, the central collector area, the second transmitter area, and the second outer collector area sequentially constitute a repeating unit, and the internal region contains multiple repeating units.

4. The bidirectional electrostatic discharge protection device according to claim 1, characterized in that, The base region includes an upper heavily doped region of the second conductivity type and a lower lightly doped region of the second conductivity type, and the lightly doped region of the base region is connected to the buried doped region; The central collector region and the outer collector region each include an upper heavily doped region of the first conductivity type and a lower lightly doped region of the first conductivity type.

5. The bidirectional electrostatic discharge protection device according to claim 1, characterized in that, The emitter region includes a heavily doped region of a first conductivity type, and a lightly doped region of a second conductivity type is formed below the emitter region. The lightly doped region of the second conductivity type is connected to the buried doped region, thereby isolating the central collector region from the outer collector region.

6. The bidirectional electrostatic discharge protection device according to claim 1, characterized in that, The distance between the base region and the outer collector region is greater than the distance between the outer collector region and the adjacent transmitter region, and is also greater than the distance between the central collector region and the adjacent transmitter region.

7. The bidirectional electrostatic discharge protection device according to claim 1 or 6, characterized in that, It also includes a substrate contact region having a first conductivity type formed in the substrate, the substrate contact region surrounding the base region, the spacing between the substrate contact region and the base region being greater than the spacing between the outer collector region and the adjacent emitter region, and greater than the spacing between the central collector region and the adjacent emitter region.

8. The bidirectional electrostatic discharge protection device according to claim 4, characterized in that, The withstand voltage value from the second port to the first port is positively correlated with the spacing between the outer collector region and the adjacent emitter region, and negatively correlated with the doping concentration of the lightly doped region of the outer collector region. The withstand voltage value in the direction from the first port to the second port is positively correlated with the spacing between the central collector region and the adjacent emitter region, and negatively correlated with the doping concentration of the lightly doped region of the central collector region.

9. A method for manufacturing a bidirectional electrostatic discharge (ESD) protection device, characterized in that, The manufacturing method includes: Provide a substrate having a first conductivity type; The substrate is implanted with ions of a second conductivity type to form a deeply buried doped region inside the substrate; The substrate is implanted with ions of a second conductivity type to form a base region in the substrate. The base region has a ring structure. The buried doped region covers the base region and the internal region surrounded by the base region from below, and the buried doped region is vertically connected to the base region. The substrate is implanted with ions of a first conductivity type to form a central collector region, an outer collector region, and an emitter region in the internal region of the substrate; The central collecting area is located at the center of the inner region, and there are multiple outer collecting areas symmetrically distributed on both sides of the central collecting area. There are multiple transmitting areas located between the central collecting area and the outer collecting areas respectively. The base region is electrically connected to the emitter region, the multiple outer collector regions are connected to the first port of the bidirectional electrostatic discharge protection device, and the central collector region is connected to the second port of the bidirectional electrostatic discharge protection device. The outer collector region, the emitter region, and the central collector region are strip structures arranged in parallel along a first direction. An isolation structure is formed between adjacent strip structures, and an isolation structure is formed between the base region and the outer collector region. The first direction is parallel to the surface of the substrate.

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