Preparation method of two-dimensional planar heterojunction array and photoelectric detector

Two-dimensional gallium nitride/gallium oxide planar heterojunction arrays were fabricated on Si/SiO2 substrates using liquid gallium oxide transfer and ALD processes, solving the problems of high cost and difficulty in large-area coverage of traditional processes, and achieving high-efficiency ultraviolet photodetector performance.

CN122227704APending Publication Date: 2026-06-16SOUTH CHINA NORMAL UNIV
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Patent Information

Application Number
CN202610126510.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-01-29
Publication Date
2026-06-16

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Abstract

The application relates to the field of two-dimensional semiconductor technology, and particularly relates to a preparation method of a two-dimensional plane heterojunction array and a photoelectric detector, which comprises the following steps: transferring gallium oxide to a substrate by using a liquid gallium oxidation transfer process; taking the gallium oxide layer as a substrate, dividing the gallium oxide layer into a gallium oxide area substrate and a gallium nitride area substrate, performing photoetching on the gallium oxide area substrate and plating a first electrode; partially shielding the gallium nitride area substrate by using a high-temperature chemical-resistant adhesive tape, plating an aluminum oxide mask layer on the gallium oxide area substrate and the first electrode by using an ALD process; converting the gallium oxide which is not shielded by the aluminum oxide mask layer into gallium nitride through a nitriding reaction; performing photoetching on the gallium nitride layer area and plating a second electrode; etching the aluminum oxide mask layer and exposing the first electrode to obtain a gallium oxide / gallium nitride plane structure heterojunction photoelectric device. The application can reduce the cost of preparing two-dimensional gallium nitride, and realize the preparation of a device array of two-dimensional gallium nitride material in a vertical structure.
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Description

Technical Field

[0001] This invention relates to the field of two-dimensional semiconductor technology, specifically to a method for fabricating a two-dimensional planar heterojunction array and a photodetector. Background Technology

[0002] Two-dimensional (2D) semiconductors possess excellent electronic, optical, and magnetic properties, making them promising for a wide range of applications. However, current methods based on mechanical exfoliation and epitaxial growth struggle to meet the demands for large-area coverage and rapid growth of atomic-level thin films while maintaining high quality. Traditional thin-film epitaxy processes, such as MOCVD (metal-organic chemical vapor deposition), require gallium organic salts as gallium sources and complex conditions such as high temperature and high pressure. Furthermore, the growth rate of thin films using gallium organic salts is slow, making it difficult to grow two-dimensional gallium-based materials. The bandgap of two-dimensional gallium nitride (GaN) can be adjusted from 3.7 to 5 eV depending on the thickness, but traditional thin-film epitaxy processes are costly and difficult to grow two-dimensional GaN, resulting in high costs for GaN fabrication. Due to limitations in the fabrication processes of two-dimensional materials, lateral planar stacking is difficult to achieve, and vertical structures of two-dimensional GaN materials make array device design challenging. Summary of the Invention

[0003] To address the technical problems existing in the prior art, this invention provides a method for fabricating a two-dimensional planar heterojunction array and a photodetector. By using a liquid gallium oxide transfer process to transfer gallium oxide onto a substrate, the cost of fabricating two-dimensional gallium nitride can be reduced. Through an innovative method for fabricating gallium nitride / gallium oxide planar junction arrays, devices fabricated by arraying two-dimensional gallium nitride materials in a vertical structure can be realized.

[0004] The first objective of this invention is to provide a method for fabricating a two-dimensional planar heterojunction array.

[0005] The second objective of this invention is to provide a photodetector for a two-dimensional planar heterojunction array.

[0006] The first objective of this invention can be achieved by adopting the following technical solution:

[0007] A method for fabricating a two-dimensional planar heterojunction array includes the following steps:

[0008] S1. Using the liquid gallium oxide transfer process, gallium oxide generated by self-limited oxidation on the surface of liquid gallium is transferred to a Si / SiO2 substrate to form a gallium oxide layer on the Si / SiO2 substrate, thus obtaining a gallium oxide / silicon oxide wafer.

[0009] S2. Using gallium oxide layer as substrate, the gallium oxide layer is divided into gallium oxide region substrate and gallium nitride region substrate. The gallium oxide region substrate is photolithographically etched and the first electrode is deposited.

[0010] S3. Use high-temperature chemical-resistant tape to partially mask the gallium nitride region substrate, and use ALD process to deposit an aluminum oxide masking layer on the gallium oxide region substrate and the first electrode.

[0011] S4. Using ammonia as the nitrogen source and argon as the carrier gas, the substrate after the aluminum oxide masking layer is heat-treated to convert gallium oxide that is not masked by the aluminum oxide masking layer into gallium nitride through a nitriding reaction, forming a gallium nitride layer region, and obtaining a gallium oxide / gallium nitride planar heterojunction.

[0012] S5. Based on photolithography, a second electrode is deposited in the gallium nitride layer region by photolithography.

[0013] S6. Etch the aluminum oxide masking layer to expose the first electrode, and obtain a gallium oxide / gallium nitride planar heterojunction optoelectronic device.

[0014] Specifically, step S1 includes: performing standard cleaning on the Si / SiO2 substrate, exposing liquid gallium metal to an oxygen-containing environment to allow a layer of gallium oxide film to naturally form on the surface of the liquid gallium metal, and transferring the gallium oxide film from the surface of the liquid gallium metal to the Si / SiO2 substrate by direct contact or by using a PDMS flexible substrate as a transfer station, thereby forming a gallium oxide layer on the Si / SiO2 substrate.

[0015] Specifically, step S2 includes: performing standard cleaning on the gallium oxide / silicon oxide wafer, dividing the gallium oxide layer into a gallium oxide region substrate and a gallium nitride region substrate, defining an electrode pattern on the gallium oxide region of the cleaned two-dimensional gallium oxide / silicon oxide wafer using photolithography, opening a window on the gallium oxide surface that matches the electrode pattern and exposing the underlying gallium oxide, and depositing a Ti / Au bilayer metal on the gallium oxide in the window that matches the electrode pattern to form the first electrode.

[0016] Specifically, step S3 includes:

[0017] Polyimide tape was used to partially shield the gallium nitride region of the substrate;

[0018] Trimethylaluminum is introduced as the aluminum source, and water or ozone is introduced as the oxygen source. An aluminum oxide masking layer is deposited on the gallium oxide region substrate and the first electrode using the ALD process.

[0019] Specifically, step S4 includes:

[0020] The substrate with the alumina masking layer is placed in a quartz boat in a high-temperature tube furnace or a rapid thermal annealing furnace, and high-purity argon gas is introduced to remove the air in the furnace chamber.

[0021] The furnace temperature is then raised to 850°C at a set heating rate. Ammonia is introduced as a nitrogen source according to a preset ratio, while argon is kept as a carrier gas. Gallium oxide that is not covered by the alumina masking layer is converted into gallium nitride through a nitriding reaction, forming a gallium nitride layer region.

[0022] Specifically, the etching of the aluminum oxide masking layer to expose the first electrode includes: using a diluted hydrofluoric acid solution or a buffer oxide to etch the aluminum oxide masking layer to expose the first electrode.

[0023] A photodetector of a two-dimensional planar heterojunction array is prepared using the above-described method for fabricating a two-dimensional planar heterojunction array.

[0024] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0025] This invention provides a method for fabricating a two-dimensional planar heterojunction array and a photodetector. It employs liquid metal self-limited oxidation transfer technology and a nitridation process. Unlike traditional epitaxial processes, this method reduces the cost of fabricating two-dimensional gallium nitride (GaN). The two-dimensional semiconductor thin film generated by the self-limited oxidation of liquid metal (especially gallium-based eutectic alloys) is fast and allows for large-area transfer to other substrates. A high-temperature chemical-resistant tape is used to partially mask the GaN region of the substrate. An aluminum oxide masking layer is deposited on the gallium oxide region of the substrate using an ALD process to protect some of the gallium oxide from nitridation. Using ammonia as the nitrogen source and argon as the carrier gas, the substrate after the aluminum oxide masking layer is heat-treated. The gallium oxide not masked by the aluminum oxide masking layer is converted to gallium nitride through a nitridation reaction, enabling the fabrication of a GaN / GaO planar junction array. Due to the different band gaps of gallium nitride and gallium oxide, and utilizing the band gap difference between the two materials and the fact that both are wide-bandgap semiconductors, the ultraviolet response is significant, while the response to visible and infrared light is almost non-responsive, effectively improving the ultraviolet detection performance of the photodetector. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0027] Figure 1 This is a schematic diagram illustrating the steps of a method for fabricating a two-dimensional planar heterojunction array in an embodiment of the present invention;

[0028] Figure 2 This is a schematic diagram of the device structure during the fabrication process of a two-dimensional planar heterojunction array in an embodiment of the present invention;

[0029] Figure 3 This is an IV performance curve of the discrete components of the solar-blind ultraviolet photodetector array in an embodiment of the present invention.

[0030] Figure 4 This is an IT performance curve of the discrete components of the solar-blind ultraviolet photodetector array in an embodiment of the present invention;

[0031] The numbers in the figure are: 1- Si, 2- SiO2, 3- Gallium oxide layer, 4- Aluminum oxide masking layer, 51- First electrode, 52- Second electrode, 6- Gallium nitride. Detailed Implementation

[0032] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments, and the implementation of the present invention is not limited thereto. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0033] Example 1:

[0034] like Figure 1 The diagram illustrates the steps of a method for fabricating a two-dimensional planar heterojunction array. The method for fabricating a two-dimensional planar heterojunction array according to the present invention includes the following steps:

[0035] S1. Using a liquid gallium oxide transfer process, gallium oxide generated by self-limited oxidation on the surface of liquid gallium is transferred to a Si / SiO2 substrate to form a gallium oxide layer on the Si / SiO2 substrate, thus obtaining a gallium oxide / silicon oxide wafer.

[0036] Specifically, such as Figure 2The diagram illustrates the device structure during the fabrication process of a two-dimensional planar heterojunction array. A standard cleaning process is performed on the Si / SiO2 substrate to obtain a clean and contamination-free substrate surface. Gallium is melted by heating in an oxygen-free environment while maintaining its liquid purity, preparing a "fresh" liquid metal raw material for self-limiting oxidation. The liquid gallium is then exposed to an oxygen-containing environment (such as air), allowing a gallium oxide (Ga2O3) film to naturally form on its surface. This allows for the natural formation of an extremely thin and dense amorphous gallium oxide (Ga2O3) film on the liquid metal surface in room temperature air. Once formed, this film effectively prevents oxygen from diffusing further, achieving a "self-limiting" thickness (typically within a few nanometers), ensuring the film's ultrathinness and uniformity. The gallium oxide (Ga2O3) film is transferred from the liquid gallium surface to the Si / SiO2 substrate through direct contact or by using a flexible substrate such as PDMS (polydimethylsiloxane) as an intermediary, forming a gallium oxide layer 3 on the Si / SiO2 substrate. The key to this process lies in overcoming the forces between the oxide layer and the liquid gallium substrate, and utilizing van der Waals forces or other physicochemical interactions between the oxide layer and the target substrate to ensure its firm adhesion. This method leverages the self-limiting oxidation properties of liquid gallium, thus eliminating reliance on some traditional epitaxial growth methods (such as chemical vapor deposition and atomic layer deposition). Traditional methods often require high temperatures, high vacuum, or complex equipment, while liquid metal oxide transfer processes can typically be performed at room temperature and pressure, offering advantages such as low temperature, simplicity, and low cost. This is particularly advantageous for the fabrication of large-area, uniform, ultrathin films, yielding smooth, thickness-controllable "two-dimensional gallium oxide / silicon oxide wafers," ensuring a smooth, crack-free film surface and excellent adhesion to the substrate after transfer.

[0037] S2. Using gallium oxide layer 3 as a substrate, the gallium oxide layer 3 is divided into gallium oxide region substrate and gallium nitride region substrate. The gallium oxide region substrate is photolithographically etched and the first electrode 51 is deposited.

[0038] Specifically, the gallium oxide / silicon oxide wafer is cleaned according to standard procedures, and the gallium oxide layer is divided into gallium oxide region substrate and gallium nitride region substrate. Electrode patterns are defined on the gallium oxide region on the cleaned two-dimensional gallium oxide / silicon oxide wafer using photolithography. A window consistent with the electrode pattern is opened on the gallium oxide surface to expose the gallium oxide underneath. Ti / Au bilayer metal is deposited on the gallium oxide in the window consistent with the electrode pattern to form the first electrode.

[0039] In this example, the gallium oxide / silicon oxide wafer obtained in S1 is subjected to standard cleaning, such as ultrasonic cleaning with organic solvents acetone, ethanol, and deionized water to remove organic contaminants. Finally, it is dried with nitrogen gas to quickly remove moisture without contacting the sample surface, preventing new contaminants or watermarks from being left due to the drying of water stains.

[0040] The gallium oxide layer is divided into gallium oxide and gallium nitride (GaN) substrates. Electrode patterns are defined on the gallium oxide regions of a cleaned 2D GaO / silicon oxide wafer using photolithography. A layer of positive photoresist is uniformly spin-coated onto the GaO surface, followed by soft baking on a hot plate to allow the photoresist solvent to evaporate and form a solid film. The sample is then exposed to ultraviolet light using a pre-designed photomask pattern, which determines the position and shape of the electrodes (Ti / Au). The photoresist in the UV-exposed areas undergoes a chemical reaction, altering its solubility. The exposed sample is then immersed in a developer solution, dissolving the exposed areas of the positive photoresist while retaining the unexposed areas. A window, consistent with the electrode pattern, is created on the GaO surface, exposing the underlying GaO. The sample is then placed in the stage of an electron beam evaporation deposition system, where a thin layer of titanium (Ti) (typically 5-20 nm) is deposited first. Titanium has good chemical bonding with the GaO surface, forming a strong adhesion and contributing to good ohmic contact. Subsequently, a relatively thick layer of gold (Au) (typically 50-200 nm) is directly deposited without disrupting the vacuum. The deposition process is carried out in a vacuum to ensure the purity and density of the metal film. The sample with the deposited Ti / Au bilayer is then immersed in a stripping solution (such as acetone). The acetone dissolves the unexposed photoresist and the metal overlay above it, while the metal deposited directly on the gallium oxide window remains due to its strong contact with the substrate.

[0041] S3. Partially mask the gallium nitride region substrate using high-temperature chemical-resistant tape, and deposit an aluminum oxide masking layer 4 onto the gallium oxide region substrate and the first electrode using ALD (atomic layer deposition) process. The purpose of this step is to prepare for subsequent aluminum oxide deposition, ensuring that aluminum oxide only covers the area of ​​the gallium oxide region substrate and not the gallium nitride region substrate.

[0042] S31. Use polyimide tape to partially shield the gallium nitride region of the substrate.

[0043] Use polyimide tape (Kapton Tape) or a specific type of UV-release tape that can withstand the temperatures of subsequent ALD processes (typically 60-200°C), does not react with cleaning agents such as acetone and isopropanol, and adheres firmly while being easily peeled off without residue. Precisely align and apply the tape to the gallium nitride (GaN) area, avoiding air bubbles and wrinkles. Ensure the tape adheres tightly to the electrode and gallium oxide surface to form a sealed protective layer. The "electrode area" covered by the tape will be protected in the next step; while the gallium oxide surface not covered by the tape will be exposed in the next step, ready to be covered by alumina.

[0044] S32. Trimethylaluminum is introduced as the aluminum source, and water or ozone is introduced as the oxygen source. An aluminum oxide masking layer 4 is deposited on the gallium oxide region substrate and the first electrode through ALD (atomic layer deposition) process.

[0045] Specifically, an alumina masking layer is deposited using ALD. The substrate, with adhesive tape attached, is placed in the ALD reaction chamber, and the process temperature (e.g., 150°C) and number of cycles are set. Trimethylaluminum (TMA) is introduced as the aluminum source, and water (H2O) or ozone (O3) is used as the oxygen source, with alternating pulse deposition. Each cycle grows approximately 0.1 nanometers of alumina (Al2O3).

[0046] Selective deposition occurs in the gallium oxide regions not covered by the tape. The ALD precursor can contact the substrate surface, undergoing chemisorption and reaction, resulting in a uniform deposition of an Al₂O₃ film. In the electrode regions covered by the tape, the tape itself is inert to the ALD precursor and does not undergo chemisorption. Therefore, there is virtually no (or only a very small amount of) Al₂O₃ deposition on the electrode surface. The tape acts as a perfect in-situ mask. After ALD deposition, the sample is removed from the reaction chamber, and the tape is peeled off. Due to the extremely thin Al₂O₃ layer on the electrode, the tape can be easily peeled off, exposing the complete and clean Ti / Au electrode underneath. The final sample state is as follows: Region A: Gallium oxide substrate, first electrode covered by a dense Al₂O₃ film. Region B: Gallium nitride substrate without Al₂O₃ coverage. Utilizing the excellent conformality and uniformity of the ALD process, a masking layer is deposited across the entire sample surface, but the presence of the tape enables selective deposition.

[0047] S4. Using ammonia as the nitrogen source and argon as the carrier gas, the substrate after the aluminum oxide masking layer 4 is heat-treated to convert gallium oxide that is not masked by the aluminum oxide masking layer into gallium nitride 6 through a nitriding reaction, forming a gallium nitride layer region, and obtaining a gallium oxide / gallium nitride planar heterojunction.

[0048] Specifically, the substrate sample with a partially alumina-covered surface obtained in step S4 is placed in a quartz boat within a high-temperature tube furnace or rapid thermal annealing furnace, ensuring the sample is placed stably to guarantee uniform heating. High-purity argon gas is first introduced to purge air from the furnace chamber, creating an oxygen-free environment.

[0049] The furnace temperature is then raised to 850°C at a set heating rate (e.g., 5-10°C / min). During the heating process or after reaching the target temperature, ammonia is introduced as a nitrogen source in a preset ratio, while argon is maintained as the carrier gas. The mixed gas ratio can be NH3:Ar = 1:5 to 1:10. At this high temperature, the active nitrogen atoms produced by the decomposition of ammonia diffuse into the exposed gallium oxide 3 layer and undergo a chemical reaction, gradually transforming it into gallium nitride 6. The gallium oxide region covered by the aluminum oxide 4 masking layer retains nitrogen atoms because of the excellent barrier effect of aluminum oxide, preventing nitrogen atoms from penetrating.

[0050] Selective nitriding is key to forming planar heterojunctions. By precisely controlling temperature, time, and gas flow rate, the thickness, crystal quality, and interface characteristics with the underlying gallium oxide layer can be tuned. Heat treatment not only achieves material transformation but also effectively anneales to repair some lattice defects, improving the electrical performance of the heterojunction.

[0051] S5. Based on photolithography, a second electrode 52 is deposited in the gallium nitride layer region. After successfully forming the heterojunction, a metal electrode needs to be fabricated in the gallium nitride region to realize electrical signal input and output.

[0052] Specifically, electrode patterns are defined in the gallium nitride (GaN) layer region using photolithography. Photoresist is spin-coated onto the GaN portion of the sample surface, and then ultraviolet exposure and development are performed using a pre-designed photomask with the defined GaN electrode patterns. Windows are created in the GaN regions where electrodes need to be fabricated, exposing the underlying GaN. The sample is then placed in an electron beam evaporation or thermal evaporation apparatus, where specific metal stacks are deposited sequentially. For GaN, a commonly used ohmic contact metal system is Ti / Au. Titanium (Ti) acts as an adhesion layer, forming good ohmic contacts with GaN. Gold (Au) prevents titanium oxidation and improves conductivity and bonding ability. Metal stripping involves immersing the sample in a stripping solution such as acetone to dissolve the photoresist in the unexposed areas and the overlying metal layer, leaving only the electrode patterns deposited directly on the GaN windows.

[0053] S6. Etch the aluminum oxide masking layer 4 to expose the first electrode 51, obtaining a gallium oxide / gallium nitride planar heterojunction optoelectronic device. Remove the aluminum oxide masking layer covering the gallium oxide electrode to expose the previously fabricated first electrode on the gallium oxide, completing the structure of the entire device.

[0054] Specifically, a diluted hydrofluoric acid solution or buffered oxide is used to etch the aluminum oxide masking layer and expose the first electrode. These solutions effectively remove aluminum oxide, but the etching rate for the underlying gallium oxide electrode metal and the surrounding gallium nitride and gallium oxide materials is extremely slow. After immersing the sample in the etchant solution for a period of time, the aluminum oxide layer covering the gallium oxide and Ti / Au electrodes is completely removed, and the Ti / Au electrodes are re-exposed, forming a good electrical contact point. Finally, the sample is thoroughly rinsed with deionized water to remove residual chemical reagents and dried with nitrogen gas to obtain a complete gallium oxide / gallium nitride planar heterojunction optoelectronic device.

[0055] A solar-blind ultraviolet photodetector array was fabricated based on a gallium nitride / gallium oxide planar heterojunction array, such as... Figure 3 The figure shows the IV performance curves of the discrete components of the solar-blind ultraviolet photodetector array. The dark current of the discrete components is at a minimum level (a few pA), indicating that the device itself has low noise. At the same voltage, its response photocurrent increases with increasing optical power. Figure 4 The figure shows the IT performance curves of the discrete devices in the solar-blind ultraviolet photodetector array. The discrete devices respond to different optical power pulse signals under a 3V bias voltage. As the ultraviolet light power density increases, the peak value of the pulse current increases synchronously, that is, the response current is positively correlated with the incident light power. This is because higher light power will excite more photogenerated electron-hole pairs, thereby increasing the response current of the device, which reflects the good light intensity-current dependence characteristics of the device.

[0056] This invention provides a method for fabricating a two-dimensional planar heterojunction array. Unlike traditional epitaxial processes, this embodiment employs liquid metal self-limited oxidation transfer technology and nitride processes, reducing the cost of fabricating two-dimensional gallium nitride (GaN). Through innovative structural and process design, GaN / GaO planar junction arrays can be fabricated. Due to the different band gaps of GaN and GaO (GaO 4.9 eV and GaN 3.4 eV), the band gap difference between the two materials, and the fact that both are wide-bandgap semiconductors, results in significant ultraviolet response but almost no response to visible and infrared light, effectively filtering out background visible light noise. The formed heterojunction generates a built-in electric field at the interface, effectively separating the generated photogenerated electron-hole pairs, suppressing carrier recombination, and thus improving ultraviolet detection performance.

[0057] The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above embodiments. Any changes, modifications, substitutions, combinations, or simplifications made without departing from the spirit and principle of the present invention shall be considered equivalent substitutions and shall be included within the protection scope of the present invention.

Claims

1. A method for fabricating a two-dimensional planar heterojunction array, characterized in that, Includes the following steps: S1. Using the liquid gallium oxide transfer process, gallium oxide generated by self-limited oxidation on the surface of liquid gallium is transferred to a Si / SiO2 substrate to form a gallium oxide layer on the Si / SiO2 substrate, thus obtaining a gallium oxide / silicon oxide wafer. S2. Using gallium oxide layer as substrate, the gallium oxide layer is divided into gallium oxide region substrate and gallium nitride region substrate. The gallium oxide region substrate is photolithographically etched and the first electrode is deposited. S3. Use high-temperature chemical-resistant tape to partially mask the gallium nitride region substrate, and use ALD process to deposit an aluminum oxide masking layer on the gallium oxide region substrate and the first electrode. S4. Using ammonia as the nitrogen source and argon as the carrier gas, the substrate after the aluminum oxide masking layer is heat-treated to convert gallium oxide that is not masked by the aluminum oxide masking layer into gallium nitride through a nitriding reaction, forming a gallium nitride layer region, and obtaining a gallium oxide / gallium nitride planar heterojunction. S5. Based on photolithography, a second electrode is deposited in the gallium nitride layer region by photolithography. S6. Etch the aluminum oxide masking layer to expose the first electrode, and obtain a gallium oxide / gallium nitride planar heterojunction optoelectronic device.

2. The method for fabricating a two-dimensional planar heterojunction array according to claim 1, characterized in that, Step S1 includes: The Si / SiO2 substrate is cleaned according to standard procedures, and liquid gallium metal is exposed to an oxygen-containing environment, allowing a thin film of gallium oxide to form naturally on the surface of the liquid gallium metal. The gallium oxide film is then transferred from the surface of the liquid gallium metal to the Si / SiO2 substrate through direct contact or by using a flexible PDMS substrate as an intermediary, thus forming a gallium oxide layer on the SiO2 substrate.

3. The method for fabricating a two-dimensional planar heterojunction array according to claim 1, characterized in that, Step S2 includes: Gallium oxide / silicon oxide wafers are cleaned using standard methods. The gallium oxide layer is divided into gallium oxide region substrate and gallium nitride region substrate. Electrode patterns are defined on the gallium oxide region of the cleaned two-dimensional gallium oxide / silicon oxide wafer using photolithography. A window consistent with the electrode pattern is opened on the gallium oxide surface to expose the underlying gallium oxide. A Ti / Au bilayer metal is deposited on the gallium oxide in the window consistent with the electrode pattern to form the first electrode.

4. The method for fabricating a two-dimensional planar heterojunction array according to claim 1, characterized in that, Step S3 includes: Polyimide tape was used to partially mask the gallium nitride region substrate; trimethylaluminum was introduced as the aluminum source and water or ozone as the oxygen source, and an aluminum oxide masking layer was deposited on the gallium oxide region substrate and the first electrode through the ALD process.

5. The method for fabricating a two-dimensional planar heterojunction array according to claim 1, characterized in that, Step S4 includes: The substrate with the alumina masking layer is placed in a quartz boat in a high-temperature tube furnace or a rapid thermal annealing furnace, and high-purity argon gas is introduced to remove the air in the furnace chamber. The furnace temperature is then raised to 850°C at a set heating rate. Ammonia is introduced as a nitrogen source according to a preset ratio, while argon is kept as a carrier gas. Gallium oxide that is not covered by the alumina masking layer is converted into gallium nitride through a nitriding reaction, forming a gallium nitride layer region.

6. The method for fabricating a two-dimensional planar heterojunction array according to claim 1, characterized in that, The etching of the alumina masking layer to expose the first electrode includes: using a diluted hydrofluoric acid solution or a buffer oxide to etch the alumina masking layer to expose the first electrode.

7. A two-dimensional planar heterojunction array photodetector, characterized in that: Prepared using the preparation method described in any one of claims 1-6.