Copper grid heterojunction cell sheet and preparation method thereof

Abstract

The application discloses a copper grid line heterojunction cell and a preparation method thereof, and relates to the technical field of heterojunction cell preparation. The preparation method comprises the following steps: step one: providing an N-type substrate, the substrate comprising opposite front and back surfaces, and forming a conductive area on the front and back surfaces; step two: depositing a transparent conductive oxide layer on the conductive area; step three: depositing a copper seed layer on the transparent conductive oxide layer; step four: using aerosol jet printing technology to prepare a mask layer on the non-grid line area of the copper seed layer; step five: exposing and developing the mask layer to expose the copper seed layer of the grid line pattern area; step six: depositing copper by electroplating to generate a copper grid line in the grid line pattern area; and step seven: removing the mask layer and the copper seed layer to obtain a copper grid line heterojunction cell. The application provides a complete preparation method for non-contact printing of a copper grid line heterojunction cell. The aerosol jet printing technology is used, and the non-contact printing reduces the breakage rate of the printing process. In combination with developing, curing and electroplating of the copper grid line, a copper grid line with a width of less than 15 µm can be prepared, so that the effective light receiving area of the cell is increased, and the photoelectric conversion efficiency is improved.

Description

Technical Field

[0001] This application relates to the field of photovoltaic cell technology fabrication, and in particular to a copper grid heterojunction solar cell and its fabrication method. Background Technology

[0002] Heterojunction (HJT) solar cells are one of the core development directions in the photovoltaic field. In the fabrication process of HJT cells, the grid lines, as the key structure for charge collection and transport, directly determine the photoelectric conversion efficiency and industrialization prospects of the cells due to their fabrication precision, reliability, and cost.

[0003] In related technologies, the electroplating method for preparing copper grid HJT cells usually adopts the method of screen printing ink. The core of this technical solution is to apply ink to the non-grid area of ​​the battery substrate through a screen printing stencil, and form a mask after curing. Then, copper is electroplated on the exposed grid pattern area. However, (1) screen printing relies on a special stencil, which is a high-loss auxiliary material that needs to be replaced frequently, resulting in high production costs; (2) screen printing is a direct contact printing technology. During the printing process, the squeegee and the stencil act directly on the silicon wafer surface, which can easily lead to silicon wafer damage; (3) due to the technical principle of screen printing, the precision of the mask layer prepared is low, and it is difficult to achieve micron-level fine patterns. The photoelectric conversion efficiency of photovoltaic cells is closely related to the width of the front grid line. A wider grid line will block more light-receiving area, which restricts the improvement of battery conversion efficiency; (4) the process stability of screen printing ink is poor. The mask layer is prone to problems such as pinholes, ink overflow, or blurred edges. These defects will lead to uneven thickness and reduced adhesion of the subsequent electroplated copper layer, which seriously affects the reliability and service life of the battery. Summary of the Invention

[0004] This application aims to solve at least one of the above-mentioned technical problems, and provides a copper grid line heterojunction solar cell and its preparation method.

[0005] The first aspect of this application provides a method for preparing a copper grid line heterojunction solar cell, comprising the following steps: Step 1: Provide an N-type substrate, the substrate including opposing front and back sides, and form conductive regions on the front and back sides; Step 2: Deposit a transparent conductive oxide layer on the conductive region; Step 3: Deposit a copper seed layer on the transparent conductive oxide layer; Step 4: Using aerosol jet printing technology, a mask layer is prepared on the non-gateline area of ​​the copper seed layer; Step 5: Expose and develop the mask layer to expose the copper seed layer in the gate pattern area; Step 6: Copper grid lines are generated in the grid pattern area by electroplating copper deposition; Step 7: Remove the mask layer and the copper seed layer to obtain a copper grid heterojunction solar cell.

[0006] This application provides a complete method for fabricating non-contact printed copper grid heterojunction solar cells. It adopts aerosol jet printing technology, and the non-contact printing reduces the breakage rate of the printing process. When combined with developing, curing and electroplating of copper grids, copper grids with a width of less than 15µm can be prepared, thereby increasing the effective light-receiving area of ​​the cell and improving the photoelectric conversion efficiency.

[0007] Optionally, after forming copper grid lines by electroplating copper deposition in the grid line pattern area, an anti-oxidation layer is formed on the copper grid lines. Forming an anti-oxidation layer on the copper grid lines can effectively isolate copper from air, preventing oxidation or sulfation of the copper grid lines during subsequent storage and component packaging, thereby maintaining high conductivity and low contact resistance of the electrodes for a long time and improving the long-term reliability of the battery.

[0008] Preferably, the antioxidant layer is an electroplated tin layer. Tin material has excellent antioxidant properties and good electrical conductivity, and it has good adhesion to the copper grid lines. Using an electroplated tin layer as an antioxidant layer can not only reliably isolate corrosive media, but also ensure that the overall conductivity of the electrode is not affected. At the same time, the electroplating process is easy to control in industrial applications.

[0009] Preferably, the thickness of the electroplated tin layer is 0.5-2 μm. This thickness range can minimize the impact on gate line size and series resistance while providing sufficient protection.

[0010] More preferably, the electroplating solution used for tin electroplating comprises: SnSO4 20-40 g / L, H2SO4 100-150 g / L, phenolsulfonic acid 10-20 g / L, brightener 0.5-2 g / L, and leveling agent 0.1-0.5 g / L. Using the above electroplating solution formulation can improve the gloss and smoothness of the tin layer and suppress defects such as pinholes and pitting.

[0011] More preferably, in the tin electroplating process: the deposition rate is controlled at 0.1-0.3 μm / min, the electroplating current density at 0.5-2 A / dm², and the electroplating temperature at 25-35℃; the electroplating time is 3-15 min, and the mixture is stirred at a rate of 150-300 r / min during the electroplating process. Using the above electroplating process parameters ensures the uniformity of the electroplating solution concentration and ion transport, avoiding problems such as uneven coating thickness, roughness, or dendrite formation caused by local concentration polarization.

[0012] Optionally, the thickness of the mask layer formed by the aerosol jet printing technology is 3-10 μm. At this thickness, the penetration and lateral etching of the electroplating solution can be prevented.

[0013] Preferably, the ink used in the aerosol jet printing technology has a viscosity of 5-20 mPa·s at 25°C. At this viscosity, subsequent atomization can form uniform aerosol droplets of 1-5 μm, thereby achieving high-precision printing.

[0014] Preferably, the ink used in the aerosol jet printing technology comprises the following components by weight percentage: 30%-45% epoxy resin, 15%-25% acrylate, 3%-6% photoinitiator, 5%-10% nano-SiO2, and 15%-25% solvent PGMEA. Using the above ink formulation, the epoxy resin and acrylate provide good film-forming properties and photocuring characteristics; the addition of nano-SiO2 enhances the mechanical strength and resistance to chemical corrosion from electroplating solutions after curing; the photoinitiator ensures rapid curing under UV exposure; and the solvent PGMEA achieves uniform dispersion of the components and adjusts the ink viscosity to 5-20 mPa at 25°C.

[0015] More preferably, the process parameters for the aerosol jet printing technology include: ultrasonic atomization with a power of 1.5-3.0W and an atomization pressure of 0.1-0.3MPa; carrier gas N2 with a pressure of 0.2-0.5MPa; sheath gas N2 with a pressure of 0.3-0.6MPa; nozzle orifice diameter of 50-100μm; and printing speed of 50-200mm / s. Using the above printing process, a mask layer of 3-10μm thickness can be formed while ensuring the edge perpendicularity and surface flatness of the mask layer pattern, meeting the grinding requirements of narrow grid lines.

[0016] Optionally, the width of the electroplated area exposed after the exposure and development of the mask layer is less than 15 μm. An electroplated area width of less than 15 µm is a direct prerequisite for obtaining copper grid lines of less than 15 µm, thereby increasing the effective light-receiving area of ​​the cell and improving the photoelectric conversion efficiency.

[0017] Preferably, the mask layer is exposed using ultraviolet light. Ultraviolet light exposure provides concentrated energy, rapidly stimulating the photoinitiator reaction and achieving rapid curing of the mask layer. Simultaneously, the short wavelength of ultraviolet light results in high exposure resolution, avoiding defects such as pinholes and blurred edges.

[0018] Preferably, the ultraviolet exposure uses a 365nm LED light source, with an exposure energy of 500-1500mJ / cm2 and an exposure time of 10-30s. These process conditions can avoid overexposure that could lead to embrittlement.

[0019] More preferably, the developer is a 1%-3% Na2CO3 aqueous solution, the developing temperature is 25-35℃, and the developing time is 30-90s; after developing, curing is performed at a temperature of 100-120℃ for 10-20min. This developer can remove uncured ink, avoiding excessive corrosion of the transparent conductive oxide layer and copper seed layer; the subsequent low-temperature curing can further improve the crosslinking degree and electroplating solution resistance of the mask layer, ensuring the structural stability of the mask layer during the electroplating process.

[0020] Optionally, the width of the copper grid line is less than or equal to 15µm. Copper grid lines smaller than 15µm can increase the effective light-receiving area of ​​the battery and improve photoelectric conversion efficiency.

[0021] Preferably, the width of the copper grid line is greater than or equal to 10 μm and less than or equal to 15 μm; Preferably, the electroplating solution used for copper electroplating comprises: CuSO4·5H2O 150-200 g / L, H2SO4 50-100 g / L, Cl⁻ 50-100 mg / L, and additives 1-5 mL / L. This electroplating formulation can also inhibit copper dendrite growth and improve grid line flatness.

[0022] More preferably, the electroplating current density is 1-5 A / dm², and the electroplating temperature is 20-30°C. This avoids the evaporation of the electroplating solution affecting the concentration stability.

[0023] Optionally, the conductive region formed on the front side is an intrinsic amorphous silicon layer and an N-type microcrystalline silicon layer. The intrinsic amorphous silicon layer can serve as a passivation layer, effectively reducing the interfacial recombination rate between the substrate and the transparent conductive oxide layer, while the N-type microcrystalline silicon layer serves as the front conductive layer, enabling efficient collection of photogenerated carriers.

[0024] Preferably, the N-type microcrystalline silicon layer is a phosphorus-doped microcrystalline silicon layer. Compared with other doping elements, phosphorus has a higher doping efficiency in microcrystalline silicon, can form a more uniform carrier distribution, and improve the carrier collection efficiency of the conductive layer.

[0025] More preferably, the thickness of the intrinsic amorphous silicon on the front side is 8-15 nm; and / or, the thickness of the N-type microcrystalline silicon layer is 20-40 nm. The thickness of the intrinsic amorphous silicon layer within this range achieves optimal passivation; excessive thickness increases light absorption loss, while insufficient thickness results in inadequate passivation. The thickness of the N-type microcrystalline silicon layer within this range ensures good conductivity while avoiding stress cracking or increased interface defects caused by excessive film thickness.

[0026] More preferably, the method for preparing the intrinsic amorphous silicon layer on the front side is as follows: using a mixed gas of silane and hydrogen, with a flow ratio of silane to hydrogen of 1:60-1:100; a total gas flow rate of 300-500 sccm; a radio frequency power of 100-150 W during deposition; a deposition pressure of 100-300 Pa; and a deposition rate of 0.15-0.3 nm / s. These process parameters ensure a high degree of amorphization and low defect density in the intrinsic amorphous silicon layer, achieving excellent surface passivation. Simultaneously, the reasonable deposition rate and pressure ensure the uniformity and repeatability of the film.

[0027] More preferably, the method for preparing the front-side N-type microcrystalline silicon layer is as follows: using phosphine as the dopant source, employing a mixed gas of silane, hydrogen, and phosphine, with a silane to hydrogen flow rate ratio of 1:30-1:60; a phosphine to silane flow rate ratio of 1:100-1:200; and a radio frequency power of 150-300W and a deposition pressure of 200-400Pa during deposition. This process, by controlling the dopant source ratio and deposition parameters, can achieve high conductivity and low defect density in the N-type microcrystalline silicon layer, while ensuring interfacial compatibility between the film layer and the intrinsic amorphous silicon layer, thereby improving carrier transport efficiency.

[0028] Optionally, the conductive region formed on the back side is an intrinsic amorphous silicon layer and a P-type microcrystalline silicon layer. The intrinsic amorphous silicon layer on the back side can achieve effective passivation of the back side of the substrate, while the P-type microcrystalline silicon layer, as the conductive layer on the back side, forms a heterojunction structure with the N-type microcrystalline silicon layer on the front side, realizing the separation and efficient collection of photogenerated carriers, and significantly improving the photoelectric conversion efficiency of the battery.

[0029] Preferably, the P-type microcrystalline silicon layer is a boron-doped microcrystalline silicon layer. The boron-doped microcrystalline silicon layer has a low interface state density with the intrinsic amorphous silicon layer, reducing carrier recombination losses.

[0030] More preferably, the thickness of the intrinsic amorphous silicon on the back side is 14-20 nm; and / or, the thickness of the P-type microcrystalline silicon layer is 30-50 nm. The thickness of the intrinsic amorphous silicon layer on the back side is slightly thicker than that on the front side, which can better passivate the back side interface and reduce carrier recombination; the thickness of the P-type microcrystalline silicon layer in this range can ensure sufficient hole conduction capacity, while avoiding light absorption loss or stress problems caused by excessive film thickness.

[0031] More preferably, the method for preparing the intrinsic amorphous silicon layer on the back side is as follows: using a mixed gas of silane and hydrogen, with a flow ratio of silane to hydrogen of 1:60-1:100; a total gas flow rate of 300-500 sccm; a radio frequency power of 100-150 W during deposition; a deposition pressure of 100-300 Pa; and a deposition rate of 0.15-0.3 nm / s. These process parameters ensure high passivation quality of the intrinsic amorphous silicon layer on the back side, have good compatibility with the preparation process of the intrinsic amorphous silicon layer on the front side, and facilitate industrial-scale mass production.

[0032] More preferably, the preparation method of the P-type microcrystalline silicon layer on the back side is as follows: using borane as the dopant source, a mixed gas of silane, hydrogen, and borane is used, with a flow ratio of silane to hydrogen of 1:30-1:60; a flow ratio of borane to silane of 1:50-1:100; the radio frequency power during deposition is 150-300W, and the deposition pressure is 200-400Pa. This process, by optimizing the doping ratio and deposition parameters, can achieve high hole concentration and low resistivity of the P-type microcrystalline silicon layer, while ensuring the crystal quality and interfacial compatibility of the film layer, and improving the collection efficiency of charge carriers on the back side.

[0033] Optionally, the transparent conductive oxide layer is an indium tin oxide (ITO) layer. ITO has the dual advantages of high light transmittance and high electrical conductivity, which is suitable for the performance requirements of the transparent conductive layer in heterojunction solar cells. At the same time, the film layer has good interfacial adhesion with the microcrystalline silicon layer and the copper seed layer, which can ensure the structural stability and electrical performance of the cell.

[0034] Preferably, the thickness of the front indium tin oxide layer is 80-120 nm; and / or, the thickness of the back indium tin oxide layer is 100-150 nm; and / or, the density of the indium tin oxide layer is greater than or equal to 7.0 g / cm³; and / or, the sheet resistance of the indium tin oxide layer is less than or equal to 15 Ω / □; and / or, the transmittance of the indium tin oxide layer is greater than or equal to 85%. A thinner front indium tin oxide layer reduces light absorption loss, while a slightly thicker back indium tin oxide layer improves back-side carrier collection efficiency. The required film density, sheet resistance, and transmittance ensure that the indium tin oxide layer possesses excellent conductivity while maintaining high light transmittance, meeting the photoelectric performance requirements of heterojunction solar cells.

[0035] Preferably, the transparent conductive oxide layer is prepared by PVD. Before deposition, the vacuum chamber is evacuated to a vacuum level of less than or equal to 1×10⁻⁴ Pa. A target material containing In₂O₃ and SnO₂ is used. The sputtering gases are argon and oxygen, with an argon-to-oxygen flow ratio of 10:1-20:1; the total gas flow rate is 50-100 sccm; the sputtering power is 100-300 W; and the deposition rate is 0.5-1.5 nm / s. These PVD process parameters ensure high crystallinity, low defect density, and uniform composition distribution of the indium tin oxide layer. By adjusting the oxygen-argon ratio, the transmittance and conductivity of the film can be precisely balanced. Simultaneously, the high-vacuum deposition environment avoids film contamination and improves film quality.

[0036] Optionally, the thickness of the copper seed layer is 80-120 nm. A copper seed layer within this thickness range can ensure good conductivity and uniform nucleation sites during copper electroplating. If it is too thin, it is easy to cause pinholes or broken grids during electroplating. If it is too thick, it will increase the series resistance of the battery and increase the difficulty of removing the seed layer in the non-grid area.

[0037] More preferably, the method for preparing the copper seed layer is as follows: before deposition, the vacuum chamber is evacuated to a vacuum level of 1×10⁻⁴ Pa to 1×10⁻³ Pa; a copper target is used, and argon is used as the sputtering gas; the chamber sputtering pressure is maintained at 0.3-1.5 Pa; the total gas flow rate is 10-50 sccm; the sputtering power is 100W-300W; and the deposition rate is 0.5-1.5 nm / s. This PVD process can ensure the high purity, low resistivity, and good adhesion of the copper seed layer to the indium tin oxide layer. The high vacuum environment can avoid film oxidation, and the uniform deposition rate can ensure the consistency of the seed layer thickness, providing a uniform nucleation basis for subsequent electroplating of copper gate lines.

[0038] Optionally, the mask layer and the copper seed layer can be removed using a wet process. The wet removal process is simple to operate, low in cost, and suitable for industrial-scale batch processing.

[0039] Preferably, a 5%-10% NaOH aqueous solution is used. The mask layer and copper seed layer are removed by treatment at 40-60℃ for 10-15 minutes; followed by rinsing with deionized water and drying at 80-100℃ to prepare the copper grid heterojunction solar cell. Under these process conditions, the ink can be quickly dissolved and cured without damaging the copper grid lines and ITO layer, ensuring thorough removal of mask residue.

[0040] The second aspect of this application provides a copper grid heterojunction solar cell obtained by the preparation method provided in the first aspect of this application.

[0041] Preferably, the width of the copper grid lines is less than 15 μm. A copper grid line width of less than 15 μm can significantly reduce the obstruction of the light-receiving area on the front of the battery, improve light absorption efficiency, and thus improve the photoelectric conversion efficiency of the battery; at the same time, narrow grid lines can reduce the series resistance of the battery, reduce power loss, and further improve the photoelectric conversion efficiency of the battery. Attached Figure Description

[0042] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 A schematic flowchart of a method for fabricating a copper grid heterojunction solar cell according to this application is shown. Figure 2 This illustration shows a schematic diagram of the fabrication process of an embodiment of a copper grid heterojunction solar cell according to this application. Figure 3 A schematic diagram of an aerosol jet printing apparatus for printing a mask layer according to an embodiment of this application is shown; Figure 4This paper shows a SEM image of a mask layer interface prepared using aerosol jet printing technology according to an embodiment of this application. Figure 5 An SEM image of a copper grid line prepared according to an embodiment of this application is shown; Figure 6 A physical image of a copper grid heterojunction solar cell prepared according to an embodiment of this application is shown.

[0043] Figure label: 10 - Substrate; 201 - Intrinsic amorphous silicon layer; 202 - P-type microcrystalline silicon layer; 203 - N-type microcrystalline silicon layer; 30 - Conductive region; 40 - Copper seed layer; 50 - Mask layer; 60 - Copper gate line; 601 - Gate line region; 100-cell battery; 2001 - Printing device body; 2002 - Print head; 200a - Sheath gas; 202b - Ink atomizing gas. Detailed Implementation

[0044] Embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.

[0045] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise expressly specified. "Several" means one or more, unless otherwise expressly specified.

[0046] The first aspect of this application provides a method for preparing a copper grid line heterojunction solar cell, such as... Figure 1-2 As shown, it includes the following steps: Step 1: Provide an N-type substrate, which includes opposing front and back sides, and form conductive regions on the front and back sides of the substrate; In this step, the substrate 10 is an N-type silicon wafer, such as an N-type monocrystalline silicon wafer, an N-type polycrystalline silicon wafer, or an N-type quasi-monocrystalline silicon wafer; the substrate 10 includes a front side and a back side, the front side being the light-receiving surface and the back side being the back-lighting surface, and conductive areas are formed on the front side and the back side of the substrate.

[0047] Specifically, such as Figure 2As shown in (a) and (b), a substrate is first provided, and then the substrate is subjected to double-sided texturing, that is, double-sided texturing pretreatment is performed on both the front and back sides of the substrate. After texturing, a uniform pyramid structure is formed on the surface of the substrate to enhance the light absorption capacity. The double-sided texturing pretreatment can be performed using NaOH solution as the solution. Then, different conductive regions are formed on the front and back sides of the substrate. On the front side of the substrate, an intrinsic amorphous silicon layer 201 and a P-type doped microcrystalline silicon layer 202 are deposited sequentially to form a P-type conductive region; on the back side of the substrate, an intrinsic amorphous silicon layer 201 and an N-type doped microcrystalline silicon layer 203 are deposited sequentially to form an N-type conductive region.

[0048] In one alternative approach, the N-type microcrystalline silicon layer is a phosphorus-doped microcrystalline silicon layer; In one alternative approach, the thickness of the intrinsic amorphous silicon on the front side is 8-15 nm; for example, it can be 8 nm, 9 nm, 10 nm, 12 nm, 13 nm, 14 nm or 15 nm.

[0049] In one alternative approach, the thickness of the N-type microcrystalline silicon layer is 20-40 nm; for example, it can be 20 nm, 25 nm, 30 nm, 32 nm, 35 nm, 38 nm or 40 nm.

[0050] In one alternative approach, the P-type microcrystalline silicon layer is a boron-doped microcrystalline silicon layer; In one alternative approach, the thickness of the intrinsic amorphous silicon on the back side is 14-20 nm; for example, it can be 14 nm, 15 nm, 16 nm, 18 nm, 19 nm or 20 nm.

[0051] In one alternative approach, the thickness of the P-type microcrystalline silicon layer is 30-50 nm; for example, it can be 30 nm, 35 nm, 40 nm, 42 nm, 45 nm, 48 nm or 50 nm.

[0052] In one alternative approach, the conductive region can be prepared by PECVD deposition. The preparation method for the intrinsic amorphous silicon layer on the front side is as follows: a mixed gas of silane and hydrogen is used, with a flow ratio of silane to hydrogen of 1:60-1:100; for example, 1:60, 1:70, 1:80, 1:90, or 1:100; the total gas flow rate is 300-500 sccm; for example, 300 sccm, 350 sccm, 400 sccm, 450 sccm, or 500 sccm; deposition... The RF power in the deposition is 100-150W, for example, 100W, 110W, 120W, 130W, 140W or 150W; the deposition pressure is 100-300Pa, for example, 100Pa, 150Pa, 200Pa, 250Pa or 300Pa; the deposition rate is 0.15-0.3nm / s, for example, 0.15nm / s, 0.2nm / s, 0.22nm / s, 0.25nm / s, 0.28nm / s or 0.3nm / s.

[0053] In one alternative approach, the conductive region can be prepared by PECVD deposition. The preparation method of the front-side N-type microcrystalline silicon layer is as follows: using phosphine as the dopant source, a mixed gas of silane, hydrogen, and phosphine is used, with the flow ratio of silane to hydrogen being 1:30-1:60, for example, 1:30, 1:40, 1:45, 1:50, 1:55, or 1:60; the flow ratio of phosphine to silane being 1:100-1:200, for example, 1:100, 1:120, 1:150, 1:180, or 1:200; the radio frequency power during deposition is 150-300W, for example, 150W, 180W, 200W, 250W, 280W, or 300W; and the deposition pressure is 200-400Pa, for example, 200Pa, 250Pa, 300Pa, 350Pa, or 400Pa.

[0054] In one alternative approach, the intrinsic amorphous silicon layer on the back side is prepared by using a mixture of silane and hydrogen gas, wherein the flow rate ratio of silane to hydrogen is 1:60-1:100, for example, 1:60, 1:75, 1:80, 1:90, or 1:100; the total gas flow rate is 300-500 sccm, for example, 300 sccm, 320 sccm, 400 sccm, 480 sccm, or 500 sccm; and the deposition process involves... The frequency power is 100-150W, for example, 100W, 115W, 125W, 140W or 150W; the deposition pressure is 100-300Pa, for example, 100Pa, 180Pa, 200Pa, 260Pa or 300Pa; the deposition rate is 0.15-0.3nm / s, for example, 0.15nm / s, 0.18nm / s, 0.2nm / s, 0.25nm / s or 0.3nm / s.

[0055] In one alternative approach, the preparation method of the P-type microcrystalline silicon layer on the back side is as follows: using borane as the dopant source, a mixed gas of silane, hydrogen, and borane is employed, with the flow ratio of silane to hydrogen being 1:30-1:60, for example, 1:30, 1:35, 1:40, 1:50, 1:55, or 1:60; the flow ratio of borane to silane being 1:50-1:100, for example, 1:50, 1:60, 1:70, 1:80, 1:90, or 1:100; the radio frequency power during deposition is 150-300W, for example, 150W, 200W, 220W, 250W, 290W, or 300W; and the deposition pressure is 200-400Pa, for example, 200Pa, 240Pa, 300Pa, 360Pa, or 400Pa.

[0056] Step 2: Deposit transparent conductive oxide layers on the conductive areas on the front and back sides; In this step, such as Figure 2 As shown in (c), a transparent conductive oxide layer 30 is deposited on the front and back sides of the substrate 10 in which the conductive regions are formed.

[0057] In one alternative embodiment, the transparent conductive oxide layer 30 is an indium tin oxide layer.

[0058] Preferably, the thickness of the front indium tin oxide layer is 80-120 nm; for example, it can be 80 nm, 85 nm, 90 nm, 95 nm, 100 nm, 105 nm, 110 nm, 115 nm or 120 nm. Preferably, the thickness of the indium tin oxide layer on the back side is 100-150 nm; for example, it can be 100 nm, 105 nm, 110 nm, 120 nm, 125 nm, 130 nm, 140 nm, 145 nm or 150 nm. Preferably, the density of the indium tin oxide layer is greater than or equal to 7.0 g / cm³; for example, it can be 7.0 g / cm³, 7.1 g / cm³, 7.2 g / cm³, 7.3 g / cm³, 7.4 g / cm³, or 7.5 g / cm³. Preferably, the sheet resistance of the indium tin oxide layer is less than or equal to 15 Ω / □; for example, it can be 15 Ω / □, 14 Ω / □, 13 Ω / □, 12 Ω / □, 11 Ω / □, 10 Ω / □ or 8 Ω / □; Preferably, the transmittance of the indium tin oxide layer is greater than or equal to 85%; for example, it can be 85%, 86%, 87%, 88%, 89%, 90%, 91%, or 92%. In one alternative approach, the transparent conductive oxide layer is prepared by PVD, wherein the vacuum level of the vacuum chamber is evacuated to less than or equal to 1 × 10⁻⁶ before deposition. -4 Pa, for example, could be 1×10 -4 Pa, 8×10 -5 Pa, 5×10 -5 Pa, 3×10 -5 Pa or 1×10 -5 Pa can reduce the impact of impurities on conductivity; the substrate temperature is controlled at 150~200℃, and low-temperature deposition avoids damage to the underlying microcrystalline silicon layer; a target material containing In2O3 and SnO2 is used, and the sputtering gas is argon and oxygen, with an argon to oxygen flow ratio of 10:1-20:1; for example, it can be 10:1, 12:1, 15:1, 18:1 or 20:1; the total gas flow rate is 50-100 sccm, for example, it can be 50 sccm, 60 sccm, 70 sccm, 80 sccm, 90 sccm or 100 sccm; the sputtering power is 100-300W, for example, it can be 100W, 150W, 200W, 250W or 300W; the deposition rate is 0.5-1.5nm / s, for example, it can be 0.5nm / s, 0.8nm / s, 1.0nm / s, 1.2nm / s or 1.5nm / s.

[0059] Step 3: Deposit a copper seed layer on the transparent conductive oxide layer; In this step, such as Figure 2 As shown in (d), copper seed layers 40 are deposited on the front and back sides of the substrate after the formation of conductive regions and transparent conductive oxide layers.

[0060] The thickness of the copper seed layer is 80-120nm; for example, it can be 80nm, 81nm, 82nm, 84nm, 85nm, 88nm, 90nm, 92nm, 95nm, 98nm, 100nm, 105nm, 110nm, 115nm, or 120nm. Preferably, PVD is used for preparation, and the vacuum level of the vacuum chamber is evacuated to 1×10⁻⁶ before deposition. -4 Pa-1×10 -3 Pa; for example, it could be 1×10 -4 Pa, 2×10 -4 Pa, 3×10 -4 Pa, 4×10 -4 Pa, 5×10 -4 Pa, 6×10 -4 Pa, 7×10 -4 Pa, 8×10 -4 Pa, 9×10 -4 Pa, 1×10 -3 Pa; copper target material is used, such as high-purity target material with a purity of 99.99%; the distance between the target material and the solar cell is controlled at 100-150mm. Argon is used as the sputtering gas; the sputtering pressure in the chamber is maintained at 0.3-1.5 Pa, for example, 0.3 Pa, 0.4 Pa, 0.5 Pa, 0.6 Pa, 0.7 Pa, 0.8 Pa, 0.9 Pa, 1.0 Pa, 1.2 Pa, or 1.5 Pa; the total gas flow rate is 10-50 sccm, for example, 10 sccm, 20 sccm, 30 sccm, 40 sccm, or 50 sccm; argon is used as the sputtering ion source to bombard the copper target surface. The sputtering power is 100W-300W, for example, 100W, 150W, 200W, 250W, or 300W; the deposition rate is 0.5-1.5 nm / s, for example, 0.5 nm / s, 0.8 nm / s, 1.0 nm / s, 1.2 nm / s, or 1.5 nm / s. A DC magnetron sputtering power supply with a sputtering power of 100-500W is used to maintain a low temperature of <100℃ to avoid damage to the amorphous silicon passivation layer of the HJT cell due to high temperature. The deposition rate is controlled at 0.5-1.5nm / s; too slow a rate will increase production time, while too fast a rate will easily lead to a porous film. The copper film thickness is monitored in real time using a crystal oscillator thickness monitor. When the thickness reaches the target value, sputtering is stopped, and a copper seed layer is obtained.

[0061] Step 4: Use aerosol jet printing technology to prepare a mask layer in the non-gateline area of ​​the copper seed layer; In this step, an aerosol jet printing device is used to prepare a mask layer 50 in the non-gate line region of the copper seed layer 40, while no mask layer 50 is deposited in the gate line region 601.

[0062] Specifically, such as Figure 2 (e) and Figure 3As shown, the aerosol jet printing device includes a main body 2001 and a printing nozzle 2002 connected to the main body. Ink atomizing gas and carrier gas N2200b are introduced into the center of the main body, while sheath gas N2200a is introduced into the annular channel surrounding the main body. The distance between the printing nozzle and the battery cell is controlled to be 2-5 mm. During aerosol jet printing, the atomized ink forms tiny droplet aerosols. The carrier gas, acting as a propulsion carrier, transports these droplets from the atomization chamber to the nozzle. The sheath gas is ejected from the annular channel surrounding the nozzle. Through the constraint of the airflow, the droplet beam is compressed into a finer, highly collimated jet, significantly improving the printing resolution.

[0063] In one alternative approach, the thickness of the mask layer formed by aerosol jet printing technology is 3-10 μm, for example, it can be 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm or 10 μm.

[0064] In one alternative approach, the viscosity of the ink at 25°C is 5-20 mPa·s; for example, it can be 5 mPa·s, 6 mPa·s, 7 mPa·s, 8 mPa·s, 9 mPa·s, 10 mPa·s, 12 mPa·s, 13 mPa·s, 14 mPa·s, 15 mPa·s, 16 mPa·s, 17 mPa·s, 18 mPa·s, 19 mPa·s, or 20 mPa·s.

[0065] In one alternative approach, the ink used in aerosol jet printing technology comprises the following components by weight percentage: 30%-45% epoxy resin; for example, 30%, 31%, 33%, 35%, 38%, 40%, 41%, 42%, 43%, 44%, or 45%; 15%-25% acrylate; for example, 15%, 16%, 18%, 20%, 22%, 23%, 24%, or 25%; 3%-6% photoinitiator; for example, 3%, 4%, 5%, or 6%; 25%-10% nano-SiO2; for example, 5%, 6%, 7%, 8%, 9%, or 10%; and 15%-25% solvent PGMEA; for example, 15%, 17%, 19%, 20%, 21%, 23%, 24%, or 25%.

[0066] In one alternative approach, the process parameters for aerosol jet printing technology include: ultrasonic atomization with an atomization power of 1.5-3.0W, such as 1.5W, 1.8W, 2.0W, 2.2W, 2.5W, 2.8W, or 3.0W; atomizing gas pressure of 0.1-0.3MPa, such as 0.1MPa, 0.15MPa, 0.2MPa, 0.25MPa, or 0.3MPa; and carrier gas N2 with a pressure of 0.2-0.5MPa, such as 0.2MPa, 0.25MPa, 0.3MPa, 0.35MPa, 0.4MPa, or 0.4MPa. 5MPa or 0.5MPa; sheath gas is N2, pressure is 0.3-0.6MPa, for example, 0.3MPa, 0.35MPa, 0.4MPa, 0.45MPa, 0.5MPa, 0.55MPa or 0.6MPa; nozzle orifice diameter is 50-100μm, for example, 50μm, 60μm, 70μm, 80μm, 90μm or 100μm; printing speed is 50-200mm / s, for example, 50mm / s, 80mm / s, 100mm / s, 120mm / s, 150mm / s, 180mm / s or 200mm / s.

[0067] Step 5: Expose and develop the mask layer to reveal the copper seed layer in the grid pattern area; In this step, such as Figure 2 As shown in (e), the mask layer 50 is exposed and developed to expose the copper seed layer 40 of the gate pattern area 601. Specifically, ultraviolet light is used to irradiate the mask layer 50, causing a photochemical reaction in the ink in the exposed areas. Subsequently, a developing solution is used to dissolve and remove the ink in the unexposed areas, thereby precisely exposing the gate pattern area 601 on the underlying copper seed layer 40. Figure 4 As shown, the width of the gate line region 601 exposed after development of the mask layer prepared in this application is 13.3µm, which meets the requirements for narrow gate line preparation.

[0068] In one alternative approach, ultraviolet light is used to expose the ink mask layer, which can prevent pinholes from being created during exposure.

[0069] In one alternative approach, ultraviolet exposure is performed using a 365nm LED light source with an exposure energy of 500-1500 mJ / cm². 2 For example, it could be 500mJ / cm 2 600mJ / cm 2 800mJ / cm 2 1000mJ / cm 2 1200mJ / cm 2 1400mJ / cm 2 Or 1500mJ / cm2 Exposure time: 10-30s; for example, it can be 10s, 12s, 15s, 20s, 25s, 28s or 30s.

[0070] In one alternative approach, the width of the electroplated area exposed after exposure and development of the mask layer is less than 15 μm; In one optional method, the developer is a 1%-3% Na₂CO₃ aqueous solution, such as 1%, 1.5%, 2%, 2.5%, or 3%; the developing temperature is 25-35℃, such as 25℃, 28℃, 30℃, 32℃, or 35℃; the developing time is 30-90s, such as 30s, 45s, 60s, 75s, or 90s; after developing, curing is performed at a temperature of 100-120℃, such as 10min, 12min, 15min, 18min, or 20min; the curing time is 10-20min, such as 10min, 12min, 15min, 18min, or 20min. This avoids over-etching of the ITO layer. It is worth noting that the concentration of the developer here refers to the mass-volume concentration; a 1% Na₂CO₃ aqueous solution means that 1g of Na₂CO₃ is contained in 100ml of the aqueous solution.

[0071] Step 6: Copper grid lines are generated by electroplating copper deposition in the grid pattern area; In this step, such as Figure 2 As shown in (f), copper grid lines 60 are generated at positions in the grid line pattern area 601 using electroplated copper. Figure 5 As shown, the copper grid line obtained by the preparation method of this application has a width of 12.8µm. The copper grid line has a narrow width and a smooth morphology without dendrite defects.

[0072] Optionally, the electroplating solution used for copper electroplating includes: CuSO4·5H2O 150-200 g / L, for example, 150 g / L, 160 g / L, 170 g / L, 180 g / L, 190 g / L, or 200 g / L; H2SO4 50-100 g / L, for example, 50 g / L, 60 g / L, 70 g / L, 80 g / L, 90 g / L, or 100 g / L; Cl⁻ 50-100 mg / L, for example, can be 50mg / L, 60mg / L, 70mg / L, 80mg / L, 90mg / L or 100mg / L; and additives 1-5mL / L, for example, can be 1mL / L, 2mL / L, 3mL / L, 4mL / L or 5mL / L; the additives can be a mixture of polyethylene glycol and thiourea; the mass ratio of polyethylene glycol to thiourea is (1-3):1, which can be 1:1, 2:1 or 3:1. Low concentrations can inhibit abnormal growth of copper grains, while excessive amounts can easily lead to increased brittleness of the coating.

[0073] Preferably, the electroplating current density is 1-5 A / dm². 2 For example, it could be 1A / dm 2 2A / dm 2 3A / dm 2 4A / dm 2 Or 5A / dm 2 The electroplating temperature is 20-30℃, for example, it can be 20℃, 22℃, 25℃, 28℃ or 30℃.

[0074] Step 7: Remove the mask layer and copper seed layer to obtain a copper grid heterojunction solar cell.

[0075] In this step, such as Figure 2 As shown in (g), the mask layer and copper seed layer are removed to obtain a copper grid line heterojunction solar cell.

[0076] In one alternative approach, a wet process can be used to remove the mask layer and the copper seed layer.

[0077] In one optional method, a 5%-10% NaOH aqueous solution is used, for example, 5%, 6%, 7%, 8%, 9%, or 10%; the mask layer is removed by treating at 40-60℃ for 10-15 minutes, where the treatment temperature can be, for example, 40℃, 45℃, 50℃, 55℃, or 60℃, and the treatment time can be, for example, 10 minutes, 11 minutes, 12 minutes, 13 minutes, 14 minutes, or 15 minutes. This rapidly dissolves and cures the ink without damaging the copper grid lines and ITO layer, ensuring thorough removal of mask residue. After rinsing with deionized water and drying at 80-100℃, a copper grid line heterojunction solar cell is obtained. It is worth noting that the concentration of the developer here refers to the mass-volume concentration; a 5% NaOH solution means that 100 ml of the aqueous solution contains 5 g of NaOH.

[0078] In one alternative approach, copper grid lines are generated by electroplating copper deposition in the grid line pattern area, and then an anti-oxidation layer is formed on the copper grid lines.

[0079] Preferably, the antioxidant layer is an electroplated tin layer.

[0080] Preferably, the thickness of the electroplated tin layer is 0.5-2μm, for example, it can be 0.5μm, 0.8μm, 1.0μm, 1.2μm, 1.5μm, 1.8μm or 2.0μm.

[0081] More preferably, the electroplating solution used for tin electroplating comprises: SnSO4 20-40 g / L, for example, 20 g / L, 25 g / L, 30 g / L, 35 g / L or 40 g / L; H2SO4 100-150 g / L, for example, 100 g / L, 110 g / L, 120 g / L, 130 g / L, 140 g / L or 150 g / L; phenolsulfonic acid 10-20 g / L, for example, 10 g / L, 12 g / L, 15 g / L, 18 g / L or 20 g / L; and brightener 0.5-2 g / L. g / L, for example, can be 0.5g / L, 0.8g / L, 1.0g / L, 1.2g / L, 1.5g / L, 1.8g / L or 2.0g / L; leveling agent 0.1-0.5g / L, for example, can be 0.1g / L, 0.2g / L, 0.3g / L, 0.4g / L or 0.5g / L; the specific formula in this embodiment is SnSO4 30g / L, H2SO4 120g / L, phenolsulfonic acid 15g / L, polyoxyethylene ether brightener 1.2g / L, benzyl acetone leveling agent 0.3g / L.

[0082] More preferably, during the tin electroplating process: the deposition rate is controlled at 0.1-0.3 μm / min, for example, it can be 0.1 μm / min, 0.15 μm / min, 0.2 μm / min, 0.25 μm / min, or 0.3 μm / min; the electroplating current density is 0.5-2 A / dm³. 2 For example, it could be 0.5A / dm 2 0.8A / dm 2 1.0A / dm 2 1.2A / dm 2 1.5A / dm 2 1.8A / dm 2 Or 2.0A / dm 2 The electroplating temperature is 25-35℃, for example, 25℃, 28℃, 30℃, 32℃ or 35℃; the electroplating time is 3-15min, for example, 3min, 5min, 8min, 10min, 12min or 15min; the stirring speed during the electroplating process is 150-300r / min, for example, 150r / min, 180r / min, 200r / min, 220r / min, 250r / min, 280r / min or 300r / min.

[0083] This application provides a complete method for fabricating non-contact printed copper grid heterojunction solar cells. It adopts aerosol jet printing technology, and the non-contact printing reduces the breakage rate of the printing process. When combined with developing, curing and electroplating of copper grids, copper grids with a diameter of less than 15µm can be prepared, thereby increasing the effective light-receiving area of ​​the cell and improving the photoelectric conversion efficiency.

[0084] The second aspect of this application provides a copper grid heterojunction solar cell obtained by the preparation method provided in the first aspect of this application.

[0085] Preferably, the width of the copper grid lines is less than 15 μm. A copper grid line width of less than 15 μm can significantly reduce the obstruction of the light-receiving area on the front of the battery, improve light absorption efficiency, and thus improve the photoelectric conversion efficiency of the battery; at the same time, narrow grid lines can reduce the series resistance of the battery, reduce power loss, and further improve the photoelectric conversion efficiency of the battery.

[0086] The following describes in detail, with reference to a specific embodiment, the copper grid heterojunction solar cell and its fabrication method according to this application. It is to be understood that the following description is merely illustrative and not intended to limit the invention. Example

[0087] Step 1: An N-type single-crystal silicon wafer is used as the N-type substrate, and both the front and back sides of the substrate are texturized using NaOH solution. Then, PECVD is used to prepare the conductive regions. Specifically, before PECVD deposition, the vacuum chamber is evacuated to 5 × 10⁻³ Pa. Intrinsic amorphous silicon layers are first formed on both the front and back sides of the substrate. The reaction gas is a mixture of silane and hydrogen, with a silane to hydrogen flow ratio of 1:60; the total gas flow rate is 300 sccm. During deposition, the RF power is set to 100 W, the deposition pressure is 100 Pa, and the deposition rate is controlled at 0.15 nm / s. Then, an N-type microcrystalline silicon layer is formed on the front side of the substrate, and a P-type microcrystalline silicon layer is formed on the back side. The silicon layers are as follows: The N-type doped microcrystalline silicon layer uses phosphine as the dopant source, and the reaction gas is a mixture of silane, hydrogen, and phosphine, with a silane to hydrogen flow rate ratio of 1:30 and a phosphine to silane flow rate ratio of 1:100. The RF power is 150W, and the deposition pressure is 200Pa. The P-type doped microcrystalline silicon layer uses borane as the dopant source, and the reaction gas is a mixture of silane, hydrogen, and borane, with a silane to hydrogen flow rate ratio of 1:30 and a borane to silane flow rate ratio of 1:50. The RF power is 150W, and the deposition pressure is 200Pa. The resulting intrinsic amorphous silicon layer on the front side has a thickness of 12nm, the N-type microcrystalline silicon layer on the front side has a thickness of 25nm, the intrinsic amorphous silicon layer on the back side has a thickness of 16nm, and the P-type microcrystalline silicon layer on the back side has a thickness of 40nm.

[0088] Step 2: Deposit a transparent conductive oxide layer on the conductive areas of the front and back sides. The transparent conductive oxide layer is an indium tin oxide layer, deposited using PVD magnetron sputtering. Before deposition, the vacuum chamber is evacuated to a vacuum level of 1×10⁻⁻⁻⁻⁶. 4The deposition process employed an indium tin oxide (ITO) target containing In₂O₃ and SnO₂ in a mass ratio of 90:10. The sputtering gases were argon and oxygen, with a flow rate ratio of 10:1; the total gas flow rate was 50 sccm; the sputtering power was 100 W; the deposition rate was 0.5 nm / s; and the resulting ITO layer had a front-side thickness of 80 nm and a back-side thickness of 100 nm, with a film density of 7.12 g / cm³. 3 ; and / or, the sheet resistance of the indium tin oxide layer is less than or equal to 10 Ω / □; and / or, the transmittance of the indium tin oxide layer is 90%; Step 3: Deposit a copper seed layer on the transparent conductive oxide layer; the copper seed layer is deposited using PVD magnetron sputtering. Before deposition, the vacuum chamber is evacuated to a vacuum level of 5 × 10⁻⁻⁻⁴. 4 A high-purity copper target with 99.99% purity was used, with the target-to-cell distance controlled at 120 mm. High-purity argon gas was continuously introduced to maintain the chamber sputtering pressure at 1.0 Pa. Argon gas served as the sputtering ion source, bombarding the copper target surface. A DC magnetron sputtering power supply with a sputtering power of 300 W was used, and the deposition rate was controlled at 1.0 nm / s. The copper film thickness was monitored in real time using a crystal oscillator thickness monitor. When the thickness reached the target value, sputtering was stopped, resulting in a copper seed layer.

[0089] Step 4: Using aerosol jet printing technology, a mask layer is prepared on the non-grid area of ​​the copper seed layer. The ink uses a composite system of 40% epoxy resin, 25% acrylate, 5% photoinitiator, 10% nano-SiO2, and 20% PGMEA, adapted to AJP atomization requirements and ensuring resistance to electroplating solution corrosion. The ink viscosity at 25℃ is 10 mPa·s, ensuring the formation of uniform aerosol droplets within 1-5 μm. Atomization parameters are set to ultrasonic atomization power of 2.0 W and atomization gas pressure of 0.2 MPa to stabilize aerosol generation; jetting parameters include carrier gas N2 pressure of 0.4 MPa, sheath gas N2 pressure of 0.5 MPa, nozzle orifice diameter of 80 μm, and nozzle-to-cell distance of 4 mm; motion parameters are set to printing speed of 80 mm / s and scanning overlap rate of 18%.

[0090] Step 5: Expose and develop the mask layer to expose the copper seed layer in the grid pattern area; use an exposure machine for exposure curing. During the pre-drying stage, maintain the temperature at 65℃ for 15 minutes to remove solvent from the ink until the residual amount is ≤1%; UV exposure uses a 365nm LED light source with an exposure energy of 1000mJ / cm² and an exposure time of 20 seconds; development uses a 2% Na₂CO₃ aqueous solution, treated at 25℃ for 70 seconds to remove uncured ink and expose the electroplated area; post-curing is carried out at 110℃ for 15 minutes.

[0091] Step Six: Copper grid lines are formed by electroplating copper deposition on the grid pattern area; the electroplating solution formula is CuSO4·5H2O 180g / L, H2SO4 80g / L, Cl⁻ 80mg / L, with 4mL / L of polyethylene glycol and thiourea composite additive added; the electroplating temperature is controlled at 25℃, and the current density is 3A / dm³. 2 The copper deposition rate was controlled at 1.5 μm / min, the electroplating time was 10 min, and the mixture was stirred at a rate of 175 r / min during the electroplating process.

[0092] After the copper grid lines are formed, tin plating is performed to form an antioxidant layer that protects the copper metal. The plating solution formula is SnSO4 25g / L, H2SO4 120g / L, phenolsulfonic acid 16g / L, with the addition of 1g / L polyoxyethylene ether and 0.3g / L benzyleneacetone. The plating temperature is controlled at 30℃, and the current density is 1.0A / dm³. 2 The deposition rate was controlled at 0.2 μm / min, the electroplating time was 10 min, and the mixture was stirred at a rate of 175 r / min during the electroplating process.

[0093] Step 7: Treat with a 10% NaOH aqueous solution at 50℃ for 15 minutes to remove the mask layer and copper seed layer. The final result is as follows: Figure 6 The copper grid heterojunction solar cell shown was used to measure the final efficiency of the cell using a cell efficiency tester; the width of the grid lines was measured using SEM.

[0094] Step 1: An N-type single-crystal silicon wafer is used as the N-type substrate, and both the front and back sides of the substrate are texturized using NaOH solution. Then, PECVD is used to prepare the conductive regions. Specifically, before PECVD deposition, the vacuum chamber is evacuated to 5 × 10⁻³ Pa. Intrinsic amorphous silicon layers are first formed on both the front and back sides of the substrate. The reaction gas is a mixture of silane and hydrogen, with a silane to hydrogen flow ratio of 1:60; the total gas flow rate is 300 sccm. During deposition, the RF power is set to 100 W, the deposition pressure is 100 Pa, and the deposition rate is controlled at 0.15 nm / s. Then, an N-type microcrystalline silicon layer is formed on the front side of the substrate, and a P-type microcrystalline silicon layer is formed on the back side. The silicon layers are as follows: The N-type doped microcrystalline silicon layer uses phosphine as the dopant source, and the reaction gas is a mixture of silane, hydrogen, and phosphine, with a silane to hydrogen flow rate ratio of 1:30 and a phosphine to silane flow rate ratio of 1:100. The RF power is 150W, and the deposition pressure is 200Pa. The P-type doped microcrystalline silicon layer uses borane as the dopant source, and the reaction gas is a mixture of silane, hydrogen, and borane, with a silane to hydrogen flow rate ratio of 1:30 and a borane to silane flow rate ratio of 1:50. The RF power is 150W, and the deposition pressure is 200Pa. The resulting intrinsic amorphous silicon layer on the front side has a thickness of 12nm, the N-type microcrystalline silicon layer on the front side has a thickness of 25nm, the intrinsic amorphous silicon layer on the back side has a thickness of 16nm, and the P-type microcrystalline silicon layer on the back side has a thickness of 40nm.

[0095] Step 2: Deposit a transparent conductive oxide layer on the conductive areas of the front and back sides. The transparent conductive oxide layer is an indium tin oxide layer, deposited using PVD magnetron sputtering. Before deposition, the vacuum chamber is evacuated to a vacuum level of 1×10⁻⁻⁻⁻⁶. 4 The deposition process employed an indium tin oxide (ITO) target containing In₂O₃ and SnO₂ in a mass ratio of 90:10. The sputtering gases were argon and oxygen, with a flow rate ratio of 10:1; the total gas flow rate was 50 sccm; the sputtering power was 100 W; the deposition rate was 0.5 nm / s; and the resulting ITO layer had a front-side thickness of 80 nm and a back-side thickness of 100 nm, with a film density of 7.12 g / cm³. 3 ; and / or, the sheet resistance of the indium tin oxide layer is less than or equal to 10 Ω / □; and / or, the transmittance of the indium tin oxide layer is 90%; Step 3: Deposit a copper seed layer on the transparent conductive oxide layer; the copper seed layer is deposited using PVD magnetron sputtering. Before deposition, the vacuum chamber is evacuated to a vacuum level of 5 × 10⁻⁻⁻⁴. 4A high-purity copper target with 99.99% purity was used, with the target-to-cell distance controlled at 120 mm. High-purity argon gas was continuously introduced to maintain the chamber sputtering pressure at 1.0 Pa. Argon gas served as the sputtering ion source, bombarding the copper target surface. A DC magnetron sputtering power supply with a sputtering power of 300 W was used, and the deposition rate was controlled at 1.0 nm / s. The copper film thickness was monitored in real time using a crystal oscillator thickness monitor. When the thickness reached the target value, sputtering was stopped, resulting in a copper seed layer.

[0096] Step 4: Prepare the mask layer using screen printing ink. Use photosensitive resin ink with acid-resistant electroplating solution (commercially available). The viscosity of the photosensitive resin ink at 25℃ is 250 mPa·s. Do not print ink in the grid lines area. Printing pressure is 0.2 MPa, squeegee angle is 45°, and printing speed is 60 mm / s. After printing, pre-bake at 100℃ for 12 minutes.

[0097] Step 5: Expose and develop the mask layer to expose the copper seed layer in the grid pattern area; use an exposure machine for exposure curing. During the pre-drying stage, maintain the temperature at 65℃ for 15 minutes to remove solvent from the ink until the residual amount is ≤1%; UV exposure uses a 365nm LED light source with an exposure energy of 1000mJ / cm² and an exposure time of 20 seconds; development uses a 2% Na₂CO₃ aqueous solution, treated at 25℃ for 70 seconds to remove uncured ink and expose the electroplated area; post-curing is carried out at 110℃ for 15 minutes.

[0098] Step Six: Copper grid lines are formed by electroplating copper deposition on the grid pattern area; the electroplating solution formula is CuSO4·5H2O 180g / L, H2SO4 80g / L, Cl⁻ 80mg / L, with 4mL / L of polyethylene glycol and thiourea composite additive added; the electroplating temperature is controlled at 25℃, and the current density is 3A / dm³. 2 The copper deposition rate was controlled at 1.5 μm / min, the electroplating time was 10 min, and the mixture was stirred at a rate of 175 r / min during the electroplating process.

[0099] After the copper grid lines are formed, tin plating is performed to form an antioxidant layer that protects the copper metal. The plating solution formula is SnSO4 25g / L, H2SO4 120g / L, phenolsulfonic acid 16g / L, with the addition of 1g / L polyoxyethylene ether and 0.3g / L benzyleneacetone. The plating temperature is controlled at 30℃, and the current density is 1.0A / dm³. 2 The deposition rate was controlled at 0.2 μm / min, the electroplating time was 10 min, and the mixture was stirred at a rate of 175 r / min during the electroplating process.

[0100] Step 7: The mask layer and copper seed layer were removed by treating the cells with a 10% NaOH aqueous solution at 50°C for 15 minutes. The final efficiency of the solar cell was measured using a cell efficiency tester; the width of the grid lines was measured using SEM.

[0101] Although this application has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings, disclosure, and appended claims, will understand and implement other variations of the disclosed embodiments in carrying out the claimed application. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude multiple instances. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0102] Although this application has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made thereto without departing from the spirit and scope of this application. Accordingly, this specification and drawings are merely exemplary illustrations of this application as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from the spirit and scope of this application. Thus, if such modifications and modifications of this application fall within the scope of the claims of this application and their equivalents, this application is also intended to include such modifications and modifications.

Claims

1. A method for preparing a copper grid line heterojunction solar cell, characterized in that, Includes the following steps: Step 1: Provide an N-type substrate, the substrate including opposing front and back sides, and form conductive regions on the front and back sides; Step 2: Deposit a transparent conductive oxide layer on the conductive region; Step 3: Deposit a copper seed layer on the transparent conductive oxide layer; Step 4: Using aerosol jet printing technology, a mask layer is prepared on the non-gateline area of ​​the copper seed layer; Step 5: Expose and develop the mask layer to expose the copper seed layer in the gate pattern area; Step 6: Copper grid lines are generated in the grid pattern area by electroplating copper deposition; Step 7: Remove the mask layer and the copper seed layer to obtain a copper grid heterojunction solar cell.

2. The preparation method according to claim 1, characterized in that, After copper grid lines are generated in the grid line pattern area by electroplating copper deposition, an anti-oxidation layer is formed on the copper grid lines. Preferably, the antioxidant layer is an electroplated tin layer; Preferably, the thickness of the electroplated tin layer is 0.5-2 μm; More preferably, the electroplating solution used for tin electroplating includes: SnSO4 20-40g / L, H2SO4 100-150g / L, phenolsulfonic acid 10-20g / L, brightener 0.5-2g / L, and leveling agent 0.1-0.5g / L; More preferably, in the tin electroplating process: the deposition rate is controlled at 0.1-0.3 μm / min, and the electroplating current density is 0.5-2 A / dm³. 2 The electroplating temperature is 25-35℃, the electroplating time is 3-15 minutes, and the stirring is carried out at a rate of 150-300 r / min during the electroplating process.

3. The preparation method according to claim 1, characterized in that, The thickness of the mask layer formed by the aerosol jet printing technology is 3-10 μm; Preferably, the ink used in the aerosol jet printing technology has a viscosity of 5-20 mPa·s at 25°C; More preferably, the ink comprises the following components by weight percentage: 30%-45% epoxy resin, 15%-25% acrylate, 3%-6% photoinitiator, 5%-10% nano-SiO2, and 15%-25% solvent PGMEA; More preferably, the process parameters for the aerosol jet printing technology include: ultrasonic atomization with an atomization power of 1.5-3.0W and an atomization pressure of 0.1-0.3MPa; carrier gas is N2 with a pressure of 0.2-0.5MPa; sheath gas is N2 with a pressure of 0.3-0.6MPa; nozzle orifice diameter is 50-100μm; and printing speed is 50-200mm / s.

4. The preparation method according to claim 1, characterized in that, The width of the electroplated area exposed after exposure and development of the mask layer is less than 15 μm; Preferably, the mask layer is exposed using ultraviolet light; Preferably, the ultraviolet exposure uses a 365nm LED light source with an exposure energy of 500-1500 mJ / cm². 2 Exposure time: 10-30 seconds; More preferably, the developer is a 1%-3% Na2CO3 aqueous solution, the developing temperature is 25-35℃, and the developing time is 30-90s; after developing, curing is performed at a temperature of 100-120℃ for 10-20min.

5. The preparation method according to claim 1, characterized in that, The width of the copper grid line is less than or equal to 15 μm; Preferably, the width of the copper grid line is greater than or equal to 10 μm and less than or equal to 15 μm; Preferably, the electroplating solution used for electroplating copper contains: CuSO4·5H2O 150-200g / L, H2SO4 50-100g / L, Cl⁻ 50-100mg / L, and additives 1-5mL / L; More preferably, the electroplating current density is 1-5 A / dm³. 2 The electroplating temperature is 20-30℃.

6. The preparation method according to claim 1, characterized in that, The conductive region formed on the front side is an intrinsic amorphous silicon layer and an N-type microcrystalline silicon layer; and / or, the conductive region formed on the back side is an intrinsic amorphous silicon layer and a P-type microcrystalline silicon layer. Preferably, the N-type microcrystalline silicon layer is a phosphorus-doped microcrystalline silicon layer; More preferably, the thickness of the intrinsic amorphous silicon on the front side is 8-15 nm; and / or, the thickness of the N-type microcrystalline silicon layer is 20-40 nm; More preferably, the method for preparing the intrinsic amorphous silicon layer on the front side is as follows: a mixed gas of silane and hydrogen is used, the flow ratio of silane to hydrogen is 1:60-1:100; the total gas flow rate is 300-500 sccm; the radio frequency power during deposition is 100-150W, the deposition pressure is 100-300Pa, and the deposition rate is 0.15-0.3nm / s; More preferably, the method for preparing the N-type microcrystalline silicon layer on the front side is as follows: using phosphine as the dopant source, employing a mixed gas of silane, hydrogen, and phosphine, with a flow ratio of silane to hydrogen of 1:30-1:60; a flow ratio of phosphine to silane of 1:100-1:200; and a radio frequency power of 150-300W and a deposition pressure of 200-400Pa during deposition. Preferably, the P-type microcrystalline silicon layer is a boron-doped microcrystalline silicon layer; More preferably, the thickness of the intrinsic amorphous silicon on the back side is 14-20 nm; and / or, the thickness of the P-type microcrystalline silicon layer is 30-50 nm; More preferably, the method for preparing the intrinsic amorphous silicon layer on the back side is as follows: a mixed gas of silane and hydrogen is used, the flow ratio of silane to hydrogen is 1:60-1:100; the total gas flow rate is 300-500 sccm; the radio frequency power during deposition is 100-150W, the deposition pressure is 100-300Pa, and the deposition rate is 0.15-0.3nm / s; More preferably, the method for preparing the P-type microcrystalline silicon layer on the back side is as follows: using borane as a dopant source, employing a mixed gas of silane, hydrogen and borane, with a flow ratio of silane to hydrogen of 1:30-1:60; a flow ratio of borane to silane of 1:50-1:100; and a radio frequency power of 150-300W and a deposition pressure of 200-400Pa during deposition.

7. The preparation method according to claim 1, characterized in that, The transparent conductive oxide layer is an indium tin oxide layer; Preferably, the thickness of the front indium tin oxide layer is 80-120 nm; and / or, the thickness of the back indium tin oxide layer is 100-150 nm; and / or, the density of the indium tin oxide layer is greater than or equal to 7.0 g / cm³. 3 ; and / or, the sheet resistance of the indium tin oxide layer is less than or equal to 15 Ω / □; and / or, the transmittance of the indium tin oxide layer is greater than or equal to 85%; Preferably, the transparent conductive oxide layer is prepared by PVD, wherein the vacuum level of the vacuum chamber is evacuated to less than or equal to 1 × 10⁻⁶ before deposition. -4 Pa uses a target material containing In2O3 and SnO2, sputtering gases are argon and oxygen, with an argon to oxygen flow rate ratio of 10:1-20:1; total gas flow rate is 50-100 sccm; sputtering power is 100-300 W; and deposition rate is 0.5-1.5 nm / s.

8. The preparation method according to claim 1, characterized in that, The thickness of the copper seed layer is 80-120 nm; Preferably, PVD is used for preparation, and the vacuum level of the vacuum chamber is evacuated to 1×10⁻⁶ before deposition. -4 Pa-1×10 -3 Pa; copper target material is used, and argon is used as the sputtering gas; the sputtering pressure in the chamber is maintained at 0.3-1.5 Pa; the total gas flow rate is 10-50 sccm; the sputtering power is 100W-300W; and the deposition rate is 0.5-1.5 nm / s.

9. The preparation method according to claim 1, characterized in that, The mask layer and the copper seed layer are removed using a wet process; Preferably, the mask layer and copper seed layer are removed by treating with a 5%-10% NaOH aqueous solution at 40-60℃ for 10-15 minutes; then rinsed with deionized water and dried at 80-100℃ to prepare the copper grid heterojunction cell.

10. A copper grid heterojunction solar cell, characterized in that, The copper grid heterojunction solar cell was prepared using the preparation method described in any one of claims 1-9. Preferably, the width of the copper grid line is less than or equal to 15 μm; Preferably, the width of the copper grid line is greater than or equal to 10 μm and less than or equal to 15 μm.

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