Photovoltaic cell and method of manufacturing the same, photovoltaic module

Abstract

This disclosure relates to the photovoltaic field, providing a photovoltaic cell and its manufacturing method, and a photovoltaic module. The photovoltaic cell includes: a substrate having a front side and a back side opposite to each other along a first direction; a first intrinsic layer located on the front side, the material of the first intrinsic layer including oxygen and hydrogen-doped amorphous silicon; an intrinsic stack including at least two intrinsic amorphous silicon layers located on the side of the first intrinsic layer away from the front side; a first doped layer located on the side of the intrinsic stack away from the first intrinsic layer, the first doped layer and the substrate being doped with the same type of doping element; the first intrinsic layer and the intrinsic amorphous silicon layer include silicon-hydrogen bonds and silicon-dihydrogen bonds, the ratio of the number of silicon-dihydrogen bonds in a single film layer to the sum of the number of silicon-dihydrogen bonds and silicon-hydrogen bonds is a reference ratio; the reference ratio of the intrinsic amorphous silicon layer further away from the first intrinsic layer in the intrinsic stack is smaller, and the reference ratio of the first intrinsic layer is greater than the reference ratio of the intrinsic amorphous silicon layer, which is at least beneficial to improving the photoelectric conversion efficiency of the front side.

Description

Technical Field

[0001] This disclosure relates to the photovoltaic field, and in particular to a photovoltaic cell and its manufacturing method, and a photovoltaic module. Background Technology

[0002] With the rapid development of photovoltaic technology, photovoltaic power generation has been widely used as a sustainable and clean energy source. Among them, crystalline silicon (monocrystalline or polycrystalline) cells have a high market share.

[0003] There are many types of crystalline silicon solar cells. Compared to other types, heterojunction with intrinsic thin-film (HIT or HJT) cells exhibit higher photoelectric performance among crystalline silicon cells. They have attracted widespread attention due to their excellent photoelectric conversion efficiency, fewer fabrication steps, low temperature coefficient, and high bifaciality. The various film layers in a heterojunction cell interact with each other, thus affecting the cell's photoelectric conversion efficiency.

[0004] Therefore, in order to improve the photoelectric conversion efficiency of heterojunction solar cells, it is necessary to study the composition of each film layer structure. Summary of the Invention

[0005] This disclosure provides a photovoltaic cell and its manufacturing method, as well as a photovoltaic module, which at least helps to improve the photoelectric conversion efficiency of the front side of the photovoltaic cell.

[0006] This disclosure provides a photovoltaic cell, comprising: a substrate having a front side and a back side opposite each other along a first direction, the first direction being the thickness direction of the substrate; a first intrinsic layer located on the front side, the first intrinsic layer being made of oxygen- and hydrogen-doped amorphous silicon, the first intrinsic layer further comprising silicon-hydrogen bonds and silicon-dihydrogen bonds; an intrinsic stack comprising at least two intrinsic amorphous silicon layers located on the side of the first intrinsic layer away from the front side, the intrinsic amorphous silicon layers comprising silicon-hydrogen bonds and silicon-dihydrogen bonds; a first doped layer located on the side of the intrinsic stack away from the first intrinsic layer, the first doped layer and the substrate being doped with the same type of doping element; a reference ratio being the ratio of the number of silicon-dihydrogen bonds to the sum of the number of silicon-dihydrogen bonds and silicon-hydrogen bonds in a single film layer; and, along the direction from the substrate to the first intrinsic layer, the reference ratio of the intrinsic amorphous silicon layers in the intrinsic stack that are further away from the first intrinsic layer is smaller, and the reference ratio of the first intrinsic layer is greater than the reference ratio of the intrinsic amorphous silicon layers in the intrinsic stack that are in contact with the first intrinsic layer.

[0007] Optionally, the intrinsic stack includes: a second intrinsic layer located on the side of the first intrinsic layer away from the front side; a third intrinsic layer located on the side of the second intrinsic layer away from the first intrinsic layer; and a fourth intrinsic layer located on the side of the third intrinsic layer away from the second intrinsic layer; wherein the reference ratio of the first intrinsic layer, the second intrinsic layer, the third intrinsic layer, and the fourth intrinsic layer decreases layer by layer.

[0008] Optionally, the reference ratio of the first intrinsic layer is 0.6% to 0.8%; the reference ratio of the second intrinsic layer is 0.3% to 0.5%; the reference ratio of the third intrinsic layer is 0.2% to 0.3%; and the reference ratio of the fourth intrinsic layer is 0.07% to 0.2%.

[0009] Optionally, along the first direction, the thickness of the second intrinsic layer and the thickness of the third intrinsic layer are greater than the thickness of the fourth intrinsic layer; and / or, along the first direction, the thickness of the second intrinsic layer and the thickness of the third intrinsic layer are greater than the thickness of the first intrinsic layer.

[0010] Optionally, along the first direction, the thickness of the first intrinsic layer is 0.5nm~1.5nm, the thickness of the second intrinsic layer is 2nm~3nm, the thickness of the third intrinsic layer is 2nm~3nm, and the thickness of the fourth intrinsic layer is 0.5nm~1.5nm.

[0011] Optionally, the hydrogen content of the first intrinsic layer is 32%~33%, the hydrogen content of the second intrinsic layer is 28%~29%, the hydrogen content of the third intrinsic layer is 31%~32%, and the hydrogen content of the fourth intrinsic layer is 7%~9%.

[0012] Optionally, the photovoltaic cell further includes: a fifth intrinsic layer located on the back side; a second doped layer located on the side of the fifth intrinsic layer away from the back side, wherein the second doped layer and the substrate are doped with different types of doping elements; a first transparent conductive layer located on the side of the first doped layer away from the intrinsic stack; a first electrode located on the side of the first transparent conductive layer away from the first doped layer; a second transparent conductive layer located on the side of the second doped layer away from the fifth intrinsic layer; and a second electrode located on the side of the second transparent conductive layer away from the second doped layer.

[0013] This disclosure also provides a method for manufacturing a photovoltaic cell, comprising: providing a substrate having a front side and a back side opposite to each other along a first direction, the first direction being the thickness direction of the substrate; providing silane and an oxygen-containing gas to form a first intrinsic layer on the front side; providing silane and hydrogen gas to form an intrinsic stack on a side of the first intrinsic layer away from the front side, the intrinsic stack comprising at least two intrinsic amorphous silicon layers, the intrinsic amorphous silicon layers comprising silicon-hydrogen bonds and silicon-dihydrogen bonds; wherein the ratio of the number of silicon-dihydrogen bonds in a single film layer to the sum of the number of silicon-dihydrogen bonds and silicon-hydrogen bonds is a reference ratio; along the direction from the substrate to the first intrinsic layer, the reference ratio of the intrinsic amorphous silicon layers in the intrinsic stack that are further away from the first intrinsic layer is smaller, and the reference ratio of the first intrinsic layer is greater than the reference ratio of the intrinsic amorphous silicon layers in the intrinsic stack that are in contact with the first intrinsic layer; and forming a first doped layer on the side of the intrinsic stack away from the first intrinsic layer, the first doped layer and the substrate being doped with the same type of doping element.

[0014] Optionally, the step of providing silane and hydrogen includes at least two sequential stages, wherein the flow rate ratio of silane and hydrogen provided in the preceding stage is lower than that in the subsequent stage.

[0015] Optionally, the steps of providing silane and hydrogen include at least a first stage, a second stage, and a third stage performed sequentially, wherein a second intrinsic layer is formed in the first stage, a third intrinsic layer is formed in the second stage, and a fourth intrinsic layer is formed in the third stage; the flow rate ratio of silane and hydrogen provided in the first stage, the second stage, and the third stage increases sequentially.

[0016] Optionally, the flow rate ratio of silane to hydrogen provided in the first stage is 2 to 3, the flow rate ratio of silane to hydrogen provided in the second stage is 3 to 4, and the flow rate ratio of silane to hydrogen provided in the third stage is 4 to 10.

[0017] Optionally, the oxygen-containing gas is carbon dioxide, and in the step of forming the first intrinsic layer, the flow ratio of silane to carbon dioxide is 5 to 30; or, the oxygen-containing gas is nitrous oxide, and in the step of forming the first intrinsic layer, the flow ratio of silane to nitrous oxide is 100 to 200; and / or, a deposition process is used to form the first intrinsic layer and the intrinsic stack, wherein the deposition power used to form the first intrinsic layer is greater than the deposition power used to form the intrinsic stack.

[0018] Optionally, the deposition power used to form the first intrinsic layer is 300 W / m. 2 ~350W / m 2The steps of providing silane and hydrogen include at least a first stage, a second stage, and a third stage performed sequentially, wherein a second intrinsic layer is formed in the first stage, a third intrinsic layer is formed in the second stage, and a fourth intrinsic layer is formed in the third stage, and the deposition power used in the first and second stages is 150 W / m. 2 ~200W / m 2 The deposition power used in the third stage is 150 W / m. 2 ~300W / m 2 .

[0019] Optionally, the intrinsic stack is formed using a deposition process; the step of providing silane and hydrogen includes at least a first stage, a second stage, and a third stage performed sequentially, wherein a second intrinsic layer is formed in the first stage, a third intrinsic layer is formed in the second stage, and a fourth intrinsic layer is formed in the third stage; wherein the deposition pressure used in the third stage is greater than the deposition pressure used in the first stage and the second stage.

[0020] Optionally, the first intrinsic layer is formed using a deposition process; the deposition pressure used to form the first intrinsic layer is 0.5 Torr to 0.6 Torr, the deposition pressure used in the first stage and the second stage is 0.5 Torr to 0.6 Torr, and the deposition pressure used in the third stage is 0.8 Torr to 1.2 Torr.

[0021] This disclosure also provides a photovoltaic module, comprising: a battery string, formed by connecting a plurality of photovoltaic cells as described in any one of the preceding claims, or formed by connecting a plurality of photovoltaic cells formed by a manufacturing method of any one of the preceding claims; an encapsulating film for covering the surface of the battery string; and a cover plate for covering the surface of the encapsulating film opposite to the battery string.

[0022] The technical solution provided in this disclosure has at least the following advantages: The design of the front side of the substrate includes an oxygen- and hydrogen-doped amorphous silicon first intrinsic layer. On one hand, the oxygen in the first intrinsic layer promotes the formation of more silicon-hydrogen bonds (SHL bonds) or silicon-oxygen bonds within the first intrinsic layer and on the front side of the substrate. Compared to silicon-hydrogen bonds, SHL bonds or silicon-oxygen bonds have higher bond energies, making them less prone to breakage under UV light and thus more stable. This prevents hydrogen ion ionization and the formation of silicon dangling bonds, thereby enhancing the passivation capability of the first intrinsic layer itself and its passivation effect on the substrate, effectively preventing UV degradation of the photovoltaic cell. On the other hand, the oxygen- and hydrogen-doped amorphous state in the first intrinsic layer helps prevent the crystallization of the subsequently formed intrinsic stack, i.e., preventing silicon crystallization during the formation of the intrinsic stack. This reduces the defect concentration of the intrinsic stack, ensuring that the intrinsic stack is also predominantly amorphous, thus enhancing the passivation effect of the intrinsic stack on the substrate and improving the longitudinal transport efficiency of charge carriers. Thus, the combination of the first intrinsic layer and the intrinsic stack helps to improve the photoelectric conversion efficiency of the photovoltaic cell. Attached Figure Description

[0023] One or more embodiments are illustrated by way of example with corresponding pictures in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Unless otherwise stated, the pictures in the accompanying drawings do not constitute a limitation on scale. In order to more clearly illustrate the technical solutions in the embodiments of this disclosure or the conventional technology, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a first partial cross-sectional schematic diagram of a photovoltaic cell provided in an embodiment of the present disclosure; Figure 2 This is a second partial cross-sectional schematic diagram of a photovoltaic cell provided in an embodiment of the present disclosure; Figure 3 This is a third partial cross-sectional schematic diagram of a photovoltaic cell provided in an embodiment of the present disclosure; Figure 4 This is a fourth partial cross-sectional schematic diagram of a photovoltaic cell provided in an embodiment of the present disclosure; Figure 5 This is a fifth partial cross-sectional schematic diagram of a photovoltaic cell provided in an embodiment of the present disclosure; Figure 6 A process flow diagram of a method for manufacturing a photovoltaic cell according to another embodiment of this disclosure; Figure 7 A partial cross-sectional schematic diagram of a photovoltaic cell manufacturing method provided in another embodiment of this disclosure after the formation of the first intrinsic layer; Figure 8 A partial cross-sectional schematic diagram of a photovoltaic cell manufacturing method provided in another embodiment of this disclosure after the formation of the fifth intrinsic layer; Figure 9 A partial three-dimensional schematic diagram of a cell string in a photovoltaic module provided in yet another embodiment of this disclosure; Figure 10 This is a partial cross-sectional schematic diagram of a photovoltaic module provided in yet another embodiment of the present disclosure.

[0025] Explanation of reference numerals in the attached figures: 100. Substrate; 110. Front side; 120. Back side; 130. Side side; 101. First intrinsic layer; 102. Intrinsic stack; 112. Intrinsic amorphous silicon layer; 122. Second intrinsic layer; 132. Third intrinsic layer; 142. Fourth intrinsic layer; 103. First doped layer; 104. Fifth intrinsic layer; 114. First layer; 124. Second layer; 105. Second doped layer; 106. First transparent conductive layer; 107. First electrode; 108. Second transparent conductive layer; 109. Second electrode; 40. Photovoltaic cell; 41. Encapsulating film; 42. Cover plate; 43. Solder ribbon. Detailed Implementation

[0026] As can be seen from the background technology, the photoelectric conversion efficiency of photovoltaic cells needs to be improved.

[0027] This disclosure provides a photovoltaic cell and its manufacturing method, as well as a photovoltaic module. In the photovoltaic cell, a first intrinsic layer of oxygen- and hydrogen-doped amorphous silicon is designed on the front side of the substrate. On one hand, the oxygen element in the first intrinsic layer helps to promote the formation of more silicon-hydrogen-oxygen bonds or silicon-oxygen bonds within the first intrinsic layer and on the front side of the substrate. Compared to silicon-hydrogen bonds, silicon-hydrogen-oxygen bonds or silicon-oxygen bonds have higher bond energies, making them less prone to breakage under UV light irradiation and thus more stable. This avoids the ionization of hydrogen ions and the formation of silicon dangling bonds, thereby improving the passivation capability of the first intrinsic layer itself and its passivation effect on the substrate, effectively preventing UV degradation of the photovoltaic cell. On the other hand, the oxygen- and hydrogen-doped amorphous state in the first intrinsic layer helps to prevent the crystallization of the subsequently formed intrinsic stack, i.e., preventing silicon crystallization during the formation of the intrinsic stack, thereby reducing the defect concentration of the intrinsic stack. This ensures that the intrinsic stack is also mainly amorphous, thereby improving the passivation effect of the intrinsic stack on the substrate and enhancing the longitudinal transport efficiency of charge carriers. Thus, the combination of the first intrinsic layer and the intrinsic stack helps to improve the photoelectric conversion efficiency of the photovoltaic cell.

[0028] In the description of the embodiments of this disclosure, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary or secondary relationship of the indicated technical features. In the description of the embodiments of this disclosure, "a plurality of" means two or more, unless otherwise explicitly defined.

[0029] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this disclosure. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0030] In the description of the embodiments of this disclosure, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A exists, A and B exist simultaneously, and B exists. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0031] In the description of embodiments of this disclosure, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0032] In the description of the embodiments of this disclosure, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this disclosure and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this disclosure.

[0033] In the description of the embodiments of this disclosure, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in the embodiments of this disclosure according to the specific circumstances.

[0034] In the accompanying drawings corresponding to the embodiments of this disclosure, the thickness and area of ​​the layers are enlarged for better understanding and ease of description. When describing a component (such as a layer, film, region, or substrate) on or on the surface of another component, the component may be "directly" located on the surface of the other component, or there may be a third component between the two components. Conversely, when describing a component on the surface of another component, or when another component is formed or disposed on the surface of a component, it indicates that there is no third component between the two components. Furthermore, when describing a component as being "generally" formed on another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a portion of the edge of the entire surface.

[0035] In the description of embodiments of this disclosure, when a component "includes" another component, other components are not excluded unless otherwise stated, and may be further included. Furthermore, when a component such as a layer, film, region, or plate is referred to as being "on / located" on another component, it can be "directly on" the other component (i.e., located on the surface of the other component with no other components between them), or another component may be present therein. Additionally, when a component such as a layer, film, region, or plate is "directly located" on another component, or when a component such as a layer, film, region, or plate is located on the surface of another component, it indicates that no other components are located therein.

[0036] The terminology used in the description of the various embodiments herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used in the description of the various embodiments and the appended claims, the term "component" is also intended to include the plural form unless the context clearly indicates otherwise. Components include layers, films, regions, or plates, etc.

[0037] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this disclosure to facilitate a better understanding of the embodiments. However, the technical solutions claimed in the embodiments of this disclosure can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0038] This disclosure provides a photovoltaic cell according to one embodiment. The photovoltaic cell provided by this disclosure will be described in detail below with reference to the accompanying drawings.

[0039] refer to Figure 1 , Figure 1This is a partial cross-sectional schematic diagram of a photovoltaic cell provided in an embodiment of the present disclosure. The photovoltaic cell includes: a substrate 100 having a front side 110 and a back side 120 opposite to each other along a first direction X, where the first direction X is the thickness direction of the substrate 100; a first intrinsic layer 101 located on the front side 110, the material of the first intrinsic layer 101 including oxygen and hydrogen-doped amorphous silicon; an intrinsic stack 102 including at least two intrinsic amorphous silicon layers 112 located on the side of the first intrinsic layer 101 away from the front side 110; and a first doped layer 103 located on the side of the intrinsic stack 102 away from the first intrinsic layer 101, wherein the first doped layer 103 and the substrate 100 are doped with the same type of doping element.

[0040] It is worth noting that the mechanism of UV-induced degradation (UVID) in photovoltaic cells is mainly due to the breakage of silicon-hydrogen bonds (Si-H) in the intrinsic amorphous silicon layer on the front side and Si-H on the substrate surface caused by UV light, which in turn generates dangling bonds of Si, resulting in a decrease in passivation and a decrease in cell performance. Based on this, in a photovoltaic cell provided by an embodiment of this disclosure, a first intrinsic layer 101 of amorphous silicon doped with oxygen and hydrogen is designed. On the one hand, the oxygen element in the first intrinsic layer 101 helps to promote the formation of more silicon-hydrogen bonds or silicon-oxygen bonds within the first intrinsic layer 101 and on the front side 110 of the substrate 100. Compared with silicon-hydrogen bonds, silicon-hydrogen bonds or silicon-oxygen bonds have higher bond energies, making them less prone to breakage and more stable under UV light irradiation. This can prevent the ionization of hydrogen ions and the formation of silicon dangling bonds, thereby improving the passivation capability of the first intrinsic layer 101 itself and the passivation effect of the first intrinsic layer 101 on the substrate 100, thus effectively preventing UV degradation of the photovoltaic cell.

[0041] On the other hand, the oxygen- and hydrogen-doped amorphous state in the first intrinsic layer 101 helps prevent the crystallization of the subsequently formed intrinsic stack 102, making the intrinsic stack 102 primarily amorphous as well. This enhances the passivation effect of the intrinsic stack 102 on the substrate 100 and improves the longitudinal transport efficiency of charge carriers. In other words, by setting the intrinsic stack 102 on the first intrinsic layer 101, it is beneficial to prevent the formation of silicon crystals during the formation of the intrinsic stack 102, thereby reducing the defect concentration of the intrinsic stack 102. It should be noted that for the intrinsic stack 102 with at least two intrinsic amorphous silicon layers 112, the intrinsic amorphous silicon layers 112 are more inclined to be amorphous, and crystals in the intrinsic amorphous silicon layers 112 can be regarded as defects.

[0042] Thus, the combination of the first intrinsic layer 101 and the intrinsic stack 102 is beneficial to improving the photoelectric conversion efficiency of the front side 110 of the photovoltaic cell.

[0043] In addition, the oxygen-doped first intrinsic layer 101 carries a certain fixed negative charge, which can passivate the substrate 100 to a certain extent, thereby promoting the longitudinal transport of charge carriers. Furthermore, the oxygen-doped first intrinsic layer 101 can improve the light transmittance of the first intrinsic layer 101, so that more light can pass through the first intrinsic layer 101 and be absorbed and utilized by the front side 110 of the substrate 100.

[0044] It should be noted that, Figure 1 The example shown is that the intrinsic stack 102 includes two intrinsic amorphous silicon layers 112. In actual applications, there is no limit to the number of intrinsic amorphous silicon layers included in the intrinsic stack. For example, it can be 3, 4 or 5.

[0045] The photovoltaic cell provided in one embodiment of this disclosure will be described in more detail below with reference to the accompanying drawings.

[0046] In some embodiments, reference Figure 1 In the intrinsic stack 102, the intrinsic amorphous silicon layers 112 are all doped with hydrogen. Both the first intrinsic layer 101 and the intrinsic amorphous silicon layer 112 include silicon-hydrogen bonds (Si-H) and silicon dihydrogen bonds (Si-H2). The ratio of the number of silicon dihydrogen bonds in a single film layer to the sum of the number of silicon dihydrogen bonds and silicon-hydrogen bonds, i.e., Si-H2 / (Si-H+Si-H2), is a reference ratio. In the direction from the substrate 100 to the first intrinsic layer 101, the reference ratio of the intrinsic amorphous silicon layer 112 in the intrinsic stack 102 that is further away from the first intrinsic layer 101 can be smaller, and the reference ratio of the first intrinsic layer 101 can be greater than the reference ratio of the intrinsic amorphous silicon layer 112 in the intrinsic stack 102 that is in contact with the first intrinsic layer 101.

[0047] It is worth noting that the intrinsic amorphous silicon layer 112 in the intrinsic stack 102 is not oxygen-doped, so the measured silicon-hydrogen bonds do not include the case of silicon-hydrogen-oxygen bonds. However, hydrogen elements in the first intrinsic layer 101 can be bound by oxygen elements. Therefore, for the oxygen-free intrinsic stack 102, the Si-H2 / (Si-H+Si-H2) ratio in a single film layer can characterize the proportion of silicon dihydrogen bonds in the intrinsic amorphous silicon layer 112. The higher the proportion of silicon dihydrogen bonds, the greater the possibility of hydrogen ion ionization under UV light irradiation. The increase in Si-H2 / (Si-H+Si-H2) caused by the increase in hydrogen content in the first intrinsic layer 101 can effectively prevent UV light caused by UV light since hydrogen elements can be bound by oxygen elements, and the passivation effect on the substrate 100 can be improved by increasing the hydrogen content.

[0048] Based on this, along the direction from the substrate 100 to the first intrinsic layer 101, the reference ratio of the intrinsic amorphous silicon layer 112 in the intrinsic stack 102 that is further away from the first intrinsic layer 101 can be smaller. That is, the reference ratio of the intrinsic amorphous silicon layer 112 in the intrinsic stack 102 decreases layer by layer, thereby effectively blocking the migration of free hydrogen generated in the intrinsic stack 102 due to ultraviolet light (UV light) to the first doped layer 103, thereby improving the UV degradation of the photovoltaic cell. Furthermore, the intrinsic stack 102 is furthest from the substrate 100, meaning that the reference ratio of the outermost intrinsic amorphous silicon layer 112 in the intrinsic stack 102 is the smallest. When the first doped layer 103 is subsequently formed on the outermost intrinsic amorphous silicon layer 112, it is beneficial to promote the crystallization of the first doped layer 103, that is, to promote the formation of microcrystals in the first doped layer 103, thereby improving the conductivity of the first doped layer 103 and thus improving the carrier collection efficiency of the photovoltaic cell.

[0049] It is worth noting that the lower the reference ratio of the intrinsic amorphous silicon layer 112 in the intrinsic stack 102, the higher the density of the intrinsic amorphous silicon layer 112. In other words, the density of the intrinsic amorphous silicon layer 112 in the intrinsic stack 102 increases layer by layer along the direction from the substrate 100 to the first intrinsic layer 101. Thus, the density of the intrinsic stack 102 changes from loose to dense, which can not only effectively prevent free hydrogen from migrating to the first doped layer 103, but also enhance the protection effect on the intrinsic stack 102 and the first intrinsic layer 101 with the help of the outermost intrinsic amorphous silicon layer 112.

[0050] In some cases, refer to Figure 2 , Figure 2 This is a second partial cross-sectional view of a photovoltaic cell provided in an embodiment of the present disclosure. The intrinsic stack 102 may include: a second intrinsic layer 122 located on the side of the first intrinsic layer 101 away from the front surface 110; a third intrinsic layer 132 located on the side of the second intrinsic layer 122 away from the first intrinsic layer 101; and a fourth intrinsic layer 142 located on the side of the third intrinsic layer 132 away from the second intrinsic layer 122. The reference ratio of the first intrinsic layer 101, the second intrinsic layer 122, the third intrinsic layer 132, and the fourth intrinsic layer 142 can decrease layer by layer. Thus, the density of the first intrinsic layer 101, the second intrinsic layer 122, the third intrinsic layer 132, and the fourth intrinsic layer 142 increases layer by layer.

[0051] The first intrinsic layer 101 not only has a high hydrogen content to enhance the passivation effect on the substrate 100, but also locks in hydrogen, thus preventing hydrogen ionization and crystallization of the subsequently formed intrinsic stack 102. The reference ratio of the second intrinsic layer 122 and the third intrinsic layer 132 decreases layer by layer, which helps to reduce the optical absorption of the second intrinsic layer 122 and the third intrinsic layer 132 while reducing the resistance to longitudinal carrier transport. The high density and low defect characteristics of the fourth intrinsic layer 142 help to improve the crystallinity of the first doped layer 103 formed on the fourth intrinsic layer 142, thereby further reducing the carrier transport resistance. Thus, the combination of the first intrinsic layer 101, the second intrinsic layer 122, the third intrinsic layer 132 and the fourth intrinsic layer 142 helps to comprehensively improve the photoelectric conversion efficiency of the front side 110 of the photovoltaic cell from both optical and electrical perspectives.

[0052] In some examples, the reference ratio of the first intrinsic layer 101 can be 0.6% to 0.8%, for example, it can be 0.6%, 0.61%, 0.62%, 0.63%, 0.64%, 0.65%, 0.66%, 0.67%, 0.68%, 0.69%, 0.7%, 0.71%, 0.72%, 0.73%, 0.74%, 0.75%, 0.76%, 0.77%, 0.78%, 0.79%, or 0.8%, etc.

[0053] In some examples, the reference ratio of the second intrinsic layer 122 can be 0.3% to 0.5%, for example, it can be 0.3%, 0.31%, 0.32%, 0.33%, 0.34%, 0.35%, 0.36%, 0.37%, 0.38%, 0.39%, 0.4%, 0.41%, 0.42%, 0.43%, 0.44%, 0.45%, 0.46%, 0.47%, 0.48%, 0.49%, or 0.5%, etc.

[0054] In some examples, the reference ratio of the third intrinsic layer 132 can be 0.2% to 0.3%, for example, it can be 0.2%, 0.21%, 0.22%, 0.23%, 0.24%, 0.25%, 0.26%, 0.27%, 0.28%, 0.29% or 0.3%, etc.

[0055] In some examples, the reference ratio of the fourth intrinsic layer 142 can be 0.07% to 0.2%, for example, it can be 0.07%, 0.08%, 0.09%, 0.1%, 0.11%, 0.12%, 0.13%, 0.14%, 0.15%, 0.16%, 0.17%, 0.18%, 0.19%, or 0.2%, etc.

[0056] In some examples, along the first direction X, the thickness of the second intrinsic layer 122 and the thickness of the third intrinsic layer 132 can be greater than the thickness of the fourth intrinsic layer 142. Thus, the fourth intrinsic layer 142, which is located on the outermost side of the intrinsic stack 102 relative to the substrate 100, is the thinnest, and the thicknesses of the second intrinsic layer 122 and the third intrinsic layer 132 can be equal or unequal.

[0057] It is worth noting that in the intrinsic stack 102, the second intrinsic layer 122 and the third intrinsic layer 132 are mainly used to reduce the transport resistance of charge carriers, while the fourth intrinsic layer 142 is closest to the first doped layer 103 and mainly serves as the outermost hydrogen barrier. Based on this, the thicknesses of the second intrinsic layer 122 and the third intrinsic layer 132 can be designed to be greater than the thickness of the fourth intrinsic layer 142. This helps to improve the conductivity of the second intrinsic layer 122 and the third intrinsic layer 132 by increasing their thickness, and also helps to reduce the overall thickness of the intrinsic stack 102 by using the thinner fourth intrinsic layer 142.

[0058] In some examples, along the first direction X, the thickness of the second intrinsic layer 122 and the thickness of the third intrinsic layer 132 may be greater than the thickness of the first intrinsic layer 101.

[0059] It is worth noting that the first intrinsic layer 101 is closest to the substrate 100, providing direct passivation to the substrate 100 and also serving as an inner hydrogen barrier. Furthermore, considering the intrinsic stack 102 designed between the first intrinsic layer 101 and the first doped layer 103, the thicknesses of the second intrinsic layer 122 and the third intrinsic layer 132 can be greater than the thickness of the first intrinsic layer 101. This helps to improve the conductivity of the second intrinsic layer 122 and the third intrinsic layer 132 by increasing their thickness, and by using the thinner first intrinsic layer 101 to ensure hydrogen confinement while reducing the transport resistance encountered by photogenerated carriers in the substrate 100 in the path to the first doped layer 103.

[0060] In some examples, along the first direction X, the thickness of the second intrinsic layer 122 and the thickness of the third intrinsic layer 132 can be greater than the thickness of the fourth intrinsic layer 142, and the thickness of the second intrinsic layer 122 and the thickness of the third intrinsic layer 132 can be greater than the thickness of the first intrinsic layer 101. Thus, the first intrinsic layer 101 is also thinner than the second intrinsic layer 122 and the third intrinsic layer 132 in the intrinsic stack 102. Furthermore, the thickness of the first intrinsic layer 101 and the thickness of the fourth intrinsic layer 142 can be equal or unequal.

[0061] In some examples, along the first direction X, the thickness of the first intrinsic layer 101 can be 0.5 nm to 1.5 nm, and the thickness of the fourth intrinsic layer 142 can be 0.5 nm to 1.5 nm. Optionally, the thickness of both the first intrinsic layer 101 and the fourth intrinsic layer 142 can be 0.5 nm, 0.6 nm, 0.7 nm, 0.8 nm, 0.9 nm, 1 nm, 1.1 nm, 1.2 nm, 1.3 nm, 1.4 nm, or 1.5 nm, etc.

[0062] In some examples, the thickness of the second intrinsic layer 122 can be 2nm to 3nm, and the thickness of the third intrinsic layer 132 can be 2nm to 3nm. Optionally, the thickness of both the second intrinsic layer 122 and the third intrinsic layer 132 can be 2nm, 2.1nm, 2.2nm, 2.3nm, 2.4nm, 2.5nm, 2.6nm, 2.7nm, 2.8nm, 2.9nm, or 3nm, etc.

[0063] In some examples, the hydrogen content of the first intrinsic layer 101 can be 32% to 33%, for example, it can be 32%, 32.02%, 32.05%, 32.07%, 32.1%, 32.12%, 32.15%, 32.17%, 32.2%, 32.22%, 32.25%, 32.27%, 32.3%, 32.32%, 32.35%, 32.37%, 32.4%, or 32.42%. 32.45%, 32.47%, 32.5%, 32.52%, 32.55%, 32.57%, 32.6%, 32.62%, 32.65%, 32.67%, 32.7%, 32.72%, 32.75%, 32.77%, 32.8%, 32.82%, 32.85%, 32.87%, 32.9%, 32.92%, 32.95%, 32.97%, or 33%, etc.

[0064] In some examples, the hydrogen content of the second intrinsic layer 122 can be 28% to 29%, for example, it can be 28%, 28.02%, 28.05%, 28.07%, 28.1%, 28.12%, 28.15%, 28.17%, 28.2%, 28.22%, 28.25%, 28.27%, 28.3%, 28.32%, 28.35%, 28.37%, 28.4%, or 28.42%. 28.45%, 28.47%, 28.5%, 28.52%, 28.55%, 28.57%, 28.6%, 28.62%, 28.65%, 28.67%, 28.7%, 28.72%, 28.75%, 28.77%, 28.8%, 28.82%, 28.85%, 28.87%, 28.9%, 28.92%, 28.95%, 28.97%, or 29%, etc.

[0065] In some examples, the hydrogen content of the third intrinsic layer 132 can be 31% to 32%, for example, it can be 31%, 31.02%, 31.05%, 31.07%, 31.1%, 31.12%, 31.15%, 31.17%, 31.2%, 31.22%, 31.25%, 31.27%, 31.3%, 31.32%, 31.35%, 31.37%, 31.4%, or 31.42%. 31.45%, 31.47%, 31.5%, 31.52%, 31.55%, 31.57%, 31.6%, 31.62%, 31.65%, 31.67%, 31.7%, 31.72%, 31.75%, 31.77%, 31.8%, 31.82%, 31.85%, 31.87%, 31.9%, 31.92%, 31.95%, 31.97%, or 32%, etc.

[0066] In some examples, the hydrogen content of the fourth intrinsic layer 142 can be 7% to 9%. For example, it can be 7%, 7.1%, 7.2%, 7.3%, 7.4%, 7.5%, 7.6%, 7.7%, 7.8%, 7.9%, 8%, 8.1%, 8.2%, 8.3%, 8.4%, 8.5%, 8.6%, 8.7%, 8.8%, 8.9%, or 9%, etc.

[0067] It is worth noting that, unlike the reference ratios in the second intrinsic layer 122, the third intrinsic layer 132, and the fourth intrinsic layer 142 which decrease layer by layer, the third intrinsic layer 132 has the highest hydrogen content, which helps to improve the light transmittance of the third intrinsic layer 132, allowing more long-wavelength light to pass through the third intrinsic layer 132 and be absorbed by the substrate 100. Furthermore, the fourth intrinsic layer 142, as the outermost hydrogen-locking barrier, can effectively prevent hydrogen in the third intrinsic layer 132 from being released into the first doped layer 103.

[0068] In addition, the hydrogen content of the first intrinsic layer 101 can be slightly higher than that of the third intrinsic layer 132, so as to prevent crystallization of the film layer when depositing the intrinsic stack 102 by means of the first intrinsic layer 101 with high hydrogen content.

[0069] In some embodiments, reference Figure 3 , Figure 3 This is a third partial cross-sectional view of a photovoltaic cell provided in an embodiment of the present disclosure. The photovoltaic cell may further include: a fifth intrinsic layer 104 located on the back surface 120; a second doped layer 105 located on the side of the fifth intrinsic layer 104 away from the back surface 120, wherein the second doped layer 105 and the substrate 100 are doped with different types of doping elements; a first transparent conductive layer 106 located on the side of the first doped layer 103 away from the intrinsic stack 102; a first electrode 107 located on the side of the first transparent conductive layer 106 away from the first doped layer 103; a second transparent conductive layer 108 located on the side of the second doped layer 105 away from the fifth intrinsic layer 104; and a second electrode 109 located on the side of the second transparent conductive layer 108 away from the second doped layer 105.

[0070] Thus, the first doped layer 103, which is doped with the same type of doping element as the substrate 100, is located on the front side 110, serving as the front junction of the heterojunction cell; the second doped layer 105, which is doped with a different type of doping element than the substrate 100, is located on the back side 120, serving as the back junction of the heterojunction cell. Therefore, the PN junction is located on the back side 120, and the photovoltaic cell is a back junction heterojunction cell.

[0071] In some cases, the material of substrate 100 can be an elemental semiconductor material. Specifically, the elemental semiconductor material is composed of a single element, such as silicon or germanium; hereinafter, substrate 100 will be used as an example of a silicon substrate. The elemental semiconductor material can be monocrystalline, polycrystalline, amorphous, or microcrystalline (a state simultaneously possessing both monocrystalline and amorphous states is called microcrystalline). For example, silicon can be at least one of monocrystalline silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon. In other embodiments, the substrate material can also be a compound semiconductor material. Common compound semiconductor materials include, but are not limited to, silicon germanide, silicon carbide, gallium arsenide, indium gallium dihydrogen phosphate, perovskite, cadmium telluride, and copper indium selenide.

[0072] The first doped layer 103 and the substrate 100 are doped with the same type of doping element, including at least the following two cases: In some examples, both the first doped layer 103 and the substrate 100 are doped with N-type dopants. In some examples, the substrate 100 can be an N-type silicon substrate. N-type silicon substrates have high quality and high minority carrier lifetime, and back-junction heterojunction photovoltaic cells designed based on this have higher photoelectric conversion efficiency.

[0073] Furthermore, the first doped layer 103 can be at least one of an N-type doped microcrystalline silicon film, an N-type doped amorphous silicon film, or an N-type microcrystalline-amorphous mixed doped film; the second doped layer 105 can be at least one of a P-type doped microcrystalline silicon film, a P-type doped amorphous silicon film, or a P-type microcrystalline-amorphous mixed doped film.

[0074] In other examples, both the first doped layer 103 and the substrate 100 are doped with P-type dopants.

[0075] In some examples, substrate 100 can be a P-type silicon substrate.

[0076] Furthermore, the first doped layer 103 can be at least one of a P-type doped microcrystalline silicon film, a P-type doped amorphous silicon film, or a P-type microcrystalline-amorphous mixed doped film; the second doped layer 105 can be at least one of an N-type doped microcrystalline silicon film, an N-type doped amorphous silicon film, or an N-type microcrystalline-amorphous mixed doped film.

[0077] Among them, the P-type dopant element can be at least one of the group III elements such as boron (B), aluminum (Al), gallium (Ga) or indium (In); the N-type dopant element can be at least one of the group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb) or arsenic (As).

[0078] In some cases, refer to Figure 4 , Figure 4 This is a fourth partial cross-sectional view of a photovoltaic cell provided in an embodiment of the present disclosure. The fifth intrinsic layer 104 may include a first layer 114 and a second layer 124 stacked along a first direction X. The density of the second layer 124 may be higher than that of the first layer 114. This is beneficial for improving the damage resistance of the second layer 124, thereby ensuring that the outermost part of the fifth intrinsic layer 104 in contact with the second doped layer 105, i.e., the surface of the second layer 124, is undamaged, thus reducing the contact resistance between the fifth intrinsic layer 104 and the second doped layer 105. In addition, the higher density of the second layer 124 also facilitates the subsequent formation of a second doped layer 105 with a higher degree of crystallinity.

[0079] In some embodiments, reference Figure 5 , Figure 5 This is a fifth partial cross-sectional view of a photovoltaic cell provided in an embodiment of the present disclosure. The substrate 100 also has a side 130 connecting the front side 110 and the back side 120; at least one of the first intrinsic layer 101, the intrinsic stack 102 and the first doped layer 103 is also located on the side 130.

[0080] It is worth noting that compared to the UV attenuation on the front side 110 and the back side 120, the UV attenuation at the edges of the photovoltaic cell is more severe because there are areas around the edges that are not shielded by the film layer. Therefore, at least one of the first intrinsic layer 101, the intrinsic stack 102, and the first doped layer 103 is designed to be located on the side side 130. This allows the first intrinsic layer 101, the intrinsic stack 102, and / or the first doped layer 103 to absorb UV light, effectively improving the attenuation of UV irradiation on the side side 130, thereby significantly reducing the overall UV attenuation of the photovoltaic cell. Furthermore, the oxygen element in the first intrinsic layer 101 can bind hydrogen, effectively preventing the ionization of hydrogen ions.

[0081] In addition, the thickness of the first intrinsic layer 101 located on the side 130 can be designed to be smaller than the thickness of the first intrinsic layer 101 located on the front 110; and / or, the thickness of the intrinsic stack 102 located on the side 130 can be designed to be smaller than the thickness of the intrinsic stack 102 located on the front 110; and / or, the thickness of the first doped layer 103 located on the side 130 can be designed to be smaller than the thickness of the first doped layer 103 located on the front 110.

[0082] In some cases, continue to refer to Figure 5 A fifth intrinsic layer 104 and a second doped layer 105 are further disposed on the back surface 120 of the substrate 100. The fifth intrinsic layer 104 is located on the side surface 130; the first intrinsic layer 101 is located on the side of the fifth intrinsic layer 104 away from the side surface 130; the intrinsic stack 102 is located on the side of the first intrinsic layer 101 away from the fifth intrinsic layer 104; the first doped layer 103 is located on the side of the intrinsic stack 102 away from the first intrinsic layer 101; and the second doped layer 105 is also located on the side of the first doped layer 103 away from the intrinsic stack 102. In other words, along a direction perpendicular to the side surface 130, the fifth intrinsic layer 104, the first intrinsic layer 101, the intrinsic stack 102, the first doped layer 103, and the second doped layer 105 are stacked on the side surface 130.

[0083] In addition, the thickness of the fifth intrinsic layer 104 located on the side 130 can be designed to be smaller than the thickness of the fifth intrinsic layer 104 located on the back 120; and / or, the thickness of the second doped layer 105 located on the side 130 can be designed to be smaller than the thickness of the second doped layer 105 located on the back 120.

[0084] The following provides a detailed explanation of the thickness of some film layers in photovoltaic cells.

[0085] In some embodiments, reference Figure 1Along the first direction X, the thickness of the first doped layer 103 can be 25nm~30nm, for example, it can be 25nm, 25.5nm, 26nm, 26.5nm, 27nm, 27.5nm, 28nm, 28.5nm, 29nm, 29.5nm or 30nm, etc.

[0086] In some embodiments, reference Figure 4 The fifth intrinsic layer 104 includes a first layer 114 and a second layer 124 stacked along the first direction X.

[0087] In some cases, the thickness of the first layer 114 along the first direction X can be 0.5nm to 3nm, for example, it can be 0.5nm, 0.6nm, 0.7nm, 0.8nm, 0.9nm, 1nm, 1.1nm, 1.2nm, 1.3nm, 1.4nm, 1.5nm, 1.6nm, 1.7nm, 1.8nm, 1.9nm, 2nm, 2.1nm, 2.2nm, 2.3nm, 2.4nm, 2.5nm, 2.6nm, 2.7nm, 2.8nm, 2.9nm or 3nm, etc.

[0088] In some cases, the thickness of the second layer 124 along the first direction X can be 2nm to 3nm, for example, it can be 2nm, 2.1nm, 2.2nm, 2.3nm, 2.4nm, 2.5nm, 2.6nm, 2.7nm, 2.8nm, 2.9nm or 3nm, etc.

[0089] In some embodiments, reference Figure 3 Along the first direction X, the thickness of the second doped layer 105 can be 25nm~35nm, for example, it can be 25nm, 25.5nm, 26nm, 26.5nm, 27nm, 27.5nm, 28nm, 28.5nm, 29nm, 29.5nm, 30nm, 30.5nm, 31nm, 31.5nm, 32nm, 32.5nm, 33nm, 33.5nm, 34nm, 34.5nm or 35nm, etc.

[0090] In summary, designing an oxygen- and hydrogen-doped amorphous silicon first intrinsic layer 101 on the front side 110 of the substrate 100 helps to promote the formation of more silicon-hydrogen bonds or silicon-oxygen bonds within the first intrinsic layer 101 and on the front side 110 of the substrate 100 by utilizing the oxygen element in the first intrinsic layer 101. Compared with silicon-hydrogen bonds, silicon-hydrogen bonds or silicon-oxygen bonds have higher bond energies, making them less prone to breakage and more stable under UV light irradiation. This avoids the ionization of hydrogen ions and the formation of silicon dangling bonds, thereby improving the passivation capability of the first intrinsic layer 101 itself and its passivation effect on the substrate 100, effectively preventing UV degradation of photovoltaic cells. On the other hand, the oxygen- and hydrogen-doped amorphous state in the first intrinsic layer 101 helps prevent the crystallization of the subsequently formed intrinsic stack 102, i.e., prevents silicon crystal formation during the formation of the intrinsic stack 102, thereby reducing the defect concentration of the intrinsic stack 102. This ensures that the intrinsic stack 102 is also predominantly amorphous, thus improving the passivation effect of the intrinsic stack 102 on the substrate 100 and enhancing the longitudinal transport efficiency of charge carriers. Therefore, the combination of the first intrinsic layer 101 and the intrinsic stack 102 is beneficial for improving the photoelectric conversion efficiency of the front side 110 of the photovoltaic cell.

[0091] Another embodiment of this disclosure provides a method for manufacturing a photovoltaic cell, used to form the photovoltaic cell provided in the foregoing embodiment. The manufacturing method of the photovoltaic cell provided in another embodiment of this disclosure will be described in detail below with reference to the accompanying drawings. It should be noted that parts that are the same as or corresponding to those in the foregoing embodiments can be referred to the corresponding descriptions in the foregoing embodiments, and will not be repeated hereafter.

[0092] Reference Figure 6 , Figure 7 and Figure 1 , Figure 6 This is a process flow diagram of a method for manufacturing a photovoltaic cell according to another embodiment of the present disclosure. Figure 7 This is a partial cross-sectional view of a photovoltaic cell manufacturing method according to another embodiment of the present disclosure, after the formation of the first intrinsic layer; the photovoltaic cell manufacturing method includes at least the following steps: S1: Provide a substrate 100 having a front side 110 and a back side 120 opposite each other along a first direction X, the first direction X being the thickness direction of the substrate 100.

[0093] S2: Provide silane and oxygen-containing gas to form the first intrinsic layer 101 on the front side 110.

[0094] S3: Provide silane and hydrogen to form an intrinsic stack 102 on the side of the first intrinsic layer 101 away from the front side 110, the intrinsic stack 102 including at least two intrinsic amorphous silicon layers 112.

[0095] S4: A first doped layer 103 is formed on the side of the intrinsic stack 102 away from the first intrinsic layer 101. The first doped layer 103 and the substrate 100 are doped with the same type of doping element.

[0096] This approach facilitates oxygen doping in the first intrinsic layer 101 using oxygen-containing gas, resulting in more silicon-hydrogen-oxygen bonds or silicon-oxygen bonds within the first intrinsic layer 101 and on the front side 110 of the substrate 100. This enhances the binding effect on hydrogen, preventing hydrogen ion ionization and the formation of silicon dangling bonds. Consequently, it improves the passivation capability of the first intrinsic layer 101 itself and its passivation effect on the substrate 100, effectively preventing UV degradation of the photovoltaic cell. Furthermore, when forming the intrinsic stack 102 based on the first intrinsic layer 101, the amorphous state of oxygen and hydrogen doping in the first intrinsic layer 101 prevents crystallization during the formation of the intrinsic stack 102. This ensures that the intrinsic stack 102 is also predominantly amorphous, thereby enhancing the passivation effect of the intrinsic stack 102 on the substrate 100 and improving the longitudinal transport efficiency of charge carriers. In addition, the hydrogen content and density of each intrinsic amorphous silicon layer 112 in the intrinsic stack 102 can be adjusted by using the provided hydrogen gas.

[0097] The following will describe in more detail a method for manufacturing a photovoltaic cell according to an embodiment of the present disclosure, with reference to the accompanying drawings.

[0098] In some embodiments, reference Figure 1 The step of providing silane and hydrogen may include at least two sequential stages, wherein the flow rate ratio of silane and hydrogen provided in the first stage is lower than that in the second stage. Thus, by increasing the flow rate ratio of the provided silane and hydrogen, the rate of formation of the intrinsic amorphous silicon layer 112 can be reduced, thereby increasing the density of the formed intrinsic amorphous silicon layer 112 and reducing the reference ratio of the intrinsic amorphous silicon layer 112.

[0099] In some cases, refer to Figure 2 The steps of providing silane and hydrogen may include at least a first stage, a second stage, and a third stage performed sequentially. In the first stage, a second intrinsic layer 122 is formed; in the second stage, a third intrinsic layer 132 is formed; and in the third stage, a fourth intrinsic layer 142 is formed. The flow rate ratio of silane to hydrogen provided in the first, second, and third stages increases progressively. This facilitates the formation of the second intrinsic layer 122, the third intrinsic layer 132, and the fourth intrinsic layer 142, where the reference ratio decreases progressively and the density increases progressively.

[0100] In some examples, the flow rate ratio of silane to hydrogen provided in the first stage can be 2 to 3, for example, 2, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, or 3; the flow rate ratio of silane to hydrogen provided in the second stage can be 3 to 4, for example, 3, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, or 4; and the flow rate ratio of silane to hydrogen provided in the third stage can be 4 to 10, for example, 4, 4.5, 5, 5.5, 6, 6.5, 7, 7.5, 8, 8.5, 9, 9.5, or 10.

[0101] In some embodiments, reference Figure 7 The oxygen-containing gas can be carbon dioxide. In the step of forming the first intrinsic layer 101, the flow ratio of silane and carbon dioxide provided can be 5 to 30, for example, it can be 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29 or 30, etc.

[0102] In other embodiments, reference is made to... Figure 7 The oxygen-containing gas can be nitrous oxide. In the step of forming the first intrinsic layer 101, the flow ratio of the provided silane and nitrous oxide can be 100 to 200, for example, 100, 110, 120, 130, 140, 150, 160, 170, 180, 190 or 200.

[0103] In some embodiments, reference Figure 1 The first intrinsic layer 101 and the intrinsic stack 102 can be formed using a deposition process. The deposition power used to form the first intrinsic layer 101 can be greater than that used to form the intrinsic stack 102. It is worth noting that increasing the deposition power will promote the dissociation of hydrogen. Designing the deposition power used to form the first intrinsic layer 101 to be greater than that used to form the intrinsic stack 102 is beneficial for promoting the doping of oxygen in the first intrinsic layer 101 while also promoting the doping of more hydrogen in the first intrinsic layer 101, thereby increasing the hydrogen content of the first intrinsic layer 101. At the same time, it reduces the hydrogen content in the oxygen-free intrinsic stack 102 to avoid hydrogen dissociation under UV light irradiation.

[0104] In some cases, the deposition power used to form each intrinsic amorphous silicon layer 112 in the intrinsic stack 102 can be equal.

[0105] In some cases, the deposition power used to form the first intrinsic layer 101 can be 300 W / m. 2 ~350W / m 2 For example, it can be 300W / m 2305W / m 2 310W / m 2 315W / m 2 320W / m 2 325W / m 2 330W / m 2 335W / m 2 340W / m 2 345W / m 2 Or 350W / m 2 wait.

[0106] The steps of providing silane and hydrogen may include at least a first stage, a second stage, and a third stage performed sequentially, wherein a second intrinsic layer 122 is formed in the first stage, a third intrinsic layer 132 is formed in the second stage, and a fourth intrinsic layer 142 is formed in the third stage.

[0107] The deposition power used in the first and second stages can be 150 W / m. 2 ~200W / m 2 For example, it can be 150W / m 2 155W / m 2 160W / m 2 165W / m 2 170W / m 2 175W / m 2 180W / m 2 185W / m 2 190W / m 2 195W / m 2 Or 200W / m 2 wait.

[0108] The deposition power used in the third stage was 150 W / m. 2 ~300W / m 2 For example, it can be 150W / m 2 155W / m 2 160W / m 2 165W / m 2 170W / m 2 175W / m 2 180W / m 2 185W / m 2 190W / m 2 195W / m 2 200W / m 2 205W / m 2 210W / m 2 215W / m 2 220W / m2 225W / m 2 230W / m 2 235W / m 2 240W / m 2 245W / m 2 250W / m 2 255W / m 2 260W / m 2 265W / m 2 270W / m 2 275W / m 2 280W / m 2 285W / m 2 290W / m 2 295W / m 2 Or 300W / m 2 wait.

[0109] In some embodiments, reference Figure 2 The intrinsic layer 102 is formed using a deposition process. The steps of providing silane and hydrogen may include at least a first stage, a second stage, and a third stage performed sequentially. In the first stage, a second intrinsic layer 122 is formed; in the second stage, a third intrinsic layer 132 is formed; and in the third stage, a fourth intrinsic layer 142 is formed. The deposition pressure used in the third stage can be greater than that used in the first and second stages. This allows the fourth intrinsic layer 142 to better cover the third intrinsic layer 132 with the higher deposition pressure, improving the protective effect of the fourth intrinsic layer 142 on the third intrinsic layer 132 and comprehensively blocking hydrogen in the third intrinsic layer 132, effectively preventing hydrogen migration to the first doped layer 103.

[0110] In some cases, a deposition process can be used to form the first intrinsic layer 101; the deposition pressure used to form the first intrinsic layer 101 can be 0.5 Torr to 0.6 Torr, for example, it can be 0.5 Torr, 0.51 Torr, 0.52 Torr, 0.53 Torr, 0.54 Torr, 0.55 Torr, 0.56 Torr, 0.57 Torr, 0.58 Torr, 0.59 Torr or 0.6 Torr, etc.

[0111] The deposition pressure used in the first and second stages can be 0.5 Torr to 0.6 Torr, for example, 0.5 Torr, 0.51 Torr, 0.52 Torr, 0.53 Torr, 0.54 Torr, 0.55 Torr, 0.56 Torr, 0.57 Torr, 0.58 Torr, 0.59 Torr, or 0.6 Torr, etc.

[0112] The deposition pressure used in the third stage can be between 0.8 Torr and 1.2 Torr, for example, 0.8 Torr, 0.81 Torr, 0.82 Torr, 0.83 Torr, 0.84 Torr, 0.85 Torr, 0.86 Torr, 0.87 Torr, 0.88 Torr, 0.89 Torr, 0.9 Torr, 0.91 Torr, 0.92 Torr, 0.93 Torr, 0.94 Torr, 0.95 Torr, 0.96 Torr, 0.97 Torr, 0.9... 8Torr, 0.99Torr, 1Torr, 1.01Torr, 1.02Torr, 1.03Torr, 1.04Torr, 1.05Torr, 1.06Torr, 1.07Torr, 1.08Torr, 1.09Tor r, 1.1Torr, 1.11Torr, 1.12Torr, 1.13Torr, 1.14Torr, 1.15Torr, 1.16Torr, 1.17Torr, 1.18Torr, 1.19Torr or 1.2Torr, etc.

[0113] It should be noted that the first intrinsic layer 101, the second intrinsic layer 122, the third intrinsic layer 132 and the fourth intrinsic layer 142 can be formed in the same chamber or in different chambers, that is, the manufacturing environment of each intrinsic layer can be flexibly selected according to the actual production scenario.

[0114] In some embodiments, in conjunction with reference Figure 8 and Figure 7 , Figure 8 This is a partial cross-sectional view of a photovoltaic cell manufacturing method provided in another embodiment of the present disclosure after the formation of the fifth intrinsic layer. Before the formation of the first intrinsic layer 101, the photovoltaic cell manufacturing method may further include: forming a first layer 114 on the back side 120 using a first deposition process; and forming a second layer 124 on the side of the first layer 114 away from the back side 120 using a second deposition process, wherein the first layer 114 and the second layer 124 together constitute the fifth intrinsic layer 104.

[0115] In some cases, the power used in the first deposition process can be greater than that used in the second deposition process. In this way, compared with the power used in the first deposition process, it is advantageous to increase the density of the second layer 124 formed by the second deposition process by reducing the power, so that the density of the second layer 124 can be higher than that of the first layer 114.

[0116] In some cases, silane and carbon dioxide are introduced in the first deposition process, while silane, carbon dioxide, and hydrogen are introduced in the second deposition process. Thus, compared to the first deposition process which only introduces silane and carbon dioxide, the second deposition process additionally introduces hydrogen, which facilitates the dilution effect of hydrogen and increases the density of the second layer 124 formed by the second deposition process, allowing the density of the second layer 124 to be higher than that of the first layer 114.

[0117] It should be noted that, in order to make the density of the second layer 124 higher than that of the first layer 114, the power used in the second deposition process is designed to be less than that used in the first deposition process. In addition, the hydrogen gas is introduced into the second deposition process. This can be done simultaneously when manufacturing the same fifth intrinsic layer 104, or one of them can be chosen to be done when manufacturing the same fifth intrinsic layer 104.

[0118] In some cases, both the first and second deposition processes can be PECVD (Plasma Enhanced Chemical Vapor Deposition). The PECVD process can use a radio frequency power supply with a frequency of 13.56 MHz.

[0119] In some cases, silane and carbon dioxide are introduced in the first deposition process, while silane, carbon dioxide, and hydrogen are introduced in the second deposition process. The gas flow rate of silane in the first deposition process is a first flow rate, and the gas flow rate of silane in the second deposition process is a second flow rate, with the first flow rate being greater than the second flow rate. Thus, the gas flow rate of silane in the second deposition process is smaller than that in the first deposition process, which helps to reduce the deposition rate of intrinsic amorphous silicon, thereby increasing the density of the second layer 124 formed by the second deposition process. This allows the density of the second layer 124 to be higher than that of the first layer 114.

[0120] In some cases, the step of forming a first layer 114 on the back side 120 using a first deposition process may include: placing the substrate 100 into a first reaction chamber and introducing silane and carbon dioxide into it.

[0121] Optionally, the power of the first deposition process can be 365W / m. 2 ~550W / m 2 For example, it can be 365W / m 2 370W / m 2 375W / m 2 380W / m 2 385W / m 2 390W / m 2 395W / m 2 400W / m2 405W / m 2 410W / m 2 415W / m 2 420W / m 2 425W / m 2 430W / m 2 435W / m 2 440W / m 2 445W / m 2 450W / m 2 455W / m 2 460W / m 2 465W / m 2 470W / m 2 475W / m 2 480W / m 2 485W / m 2 490W / m 2 495W / m 2 500W / m 2 505W / m 2 510W / m 2 515W / m 2 520W / m 2 525W / m 2 530W / m 2 535W / m 2 540W / m 2 545W / m 2 Or 550W / m 2 wait.

[0122] Optionally, the flow rate of silane introduced in the first deposition process can be 500 sccm to 1500 sccm, for example, 500 sccm, 600 sccm, 700 sccm, 800 sccm, 900 sccm, 1000 sccm, 1100 sccm, 1200 sccm, 1300 sccm, 1400 sccm or 1500 sccm, etc.

[0123] Optionally, the flow rate of carbon dioxide introduced in the first deposition process can be 10 sccm to 50 sccm, for example, 10 sccm, 15 sccm, 20 sccm, 25 sccm, 30 sccm, 35 sccm, 40 sccm, 45 sccm or 50 sccm, etc.

[0124] Optionally, the temperature of the first deposition process can be 190℃~230℃, for example, it can be 190℃, 195℃, 200℃, 205℃, 210℃, 215℃, 220℃, 225℃ or 230℃, etc.

[0125] Optionally, the thickness of the first layer 114 along the first direction X can be 0.5nm to 3nm.

[0126] In some cases, the step of forming a second layer 124 on the side of the first layer 114 away from the substrate 100 using a second deposition process may include: placing the substrate 100 on which the first layer 114 is formed into a second reaction chamber and introducing silane, carbon dioxide and hydrogen into it.

[0127] Optionally, the power of the second deposition process can be 73W / m. 2 ~182W / m 2 For example, it can be 73W / m 2 75W / m 2 80W / m 2 85W / m 2 90W / m 2 95W / m 2 100W / m 2 105W / m 2 110W / m 2 115W / m 2 120W / m 2 125W / m 2 130W / m 2 135W / m 2 140W / m 2 145W / m 2 150W / m 2 155W / m 2 160W / m 2 165W / m 2 170W / m 2 175W / m 2 180W / m 2 Or 182W / m 2 wait.

[0128] Optionally, the flow rate of silane introduced in the second deposition process can be 200 sccm to 1000 sccm, for example, 200 sccm, 300 sccm, 400 sccm, 500 sccm, 600 sccm, 700 sccm, 800 sccm, 900 sccm or 1000 sccm.

[0129] Optionally, the flow rate of carbon dioxide introduced in the second deposition process can be 10 sccm to 50 sccm, for example, 10 sccm, 15 sccm, 20 sccm, 25 sccm, 30 sccm, 35 sccm, 40 sccm, 45 sccm or 50 sccm, etc.

[0130] Optionally, the flow rate of hydrogen introduced in the second deposition process can be 200 sccm to 800 sccm, for example, 200 sccm, 300 sccm, 400 sccm, 500 sccm, 600 sccm, 700 sccm or 800 sccm, etc.

[0131] Optionally, the temperature of the second deposition process can be 190℃~230℃, for example, it can be 190℃, 195℃, 200℃, 205℃, 210℃, 215℃, 220℃, 225℃ or 230℃, etc.

[0132] Optionally, along the first direction X, the thickness of the second layer 124 can be 2nm~3nm.

[0133] In some embodiments, after the fifth intrinsic layer 104 is formed on the back side 120, the substrate 100 on which the fifth intrinsic layer 104 is formed is flipped so that the front side 110 faces upward, and then the manufacturing steps of the first intrinsic layer 101 and the intrinsic stack 102 are performed.

[0134] Based on this, after the intrinsic stack 102 is formed, the substrate 100 with the intrinsic stack 102 formed can be placed in another reaction chamber, and a first doped layer 103 is formed in the reaction chamber using a third deposition process, in which phosphine, silane, carbon dioxide and hydrogen are introduced.

[0135] In some cases, refer to Figure 4 After forming the first doped layer 103, the manufacturing method of the photovoltaic cell may further include: flipping the substrate 100 on which the first doped layer 103 is formed so that the back side 120 faces upward, and using a fourth deposition process to form a second doped layer 105 on the side of the fifth intrinsic layer 104 away from the back side 120; wherein the power of the fourth deposition process may be higher than that of the third deposition process, and the temperature of the fourth deposition process may be lower than that of the third deposition process.

[0136] In some examples, the substrate 100 is an N-type silicon substrate, the first doped layer 103 is doped with phosphorus, and the second doped layer 105 is doped with boron. Generally speaking, boron is more difficult to dope than phosphorus and migrates more easily at high temperatures. Therefore, the power of the fourth deposition process is designed to be higher than that of the third deposition process, which is beneficial for promoting the incorporation of boron into the silicon material layer with higher power. Furthermore, the temperature of the fourth deposition process is designed to be lower than that of the third deposition process, which is beneficial for preventing boron from penetrating the second doped layer 105 and causing a decrease in passivation effect.

[0137] In some examples, both the third and fourth deposition processes can be PECVD processes. Furthermore, both the third and fourth deposition processes can utilize a very high frequency (VHF) power supply, for example, a VHF power supply with a frequency of 40.68 MHz.

[0138] In some examples, the power of the third deposition process can be 2190 W / m. 2 ~4380W / m 2 The temperature for the third deposition process can be 180℃~200℃.

[0139] Optionally, the power of the third deposition process can be 2190W / m. 2 2200W / m 2 2300W / m 2 2400W / m 2 2500W / m 2 2600W / m 2 2700W / m 2 2800W / m 2 2900W / m 2 3000W / m 2 3100W / m 2 3200W / m 2 3300W / m 2 3400W / m 2 3500W / m 2 3600W / m 2 3700W / m 2 3800W / m 2 3900W / m 2 4000W / m 2 4100W / m 2 4200W / m 2 4300W / m 2 Or 4380W / m 2 wait.

[0140] Optionally, the temperature of the third deposition process can be 180℃, 185℃, 190℃, 195℃ or 200℃, etc.

[0141] Optionally, the thickness of the first doped layer 103 along the first direction X can be 25nm~30nm.

[0142] In some examples, the step of forming a second doped layer 105 on the side of the fifth intrinsic layer 104 away from the back surface 120 using a fourth deposition process may include: flipping the substrate 100 on which the first doped layer 103 is formed and placing it in another reaction chamber, and introducing diborane, hydrogen, silane and carbon dioxide into it.

[0143] Optionally, the power of the fourth deposition process can be 2920 W / m. 2 ~5840W / m 2 For example, it can be 2920W / m 2 3000W / m 2 3100W / m 2 3200W / m 2 3300W / m 2 3400W / m 2 3500W / m 2 3600W / m 2 3700W / m 2 3800W / m 2 3900W / m 2 4000W / m 2 4100W / m 2 4200W / m 2 4300W / m 2 4400W / m 2 4500W / m 2 4600W / m 2 4700W / m 2 4800W / m 2 4900W / m 2 5000W / m 2 5100W / m 2 5200W / m 2 5300W / m 2 5400W / m 2 5500W / m 2 5600W / m 2 5700W / m 2 5800W / m 2 Or 5840W / m 2 wait.

[0144] Optionally, the temperature of the fourth deposition process can be 130℃~170℃, for example, it can be 130℃, 135℃, 140℃, 145℃, 150℃, 155℃, 160℃, 165℃ or 170℃, etc.

[0145] Optionally, the thickness of the second doped layer 105 along the first direction X can be 25nm~35nm.

[0146] In some embodiments, reference Figure 3 or Figure 4 After forming the second doped layer 105, the method for manufacturing a photovoltaic cell may further include: forming a first transparent conductive layer 106 and a second transparent conductive layer 108, wherein the first transparent conductive layer 106 is located on the side of the first doped layer 103 away from the intrinsic stack 102, and the second transparent conductive layer 108 is located on the side of the second doped layer 105 away from the fifth intrinsic layer 104; forming a first electrode 107 and a second electrode 109, wherein the first electrode 107 is located on the side of the first transparent conductive layer 106 away from the first doped layer 103, and the second electrode 109 is located on the side of the second transparent conductive layer 108 away from the second doped layer 105.

[0147] In some cases, a first transparent conductive layer 106 and a second transparent conductive layer 108 can be deposited on the surfaces of the first doped layer 103 and the second doped layer 105 using a PVD (Physical Vapor Deposition) process. The PVD deposition pressure can be 4.5 kPa; the deposition atmosphere can be argon, oxygen, or hydrogen; the deposition temperature can be 160°C; and the thicknesses of the first transparent conductive layer 106 and the second transparent conductive layer 108 along the first direction X can be 100 nm.

[0148] In some cases, electrode paste can be printed on the surfaces of the first transparent conductive layer 106 and the second transparent conductive layer 108 respectively using screen printing technology, followed by low-temperature drying and curing to obtain the first electrode 107 and the second electrode 109. The low-temperature drying temperature can be 180°C; the curing temperature can be 210°C.

[0149] For example, the steps of a photovoltaic cell manufacturing method provided in another embodiment of this disclosure are as follows: (1) Cleaning and texturing: The surface of the N-type silicon wafer is texturized with KOH, and then rounded and cleaned with O3 and H2O2 to obtain a textured surface structure with a base of 1μm~4μm on the surface of the N-type silicon wafer.

[0150] (2) PECVD surface coating: First, deposit the intrinsic amorphous silicon layer on the back side, i.e. the fifth intrinsic layer.

[0151] Specifically, the following is used: a 13.56MHz RF power supply with a power of 365W / m. 2 ~550W / m 2 Under the conditions of silane flow rate of 500 sccm to 1500 sccm, carbon dioxide flow rate of 10 sccm to 50 sccm, and temperature of 190℃ to 230℃, a porous, non-dense, first intrinsic amorphous silicon layer with a thickness of 0.5 nm to 3 nm is first deposited on the back and sides of the N-type silicon wafer.

[0152] After plating, it enters the next chamber, with a power of 73W / m. 2 A moderately dense second intrinsic amorphous silicon layer with a thickness of 2 nm to 3 nm is deposited on the first intrinsic amorphous silicon layer under the following conditions: ~182 W / m2, silane flow rate of 200 sccm to 1000 sccm, carbon dioxide flow rate of 10 sccm to 50 sccm, hydrogen flow rate of 200 sccm to 800 sccm, and temperature of 190℃ to 230℃.

[0153] (3) After the intrinsic amorphous silicon layer on the back side is deposited, the next chamber is used to deposit the intrinsic amorphous silicon layer on the front side (i.e., the first intrinsic layer and the intrinsic stack) and the first doped layer. The specific deposition method is as follows: During the deposition of the first intrinsic layer, silane and carbon dioxide are introduced at a flow rate ratio of 100 to 200, and the deposition power is 300 W / m. 2 ~350W / m 2 The deposition pressure is 0.5 Torr to 0.6 Torr to form the first intrinsic layer with a thickness of 0.5 nm to 8 nm.

[0154] Subsequently, a second intrinsic layer was deposited, with hydrogen and silane introduced at a flow rate ratio of 2–3, and a deposition power of 150 W / m. 2 ~200W / m 2 The deposition pressure is 0.5 Torr to 0.6 Torr to form a second intrinsic layer with a thickness of 2 nm to 3 nm.

[0155] Next, a third intrinsic layer is deposited, with hydrogen and silane introduced at a flow rate ratio of 3-4, and a deposition power of 150 W / m. 2 ~200W / m 2 The deposition pressure is 0.5 Torr to 0.6 Torr to form a third intrinsic layer with a thickness of 2 nm to 3 nm.

[0156] Finally, a fourth intrinsic layer is deposited, and hydrogen and silane are introduced, with the hydrogen to silane flow rate ratio increased to 4-10, and the deposition power is 150 W / m. 2 ~300W / m 2The deposition pressure is 0.8 Torr to 1.2 Torr to form a fourth intrinsic layer with a thickness of 0.5 nm to 8 nm.

[0157] Based on this, the thickness of the combined film layer consisting of the first intrinsic layer, the second intrinsic layer, the third intrinsic layer and the fourth intrinsic layer is approximately 6.5 nm to 7.5 nm.

[0158] The next chamber is then used to deposit the first doped layer, through which phosphine, silane, carbon dioxide, and hydrogen are introduced at a power of 2190 W / m. 2 ~4380W / m 2 Under the condition of 180℃~200℃, a phosphorus-doped microcrystalline silicon layer with a thickness of 25nm~30nm, namely the first doped layer, is deposited on the surface of the fourth intrinsic layer.

[0159] (4) After completing the first doped layer deposition, the next deposition chamber is entered. The second doped layer is deposited on the surface of the first amorphous silicon film, i.e., the surface on which the fifth intrinsic layer is formed. By introducing diborane, hydrogen, silane and carbon dioxide, at a power of 2920W / m 2 ~5840W / m 2 Under the condition of temperature of 130℃~170℃, a boron-doped microcrystalline silicon layer with a thickness of 25nm~35nm is deposited on the surface of the second intrinsic layer, namely the second doped layer.

[0160] (5) A transparent conductive layer is deposited on the surface of the N-type doped microcrystalline silicon layer (first doped layer) and the P-type doped microcrystalline silicon layer (second doped layer) using PVD technology.

[0161] (6) Electrode paste is printed on the surface of the battery cell after the transparent conductive layer has been plated by screen printing technology, and then the cell is manufactured by low-temperature drying and curing.

[0162] Another embodiment of this disclosure provides a photovoltaic module, which includes a plurality of photovoltaic cells as provided in the foregoing embodiments, or photovoltaic cells formed by a method for manufacturing a plurality of photovoltaic cells as provided in the foregoing embodiments. The photovoltaic module provided in another embodiment of this disclosure will be described in detail below with reference to the accompanying drawings. It should be noted that the parts that are the same as or corresponding to those in the foregoing embodiments can be referred to the corresponding descriptions in the foregoing embodiments, and will not be repeated hereafter.

[0163] Reference Figure 9 , Figure 10 as well as Figure 1 The photovoltaic module includes: a battery string, which is formed by connecting multiple photovoltaic cells 40 provided in the foregoing embodiments, or by connecting photovoltaic cells 40 formed by the manufacturing method of multiple photovoltaic cells provided in the foregoing embodiments; an encapsulating film 41 for covering the surface of the battery string; and a cover plate 42 for covering the surface of the encapsulating film 41 facing away from the battery string.

[0164] in, Figure 9 A partial three-dimensional schematic diagram of a cell string in a photovoltaic module provided in yet another embodiment of this disclosure; Figure 10 This is a partial cross-sectional schematic diagram of a photovoltaic module provided in yet another embodiment of the present disclosure.

[0165] It should be noted that multiple photovoltaic cells 40 can be electrically connected to each other via solder strips 43. Figure 9 and Figure 10 This illustration only shows one positional relationship between photovoltaic cells 40, where the electrodes of the photovoltaic cells 40 with the same polarity are arranged in the same direction, or in other words, the electrodes of each photovoltaic cell 40 with positive polarity are arranged facing the same side, so that the solder ribbon 43 connects different sides of two adjacent photovoltaic cells 40 respectively. In other embodiments, the photovoltaic cells can also be arranged with electrodes of different polarities facing the same side, that is, the electrodes of multiple adjacent photovoltaic cells are arranged in the order of first polarity, second polarity, and first polarity respectively, then the solder ribbon connects the same side of two adjacent photovoltaic cells.

[0166] In some embodiments, the photovoltaic cells 40 are electrically connected in the form of a single cell or multiple segments to form multiple cell strings, and the multiple cell strings are electrically connected in series and / or parallel. The photovoltaic cells 40 can be a single cell or a sliced ​​cell, where a sliced ​​cell refers to a cell formed by cutting a complete single cell.

[0167] In some embodiments, the encapsulating film 41 includes a first encapsulating layer and a second encapsulating layer. The first encapsulating layer covers one of the front or back sides of the photovoltaic cell 40, and the second encapsulating layer covers the other of the front or back sides of the photovoltaic cell 40. Specifically, at least one of the first or second encapsulating layer can be an organic encapsulating film such as polyvinyl butyral (PVB) film, ethylene-vinyl acetate copolymer (EVA) film, polyvinyl octene elastomer (POE) film, or polyethylene terephthalate (PET) film. Alternatively, at least one of the first or second encapsulating layer can also be an EP film, an EPE film, or a PVP film. Here, EP film refers to a co-extruded film composed of stacked EVA film and POE film; EPE film refers to a co-extruded film formed by sequentially stacking EVA film + POE film + EVA film; and PVP film refers to a co-extruded film formed by stacking POE film + EVA film + POE film. Co-extruded films can be manufactured by sequentially extruding one or more raw materials onto another pre-made film during the film processing, or by bonding different types of pre-made films together.

[0168] In some cases, the first encapsulation layer and the second encapsulation layer still have a boundary line before lamination. After lamination, the photovoltaic module will no longer have the concept of a first encapsulation layer and a second encapsulation layer. That is, the first encapsulation layer and the second encapsulation layer have formed an integral encapsulation film 41.

[0169] In some embodiments, the cover plate 42 can be a glass cover plate, a plastic cover plate, or other cover plate with light-transmitting function. Specifically, the surface of the cover plate 42 facing the encapsulating film 41 can be an uneven surface or a textured surface containing multiple raised structures, thereby increasing the utilization rate of incident light. The cover plate 42 includes a first cover plate and a second cover plate, the first cover plate being opposite to the first encapsulation layer, and the second cover plate being opposite to the second encapsulation layer.

[0170] Those skilled in the art will understand that the above embodiments are specific examples of implementing this disclosure, and in practical applications, various changes in form and detail may be made without departing from the spirit and scope of the embodiments of this disclosure. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the embodiments of this disclosure; therefore, the scope of protection of the embodiments of this disclosure should be determined by the scope defined in the claims.

Claims

1. A photovoltaic cell, characterized in that, include: The substrate has a front side and a back side opposite each other along a first direction, the first direction being the thickness direction of the substrate; The first intrinsic layer is located on the front side. The material of the first intrinsic layer includes oxygen- and hydrogen-doped amorphous silicon. The first intrinsic layer also includes silicon-hydrogen bonds and silicon-dihydrogen bonds. An intrinsic stack comprising at least two intrinsic amorphous silicon layers, located on the side of the first intrinsic layer away from the front side, wherein the intrinsic amorphous silicon layer comprises silicon-hydrogen bonds and silicon-dihydrogen bonds; The first doped layer is located on the side of the intrinsic stack away from the first intrinsic layer, and the first doped layer and the substrate are doped with the same type of doping element. The ratio of the number of silicon dihydrogen bonds in a single film layer to the sum of the number of silicon dihydrogen bonds and silicon hydrogen bonds is a reference ratio. Along the direction from the substrate to the first intrinsic layer, the reference ratio of the intrinsic amorphous silicon layer in the intrinsic stack that is further away from the first intrinsic layer is smaller, and the reference ratio of the first intrinsic layer is greater than the reference ratio of the intrinsic amorphous silicon layer in the intrinsic stack that is in contact with the first intrinsic layer.

2. The photovoltaic cell according to claim 1, characterized in that, The intrinsic stack includes: a second intrinsic layer located on the side of the first intrinsic layer away from the front side; a third intrinsic layer located on the side of the second intrinsic layer away from the first intrinsic layer; and a fourth intrinsic layer located on the side of the third intrinsic layer away from the second intrinsic layer. The reference ratios of the first intrinsic layer, the second intrinsic layer, the third intrinsic layer, and the fourth intrinsic layer decrease layer by layer.

3. The photovoltaic cell according to claim 2, characterized in that, The reference ratio of the first intrinsic layer is 0.6% to 0.8%; the reference ratio of the second intrinsic layer is 0.3% to 0.5%; the reference ratio of the third intrinsic layer is 0.2% to 0.3%; and the reference ratio of the fourth intrinsic layer is 0.07% to 0.2%.

4. The photovoltaic cell according to claim 2, characterized in that, Along the first direction, the thickness of the second intrinsic layer and the thickness of the third intrinsic layer are greater than the thickness of the fourth intrinsic layer; and / or, along the first direction, the thickness of the second intrinsic layer and the thickness of the third intrinsic layer are greater than the thickness of the first intrinsic layer.

5. The photovoltaic cell according to claim 4, characterized in that, Along the first direction, the thickness of the first intrinsic layer is 0.5nm~1.5nm, the thickness of the second intrinsic layer is 2nm~3nm, the thickness of the third intrinsic layer is 2nm~3nm, and the thickness of the fourth intrinsic layer is 0.5nm~1.5nm.

6. The photovoltaic cell according to claim 2, characterized in that, The hydrogen content of the first intrinsic layer is 32%~33%, the hydrogen content of the second intrinsic layer is 28%~29%, the hydrogen content of the third intrinsic layer is 31%~32%, and the hydrogen content of the fourth intrinsic layer is 7%~9%.

7. The photovoltaic cell according to claim 1, characterized in that, Also includes: The fifth intrinsic layer is located on the back side; The second doped layer is located on the side of the fifth intrinsic layer away from the back surface, and the second doped layer and the substrate are doped with different types of doping elements; A first transparent conductive layer is located on the side of the first doped layer away from the intrinsic stack; The first electrode is located on the side of the first transparent conductive layer away from the first doped layer; The second transparent conductive layer is located on the side of the second doped layer away from the fifth intrinsic layer; The second electrode is located on the side of the second transparent conductive layer away from the second doped layer.

8. A method for manufacturing a photovoltaic cell, characterized in that, include: A substrate is provided having a front side and a back side opposite each other along a first direction, the first direction being the thickness direction of the substrate; Silane and oxygen-containing gas are provided to form a first intrinsic layer on the front side, the first intrinsic layer comprising silicon-hydrogen bonds and silicon-dihydrogen bonds; Silane and hydrogen are provided to form an intrinsic stack on the side of the first intrinsic layer away from the front surface. The intrinsic stack includes at least two intrinsic amorphous silicon layers, each containing silicon-hydrogen bonds and silicon-dihydrogen bonds. A reference ratio is defined as the ratio of the number of silicon-dihydrogen bonds to the sum of the number of silicon-dihydrogen bonds and silicon-hydrogen bonds in a single film layer. Along the direction from the substrate to the first intrinsic layer, the reference ratio of the intrinsic amorphous silicon layers in the intrinsic stack that are further away from the first intrinsic layer is smaller, and the reference ratio of the first intrinsic layer is greater than the reference ratio of the intrinsic amorphous silicon layers in the intrinsic stack that are in contact with the first intrinsic layer. A first doped layer is formed on the side of the intrinsic stack away from the first intrinsic layer, and the first doped layer and the substrate are doped with the same type of doping element.

9. The method for manufacturing a photovoltaic cell according to claim 8, characterized in that, The steps of providing silane and hydrogen include at least two sequential stages, wherein the flow rate ratio of silane and hydrogen provided in the preceding stage is lower than that provided in the following stage.

10. The method for manufacturing a photovoltaic cell according to claim 9, characterized in that, The steps of providing silane and hydrogen include at least a first stage, a second stage, and a third stage performed sequentially, wherein a second intrinsic layer is formed in the first stage, a third intrinsic layer is formed in the second stage, and a fourth intrinsic layer is formed in the third stage. The flow rate ratio of silane and hydrogen provided in the first stage, the second stage, and the third stage increases successively.

11. The method for manufacturing a photovoltaic cell according to claim 10, characterized in that, The flow rate ratio of silane to hydrogen provided in the first stage is 2 to 3, the flow rate ratio of silane to hydrogen provided in the second stage is 3 to 4, and the flow rate ratio of silane to hydrogen provided in the third stage is 4 to 10.

12. The method for manufacturing a photovoltaic cell according to claim 8 or 11, characterized in that, The oxygen-containing gas is carbon dioxide, and in the step of forming the first intrinsic layer, the flow ratio of silane to carbon dioxide is 5 to 30; or, the oxygen-containing gas is nitrous oxide, and in the step of forming the first intrinsic layer, the flow ratio of silane to nitrous oxide is 100 to 200. And / or, the first intrinsic layer and the intrinsic stack are formed using a deposition process, wherein the deposition power used to form the first intrinsic layer is greater than the deposition power used to form the intrinsic stack.

13. The method for manufacturing a photovoltaic cell according to claim 12, characterized in that, The deposition power used to form the first intrinsic layer was 300 W / m. 2 ~350W / m 2 ; The steps of providing silane and hydrogen include at least a first stage, a second stage, and a third stage performed sequentially. In the first stage, a second intrinsic layer is formed; in the second stage, a third intrinsic layer is formed; and in the third stage, a fourth intrinsic layer is formed. The deposition power used in the first and second stages is 150 W / m. 2 ~200W / m 2 The deposition power used in the third stage is 150 W / m. 2 ~300W / m 2 .

14. The method for manufacturing a photovoltaic cell according to claim 8 or 11, characterized in that, The intrinsic stack is formed using a deposition process; the steps of providing silane and hydrogen include at least a first stage, a second stage, and a third stage performed sequentially, wherein a second intrinsic layer is formed in the first stage, a third intrinsic layer is formed in the second stage, and a fourth intrinsic layer is formed in the third stage; The deposition pressure used in the third stage is greater than that used in the first and second stages.

15. The method for manufacturing a photovoltaic cell according to claim 14, characterized in that, The first intrinsic layer is formed using a deposition process; the deposition pressure used to form the first intrinsic layer is 0.5 Torr to 0.6 Torr, the deposition pressure used in the first stage and the second stage is 0.5 Torr to 0.6 Torr, and the deposition pressure used in the third stage is 0.8 Torr to 1.2 Torr.

16. A photovoltaic module, characterized in that, include: A battery string is formed by connecting multiple photovoltaic cells as described in any one of claims 1 to 7, or by connecting multiple photovoltaic cells formed by the manufacturing method of photovoltaic cells as described in any one of claims 8 to 15; An encapsulating film is used to cover the surface of the battery string; A cover plate is used to cover the surface of the encapsulating film that faces away from the battery string.

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