Horizontal light emitting diode and method of manufacturing the same
By designing a horizontal LED structure and optimizing current distribution and material composition, the problem that vertical SWIR LEDs cannot meet the needs of various applications was solved, achieving high brightness and wide applicability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- TAIWAN ASIA SEMICONDUCTOR CORPORATION
- Filing Date
- 2025-03-10
- Publication Date
- 2026-06-16
Smart Images

Figure CN122227741A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a horizontal light-emitting diode and its manufacturing method, and particularly to a horizontal short-wave infrared light-emitting diode and its manufacturing method. Background Technology
[0002] Short-wave infrared (SWIR) light-emitting diodes typically have wavelengths between 1100 nanometers (nm) and 2000 nanometers (nm). This wavelength falls outside the visible light range and is highly effective at penetrating smoke, fog, or certain materials, making it primarily used in applications requiring high penetration or the detection of specific substances' absorption spectra. Commonly used SWIR wavelengths include 1050 nm, 1300 nm, and 1550 nm, which can be optimized for different application needs. For example, in medical devices, the ability of SWIR to penetrate human skin is utilized, and various medical detection devices for vascular imaging, biological tissue analysis, and physiological indicators have developed application modules with built-in SWIR light-emitting diodes.
[0003] However, most commercially available SWIR LEDs currently use a vertical chip structure, with no horizontal chip structure available. Furthermore, the traditional packaging design of vertical SWIR LEDs cannot meet the diverse needs of various applications. Therefore, the industry urgently requires an innovative short-wave infrared horizontal LED structure and manufacturing method to meet the development requirements of subsequent application modules. Summary of the Invention
[0004] The main objective of this invention is to provide a high-brightness horizontal light-emitting diode and its manufacturing method, applicable to short-wavelength infrared (SWIR) light-emitting diodes in the wavelength range of 1100–2000 nanometers (nm). In addition to providing a horizontal architecture to increase flexibility in subsequent packaging module applications, the LED structure disclosed in this invention also features an optimized current distribution design to enhance the brightness of the LED, expanding the application range of downstream products.
[0005] To achieve the above objectives, the present invention provides a horizontal light-emitting diode (LED), comprising a permanent substrate, an epitaxial composite layer, a transparent conductive layer, a plurality of conductive plugs, a first conductive electrode, and a second conductive electrode. The epitaxial composite layer has a light-emitting layer with a light emission wavelength of 1100–2000 nanometers (nm) and is disposed on the permanent substrate. The transparent conductive layer is sandwiched between the permanent substrate and the epitaxial composite layer. Each conductive plug is disposed between the transparent conductive layer and the epitaxial composite layer and electrically connected to the epitaxial composite layer. The first conductive electrode is disposed on the permanent substrate and electrically connected to the epitaxial composite layer. The second conductive electrode is disposed on the epitaxial composite layer, electrically connected to the epitaxial composite layer, and located on the same side of the permanent substrate as the first conductive electrode.
[0006] In one embodiment of the horizontal light-emitting diode of the present invention, the epitaxial composite layer further includes a first compound semiconductor layer and a second compound semiconductor layer, the first compound semiconductor layer and the second compound semiconductor layer sandwiching the light-emitting layer, and the second compound semiconductor layer being disposed between the light-emitting layer and the second conductive electrode.
[0007] In one embodiment of the horizontal light-emitting diode of the present invention, the first compound semiconductor layer is a first conductivity type indium phosphide (InP) layer, and the second compound semiconductor layer is a second conductivity type indium phosphide (InP) layer.
[0008] In one embodiment of the horizontal light-emitting diode of the present invention, the horizontal light-emitting diode further includes a dielectric layer, and the epitaxial composite layer further includes a highly doped indium gallium arsenide phosphide (InGaAsP) layer, wherein each conductive plug is disposed in the dielectric layer, and the highly doped indium gallium arsenide phosphide layer is disposed between the first conductive indium phosphide layer and the dielectric layer.
[0009] In one embodiment of the horizontal light-emitting diode of the present invention, each conductive plug is a metal stack that forms an ohmic contact with a highly doped indium gallium arsenide phosphide layer, and the material of the metal stack is selected from one or a combination of the group consisting of titanium (Ti), platinum (Pt), gold (Au), palladium (Pd), germanium (Ge), and zinc gold (ZnAu).
[0010] In one embodiment of the horizontal light-emitting diode of the present invention, the horizontal light-emitting diode further includes a dielectric layer, and each conductive plug is disposed in the dielectric layer.
[0011] In one embodiment of the horizontal light-emitting diode of the present invention, each conductive plug includes a highly doped compound semiconductor layer and a metal stack, wherein the highly doped compound semiconductor layer is sandwiched between the epitaxial composite layer and the metal stack, and forms an ohmic contact with the metal stack.
[0012] In one embodiment of the horizontal light-emitting diode of the present invention, the highly doped compound semiconductor layer is a highly doped indium gallium arsenide phosphide (InGaAsP) layer.
[0013] In one embodiment of the horizontal light-emitting diode of the present invention, the material of the metal stack is selected from one or a combination thereof from the group consisting of titanium (Ti), platinum (Pt), gold (Au), palladium (Pd), germanium (Ge), and zinc gold (ZnAu).
[0014] In one embodiment of the horizontal light-emitting diode of the present invention, the permanent substrate is one of a silicon substrate and an aluminum nitride substrate.
[0015] To achieve the above objectives, the present invention provides a method for manufacturing a horizontal light-emitting diode, comprising the following steps: forming an epitaxial composite layer disposed on an epitaxial growth substrate, having a light-emitting layer having a light-emitting wavelength band of 1100-2000 nanometers (nm); forming a transparent conductive layer sandwiched between the epitaxial growth substrate and the epitaxial composite layer; forming a plurality of conductive plugs disposed between the transparent conductive layer and the epitaxial composite layer, electrically connected to the epitaxial composite layer; forming a metal layer on the transparent conductive layer, bonding it to a permanent substrate wafer, and then removing the epitaxial growth substrate; forming a first conductive electrode disposed on the permanent substrate, electrically connected to the epitaxial composite layer; and forming a second conductive electrode disposed on the epitaxial composite layer, electrically connected to the epitaxial composite layer, and located on the same side of the permanent substrate as the first conductive electrode.
[0016] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, the step of forming an epitaxial composite layer further includes forming a first compound semiconductor layer and a second compound semiconductor layer, wherein the first compound semiconductor layer and the second compound semiconductor layer sandwich the light-emitting layer, and the second compound semiconductor layer is disposed between the light-emitting layer and the second conductive electrode.
[0017] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, the first compound semiconductor layer is a first conductivity type indium phosphide (InP) layer, and the second compound semiconductor layer is a second conductivity type indium phosphide (InP) layer.
[0018] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, the method further includes forming a dielectric layer, and forming an epitaxial composite layer further includes forming a highly doped indium gallium arsenide phosphide (InGaAsP) layer, wherein each conductive plug is disposed in the dielectric layer, and the highly doped indium gallium arsenide phosphide layer is disposed between the first conductive indium phosphide layer and the dielectric layer.
[0019] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, each conductive plug is a metal stack that forms an ohmic contact with a highly doped indium gallium arsenide phosphide layer, and the material of the metal stack is selected from one or a combination of the group consisting of titanium (Ti), platinum (Pt), gold (Au), palladium (Pd), germanium (Ge), and zinc gold (ZnAu).
[0020] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, the method further includes forming a dielectric layer, wherein each conductive plug is disposed in the dielectric layer.
[0021] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, each conductive plug includes a highly doped compound semiconductor layer and a metal stack, wherein the highly doped compound semiconductor layer is sandwiched between the epitaxial composite layer and the metal stack, and forms an ohmic contact with the metal stack.
[0022] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, the highly doped compound semiconductor layer is a highly doped indium gallium arsenide phosphide (InGaAsP) layer.
[0023] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, the material of the metal stack is selected from one or a combination thereof from the group consisting of titanium (Ti), platinum (Pt), gold (Au), palladium (Pd), germanium (Ge), and zinc gold (ZnAu).
[0024] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, the permanent substrate is one of a silicon substrate and an aluminum nitride substrate.
[0025] Other objects of the present invention, as well as the technical means and implementation methods of the present invention, will be understood by those skilled in the art upon referring to the accompanying drawings and the embodiments described below. Attached Figure Description
[0026] Figures 1A to 1H This diagram shows a schematic representation of the manufacture of a horizontal light-emitting diode according to an embodiment of the present invention;
[0027] Figure 2 This is a schematic diagram of a horizontal light-emitting diode according to another embodiment of the present invention; and
[0028] Figure 3 This is a schematic diagram of the manufacturing process steps of a horizontal light-emitting diode in one embodiment of the present invention.
[0029] Explanation of reference numerals in the attached figures
[0030] 100 Epitaxial Growth Substrate
[0031] 101 N-type ohmic contact layer
[0032] 102 Second compound semiconductor layer
[0033] 103 Emissive Layer
[0034] 104 First compound semiconductor layer
[0035] 105 Highly Doped Indium Gallium Arsenide Phosphide Layer
[0036] 106 dielectric layer
[0037] 107 Metal Stack
[0038] 108 transparent conductive layer
[0039] 109 Reflective Metal Layer
[0040] 110 Permanent Substrate
[0041] 111 First Conductivity Electrode
[0042] 112 Second conductive electrode. Detailed Implementation
[0043] The following embodiments will explain the content of this invention. These embodiments are not intended to limit the implementation of this invention to any specific environment, application, or special method described in the embodiments. Therefore, the descriptions of the embodiments are merely illustrative of the invention and not intended to limit it. It should be noted that in the following embodiments and accompanying drawings, elements not directly related to this invention have been omitted and are not shown, and the dimensional relationships between the elements in the drawings are for ease of understanding only and are not intended to limit the actual scale.
[0044] This invention discloses a horizontal light-emitting diode and its manufacturing method. Please refer to [link to relevant documentation]. Figure 1A The image shows a buffer layer (not shown) and an N-type ohmic contact layer 101 epitaxially grown on an epitaxial growth substrate 100 using metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE) techniques. Specifically, the epitaxial growth substrate 100 is an indium phosphide (InP) substrate, but is not limited to this. Furthermore, the buffer layer is an N-type indium phosphide (InP) epitaxial layer used to adjust the lattice matching between the epitaxial growth substrate and the epitaxial composite layer during subsequent epitaxial composite layer growth, reducing stress caused by lattice mismatch in subsequent epitaxial processes, thereby improving the film quality of the subsequent epitaxial layer.
[0045] Secondly, the N-type ohmic contact layer 101 is specifically an N-type indium gallium arsenide (InGaAs) epitaxial layer, whose lattice constant is between that of indium phosphide (InP) and multiple quantum well structures. Therefore, the N-type indium gallium arsenide epitaxial layer can also serve as a buffer layer to further adjust the lattice matching of subsequent epitaxial layers. Furthermore, the N-type indium gallium arsenide epitaxial layer can optimize carrier injection efficiency. By adjusting its band gap according to the gallium-to-indium ratio, it controls the transport of electrons and holes, ensuring that more carriers are effectively injected into the light-emitting layer, thus enhancing luminous efficiency. In particular, the N-type ohmic contact layer 101 will serve as the interface between the device and the N-type electrode ohmic contact. Therefore, the commonly used dopants in the N-type indium gallium arsenide epitaxial layer are sulfur (S), selenium (Se), or silicon (Si), with doping concentrations typically around 10⁻⁶. 18 Up to 10 20 cm -3 Within this range, such a concentration helps to reduce the Schottky barrier, thus achieving the goal of low-resistance ohmic contacts.
[0046] Next, an epitaxial composite layer is grown on the N-type ohmic contact layer 101, comprising a first compound semiconductor layer 104, a light-emitting layer 103, and a second compound semiconductor layer 102. The light-emitting layer 103 is a multiple quantum well (MQW) structure formed of indium gallium arsenide phosphide (InGaAsP) quaternary compound semiconductor sandwiched between the first compound semiconductor layer 104 and the second compound semiconductor layer 102. In this embodiment, the multiple quantum well emission wavelength can be 1100–2000 nanometers (nm). Specifically, the first compound semiconductor layer 104 is a first conductivity type (P-type) indium phosphide (InP) epitaxial layer, and the second compound semiconductor layer 102 is a second conductivity type (N-type) indium phosphide (InP) epitaxial layer. It should be noted that the materials described in the above embodiment are merely one example, and the present invention is not limited thereto. In practical applications, the light-emitting layer can be a multiple quantum well (MQW) or a double heterojunction (DH) structure, and its materials and composition can be adjusted according to the emission wavelength. For example, the epitaxial layer can be indium aluminum gallium arsenide (InAlGaAs), indium gallium arsenide (InGaAs), indium gallium arsenide phosphide (InGaAsP), aluminum gallium phosphide (AlGaP), aluminum gallium indium phosphide (AlGaInP), indium antimonide arsenide (InAsSb), aluminum indium antimonide (InAlSb), indium antimonide arsenide (InAsSbP), etc.
[0047] like Figure 1AAs shown, a compound semiconductor layer is further epitaxially grown on the epitaxial composite layer. In a specific embodiment, this compound semiconductor layer is a highly doped indium gallium arsenide phosphide (InGaAsP) layer 105 used as an ohmic contact layer, for example, but not limited to, a zinc-doped indium gallium arsenide phosphide (Zn-doped InGaAsP) epitaxial layer, preferably with a thickness of 500 to 5000 angstroms. Specifically, the doping concentration of this zinc-doped indium gallium arsenide phosphide (Zn-doped InGaAsP) epitaxial layer is 10. 18 Up to 10 20 cm -3 Between these concentration ranges, such a range helps to reduce contact resistance to form an ohmic contact with the interface of the subsequent metal layer.
[0048] Secondly, please refer to Figure 1B Next, a dielectric layer 106 is deposited to cover the entire wafer surface, and then a patterning process is used to remove part of the dielectric layer 106. Specifically, the dielectric layer 106 can be made of silicon dioxide (SiO2), silicon nitride (Si3N4), silicon oxynitride (SiON), etc. The pattern of the dielectric layer 106 is determined according to the layout of the conductive plugs to be formed subsequently, such as... Figure 1C As shown, a metal stack 107 is deposited between the patterned dielectric layers 106 by means of evaporation or sputtering to form multiple conductive plugs on the upper surface of the highly doped indium gallium arsenide phosphide (InGaAsP) layer 105, and to form an ohmic contact between the two at their interface. Specifically, this metal stack 107 can be selected from one or a combination of titanium (Ti), platinum (Pt), gold (Au), palladium (Pd), germanium (Ge), and zinc gold (ZnAu), and its thickness is less than 1 micrometer, preferably 2000–5000 angstroms. The pattern design of these conductive plugs is mainly to guide the longitudinal current of the light-emitting diode chip to be evenly distributed between the crystal structures, reduce current congestion, and thereby improve luminous efficiency.
[0049] Please refer to the following: Figure 1DA transparent conductive layer 108 is formed on the wafer surface by vapor deposition or sputtering, covering the dielectric layer 106 and the metal stack 107 distributed in the dielectric layer 106, and electrically connected to the metal stack 107 of the conductive plug. The transparent conductive layer 108 is made of indium tin oxide (ITO), aluminum zinc oxide (AZO), zinc tin oxide (IZO), nickel oxide, cadmium tin oxide, antimony tin oxide, or combinations thereof. Next, a reflective metal layer 109 is formed on the transparent conductive layer 108 by vapor deposition and then wafer-bonded to another permanent substrate 110. The transparent conductive layer 108 and the reflective metal layer 109 can serve as a mirror system of a reflective layer in the light-emitting diode structure of the present invention, used to reflect the light emitted from the light-emitting layer upwards to increase the light extraction efficiency. The material of the reflective metal layer is selected from one or a combination of the group consisting of silver (Ag), titanium (Ti), platinum (Pt), gold (Au), and indium (In). The permanent substrate 110 may be, but is not limited to, a silicon substrate or an aluminum nitride (AlN) substrate.
[0050] Please see Figure 1E Next, the epitaxial growth substrate 100 and the buffer layer are removed from the other side of the permanent substrate 110 to expose the N-type ohmic contact layer 101. A wafer flip is then performed so that the permanent substrate 110 is located at the bottom of the horizontal light-emitting diode structure. Next, a patterned etching process is performed on the N-type ohmic contact layer 101 to remove a portion of the N-type ohmic contact layer 101, retaining only the portion of the N-type ohmic contact layer 101 intended to form the upper electrode region. Then, the upper surface of the exposed second compound semiconductor layer 102 is roughened, that is, the N-type indium phosphide (InP) epitaxial layer is roughened, such as... Figure 1F As shown.
[0051] Please refer to the following: Figure 1G The MESA (Medium-Enhanced Semiconductor Alignment) process is performed to etch portions of the epitaxial composite layer, dielectric layer 106, and transparent conductive layer 108. That is, portions of the second compound semiconductor layer 102, light-emitting layer 103, first compound semiconductor layer 104, dielectric layer 106, and transparent conductive layer 108 are etched, exposing a flat surface of the reflective metal layer 109 for subsequent placement of the lower electrode.
[0052] Please see Figure 1HA metal evaporation process is performed to form a first conductive electrode 111 on a permanent substrate 110 and electrically connect it to a reflective metal layer 109. On the other hand, a second conductive electrode 112 is formed on an N-type ohmic contact layer 101. An ohmic contact is formed between the second conductive electrode 112 and the N-type ohmic contact layer 101, and it is electrically connected to an epitaxial composite layer. The first conductive electrode 111 and the second conductive electrode 112 can be, for example, but not limited to, a metal stack of germanium-titanium (GeTi) alloy, platinum (Pt), and gold (Au). Finally, after forming a protective layer on the surface of the element in addition to the upper and lower electrode surfaces, the final structure of the horizontal SWIR light-emitting diode of this invention is completed. This element is characterized by the upper and lower electrodes being located on the same side, providing a wider design margin for back-end application modules. Furthermore, the horizontal SWIR light-emitting diode of this invention has a conductive pin layout design, which can increase the uniformity of the longitudinal current distribution inside the element and improve the luminous efficiency of the element.
[0053] like Figure 2 As shown, it displays a cross-sectional schematic diagram of a horizontal SWIR light-emitting diode according to another embodiment of the present invention. Unlike the previous embodiment, the conductive plug in this embodiment has a double-layer structure, that is, the conductive plug has a patterned highly doped indium gallium arsenide phosphide (InGaAsP) layer 105 and a metal stack 107. Compared to... Figure 1H The light-emitting diode shown has a single, fully doped indium gallium arsenide phosphide (InGaAsP) layer 105; however, Figure 2 The highly doped indium gallium arsenide phosphide (InGaAsP) layer 105 in the light-emitting diode is not a monolithic structure but is patterned and integrated into each conductive plug. Because the highly doped indium gallium arsenide phosphide (InGaAsP) layer has absorption characteristics relative to short-wave infrared light in the emission wavelength range of 1100–2000 nanometers (nm), therefore... Figure 2 The light-emitting diode in the illustrated embodiment features a patterned structure that integrates into the structure of the conductive plug, thereby reducing its overall area and balancing ohmic contact and light absorption, thus further improving the luminous efficiency of the device.
[0054] Please see Figure 3This diagram illustrates the process of manufacturing a horizontal light-emitting diode according to the present invention. First, in step S01, an epitaxial composite layer is formed on an epitaxial growth substrate, having a light-emitting layer with a light emission wavelength of 1100–2000 nanometers (nm). In step S02, a transparent conductive layer is formed, sandwiched between the epitaxial growth substrate and the epitaxial composite layer. Next, in step S03, a plurality of conductive plugs are formed, disposed between the transparent conductive layer and the epitaxial composite layer, electrically connected to the epitaxial composite layer. In step S04, a metal layer is formed on the transparent conductive layer, bonded to a permanent substrate wafer, and then the epitaxial growth substrate is removed. In step S05, a first conductive electrode is formed on the permanent substrate, electrically connected to the epitaxial composite layer. Finally, in step S06, a second conductive electrode is formed on the epitaxial composite layer, electrically connected to the epitaxial composite layer, and located on the same side of the permanent substrate as the first conductive electrode. The descriptions of the relevant components in the aforementioned process steps can be found above and will not be repeated here.
[0055] The above embodiments are merely illustrative of implementation schemes of the present invention and to explain the technical features of the present invention, and are not intended to limit the scope of protection of the present invention. Any changes or equivalent arrangements that can be easily made by those skilled in the art are within the scope of the present invention, and the scope of protection of the present invention should be determined by the claims.
Claims
1. A horizontal light-emitting diode, comprising: A permanent substrate; An epitaxial composite layer having a light-emitting layer with a light emission wavelength of 1100–2000 nm is disposed on the permanent substrate; A transparent conductive layer is sandwiched between the permanent substrate and the epitaxial composite layer; Multiple conductive plugs are disposed between the transparent conductive layer and the epitaxial composite layer, and are electrically connected to the epitaxial composite layer; A first conductivity type electrode is disposed on the permanent substrate and electrically connected to the epitaxial composite layer; and A second conductivity electrode is disposed on the epitaxial composite layer, electrically connected to the epitaxial composite layer, and located on the same side of the permanent substrate as the first conductivity electrode.
2. The horizontal light-emitting diode as claimed in claim 1, wherein the epitaxial composite layer further comprises a first compound semiconductor layer and a second compound semiconductor layer, the first compound semiconductor layer and the second compound semiconductor layer sandwiching the light-emitting layer, and the second compound semiconductor layer being disposed between the light-emitting layer and the second conductivity electrode.
3. The horizontal light-emitting diode as claimed in claim 2, wherein the first compound semiconductor layer is a first conductivity type indium phosphide layer, and the second compound semiconductor layer is a second conductivity type indium phosphide layer.
4. The horizontal light-emitting diode as described in claim 3, further comprising a dielectric layer, and the epitaxial composite layer further comprising a highly doped indium gallium arsenide phosphide layer, wherein, Each of the conductive plugs is disposed in the dielectric layer, and the highly doped indium gallium arsenide phosphide layer is disposed between the first conductive indium phosphide layer and the dielectric layer.
5. The horizontal light-emitting diode of claim 4, wherein each of the conductive plugs is a metal stack forming an ohmic contact with the highly doped indium gallium arsenide phosphide layer, and the material of the metal stack is selected from one or a combination thereof from the group consisting of titanium, platinum, gold, palladium, germanium, and zinc gold.
6. The horizontal light-emitting diode as described in claim 3 further comprises a dielectric layer, wherein each of the conductive pins is disposed in the dielectric layer.
7. The horizontal light-emitting diode as claimed in claim 6, wherein each conductive plug comprises a highly doped compound semiconductor layer and a metal stack, the highly doped compound semiconductor layer being sandwiched between the epitaxial composite layer and the metal stack, and forming an ohmic contact with the metal stack.
8. The horizontal light-emitting diode as claimed in claim 7, wherein the highly doped compound semiconductor layer is a highly doped indium gallium arsenide phosphide layer.
9. The horizontal light-emitting diode of claim 7, wherein the material of the metal stack is selected from one or a combination thereof from the group consisting of titanium, platinum, gold, palladium, germanium, and zinc-gold.
10. The horizontal light-emitting diode as claimed in claim 1, wherein the permanent substrate is one of a silicon substrate and an aluminum nitride substrate.
11. A method for manufacturing a horizontal light-emitting diode, comprising: An epitaxial composite layer is formed and disposed on an epitaxial growth substrate, having a light-emitting layer with a light emission wavelength of 1100–2000 nm; A transparent conductive layer is formed and sandwiched between the epitaxial growth substrate and the epitaxial composite layer; Multiple conductive plugs are formed and disposed between the transparent conductive layer and the epitaxial composite layer, and are electrically connected to the epitaxial composite layer; A metal layer is formed on the transparent conductive layer and bonded to a permanent substrate wafer before the epitaxial growth substrate is removed. A first conductivity electrode is formed and disposed on the permanent substrate, electrically connected to the epitaxial composite layer; and A second conductivity electrode is formed and disposed on the epitaxial composite layer, electrically connected to the epitaxial composite layer, and located on the same side of the permanent substrate as the first conductivity electrode.
12. The method for manufacturing a horizontal light-emitting diode as claimed in claim 11, wherein the step of forming an epitaxial composite layer further comprises forming a first compound semiconductor layer and a second compound semiconductor layer, wherein the first compound semiconductor layer and the second compound semiconductor layer sandwich the light-emitting layer, and the second compound semiconductor layer is disposed between the light-emitting layer and the second conductivity electrode.
13. The method for manufacturing a horizontal light-emitting diode as claimed in claim 12, wherein the first compound semiconductor layer is a first conductivity type indium phosphide layer, and the second compound semiconductor layer is a second conductivity type indium phosphide layer.
14. The method for manufacturing a horizontal light-emitting diode as described in claim 13, further comprising forming a dielectric layer, and forming the epitaxial composite layer further comprising forming a highly doped indium gallium arsenide phosphide layer, wherein, Each of the conductive plugs is disposed in the dielectric layer, and the highly doped indium gallium arsenide phosphide layer is disposed between the first conductive indium phosphide layer and the dielectric layer.
15. The method of manufacturing a horizontal light-emitting diode as claimed in claim 14, wherein each conductive plug is a metal stack forming an ohmic contact with the highly doped indium gallium arsenide phosphide layer, and the material of the metal stack is selected from one or a combination thereof from the group consisting of titanium, platinum, gold, palladium, germanium, and zinc gold.
16. The method of manufacturing a horizontal light-emitting diode as claimed in claim 13, further comprising forming a dielectric layer, wherein each of the conductive plugs is disposed in the dielectric layer.
17. The method of manufacturing a horizontal light-emitting diode as claimed in claim 16, wherein each conductive plug comprises a highly doped compound semiconductor layer and a metal stack, the highly doped compound semiconductor layer being sandwiched between the epitaxial composite layer and the metal stack, and forming an ohmic contact with the metal stack.
18. The method for manufacturing a horizontal light-emitting diode as claimed in claim 17, wherein the highly doped compound semiconductor layer is a highly doped indium gallium arsenide phosphide layer.
19. The method of manufacturing a horizontal light-emitting diode as claimed in claim 17, wherein the material of the metal stack is selected from one or a combination thereof from the group consisting of titanium, platinum, gold, palladium, germanium, zinc, and gold.
20. The method for manufacturing a horizontal light-emitting diode as claimed in claim 11, wherein the permanent substrate is one of a silicon substrate and an aluminum nitride substrate.