一种IZO薄膜的刻蚀方法、半导体结构及芯片
By employing a double-layer mask structure and a step-by-step ICP etching process, the problems of high fidelity, low damage, and burr-free operation in the patterning process of ultra-thin IZO thin films with small linewidths have been solved, achieving high-precision pattern transfer, which is suitable for the manufacture of flexible displays and micro-devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- WESTLAKE UNIV
- Filing Date
- 2026-05-20
- Publication Date
- 2026-07-17
AI Technical Summary
Existing technologies cannot simultaneously achieve high-fidelity, low-damage, and burr-free etching during the small-linewidth patterning process of ultrathin IZO films. This is especially true in micro-nano and highly integrated thin-film transistors and transparent display devices, where conventional etching processes suffer from lattice damage, burrs, and pattern distortion.
A dual-mask structure design is adopted, using a silicon carbide thin film layer as the sole etching barrier layer. Through a stepwise ICP etching process, a silicon carbide hard mask is first formed, and then it is used as an etching barrier layer for IZO thin film etching. This avoids high bias voltage bombardment. Combined with specific gas and process parameters, low-damage and high-fidelity pattern transfer is achieved.
Low-damage, burr-free, high-fidelity etching was achieved on ultrathin IZO films, ensuring the electrical and optical performance of devices and meeting the high-precision patterning requirements of flexible displays and micro-devices.
Smart Images
Figure CN122227880B_ABST