Semiconductor device

Abstract

A semiconductor device in which a sensing element (Se) has a well layer (17) of a second conductivity type formed on a drift layer (11), and is provided with an emitter electrode (E) electrically connected to an emitter region (16) and a base layer (12), a collector electrode (C) electrically connected to a collector layer (19), and a sensing electrode (S) electrically connected to the well layer (17), a first carrier is supplied from the emitter electrode (E) to the drift layer (11) by applying a prescribed voltage to a gate electrode (15), and a second carrier is supplied from the collector electrode (C) to the drift layer (11), and a part of the second carrier supplied to the drift layer (11) flows to the well layer (17).

Description

Cross-reference of related applications

[0001] This application is based on Japanese Patent Application No. 2023-196771, filed on November 20, 2023, the contents of which are incorporated herein by reference. Technical Field

[0002] This disclosure relates to semiconductor devices. Background Technology

[0003] Conventionally, semiconductor devices have been proposed that have a main cell region where a main element is formed and a sensing cell region where a sensing element is formed (for example, see Patent Document 1). Specifically, the main element and the sensing element in this semiconductor device are configured by forming an IGBT (Insulated Gate Bipolar Transistor) element having the same structure, such as a gate structure or an emitter region. Furthermore, the main element and the sensing element (i.e., the main cell region and the sensing cell region) are formed in a predetermined area ratio. Moreover, this semiconductor device includes a temperature detection unit that detects the temperature of the semiconductor substrate where the main element and the sensing element are formed.

[0004] In such a semiconductor device, the current flowing through the main component is detected as follows: A sensing resistor is connected in series with a sensing element in the semiconductor device. Furthermore, when detecting the current flowing through the main component, a control unit performing prescribed processing uses the voltage across the sensing resistor as a detection voltage, and detects the current flowing through the main component based on this detection voltage.

[0005] More specifically, when the main component and the sensing element have the same structure, the current flowing to the main component and the current flowing to the sensing element depend on the area ratio of the main component and the sensing element. Therefore, the main current flowing through the main component is derived from the sensing current (i.e., the detection voltage) flowing through the sensing element and the area ratio of the main component and the sensing element. At this time, the control unit performs a correction using the temperature detected by the temperature detection unit and detects the current flowing through the main component.

[0006] Existing technical documents Patent documents Patent Document 1: Japanese Patent Application Publication No. 2006-271098 Summary of the Invention

[0007] However, in structures with a temperature sensing element, the structure can become complex. Furthermore, the inventors have investigated a semiconductor device that, without a temperature sensing element, can reduce the impact of temperature even without temperature correction.

[0008] The purpose of this invention is to provide a semiconductor device that can reduce the effects of temperature even without temperature correction.

[0009] According to one aspect of this disclosure, a semiconductor device is provided, comprising a main cell region having a main element formed thereon and a sensing cell region having a sensing element formed thereon. A detection unit is connected to the sensing element and detects a main current flowing through the main element based on the detection result of the detection unit. The main element and the sensing element have a semiconductor substrate including a drift layer of a first conductivity type. The main element has: a base layer of a second conductivity type formed on the drift layer; an emitter region of the first conductivity type formed on the surface portion of the base layer, wherein the impurity concentration is higher than that of the drift layer; and a gate insulating film disposed on the surface of the base layer disposed between the emitter region and the drift layer. The semiconductor device comprises: a gate electrode layer disposed on a gate insulating film; and a collector layer of a second conductivity type formed on the side opposite to the base layer, separated by a drift layer; a sensing element having a well layer of a second conductivity type formed on the drift layer; an emitter electrode electrically connected to an emitter region and a base layer; a collector electrode electrically connected to a collector layer; and a sensing electrode electrically connected to the well layer; wherein a first charge carrier is supplied from the emitter electrode to the drift layer by applying a predetermined voltage to the gate electrode layer, and a second charge carrier is supplied from the collector electrode to the drift layer; a portion of the second charge carriers supplied to the drift layer flows through the well layer.

[0010] Therefore, a well layer is formed on the drift layer in the sensing cell region, and when the main cell region is in the on state, a portion of the second charge carriers flows into the well layer. In this case, the detection result of the detection unit connected to the sensing element is based on the second charge carriers, and this detection result is not affected by temperature. Therefore, according to this semiconductor device, when the main current is detected based on the detection result of the detection unit connected to the sensing element, the main current can be detected with reduced temperature influence even without temperature correction.

[0011] Furthermore, the bracketed reference numerals used to indicate each constituent element, etc., represent an example of the correspondence between that constituent element, etc., and the specific constituent elements, etc., described in the embodiments described later. Attached Figure Description

[0012] Figure 1 This is a cross-sectional view of the semiconductor device in the first embodiment.

[0013] Figure 2 This is a diagram showing the hole current when a semiconductor device is turned on.

[0014] Figure 3 This is a circuit diagram for detecting the current flowing through the main component.

[0015] Figure 4 This is a diagram representing a semiconductor device used for simulation.

[0016] Figure 5A This is a graph representing the hole current density at 25°C.

[0017] Figure 5B This is a graph representing the hole current density at 90°C.

[0018] Figure 5C This is a graph representing the hole current density at 150°C.

[0019] Figure 6 This is a graph showing the relationship between the collector current and the detection voltage of the semiconductor device in the first embodiment.

[0020] Figure 7 This is a graph showing the relationship between the collector current and the detection voltage of the semiconductor device in the comparative example.

[0021] Figure 8 It is a graph showing the relationship between temperature and temperature characteristic ratio.

[0022] Figure 9A This is a graph representing the electron current density at 25°C.

[0023] Figure 9B This is a graph representing the electron current density at 90℃.

[0024] Figure 9C This is a graph representing the electron current density at 150℃.

[0025] Figure 10 This is a graph showing the relationship between the distance ratio and the detection voltage.

[0026] Figure 11 This is a cross-sectional view of the semiconductor device according to the second embodiment.

[0027] Figure 12 This is a cross-sectional view of a semiconductor device in a variation of the second embodiment. Detailed Implementation

[0028] Hereinafter, embodiments of the present disclosure will be described based on the accompanying drawings. Furthermore, in the following embodiments, the same or equivalent parts will be described using the same reference numerals.

[0029] (First Implementation) The first embodiment will be described with reference to the accompanying drawings. Furthermore, the semiconductor device of this embodiment is suitable for installation in vehicles such as automobiles, and can be used as a device for driving various electronic devices for the vehicle.

[0030] like Figure 1As shown, the semiconductor device of this embodiment has a main cell region Rm on which a main element Me is formed and a sensing cell region Rs on which a sensing element Se is formed. In addition, the main cell region Rm and the sensing cell region Rs are formed with a predetermined area ratio (for example, thousands:1).

[0031] The semiconductor device is constructed using a semiconductor substrate 10, which has N - A drift layer 11 of type 10 is provided. Furthermore, the thickness of the semiconductor substrate 10 in this embodiment is approximately 130 μm. In the main cell region Rm, a P-type base layer 12 with a relatively low impurity concentration is disposed on the drift layer 11. In this embodiment, the base layer 12 has an outer edge base layer 12a on the sensing cell region Rs side and an inner edge base layer 12b located on the inner edge side of the outer edge base layer 12a. Moreover, the depth of the outer edge base layer 12a is deeper than that of the inner edge base layer 12b, so as to suppress electric field concentration at the outer edge side of the main cell region Rm. Hereinafter, in the semiconductor substrate 10, the surface on the base layer 12 side will be designated as one surface 10a of the semiconductor substrate 10, and the surface located on the opposite side of one surface 10a will be designated as another surface 10b.

[0032] In the semiconductor substrate 10, a plurality of trenches 13 are formed in the main cell region Rm, extending from one side 10a through the base layer 12 to the drift layer 11. Furthermore, the base layer 12 in the main cell region Rm is divided into multiple trenches 13. Additionally, the plurality of trenches 13 are oriented in one of the directions of one side 10a of the semiconductor substrate 10 (i.e., Figure 1 The trenches 13 are arranged in a stripe-like pattern at equal intervals along the length direction (the depth direction of the paper surface). Furthermore, the portion of the base layer 12 located on the sensing unit region Rs side of the trenches 13 at an end that intersects with a direction is the outer edge base layer 12a. This intersecting direction can also be referred to as the arrangement direction of the trenches 13.

[0033] Each trench 13 is filled with a gate insulating film 14 formed to cover the walls of each trench 13, and a gate electrode layer 15 made of polysilicon or the like formed on the gate insulating film 14. This constitutes a trench gate structure. Furthermore, in this embodiment, the portion of the trench 13 wall that exposes the base layer 12 corresponds to the surface of the base layer 12 disposed between the emitter region 16 and the drift layer 11.

[0034] In the main unit region Rm, N is formed on the surface of the base layer 12. + The emitter region 16 is of the type described above. Specifically, the emitter region 16 is formed along the length of the trench 13 with a higher impurity concentration than the drift layer 11. Furthermore, although in Figure 1Although not specifically illustrated, a portion of the surface layer of the base layer 12, located opposite to the trench 13 and separated from the emitter region 16, may have a P-type impurity concentration higher than that of the base layer 12. + Type of contact area.

[0035] In the sensing cell region Rs, a P-type well layer 17 is formed on the drift layer 11. In this embodiment, the well layer 17 is formed at a distance d from the base layer 12. Therefore, in this embodiment, the drift layer 11 is disposed between the well layer 17 and the base layer 12. In other words, in the semiconductor device of this embodiment, an intermediate region Rt in which neither the base layer 12 nor the well layer 17 is formed is disposed between the main cell region Rm and the sensing cell region Rs.

[0036] Furthermore, in this embodiment, the well layer 17 is set to have the same impurity concentration as the outer edge base layer 12a in the main cell region Rm, and the same depth as the outer edge base layer 12a. Therefore, the well layer 17 is formed by the same process as that used to form the outer edge base layer 12a.

[0037] Furthermore, in the main cell region Rm, the base layer 12 and the emitter region 16 are connected to the emitter electrode E, and the gate electrode layer 15 is connected to the gate electrode G. In the sensing cell region Rs, the well layer 17 is connected to the sensing electrode S.

[0038] In the main cell region Rm and the sensing cell region Rs, an N-type field cutoff layer (hereinafter referred to as the FS layer) 18 is formed on the side of the drift layer 11 opposite to the base layer 12 side (i.e., the other side 10b side of the semiconductor substrate 10). This FS layer 18 is not necessary, but it is provided to improve the breakdown voltage and steady-state loss performance by preventing the expansion of the depletion layer, and to control the amount of holes injected from the other side 10b side of the semiconductor substrate 10.

[0039] A p-type collector layer 19 is formed on the side opposite to the drift layer 11, separated from the FS layer 18. Furthermore, the collector layer 19 is connected to the collector electrode C.

[0040] The above describes the structure of the semiconductor device according to this embodiment. Furthermore, in this embodiment, N-type, N... - Type, N + Type P is equivalent to the first conductivity type, P-type, P-type + This type corresponds to the second conductivity type. Furthermore, in such a semiconductor device, as described above, the semiconductor substrate 10 comprises a collector layer 19, an FS layer 18, a drift layer 11, a base layer 12, an emitter region 16, etc. In addition, while the semiconductor device is not described in detail above, it is formed with end structures such as a protective ring that surrounds the main cell region Rm and the sensing cell region Rs.

[0041] Next, the operation of such a semiconductor device and the main current (i.e., collector current IC) flowing through the main cell region Rm will be explained, and the structure will be described in more detail.

[0042] In this embodiment, if a voltage lower than that of the collector electrode C is applied to the emitter electrode E, and a voltage higher than or equal to the threshold voltage of the insulating gate structure is applied to the gate electrode layer 15, an N-type inversion layer (i.e., a channel) is formed in the portion of the base layer 12 that contacts the trench 13. Furthermore, in the main cell region Rm, electrons are supplied from the emitter region 16 to the drift layer 11 via the inversion layer, and holes are supplied from the collector layer 19 to the drift layer 11. Through conductivity modulation, the resistance of the drift layer 11 decreases, resulting in a conducting state where the collector current IC flows. In this embodiment, electrons are equivalent to first charge carriers, and holes are equivalent to second charge carriers.

[0043] Here, in the energy band, compared to the N-type, the P-type has lower energy for holes supplied to the drift layer 11, therefore a portion of the holes supplied to the drift layer 11 becomes a hole current flowing into the P-type layer. Furthermore, in this embodiment, a P-type base layer 12 is formed in the main cell region Rm, and a P-type well layer 17 is formed in the sensing cell region Rs. Therefore, as... Figure 2 As shown, the hole current is divided into the main hole current MH flowing through the base layer 12 of the main cell region Rm and the sensing hole current SH flowing through the well layer 17 of the sensing cell region Rs. Furthermore, the main hole current MH and the sensing hole current SH flow in a predetermined ratio according to the impurity concentration of the drift layer 11, the base layer 12, and the well layer 17.

[0044] Furthermore, the main current (i.e., collector current IC) of the main cell region Rm in the semiconductor device of this embodiment uses Figure 3 Such a circuit structure is used for detection. Specifically, in this circuit structure, a detection resistor R, which is composed of a shunt resistor, is provided as a detection unit between the sensing electrode S of the sensing element Se and the emitter electrode E of the main element Me.

[0045] Furthermore, the main current flowing in the main element Me is detected by a control unit (not shown) based on the voltage across the detection resistor R, i.e., the detection voltage Vs. More specifically, firstly, the sensing current flowing through the sensing element Se is detected based on the detection voltage Vs. In this embodiment, the sensing current is the sensing hole current SH. Also, in this embodiment, the detection voltage Vs corresponds to the detection result.

[0046] Here, the inventors use Figure 4 The model shown in the figure has been studied in detail for hole current density, and the results are obtained. Figures 5A-5C The results are shown. Figures 5A-5C As shown, it was confirmed that the hole current density remained almost unchanged even with temperature variations. Furthermore, Figure 4 The model shown sets the area ratio of the main unit region Rm to the sensing unit region Rs to be 30:1.

[0047] Furthermore, the inventors obtained the relationship between the collector current IC (i.e., the main current) flowing through the main cell region Rm when the temperature changes and the detection voltage Vs of the detection resistor R. Figure 6 The results are shown. Figure 6 As shown, it was confirmed that the detection voltage Vs is almost independent of temperature.

[0048] If a conventional semiconductor device with the same structure as the main cell region Rm is used as a comparative example semiconductor device, then in the comparative example semiconductor device, such as Figure 7 As shown, it was confirmed that the detection voltage Vs varies significantly with temperature.

[0049] also, Figure 6 as well as Figure 7 The detection voltage Vs is the result when the resistance of the detection resistor R is set to 1Ω. Additionally, Figure 6 as well as Figure 7 This is the result when the distance d is set to 13 μm. In other words, setting the distance d to 13 μm means setting the distance d to approximately 10% of the thickness of the semiconductor substrate 10.

[0050] Furthermore, if the detection voltage Vs at 25°C is set as the reference for the temperature characteristic ratio (i.e., the temperature characteristic ratio is 1), then as follows: Figure 8 As shown, in the semiconductor device of this embodiment, it was confirmed that the temperature characteristic ratio remains almost unchanged even with temperature variations. However, in the semiconductor device of the comparative example, it was confirmed that the temperature characteristic ratio increases with increasing temperature. Furthermore, Figure 8 The temperature characteristic ratio is the result under the condition that the resistance of the sensing resistor R is 1Ω and the collector current IC is 925A. Additionally, Figure 8 This is the result when the distance d is set to 13μm.

[0051] Furthermore, the inventors, etc., have made provisions for... Figure 4 The model shown also conducted an in-depth study of electron current density, and obtained... Figures 9A to 9C The result. For example... Figures 9A to 9C As shown, regarding electron current density, similarly to hole current density, it was confirmed that electron current density remains almost unchanged even with temperature variations.

[0052] Furthermore, the electron current and hole current flowing through the main cell region Rm flow in a predetermined ratio according to the impurity concentrations of the drift layer 11, base layer 12, and emitter region 16. Therefore, in this embodiment, the ratio of the main hole current MH to the sensed hole current SH is investigated in advance through experiments, and the ratio of the main hole current MH to the electron current in the main cell region Rm is also investigated in advance. When detecting the collector current IC flowing through the main cell region Rm, the main current is detected based on the previously investigated ratio of the main hole current MH to the sensed hole current SH, and the ratio of the main hole current MH to the electron current in the main cell region Rm. That is, the sensed hole current SH is derived from the detection voltage Vs, and the main hole current MH is derived from the sensed hole current SH. Furthermore, the main current flowing through the main cell region Rm is detected by deriving the electron current from the main hole current MH. Since the hole current density and electron current density are not affected by temperature as described above, there is no particular need for circuitry for temperature correction. That is, the semiconductor device according to this embodiment can detect the main current while reducing the influence of temperature, even without temperature correction.

[0053] Furthermore, in the semiconductor device of this embodiment, as described above, the sensing hole current SH flows into the well layer 17 of the sensing cell region Rs. In this case, if the distance d between the sensing cell region Rs and the main cell region Rm is too wide, the sensing hole current SH may have difficulty entering the well layer 17, and the detection voltage Vs may become too small. Therefore, the inventors set the ratio of distance d to the thickness of the semiconductor substrate 10 as the distance ratio, and conducted an in-depth study on the relationship between the distance ratio and the detection voltage Vs, obtaining... Figure 10 The results are shown. Additionally... Figure 10 The detection voltage Vs is the result of setting the resistance of the detection resistor R to 1Ω and the collector current IC to 925A at 25℃.

[0054] like Figure 10 As shown, it was confirmed that when the distance ratio is 0.1 or less, the detection voltage Vs increases as the distance ratio increases. Furthermore, it was confirmed that when the distance ratio is greater than 0.1, the detection voltage Vs decreases as the distance ratio increases; when the distance ratio is 4 or greater, the detection voltage Vs decreases compared to the case where the distance ratio is 0. Therefore, when the main unit region Rm and the sensing unit region Rs are separated as in this embodiment, the distance d between the main unit region Rm and the sensing unit region Rs is preferably adjusted to a distance ratio of 4 or less.

[0055] Furthermore, the decrease in the detection voltage Vs when the distance ratio is 0 (i.e., when the well layer 17 and the base layer 12 are connected) is due to the following phenomenon. That is, when the distance ratio is 0, the detection voltage Vs decreases. Figure 3In such a circuit structure for detecting the detection voltage Vs, if the well layer 17 is connected to the base layer 12, the resistance between the well layer 17 and the base layer 12 is likely to be smaller than the detection resistor R. Furthermore, after the sensed hole current SH flows in the well layer 17, a portion of it detaches from the base layer 12 in the main cell region Rm. Therefore, when the distance ratio is 0, the sensed hole current SH flowing in the detection resistor R decreases, thus assuming that the detection voltage Vs becomes smaller.

[0056] Therefore, if the detection voltage Vs is smaller than the desired value, it is preferable to adjust the magnitude of the detection voltage Vs appropriately by increasing the resistance value of the detection resistor R. However, if the resistance value of the detection resistor R is too high, the potential difference between the sensing electrode S and the emitter electrode E becomes too large, and this potential difference may exceed the withstand voltage between the well layer 17 and the base layer 12. Therefore, when adjusting the resistance value of the detection resistor R, it is preferable to also consider the withstand voltage between the well layer 17 and the base layer 12. Specifically, the resistance value of the detection resistor R is preferably such that the potential of the sensing electrode S is lower than the collector-emitter voltage of the main cell region Rm.

[0057] According to the embodiment described above, a P-type well layer 17 is formed on the drift layer 11 in the sensing unit region Rs. When the main unit region Rm is in the on state, a portion of the hole current flows into the well layer 17. Furthermore, when the sensing unit region Rs is connected to the sensing resistor R, and the voltage across the sensing resistor R is detected as the detection voltage Vs, the detection voltage Vs is not affected by temperature. Therefore, by detecting the main current flowing through the main unit region Rm based on this detection voltage Vs, the main current can be detected with reduced temperature influence even without temperature correction.

[0058] (1) In this embodiment, the well layer 17 formed in the sensing cell region Rs is formed separately from the base layer 12 formed in the main cell region Rm. Therefore, holes flowing into the well layer 17 are difficult to detach from the base layer 12, and the detection voltage Vs can be easily increased.

[0059] (2) In this embodiment, by setting the distance ratio to 4 or less, the detection voltage Vs can be increased compared to the case where the well layer 17 and the base layer 12 are connected.

[0060] (Second Implementation) The second embodiment will be described. In this embodiment, compared to the first embodiment described above, the well layer 17 is connected to the base layer 12. Everything else is the same as in the first embodiment, and therefore, descriptions are omitted here.

[0061] In the semiconductor device of this embodiment, such as Figure 11As shown, the base layer 12 of the main cell region Rm is connected to the well layer 17 of the sensing cell region Rs. That is, the distance d between the main cell region Rm and the sensing cell region Rs is 0, and the intermediate region Rt described in the first embodiment is not disposed between the main cell region Rm and the sensing cell region Rs. Moreover, in this embodiment, the well layer 17 is set to the same depth as the outer edge base layer 12a. Furthermore, when using such a semiconductor device, as explained in the first embodiment, the detection voltage Vs tends to become smaller. Therefore, in this embodiment, it is preferable to appropriately adjust the resistance value of the detection resistor R.

[0062] According to the embodiment described above, a P-type well layer 17 is formed on the drift layer 11 in the sensing unit region Rs, so the same effect as the first embodiment described above can be obtained.

[0063] (1) In this embodiment, the well layer 17 is connected to the base layer 12, and no intermediate region Rt is disposed between the main cell region Rm and the sensing cell region Rs. Therefore, miniaturization of the semiconductor device can be achieved, and the breakdown voltage design related to the intermediate region Rt is not required, thus simplifying the structure.

[0064] (A variation of the second embodiment) A variation of the second embodiment described above will be described. In the second embodiment described above, as... Figure 12 As shown, the well layer 17 can also have the same depth as the inner edge base layer 12b. That is, the depth of the well layer 17 can be non-uniform, and the depth can be adjusted according to the withstand voltage design. For example, in Figure 12 In this configuration, a portion of the well layer 17 at the same depth as the inner edge base layer 12b is formed between the deeper portion of the well layer 17 and the base layer 12. With this structure, the same effects as the second embodiment described above can be achieved.

[0065] (Other implementation methods) This disclosure describes embodiments, but it should be understood that this disclosure is not limited to those embodiments or structures. This disclosure also includes various modifications and equivalent variations. In addition, various combinations, methods, and other combinations or methods that include only one element or more of them also fall within the scope and spirit of this disclosure.

[0066] For example, in the above embodiments, examples of setting the first conductivity type to N type and the second conductivity type to P type have been described, but it is also possible to set the first conductivity type to P type and the second conductivity type to N type.

[0067] In addition, in the above embodiments, the semiconductor device may not be a trench gate type, but a planar type in which the gate electrode layer 15 is disposed on one side 10a of the semiconductor substrate 10.

[0068] Furthermore, in the above embodiments, the detection unit connected to the sensing electrode S may not be the detection resistor R, but a current mirror circuit or the like.

Claims

1. A semiconductor device having a main cell region (Rm) on which a main element (Me) is formed and a sensing cell region (Rs) on which a sensing element (Se) is formed, a detection unit (R) connected to the sensing element, and detecting a main current flowing through the main element based on the detection result of the detection unit, the semiconductor device being characterized in that, The main element and the sensing element have a semiconductor substrate (10) containing a drift layer (11) of a first conductivity type. The main component has: A base layer (12) of the second conductivity type is formed on the drift layer; The emitter region (16) of the first conductivity type is formed on the surface of the base layer and has a higher impurity concentration than the impurity concentration of the drift layer. A gate insulating film (14) is disposed on the surface of the base layer disposed between the emitter region and the drift layer; A gate electrode layer (15) is disposed on the gate insulating film; as well as A collector layer (19) of the second conductivity type is formed on the side opposite to the base layer, separated from the drift layer. The sensing element has a second conductivity type well layer (17) formed on the drift layer. The semiconductor device includes: An emitter electrode (E) is electrically connected to the emitter region and the base layer; Collector electrode (C), which is electrically connected to the collector layer; and The sensing electrode (S) is electrically connected to the well layer. By applying a predetermined voltage to the gate electrode layer, a first charge carrier is supplied from the emitter electrode to the drift layer, and a second charge carrier is supplied from the collector electrode to the drift layer. A portion of the second charge carriers supplied to the drift layer flows through the well layer.

2. The semiconductor device according to claim 1, characterized in that, The well layer is separated from the base layer of the main cell region.

3. The semiconductor device according to claim 2, characterized in that, When the ratio of the distance (d) between the well layer and the base layer to the thickness of the semiconductor substrate is set as the distance ratio, the distance ratio of the well layer is 4 or less.

4. The semiconductor device according to claim 1, characterized in that, The well layer is connected to the base layer of the main cell region.

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