An integrated signal processor testing system and its automatic testing method

Abstract

This invention discloses an integrated signal processor testing system and its automatic testing method, including a host computer, a test control device, and an oscilloscope. The test control device is electrically connected to both the host computer and the oscilloscope. The test control device receives control commands from the host computer, generates and applies one or more test signals to the product under test (DUT), acquires the response signals of the DUT, and aggregates the measurement data from the oscilloscope and uploads it to the host computer. During automatic testing, one or more composite signals are generated based on user-set timing parameters, signal characteristic parameters, and response parameters, simultaneously executing simulated Doppler signal generation and laser pulse response. Furthermore, during the testing process, the output response of the DUT under the excitation signal is captured, and the output signal waveform is transmitted to the oscilloscope for waveform capture and parameter measurement, and then uploaded in real time to the host computer for display, recording, and pass / fail determination.

Description

Technical Field

[0001] This invention relates to the field of automated testing and diagnostic equipment, specifically an integrated signal processor testing system and its automated testing method. Background Technology

[0002] With the rapid development of aerospace, military electronics, and high-end industrial manufacturing, the complexity and integration of electronic systems are increasing daily, placing extremely high demands on the testing accuracy, reliability, and automation level of supporting testing equipment. Integrated signal processors, with radar and communication systems at their core, are becoming increasingly comprehensive, typically involving complex analog, digital, and radio frequency signal interactions. Traditional testing methods are no longer sufficient to meet their efficient and comprehensive testing needs.

[0003] In the existing technology, the testing of signal processors usually adopts a test platform built by combining single-function benchtop instruments, such as independent signal sources, high-precision multimeters, oscilloscopes, etc.

[0004] This type of distributed testing system typically consists of multiple independent instruments connected by cables. Its low system integration and complex connections not only make deployment inconvenient but also easily introduce errors due to connectivity issues, resulting in low testing efficiency and making it unsuitable for field or mass production testing environments. Furthermore, system-level testing of signal processors often requires multiple test signals, such as Doppler analog signals and control pulses, with precise synchronous output and simultaneous acquisition of multiple parameters. Traditional distributed equipment is weak in signal timing control and trigger synchronization, making it difficult to guarantee the accuracy and consistency of the tests.

[0005] The interfaces of multiple independent devices are not specifically designed for signal processors and often require additional adapter or conditioning circuitry, further increasing the complexity and uncertainty of the system.

[0006] Therefore, there is an urgent need in this field for a highly integrated, automated, and targeted dedicated test device that can modularly integrate functions such as signal generation, static parameter measurement, and dedicated signal conditioning to address the prominent challenges faced by existing test solutions in terms of efficiency, accuracy, and systemicity. Summary of the Invention

[0007] To address the problems existing in the prior art, this invention proposes an integrated signal processor testing system and its automatic testing method. The testing system uses direct digital frequency synthesis (DDS) technology to generate a reference signal and can generate various excitation signals, including continuous wave, pulse modulation signal, and complex Doppler frequency shift simulated echo signal. It can also simulate laser pulse triggering and echo response, and can comprehensively cover the functional and performance testing requirements of signal processors in complex working scenarios.

[0008] The first aspect of this invention provides an integrated signal processor testing system, comprising a host computer, a test control device, and an oscilloscope; the test control device is electrically connected to the host computer and the oscilloscope, respectively, and is used to receive control commands from the host computer, acquire response signals of the product under test, and collect measurement data from the oscilloscope and upload it to the host computer; wherein, the host computer is an integrated all-in-one machine, which integrates a digital multimeter card and a multi-functional data acquisition card; the test control device is used to receive control commands from the host computer, generate and apply one or more test signals to the product under test, and acquire response signals of the product under test; it includes a signal generation unit, the signal generation unit comprising at least:

[0009] The command distribution subunit is used to receive and parse the configuration parameters and control commands from the host computer, and distribute them to the corresponding subunits;

[0010] The timing control subunit, connected to the command distribution subunit, is used to control the generation time, duration, and relative delay between signals in the test process according to the received timing parameters.

[0011] The fundamental frequency DDS subunit, connected to the command distribution subunit, is used to generate a reference continuous wave signal;

[0012] A pulse modulation subunit is used to pulse modulate the reference continuous wave signal to generate a pulse modulated signal;

[0013] The Doppler carrier frequency DDS subunit, connected to the command distribution subunit, is used to generate a carrier signal with analog Doppler frequency shift based on the reference continuous wave signal;

[0014] The quadrature mixing subunit is used to orthogonally mix the pulse modulation signal generated by the pulse modulation subunit with the carrier signal generated by the Doppler carrier frequency DDS subunit to generate a test signal containing the Doppler frequency shift effect.

[0015] The output selection subunit is used to select one signal as the final output according to the instructions of the command distribution subunit.

[0016] The gain control subunit is used to programmatically adjust the amplitude of the selected output signal.

[0017] The test control device is connected to the product under test via a dedicated test cable, and is used to apply the test signal containing the Doppler frequency shift effect to the product under test, and to receive the laser pulse echo signal emitted by the product under test.

[0018] The test control device is further configured to: while applying a test signal to the test product, monitor the laser pulse trigger signal in real time, and after detecting the rising edge of the trigger pulse, generate a corresponding simulated laser echo pulse signal based on the preset trigger delay and pulse width and feed it back to the test product.

[0019] In one embodiment, the integrated signal processor test system includes: a host computer, a test control device, a power supply unit, and an oscilloscope;

[0020] The host computer is used for loading test parameters, controlling the test process, and displaying, recording, and analyzing test data.

[0021] The test control device is electrically connected to the host computer, the power supply unit, and the oscilloscope, and is connected to the product under test via a dedicated test cable. The test control device is used to receive control commands from the host computer, generate and apply various test signals to the product under test, collect the response signals of the product under test, and collect the measurement data from the oscilloscope and upload it to the host computer.

[0022] The power supply unit is used to provide working power to the test system and to power the product under test;

[0023] The oscilloscope is used to capture waveforms and measure parameters of the output signal of the conditioned product under test from the test control device, and to output waveform data to the host computer.

[0024] The test control device includes:

[0025] The signal generation unit is used to generate test signals including continuous sine waves, pulse modulation signals, specific timing control step signals (ZP signals), and analog echo signals with Doppler frequency shift according to the configuration parameters sent by the host computer, and is responsible for the full timing control in automatic test mode.

[0026] An LVDS signal conditioning unit is used to convert the differential LVDS signal output by the product under test into a single-ended signal for measurement by the oscilloscope.

[0027] A communication and interface unit is used to enable instruction and data interaction with the test product;

[0028] The product power module is used to provide the tested product with high-precision, low-ripple operating power.

[0029] The oscilloscope matrix unit is used to route and select multiple signals from the LVDS signal conditioning unit, the product under test, and the host computer, and output them to the oscilloscope.

[0030] Furthermore, the test control device also includes a static resistance test unit, which is used to automatically scan the static resistance to ground of each pin of the dedicated test cable through a relay matrix.

[0031] Furthermore, the dedicated test cable is a 51-core interface cable, serving as a bidirectional interface:

[0032] In the output direction, a +5V power supply is provided to the product under test, and a ZP beam-off step signal, an unlock command, and various test excitation signals generated by the signal generation unit are sent.

[0033] In the input direction, the laser pulse trigger signal, LVDS differential signal and RS422 communication response generated by the test product are received.

[0034] A second aspect of the present invention provides an automatic testing method for an integrated signal processor, applied to the aforementioned integrated signal processor testing system, comprising:

[0035] Step 1: The drive power control circuit supplies power to the product under test and continuously receives the self-test data stream from the product under test; it parses the self-test data stream in real time and retrieves the predetermined pass flag bit; if the pass flag bit is successfully detected within a preset time, it feeds back the self-test pass status to the host computer and proceeds to the next step; otherwise, it reports an error message.

[0036] Step 2: Receive the timing parameters, signal characteristic parameters, and response parameters set by the user for the current test; enter the automatic test state according to the issued automatic test command;

[0037] Step 3: Based on the timing parameters received in Step 2, start the first timer to enter the standby waiting period; take the end time of the first timer as the first trigger time, generate and apply an initialization control signal to the product under test at the first trigger time, so that it enters the testable state;

[0038] Subsequently, a second timer is started to enter the device response waiting period, which serves as the internal response and processing time of the test product to the initialization control signal;

[0039] Step 4: Using the end time of the second timer as the second trigger time, send a preset unlock command to the product under test through the communication and interface unit. After confirming the correct response signal, the test channel is determined to be successfully established.

[0040] Step 5: Enter the signal testing stage. Based on the signal characteristic parameters received in Step 2, generate one or more composite signals and simultaneously execute the steps of simulating Doppler signal generation and laser pulse response.

[0041] The simulated Doppler signal generation involves: generating a reference continuous wave based on preset signal characteristic parameters, selectively pulse-modulating it to generate a pulse-modulated signal and / or generating a carrier signal with a frequency shifted according to a preset rule; and selectively performing orthogonal mixing processing on the generated pulse-modulated signal and carrier signal to generate a test signal containing the Doppler frequency shift effect, which is then output to the test product after process-controlled gain adjustment.

[0042] Laser pulse response: While simulating the generation of Doppler signals, the laser pulse trigger signal emitted by the product under test is monitored in real time; once the rising edge of the trigger pulse is detected, after a preset trigger delay and a preset pulse width, a corresponding simulated laser echo pulse signal is immediately generated and sent to the product under test.

[0043] Step Six: During the test, capture the output response of the test product under the excitation signal, output the signal waveform to the oscilloscope for waveform capture and parameter measurement, and upload it to the host computer in real time for display, recording and qualification judgment.

[0044] Furthermore, the timing parameters include initial delay, signal trigger time, single signal duration, and continuous signal period; the signal characteristic parameters include the frequency and amplitude of the basic signal, the required simulated Doppler frequency shift value (frequency change), and the width and repetition frequency of the pulse modulation signal; the response parameters are preset with respect to the delay and pulse characteristics of the simulated echo signal for the laser pulse that the product under test may emit.

[0045] Furthermore, the testing method further includes the following after step five:

[0046] The testing phase in step five continues until the preset test conditions are met or a termination test command is received from the host computer. Upon receiving the termination command, the system stops all signal outputs but remains in the automatic test mode of step two to quickly restart the test process.

[0047] Furthermore, the mode-locked test state mentioned in step two refers to the mutual exclusion between automatic test mode and manual mode, where the system does not respond to control commands of the other mode when running in one mode.

[0048] Furthermore, in step three, the initialization control signal is the ZP beam-off step signal, which is defined as a 0-5V output step control signal, where 0-0.6V is a low level, 3.6-5V is a high level, current consumption is ≤1mA, and static impedance to GND is ≥10kΩ.

[0049] Furthermore, in step three, the delay range of the standby waiting period for starting the first timer and the device response waiting period for starting the second timer is 200ms-2s, with a tuning step of 10ms.

[0050] Furthermore, in the laser pulse response process of step five, it supports responding to no less than 20 consecutive trigger pulse trains and generating corresponding echo pulse trains.

[0051] A third aspect of the present invention provides a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements an automatic testing method for the integrated signal processor test system as described above.

[0052] The beneficial effects of this invention are as follows:

[0053] The testing system can generate a variety of excitation signals, including continuous wave, pulse modulation signal, and complex Doppler frequency shift simulated echo signal, and can simulate laser pulse triggering and echo response, which can fully cover the functional and performance testing requirements of signal processors in complex working scenarios.

[0054] The test system integrates multiple functions such as signal generation, signal conditioning, power management, interface communication, and signal routing into a unified test control device, which is controlled by a host computer. This enables one-click automatic testing of the product under test, significantly reducing the number of external devices, simplifying test wiring, and improving test efficiency and system reliability. Attached Figure Description

[0055] Figure 1 This is a schematic diagram of the integrated signal processor test system described in this invention;

[0056] Figure 2 This is a working framework diagram of the test control device of the integrated signal processor test system;

[0057] Figure 3 This is a schematic diagram of the signal generation unit of the test control device;

[0058] Figure 4 This is a flowchart of the automatic testing method for the integrated signal processor test system. Detailed Implementation

[0059] To make the objectives, technical solutions, beneficial effects, and significant advancements of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings provided in the examples of the present invention. Obviously, all the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0060] In the description of this application, unless otherwise expressly specified and limited, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance; the term "multiple" refers to two or more; unless otherwise specified or explained, the terms "connected," "fixed," etc., should be interpreted broadly. For example, "connected" can be a fixed connection, a detachable connection, an integral connection, or an electrical connection; "connected" can be a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0061] like Figure 1 As shown, an integrated signal processor test system includes a power supply unit, a test control device, a host computer, and an oscilloscope. The power supply unit is connected to the power interface on the back panel or inside the test control device via a power cable; the product under test is connected to the power supply unit through the test control device.

[0062] The test control device is electrically connected to the host computer.

[0063] The power supply unit provides energy distribution and management for the entire test system; it supports both DC and AC external input modes, such as AC 220V or DC 24V. The output of the power supply unit provides operating power to the various functional circuits within the test control device (including the product under test); the power supply unit is a +5V / 5A linear power supply.

[0064] The host computer is an integrated portable all-in-one machine, which is equipped with a digital multimeter card (for resistance measurement) and a multi-functional data acquisition card (for signal generation and acquisition).

[0065] The test control device uses an aluminum alloy chassis, with internal circuit boards interconnected via connectors. It runs a Windows system and is the core of the test software. It provides the equipment with test resources such as AD, IO, and digital multimeters, and also provides communication interfaces such as LAN and RS422.

[0066] Oscilloscope: The oscilloscope parameters are set by control commands to test the output pulse signal of the product under test, and to test its parameters such as frequency, amplitude, and pulse width. The output of the oscilloscope is directly connected to the host computer via a USB interface to output the test result waveform data to the host computer. The test software records and displays the test interface.

[0067] The test control device is used to perform functions such as product test signal input, LVDS signal differential to single-ended conversion, pulse and modulated sine wave signal generation, test signal conditioning and switching, product power supply and voltage / current acquisition, automatic testing of product interface static resistance, and manual loading of product control signals and power supply. The test control device connects to the product under test (DUT) via a 51-core dedicated test cable. This interface is bidirectional; when used as an output, it provides +5V power to the DUT, sends various excitation signals (Doppler signals, ZP step signals, unlock commands, etc.), and receives laser pulse echo signals; when used as an input, it receives LVDS differential signals, laser pulse signals, and RS422 communication echoes generated by the DUT. The test control device is electrically connected to the host computer via a test cable.

[0068] like Figure 2-3 As shown, the test control device includes a signal generation unit, an oscilloscope matrix unit, a static resistance test unit, an LVDS signal conditioning unit, a product power supply module, and a communication and interface unit.

[0069] The signal generation unit includes an FPGA and a high-speed DAC chip, used to control the product's power switch, generate ZP beam-free step signals, various test signals, and provide full-process timing and response control in automatic test mode. It generates continuous sine waves, pulse-modulated signals, and complex signals with Doppler frequency shift through the FPGA's internal digital logic modules. The FPGA is used for processing and generating all digital signals. The DAC chip converts the digital waveforms generated by the FPGA into high-precision analog signals with 14-bit resolution and a 500MSPS sampling rate. The signal generation unit communicates and interacts with the host computer via the UDP protocol, and transmits and responds to test signals through a user-specified interface.

[0070] Static resistance test unit: Automatically scans the resistance to ground of each pin of the 51-pin interface using a multimeter card and relay matrix.

[0071] LVDS signal conditioning unit: Converts differential LVDS signals into single-ended signals for oscilloscope measurement.

[0072] Product power module: Provides high-precision, low-ripple power to the device under test, supporting both software and manual control.

[0073] The communication and interface unit uses an RS422 communication interface.

[0074] The oscilloscope matrix unit is electrically connected to the LVDS signal conditioning unit, the product under test, and the oscilloscope, respectively. The oscilloscope matrix unit receives signals from the LVDS signal conditioning unit and the product under test, and outputs these signals to the oscilloscope via matrix switching. The oscilloscope communicates with the host computer via a network port.

[0075] Specifically, such as Figure 3 As shown, the signal generation unit includes a command distribution subunit, a timing control subunit, a period control subunit, a fundamental frequency DDS subunit, a pulse modulation subunit, a Doppler carrier frequency DDS subunit, a quadrature mixing subunit, an output selection subunit, and a gain control subunit.

[0076] The command distribution subunit receives configuration parameters and control instructions from the host computer and is electrically connected to the timing control subunit, the period control subunit, the fundamental frequency DDS subunit, and the Doppler carrier frequency DDS subunit, respectively.

[0077] The command distribution subunit transmits the start / end time points of signal generation and the relative delays between signals (such as ZP signal delay and power-on delay) to the timing control subunit. The command distribution subunit also transmits period-related parameters, including the period length and duration of the pulse modulation signal, to the period control subunit. Finally, the command distribution subunit transmits commands for the base frequency and carrier to the base frequency DDS subunit, enabling the base frequency DDS subunit to generate the base frequency and carrier configured according to the commands issued by the command distribution subunit.

[0078] The command distribution subunit transmits frequency control word values ​​to the Doppler carrier frequency DDS subunit to simulate Doppler frequency shift, and the Doppler carrier frequency DDS subunit is used to generate a Doppler frequency offset carrier configured according to the command.

[0079] The timing control subunit transmits periodic trigger or single-trigger timing signals to the periodic control subunit; the periodic control subunit defines the duration of the single signal and the period of the continuous signal according to the configuration parameters; it can repeatedly trigger the single signal as needed by the host computer command, and automatically terminates after the sinusoidal signal of the specified duration is sent. If it is necessary to stop the signal transmission during the signal transmission process, the signal trigger termination command is executed.

[0080] In continuous transmission mode, the timing control subunit transmits a sinusoidal waveform with a specified frequency, amplitude, frequency offset, and continuous phase until a termination command is received. Unlike the single transmission mode, the timing control subunit does not transmit the duration configuration.

[0081] The fundamental frequency DDS subunit transmits the fundamental frequency carrier to the pulse modulation unit to generate a pulse modulation signal. It includes a DDS chip, a reference clock source, a data converter, and a low-pass filter. The DDS chip is a commercially available chip; the reference clock source provides the system clock for the DDS chip; the data converter is built into the DDS chip and converts the digital waveform into an analog sine wave; and the low-pass filter is connected to the output of the DDS chip for filtering. The quadrature mixer subunit mixes the baseband signal with the Doppler carrier to simulate frequency changes caused by motion. It includes a quadrature mixer, a quadrature signal generator, a summing amplifier, and a bandpass filter. The quadrature mixer receives the signal from the pulse modulation subunit. The quadrature signal generator receives the single-channel carrier signal from the fundamental frequency DDS subunit and generates two carrier signals with consistent amplitude and phase characteristics and strictly orthogonal phase, which are then input to the quadrature mixer. The two signals output from the quadrature mixer are then vector-synthesized and filtered sequentially by the summing amplifier and the bandpass filter. The output selection subunit selects one of the following outputs—a continuous sine wave, a pulse-modulated signal, or an analog Doppler signal—based on the command from the command distribution subunit. The output selection subunit employs logic control circuitry to control the on / off state of the corresponding channel of the analog switch through level conversion and driving. The gain control subunit controls the amplitude of the output signal, including the Doppler analog signal.

[0082] The Doppler analog signal generated by the Doppler carrier frequency DDS subunit includes a single-trigger continuous transmission mode, comprising a DDS chip, a reference clock source, a data converter, and a filter. The DDS chip supports fast frequency switching and linear / nonlinear frequency sweeping, and receives instructions from the command distribution subunit. The reference clock source provides the system clock for the DDS chip. The data converter, built into the DDS chip, converts digital waveforms into analog sine waves. The filter is connected to the output of the DDS chip for filtering. Specifically, the frequency offset Doppler signal modulation frequency is adjustable from 200Hz to 200kHz with a tuning step of 1Hz; the frequency offset Doppler signal frequency deviation range (Doppler frequency) is adjustable from 10Hz to 20kHz with a tuning step of 1Hz; the continuous signal amplitude adjustment range is 0-10Vpp, with a key configuration point (frequency + amplitude) adjustment accuracy of 0.1V; the single signal duration is adjustable from 200µs to 100ms with an adjustment accuracy of 1µs; and it also has an input data checking function to ensure that the modulation carrier period within the frequency offset envelope is not less than 5.

[0083] like Figure 2 As shown, the host computer sends control commands to the test control device, and the control signals are sent to the oscilloscope via the oscilloscope matrix unit. The signal generation subunit generates pulse signals, modulated sine wave signals, ZP beam-off step signals, or analog Doppler signals according to the commands.

[0084] The integrated signal processor test system utilizes the LabVIEW platform to build a visual operating interface, supporting real-time storage and analysis of test data. Furthermore, the integrated signal processor test system includes manual and automatic test modes; in manual test mode, operators manually complete the corresponding tests using additional test control devices. The following describes the test methods of the integrated signal processor test system, including the automatic test method.

[0085] like Figure 4 As shown, the automatic testing method of the integrated signal processor test system includes:

[0086] Step 1: After the system is powered on, it enters self-test mode. After receiving the command, the FPGA of the signal generation unit drives the power control circuit to supply power to the product under test. The device enters self-test state, and the FPGA controls the communication and interface unit (RS422 communication link) of the test control device to continuously monitor the self-test data stream from the product under test.

[0087] The FPGA has a built-in protocol for self-test flags, which parses the data stream in real time and retrieves the predetermined qualified flags.

[0088] If a pass flag is detected, send a "self-test pass" status message to the host computer software and proceed to step two; otherwise, send an error message to the host computer. If no error message is received, continue testing until the host computer sends an automatic test termination command.

[0089] Step 2: The user presets all parameters for this test through the human-computer interaction interface of the host computer, including timing parameters, signal characteristic parameters, and response parameters; the timing parameters include initial delay, signal trigger time, single signal duration, and continuous signal period; the signal characteristic parameters include the frequency and amplitude of the basic signal, the required simulated Doppler frequency shift value (frequency change), and the width and repetition frequency of the pulse modulation signal; the response parameters are preset for the delay and pulse characteristics of the simulated echo signal of the laser pulse that the product under test may emit.

[0090] Based on the user's selection of the automatic test mode, the signal generator receives the "Start Automatic Test" command, turns on the power supply unit, and issues the "Start Automatic Test" command. At this time, the integrated signal processor test system enters a mode-locked test state, in which other unrelated control commands are not accepted.

[0091] Step 3: Based on the timing parameters received in Step 2 (initial delay parameter 500ms, tuning step 10ms), the timing control subunit starts the first timer, executes the first power-on delay, and enters the standby waiting period to ensure the power supply and status stability of the product under test; during this delay period, the system remains stable, waiting for the power supply of the product under test to be fully established and enter the standby ready state.

[0092] The timing control subunit of the signal generation unit generates a ZP (beam-off-beam step) signal as the initialization control signal, with the first delay ending as the first trigger moment. This signal is a step change from low to high level and is applied to the test product through a dedicated 51-pin interface to bring it into a testable state. The ZP signal is defined as a 0-5V output step control signal, with 0-0.6V being low level and 3.6-5V being high level. The current consumption is ≤1mA and the static impedance to GND is ≥10kΩ.

[0093] After the first trigger moment, the timing control subunit restarts the second timer according to the preset secondary delay parameters, and enters a device response waiting period. This delay simulates the response and processing time of the ZP signal inside the test product.

[0094] Step 4: Using the end of the second delay as the second trigger time, send a preset unlock command to the test product through the communication and interface unit;

[0095] After sending the command, the system enters a waiting state and listens for the response signal (return command) returned by the target under test.

[0096] If a correct response is received, the message is reported to the host computer, and step five is executed, which is to enter the formal testing phase; otherwise, the testing continues until the host computer sends an automatic test termination command.

[0097] Step 5: After confirming that the test product is ready, proceed to the signal testing phase. The specific steps are as follows:

[0098] S51: Analog Doppler signal generation

[0099] Based on the signal characteristic parameters received in step two, one or more composite signals are generated and output to the test product.

[0100] S511: Generate a reference continuous wave: Based on the fundamental frequency and amplitude received in step two, generate an initial continuous sine wave signal. This signal serves as the baseband signal source for all subsequent modulation and processing.

[0101] S512: Pulse Modulation: If the test scheme requires a pulse signal, the reference continuous wave generated by S511 is switched and modulated according to the preset pulse width and repetition period to generate the required pulse modulation signal.

[0102] S513: Simulated dynamic frequency shift: Generates a carrier signal whose frequency is shifted according to a preset rule from the reference continuous wave generated by S511;

[0103] S514: Quadrature Mixing Synthesis: The pulse modulation signal generated by S512 and the carrier signal generated by S513 are orthogonally mixed to generate a test signal containing the Doppler frequency shift effect, thereby upconverting the pulse signal and giving it dynamic frequency change characteristics, thus accurately simulating the Doppler frequency shift effect in radar or laser ranging echo.

[0104] S52: Laser pulse response (this process is executed in parallel with S51):

[0105] While simulating the generation of the Doppler signal in step S51, the pulse modulation subunit monitors the laser pulse trigger signal (LFP1-LFP4) emitted by the product under test in real time. Once the rising edge of the trigger pulse is detected, the pulse modulation subunit immediately generates the corresponding echo pulse signal (UL1-UL4) according to the preset trigger delay and preset pulse width and sends it to the product under test. The number of output pulse trains is not less than 20.

[0106] S53: The signal synthesized by S514 is selected by the output selection subunit according to the parameters set in step two. The output is either an unmodulated continuous wave, a pulse-modulated signal, or a complex modulated signal containing Doppler frequency shift.

[0107] The selected signal finally passes through a programmable gain adjustment stage to precisely adjust its output amplitude to the level required for the test, and then it is applied to the corresponding input terminal of the device under test.

[0108] Step Six: During the test, the static resistance is scanned by the static resistance test matrix, and then converted by the LVDS signal conditioning unit and output by the oscilloscope matrix unit. The oscilloscope captures the output waveform of the product under test for waveform capture and parameter measurement, and uploads it to the host computer in real time via the test control device for display, recording and qualification judgment.

[0109] The signal testing phase will continue until the test duration in step five meets the preset duration or a "terminate test" command is received from the host computer.

[0110] If so, all signal generation and response output will stop, but the system as a whole will remain in "automatic test mode". The user can start a new round of testing again from step two through the host computer without reloading the parameters, which greatly facilitates regression testing and fault reproduction.

[0111] If an operator discovers an anomaly during the automated testing process, they can manually issue a "Terminate Automated Testing" command through the software to forcibly interrupt the process.

[0112] In summary, this invention effectively addresses many pain points of traditional testing methods through integrated design that combines hardware and software collaboration, providing an efficient, accurate, and reliable solution for testing high-performance signal processors.

[0113] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style of the specification is merely for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in the embodiments can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. An integrated signal processor testing system, comprising a host computer, a test control device, and an oscilloscope; the test control device is electrically connected to the host computer and the oscilloscope respectively, and is used to receive control commands from the host computer, acquire response signals of the product under test, and collect measurement data from the oscilloscope and upload it to the host computer; wherein, The host computer is an integrated all-in-one machine, which integrates a digital multimeter card and a multi-functional data acquisition card; the test control device is used to receive control commands from the host computer, generate and apply one or more test signals to the test product, and collect the response signals of the test product. Includes a signal generating unit, wherein the signal generating unit includes at least: The command distribution subunit is used to receive and parse the configuration parameters and control commands from the host computer, and distribute them to the corresponding subunits; The timing control subunit, connected to the command distribution subunit, is used to control the generation time, duration, and relative delay between signals in the test process according to the received timing parameters. The fundamental frequency DDS subunit, connected to the command distribution subunit, is used to generate a reference continuous wave signal; A pulse modulation subunit is used to pulse modulate the reference continuous wave signal to generate a pulse modulated signal; The Doppler carrier frequency DDS subunit, connected to the command distribution subunit, is used to generate a carrier signal with analog Doppler frequency shift based on the reference continuous wave signal; The quadrature mixing subunit is used to orthogonally mix the pulse modulation signal generated by the pulse modulation subunit with the carrier signal generated by the Doppler carrier frequency DDS subunit to generate a test signal containing the Doppler frequency shift effect. The output selection subunit is used to select one signal as the final output according to the instructions of the command distribution subunit. The gain control subunit is used to programmatically adjust the amplitude of the selected output signal. The test control device is connected to the product under test via a dedicated test cable, and is used to apply the test signal containing the Doppler frequency shift effect to the product under test, and to receive the laser pulse echo signal emitted by the product under test. The test control device is further configured to: while applying a test signal to the test product, monitor the laser pulse trigger signal in real time, and after detecting the rising edge of the trigger pulse, generate a corresponding simulated laser echo pulse signal based on the preset trigger delay and pulse width and feed it back to the test product.

2. The integrated signal processor test system according to claim 1, characterized in that, The test control device also includes: An LVDS signal conditioning unit is used to convert the differential LVDS signal output by the test product into a single-ended signal. A communication and interface unit is used to enable instruction and data interaction with the test product; The product power module is used to provide the tested product with high-precision, low-ripple operating power. The oscilloscope matrix unit is used to route and select multiple signals from the LVDS signal conditioning unit, the product under test, and the host computer, and output them to the oscilloscope.

3. An automatic testing method for an integrated signal processor, applied to the integrated signal processor testing system according to claim 2, characterized in that, include: Step 1: The drive power control circuit supplies power to the product under test and continuously receives the self-test data stream from the product under test; The self-test data stream is analyzed in real time, and the predetermined qualified flag bits are retrieved. If the qualified flag is successfully detected within the preset time, the self-test qualified status is reported to the host computer and the next step is executed; otherwise, an error message is reported. Step 2: Receive the timing parameters, signal characteristic parameters, and response parameters set by the user for the current test; enter the automatic test state according to the issued automatic test command; Step 3: Based on the timing parameters received in Step 2, start the first timer to enter the standby waiting period; take the end time of the first timer as the first trigger time, generate and apply an initialization control signal to the product under test at the first trigger time, so that it enters the testable state; Subsequently, a second timer is started to enter the device response waiting period, which serves as the internal response and processing time of the test product to the initialization control signal; Step 4: Using the end time of the second timer as the second trigger time, send a preset unlock command to the product under test through the communication and interface unit. After confirming the correct response signal, the test channel is determined to be successfully established. Step 5: Enter the signal testing stage. Based on the signal characteristic parameters received in Step 2, generate one or more composite signals and simultaneously execute the steps of simulating Doppler signal generation and laser pulse response. Among them, the simulated Doppler signal generation: according to the preset signal characteristic parameters, a reference continuous wave is generated, and pulse modulation is selectively applied to it to generate a pulse modulation signal and / or a carrier signal whose frequency is shifted according to a preset rule; And selectively perform orthogonal mixing processing on the generated pulse modulation signal and carrier signal to generate a test signal containing the Doppler frequency shift effect, and output it to the test product after process control gain adjustment; Laser pulse response: While simulating the generation of Doppler signals, the laser pulse trigger signal emitted by the product under test is monitored in real time; once the rising edge of the trigger pulse is detected, after a preset trigger delay and a preset pulse width, a corresponding simulated laser echo pulse signal is immediately generated and sent to the product under test. Step Six: During the test, capture the output response of the test product under the excitation signal, output the signal waveform to the oscilloscope for waveform capture and parameter measurement, and upload it to the host computer in real time for display, recording and qualification judgment.

4. The automatic testing method according to claim 3, characterized in that, The timing parameters include initial delay, signal trigger time, single signal duration, and continuous signal period; the signal characteristic parameters include the frequency and amplitude of the basic signal, the required simulated Doppler frequency shift (frequency change), and the width and repetition frequency of the pulse modulation signal; the response parameters are preset with respect to the delay and pulse characteristics of the simulated echo signal for the laser pulse that the product under test may emit.

5. The automatic testing method according to claim 3, characterized in that, The testing method, following step five, also includes: The testing phase in step five continues until the preset test conditions are met or a termination test command is received from the host computer. Upon receiving the termination command, the system stops all signal outputs but remains in the automatic test mode of step two to quickly restart the test process.

6. The automatic testing method according to claim 3, characterized in that, The mode-locked test state mentioned in step two refers to the mutual exclusion between automatic test mode and manual mode. When the system is running in one mode, it does not respond to the control commands of the other mode.

7. The automatic testing method according to claim 3, characterized in that, In step three, the initialization control signal is the ZP beam-off step signal, which is defined as a 0-5V output step control signal, where 0-0.6V is low level and 3.6-5V is high level, current consumption is ≤1mA, and static impedance to GND is ≥10kΩ.

8. The automatic testing method according to claim 3, characterized in that, In step three, the delay range for the standby waiting period of starting the first timer and the device response waiting period of starting the second timer is 200ms-2s, with a tuning step of 10ms.

9. The automatic testing method according to claim 3, characterized in that, In the laser pulse response process in step five, it supports responding to no less than 20 consecutive trigger pulse trains and generating corresponding echo pulse trains.

10. A non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the automatic testing method as described in any one of claims 3-9.

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