An interconnection interface active flow control device, method and system

By introducing active flow control devices on the read and write sides into the system-on-a-chip (SoC), combined with a credit management module and a virtual output queue, the problems of link blocking and inflexible resource scheduling in the SoC are solved, achieving efficient data transmission and improved system stability.

CN122240559APending Publication Date: 2026-06-19BEIJING TSINGMICRO INTELLIGENT TECH CO LTD
0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
BEIJING TSINGMICRO INTELLIGENT TECH CO LTD
Filing Date
2026-02-25
Publication Date
2026-06-19

AI Technical Summary

⚠Technical Problem

Existing on-chip systems suffer from link blocking issues, leading to data flow interruptions, reduced throughput, and unstable communication. Existing flow control mechanisms also suffer from response delays and insufficient resource scheduling flexibility.

⚗Method used

By employing active flow control devices on both the read and write sides, combined with a dynamic allocation and recycling mechanism for credit resources, and through a slave device address resolution module, virtual output queue, and credit management module, efficient collaborative control between the master control device and slave devices is achieved, ensuring the timing consistency of data transmission and the efficiency of resource utilization.

🎯Benefits of technology

It significantly improves system throughput and data transmission efficiency in scenarios where multiple master devices access multiple slave devices, alleviates link congestion issues, and enhances system stability and response efficiency.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 1
    Figure 1
  • Figure 2
    Figure 2
Patent Text Reader

Abstract

This invention discloses an active flow control device, method, and system for interconnect interfaces. The read-side active flow control device includes a slave device address resolution module, a read command virtual output queue, a credit management module, and a slave command interface. The slave device address resolution module parses read commands based on address fields and determines their corresponding slave device numbers, then writes the parsed read commands into a sub-queue corresponding to the read command virtual output queue. The credit management module obtains credit configuration items based on the slave device number. If the credit configuration item is greater than or equal to the command length field, the command is allowed to dequeue and be transmitted to the slave device. The read command virtual output queue can pause receiving read commands when it reaches a first preset capacity threshold. This invention achieves efficient scheduling of read and write commands and dynamic management of credit resources between master and slave devices, improving the throughput and data transmission efficiency of on-chip systems in scenarios where multiple master devices access multiple slave devices.
Need to check novelty before this filing date? Find Prior Art