Power dispatching instruction error prevention method and system based on topological sorting and conflict detection

By using a topology sorting and conflict detection method, the connectivity and path redundancy of power equipment are evaluated, which solves the problem of insufficient responsiveness in power dispatch and enables the safe and stable operation of the power system.

CN122246733APending Publication Date: 2026-06-19STATE GRID ZHEJIANG HAIYAN COUNTY ELECTRIC POWER SUPPLY CO +1

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
STATE GRID ZHEJIANG HAIYAN COUNTY ELECTRIC POWER SUPPLY CO
Filing Date
2026-05-21
Publication Date
2026-06-19

AI Technical Summary

Technical Problem

Existing power dispatching methods have low adaptability when faced with diverse load changes in power facilities and urgent dispatching needs, and may have problems such as dispatching deployment conflicts and equipment functional load mismatch.

Method used

A topology sorting and conflict detection-based method is adopted, which treats power equipment as nodes in the topology. The connectivity degree is determined by comparing the operating status between nodes, the impact range and path redundancy of scheduling instructions are evaluated, and the necessity of selecting scheduling instructions and the possibility of avoiding conflicts are determined by weighting the path reuse factor and connectivity degree, and the order of scheduling instructions is sorted.

🎯Benefits of technology

It improves the ability to respond to scheduling and deployment conflicts, ensures the correct and orderly implementation of scheduling instructions, and guarantees the safe, stable and efficient operation of the power system.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention relates to the field of electrical digital data processing technology, specifically to a method and system for preventing errors in power dispatching instructions based on topology sorting and conflict detection. The method includes: comparing the operating states of any two nodes in the power grid topology to determine the connectivity of corresponding paths; determining the path reuse factor using the influence range of the target dispatching instruction in the power grid topology; determining the necessity of selecting the target path using the connectivity and path reuse factor of the target path corresponding to the target dispatching instruction; determining the probability of avoiding conflict by selecting the target path using the necessity of selecting the target path and the number of nodes; determining the degree of occupancy of the target path by the target dispatching instruction using the probability of avoiding conflict; and sorting the degree of occupancy of the target path by the dispatching instructions to determine the order of instruction occupancy. This invention can improve the responsiveness to dispatching deployment conflicts and ensure the safe operation of the power system.
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Description

Technical Field

[0001] This invention relates to the field of electrical digital data processing technology, and in particular to a method and system for preventing errors in power dispatching instructions based on topology sorting and conflict detection. Background Technology

[0002] The power dispatching process involves adjusting and controlling the operating status of power equipment in sequence to complete tasks such as connecting power facilities and dispatching power loads.

[0003] Existing scheduling methods mainly rely on operator experience and execution process rules to set scheduling instructions and perform step-by-step verification, thereby executing the corresponding scheduling instructions and operations. In the continuous process, the corresponding instructions are executed and the execution status is verified as they are executed. For each execution behavior, the instructions are recorded and formed into scheduling specifications.

[0004] In actual power dispatching, the load of power facilities varies and the urgency of dispatching needs differ. Relying on process judgment to obtain corresponding dispatching instructions and strategies has a low adaptability to potential dispatching deployment conflicts, and there may be situations where the actual dispatching instructions do not comprehensively consider the functional load mismatch between the dispatching of various devices in the actual deployment process. Summary of the Invention

[0005] The present invention provides a method and system for preventing errors in power dispatching instructions based on topology sorting and conflict detection, which improves the ability to respond to scheduling deployment conflicts to a certain extent.

[0006] In a first aspect, the present invention provides a method for preventing errors in power dispatching instructions based on topology sorting and conflict detection, the method comprising:

[0007] The power grid topology is obtained by treating power equipment as nodes in the topology. The connectivity degree between the paths between any two nodes is determined by comparing the operating status between any two nodes in the power grid topology.

[0008] Determine the scope of influence of the target scheduling instruction in the power grid topology, and use the scope of influence to determine the path reuse factor that characterizes path redundancy;

[0009] The necessity of selecting a target path is determined by using the connectivity and path reuse factor of the target path corresponding to the target scheduling instruction.

[0010] The necessity of selecting the target path and the number of nodes are used to determine the probability of avoiding conflict when the target scheduling instruction selects the target path, and the probability of avoiding conflict is used to determine the degree of occupation of the target path by the target scheduling instruction.

[0011] The occupancy levels of each scheduling instruction on the target path are sorted to determine the order in which the scheduling instructions occupy the target path.

[0012] Furthermore, determining the connectivity degree of the path between any two nodes by comparing their operating states in the power grid topology includes:

[0013] By utilizing the operating temperature change information of any starting node and any ending node in the power grid topology, the difference in operating temperature change between the starting node and the ending node can be determined.

[0014] The connectivity degree of the path between two corresponding nodes is determined by using the difference in operating temperature changes between the two nodes.

[0015] Furthermore, determining the connectivity degree of the path between two corresponding nodes by utilizing the difference in operating temperature changes between the two nodes includes:

[0016] Determine the impedance difference and physical path length between the start and end nodes, and combine the impedance difference and physical path length to determine the equipment spacing characteristics between the corresponding two nodes;

[0017] By utilizing the difference in operating temperature and equipment interval characteristics between two corresponding nodes, the connectivity degree of the path between the two corresponding nodes can be determined.

[0018] Furthermore, determining the scope of influence of the target scheduling instruction in the power grid topology includes:

[0019] Determine the total number of all adaptable nodes corresponding to the target scheduling instruction and the number of the longest nodes in the longest path;

[0020] By combining the total number of nodes and the number of the longest nodes, the scope of influence of the target scheduling instruction in the power grid topology is determined.

[0021] Furthermore, the path reuse factor characterizing path redundancy is determined using the aforementioned influence range, including:

[0022] By utilizing the difference in node length between the path node length of each path corresponding to the target scheduling instruction and the average path node length of all paths, the length distribution characteristics of the overall path corresponding to the target scheduling instruction can be determined.

[0023] By utilizing the influence range and the length distribution characteristics, a path reuse factor representing the path redundancy of the target scheduling instruction is determined.

[0024] Furthermore, the step of determining the necessity of selecting a target path by utilizing the connectivity and path reuse factor of the target path corresponding to the target scheduling instruction includes:

[0025] The connectivity of the target path is weighted by using a path reuse factor to obtain the weighted connectivity of the target path;

[0026] The mean connectivity of all paths between the starting and ending nodes of the target path is determined, and the necessity of selecting the target path is determined by comparing the weighted connectivity with the mean connectivity.

[0027] Furthermore, the step of determining the likelihood of conflict avoidance when selecting a target path using the necessity of the target path selection and the number of nodes includes:

[0028] Determine the load comparison information between the start and end nodes of the target path, and combine the necessity of selecting the target path with the load comparison information to obtain the degree of importance matching between the target path and its nodes.

[0029] By utilizing the degree of importance matching and the number of nodes in the target path, the likelihood of avoiding conflicts when selecting the target path for the target scheduling instruction can be determined.

[0030] Furthermore, determining the likelihood of conflict avoidance when selecting a target path for a target scheduling instruction by utilizing the importance matching degree and the number of nodes in the target path includes:

[0031] Determine the maximum number of nodes between the start node and the end node corresponding to the target scheduling instruction, and determine the ratio between the number of nodes in the target path and the maximum number of nodes;

[0032] By combining the importance matching degree and the quantity ratio, the probability of avoiding conflict when the target scheduling instruction selects the target path is calculated.

[0033] Furthermore, determining the degree of occupancy of the target path by utilizing the probability of avoiding conflicts includes:

[0034] Determine the average probability of avoiding conflict for other paths that are not the target path corresponding to the target scheduling instruction;

[0035] Determine the difference in conflict avoidance probability between the target path's conflict avoidance probability and the mean conflict avoidance probability;

[0036] By utilizing the difference in conflict avoidance probability and the minimum conflict avoidance probability of the path corresponding to the target scheduling instruction, the degree of occupancy of the target path by the target scheduling instruction can be determined.

[0037] Secondly, the present invention provides a power dispatching command error prevention system based on topology sorting and conflict detection, the system being used to implement the power dispatching command error prevention method based on topology sorting and conflict detection as described in any of the preceding claims; the system includes:

[0038] The node monitoring module is used to obtain the power grid topology by treating power equipment as nodes in the topology, and to determine the connectivity degree between the paths of any two nodes by comparing their operating statuses.

[0039] The path analysis module is used to determine the influence range of the target scheduling instruction in the power grid topology, and use the influence range to determine the path reuse factor that characterizes the path redundancy; use the connectivity correlation degree and path reuse factor of the target path corresponding to the target scheduling instruction to determine the necessity of selecting the target path; use the necessity of selecting the target path and the number of nodes to determine the probability of avoiding conflict when the target scheduling instruction selects the target path, and use the probability of avoiding conflict to determine the degree of occupation of the target path by the target scheduling instruction.

[0040] The instruction deployment module is used to sort the occupancy of each scheduling instruction on the target path to determine the occupancy order of each scheduling instruction on the target path.

[0041] This invention obtains the power grid topology by treating power equipment as nodes, and then digitally assesses dispatching needs based on the real-time operation of the power equipment in the topology. It compares the operating states between any two nodes in the power grid topology to determine the connectivity of the paths between them, facilitating accurate assessment of the load levels of different dispatching needs. It uses the influence range of the target dispatching command in the power grid topology to determine the path reuse factor, characterizing path redundancy, thus assessing the influence range of the dispatching command in the topology for further path selection. It uses the connectivity and path reuse factor of the target path corresponding to the target dispatching command to determine the necessity of selecting the target path, thereby accurately assessing the execution compatibility between the dispatching command and the node equipment on the path, and finding the optimal path more suitable for execution. It uses the necessity of selecting the target path and the number of nodes to determine the probability of conflict avoidance in selecting the target path for the target dispatching command, and uses the probability of conflict avoidance to determine the degree of occupancy of the target path by the target dispatching command, thus determining the occupancy requirements of different dispatching commands on the target path. It then sorts the occupancy degrees of each dispatching command on the target path to determine the occupancy order of each dispatching command on the target path, thereby completing the judgment of error prevention and conflict prevention for power dispatching commands through the priority of different commands on different paths.

[0042] This invention achieves intelligent planning of power dispatch instructions by comprehensively analyzing the actual operating conditions of node devices affected by the current dispatch, the compatibility of instructions on different paths of the topology, and the reliability of different paths, through dynamic instruction conflict detection. This improves the ability to respond to dispatch deployment conflicts, thereby ensuring that each dispatch instruction can be implemented correctly and in an orderly manner, and ensuring the safe, stable and efficient operation of the power system. Attached Figure Description

[0043] To more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are merely some embodiments of the present invention, and those skilled in the art can obtain other embodiments based on these drawings without creative effort.

[0044] Figure 1 The flowchart illustrates a method for preventing errors in power dispatching instructions based on topology sorting and conflict detection, as provided in an embodiment of the present invention.

[0045] Figure 2 This is a detailed flowchart of step S1 in a power dispatching instruction error prevention method based on topology sorting and conflict detection provided in an embodiment of the present invention.

[0046] Figure 3 This is a detailed flowchart of step S3 in a power dispatching command error prevention method based on topology sorting and conflict detection provided in an embodiment of the present invention.

[0047] Figure 4 This is a detailed flowchart of step S4 in a power dispatching instruction error prevention method based on topology sorting and conflict detection provided in an embodiment of the present invention.

[0048] Figure 5 This is a detailed flowchart of step S4 in a power dispatching instruction error prevention method based on topology sorting and conflict detection, provided in another embodiment of the present invention.

[0049] Figure 6 This is a schematic diagram of the hardware operating environment of the power dispatching command error prevention device based on topology sorting and conflict detection involved in the embodiment of the present invention.

[0050] Figure 7 This is a schematic diagram of the framework structure of the power dispatching command error prevention system based on topology sorting and conflict detection involved in the embodiments of the present invention. Detailed Implementation

[0051] Embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. While some embodiments of the present invention are shown in the drawings, it should be understood that the present invention can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the present invention. It should be understood that the drawings and embodiments of the present invention are for illustrative purposes only and are not intended to limit the scope of protection of the present invention.

[0052] With the continuous upgrading of my country's power grid technology, more and more switchgear is being put into long-term operation. Its operational reliability and maintenance have become crucial aspects of ensuring power supply safety. Because switchgear is often located in unfavorable environments such as high temperature, high pressure, and high humidity, the insulating medium is prone to aging, corrosion, and other deterioration. When this deterioration accumulates to a certain extent, it may cause breakdown under high electric fields, thus inducing insulation faults. At the same time, switchgear has a complex structure, numerous monitoring points, and a wide range of live-line testing data sources and a large number of indicators. To address these issues, existing condition assessment research has proposed various approaches and methods, such as fuzzy comprehensive evaluation, assessment methods based on normal cloud models, and various clustering analysis algorithms.

[0053] Please see Figure 1 The present invention provides a method for preventing errors in power dispatching commands based on topology sorting and conflict detection. This method may include the following steps.

[0054] Step S1: The power equipment is used as nodes in the topology to obtain the power grid topology. The operating status between any two nodes in the power grid topology is compared to determine the connectivity degree between the corresponding two nodes.

[0055] In this embodiment, the power equipment belongs to the actual equipment structure in the power grid and needs to be transformed through digital topology to facilitate the digital analysis of instructions; it is necessary to read the operating parameters of the power equipment through the bus and establish the corresponding digital topology of the power structure based on the actual deployment structure.

[0056] Specifically, to treat each power device as an object in the topology, it is first necessary to assign it a unique ID (such as primary equipment like circuit breakers, disconnect switches, lines, transformers, and busbars, as well as related secondary equipment like soft pressure plates), and record the parameters of its operation under its ID (such as the input power, output power, temperature, etc. of a transformer). Then, the device corresponding to each unique ID is treated as a node object in the topology.

[0057] Furthermore, with the help of professional staff, the physical connection relationships between power equipment are also mapped into the topology object, thereby placing the corresponding operation results in the current record.

[0058] By connecting the various labeled hardware devices with directed edges according to their actual placement, the topological objects are realized through the basic object-edge structure of the topology.

[0059] Further digitize the scheduling rules, that is, make the rules that the computer can determine, such as the IF-THEN form (e.g., IF “the operation object is the line grounding switch” AND “there is voltage on the associated line side” THEN “closing is prohibited”, when the bus tie circuit breaker is closed, the voltage difference on both sides must be less than X%), and use logic settings to determine the operating status of the power equipment.

[0060] The complete power facility operation topology structure built in the above manner is called the power grid topology.

[0061] The core of dispatching is to adjust some connected power equipment to the required state. When the instruction is created and issued, the dispatched equipment should meet the requirements of the situation (e.g., if a gate can handle 500A of current, dispatching 1200A of current requires connecting at least three gates). Therefore, the demand to which the instruction belongs should be evaluated first, and the topology area that meets the demand should be divided. At least the minimum available part of the topology affected by the demand should be extracted.

[0062] The current topology has been constructed into a directed graph. If the system receives a current demand command in natural language form, it can further convert the input demand text into keyword commands through NLP (Natural Language Processing). For example, keyword commands include: close the 220kV A line 281 disconnect switch and close the 220kV B line 381 disconnect switch.

[0063] In one embodiment, please refer to Figure 2 Step S1, which compares the operating states of any two nodes in the power grid topology to determine the connectivity of the paths between the corresponding two nodes, includes:

[0064] Step S11: Using the operating temperature change information of any starting node and any ending node in the power grid topology, determine the difference in operating temperature change between the starting node and the ending node.

[0065] Step S12: Determine the connectivity degree of the path between two corresponding nodes by utilizing the difference in operating temperature changes between the two corresponding nodes.

[0066] Specifically, step S12 includes:

[0067] Determine the impedance difference and physical path length between the start and end nodes, and combine the impedance difference and physical path length to determine the equipment spacing characteristics between the corresponding two nodes;

[0068] By utilizing the difference in operating temperature and equipment interval characteristics between two corresponding nodes, the connectivity degree of the path between the two corresponding nodes can be determined.

[0069] In this embodiment, the evaluation is further performed on any two node devices p and p in the topology. Connectivity degree between nodes (which can be denoted as the start node and the end node, respectively). By comparing the overall operating status of the equipment corresponding to power dispatch, the fluctuation of the node's internal resistance can be considered by taking into account the recent temperature changes at the deployment location. This can be combined with the similarity of the equipment's own impedance level to make a judgment, thereby assessing the losses caused by the dispatch current passing through the node equipment.

[0070]

[0071] In the formula, Represent p and The connectivity between them; first, determine the nodes p and p required for the current power dispatch. Get nodes p and p respectively. Real-time operating temperature of the equipment and (This can be uniformly denoted as T), then take the average operating temperature of the node within the recent preset window. and (can be uniformly recorded as) (e.g., taking the average of the previous 5 hours), extract the difference TT between the real-time operating temperature and the recent average temperature. This serves as information on the operating temperature changes of the nodes, and the temperature ratio between the two nodes is taken. That is, the difference in operating temperature changes between the two, corresponding to This means that the similarity of node operating temperatures is reflected by the degree to which the ratio is close to 1, which reflects the similarity of the operating states of the two devices and thus assesses the similarity of the operating states between the devices.

[0072] Next, we extract the actual impedance of device node p. With another node p Actual impedance The absolute value of the difference between As the impedance difference, its ratio to the length D of the physical path between the two transmission devices is used as the node device p and p. The device spacing characteristics between them avoid the problem that the spacing between nodes in the topology may not be the same as the actual spacing. It is a very small constant, such as 0.01, to avoid the case where the denominator is 0. The resulting error is within the allowable range, and its dimensions are the same as... Consistent. "Normal" refers to normalization processing. Specifically, it can be used to normalize maximum and minimum values, aiming to eliminate the influence of dimensions. It's understandable that the maximum and minimum values ​​for normalization can be set based on the specific scenario and data characteristics, such as by combining prior data. The maximum and minimum values ​​are used to perform linear normalization. Adjusting, calibrating, or optimizing the maximum and minimum values ​​does not constitute a limitation of this invention. A higher connectivity degree indicates that p and... The more similar the fluctuations in temperature and node resistance between them, the better.

[0073] The above implementation process calculates the topological edge weights by using the actual operating parameters of the node devices to represent the abstract connection characteristics between two nodes in the topology.

[0074] Further traverse all current nodes to obtain the connectivity degree between each node in the topology graph, which is the edge weight (an edge is the connection between nodes).

[0075] Furthermore, the connectivity degree w is input into the sigmoid normalization function to obtain a normalized value with a range of [0,1], thereby avoiding the situation where a large temperature difference at a certain node causes the weight to continuously decrease until it becomes negative.

[0076] Step S2: Determine the influence range of the target scheduling instruction in the power grid topology, and use the influence range to determine the path reuse factor that characterizes path redundancy;

[0077] Specifically, step S2, determining the scope of influence of the target scheduling instruction in the power grid topology, includes:

[0078] Determine the total number of all adaptable nodes corresponding to the target scheduling instruction and the number of the longest nodes in the longest path;

[0079] By combining the total number of nodes and the number of the longest nodes, the scope of influence of the target scheduling instruction in the power grid topology is determined.

[0080] Specifically, step S2, which uses the influence range to determine the path reuse factor characterizing path redundancy, includes:

[0081] By utilizing the difference in node length between the path node length of each path corresponding to the target scheduling instruction and the average path node length of all paths, the length distribution characteristics of the overall path corresponding to the target scheduling instruction can be determined.

[0082] By utilizing the influence range and the length distribution characteristics, a path reuse factor representing the path redundancy of the target scheduling instruction is determined.

[0083] Based on the above embodiments, in this embodiment, the K-shortest path algorithm (an algorithm for determining the path between two node devices, where K=3) is used to extract any two device nodes p and p'. The total connection path L between the two devices, i.e. the path scheduled between the two devices.

[0084] In the above embodiments, the device specified by the target scheduling instruction (referring to any scheduling instruction, hereinafter referred to as the target instruction) is extracted, the corresponding node device is located from the topology, the connection path between each pair of devices specified by the target scheduling instruction is extracted by the Dijkstra algorithm, and the schedulable range is evaluated by the path redundancy.

[0085] Calculate target instructions All compatible node devices located The reuse factor f of the corresponding overall path is evaluated and judged based on the diversity of devices required during instruction scheduling and the redundancy of connection methods between devices, thus providing a global attribute assessment for subsequent judgment of the reliability of device connection paths:

[0086]

[0087] In the formula: extract all adaptable devices p located by the target instruction q, and then obtain the path group P formed by all adaptable devices p; further, from the topology, the total number of device nodes included in the path group P. (Do not count duplicate nodes, such as 1234, 2345, a total of 5 nodes, not the sum of path lengths), and extract the number of path points of the longest path in path group P. That is, the number of longest nodes, and thus the ratio of the two. As the scope of influence, the larger this ratio is, the larger the topology range contained in the path group, which means that the scheduling command can affect a larger topology range, and the higher the possibility of execution through different nodes. The larger the execution range that the command can choose, the more obvious the dilution effect on the device conflicts caused by the command (because there are different paths to take, thus avoiding conflict nodes). This represents a very small constant, used to prevent the denominator from being zero. Its dimensions are the same as... Similarly, its value can be specific, for example, 0.01. The resulting error is within the allowable range, and the concept of this constant is not introduced in subsequent logical analysis. This represents the standard deviation of the lengths of all paths in path group P.

[0088] Furthermore, by using the selection range (influence range) of the path corresponding to instruction q as the evaluation result of the overall probability of avoiding conflict, the probability of avoiding conflict is combined with the scheduling complexity between devices to achieve a comprehensive assessment of the risk of conflict in instruction execution.

[0089] Used to calculate the coefficient of variation, the larger the value, the more varied the path lengths and the more complex the selection space.

[0090] Based on the above-mentioned influence range and length distribution characteristics, the path reuse factor is obtained. .

[0091] Step S3: Determine the necessity of selecting the target path by using the connectivity and path reuse factor of the target path corresponding to the target scheduling instruction.

[0092] Specifically, please refer to Figure 3 Step S3 includes:

[0093] Step S31: Use the path reuse factor to weight the connectivity of the target path to obtain the weighted connectivity of the target path;

[0094] Step S32: Determine the average connectivity of all paths between the starting and ending nodes of the target path, and compare the weighted connectivity with the average connectivity to determine the necessity of selecting the target path.

[0095] In this embodiment, after obtaining the path reuse factor f of the target instruction, the operational stability of the device specified by the scheduling instruction is evaluated by limiting the range of the reuse factor, thereby evaluating the stability of the instruction execution process and performing a dual evaluation from the perspectives of instruction logic and execution results.

[0096] By anchoring the connection paths between devices through target instructions, calculating the necessity of selecting a single path, and then combining the weight of path influence with the diversity of execution path selection, the compatibility between instructions and devices is evaluated, thereby making an accurate assessment and judgment of the execution process.

[0097] First, the path reuse factor f obtained above is normalized using the existing premnmx normalization function to obtain a normalized reuse factor with a value range of [-1, 1]. This facilitates the use of normalization factors for corresponding edge selection, thereby combining the selectable range of the target instruction with the importance of the path to the target instruction.

[0098] The necessity of selecting the target path is reflected by calculating the correlation difference:

[0099]

[0100] In the formula: For the starting node p and ending node p connected by the target path L (referring to any path under the target scheduling instruction), The connectivity between the two (after normalization); For the normalized connection between the starting node p and the ending node p The reuse factor of the target path L; Let p be the starting node and p be the ending node. The mean connectivity degree is calculated for all paths between them. `norm` represents the maximum and minimum value normalization function.

[0101] The above parameters describe the relationship between nodes p and p'. The connectivity distribution of surrounding paths; further weighting of the importance of the target path, i.e., extracting the weighting value through normalized reuse factors. That is, the weighted connectivity degree; then the weight is added to its connectivity degree to obtain Finally, the weighted cost of the path and the mean of the connectivity of the surrounding paths are used to determine the optimal path. The difference, as the cost difference of the target path. .

[0102] Furthermore, the status of the nodes connected to the target path was determined. The importance of the connecting path L in the local context and the operating status of the nodes connected to the path were combined. Finally, the overall evaluation of the operating status was combined to obtain an evaluation of the selection of the target path.

[0103] Step S4: Determine the probability of avoiding conflict when selecting the target path by using the necessity of selecting the target path and the number of nodes, and determine the degree of occupation of the target path by the target scheduling instruction by using the probability of avoiding conflict.

[0104] Specifically, in one embodiment, please refer to Figure 4 Step S4, which determines the likelihood of conflict avoidance when selecting a target path using the necessity of the target path selection and the number of nodes, includes:

[0105] Step S41: Determine the load comparison information between the start and end nodes of the target path, and combine the necessity of selecting the target path with the load comparison information to obtain the importance matching degree between the target path and its nodes.

[0106] Step S42: Using the importance matching degree and the number of nodes in the target path, determine the probability of avoiding conflict when the target scheduling instruction selects the target path.

[0107] More specifically, step S42 includes:

[0108] Determine the maximum number of nodes between the start node and the end node corresponding to the target scheduling instruction, and determine the ratio between the number of nodes in the target path and the maximum number of nodes;

[0109] By combining the importance matching degree and the quantity ratio, the probability of avoiding conflict when the target scheduling instruction selects the target path is calculated.

[0110] In this embodiment, the probability of conflict avoidance during instruction execution is calculated after selecting the target path L. :

[0111]

[0112] In the formula: This represents the cost difference of the target path (i.e., the necessity of its selection); This represents the ratio of the load rates of the path link endpoints (endpoints being the start and end nodes), which is read directly from the control unit of the endpoint device. It is also known as load comparison information; the closer the load rates of the two endpoints are (…), the better. The smaller the value, the higher the security and the greater the likelihood of avoiding conflicts; generally, the lower the operating cost, and vice versa. This indicates the proximity of load rates between endpoints (L1 and L2 are two endpoints connected by a path, regardless of their order, and G is the load rate of the device corresponding to the endpoint), and its value range is generally [0,1]. This represents a very small constant, used to prevent the denominator from being zero. Its dimensions are the same as... Similarly, its value can be specific, for example, 0.01, and the resulting error is within the allowable range.

[0113] The value indicates the degree of importance matching. The larger the value, the more important the nodes connected by the target path L are, and the more critical the execution path is for the connected nodes. That is, it is the more important connection method between two devices in the power system.

[0114] Furthermore, after obtaining a comparison of the importance of paths and nodes, and after evaluating the possible routes for the execution of the target instruction, the possibility of avoiding conflicts is judged after the instruction selects the target path for execution, taking into account the shape of the path itself.

[0115] Extract the number of remaining device nodes p on the target path L, excluding the endpoints. (+1 to avoid the absence of intermediate nodes) The maximum number of devices traversed in the remaining link paths between the two endpoints of the nodes extracted for the target instruction, i.e., the maximum number of nodes. That is, the ratio of their quantities. This indicates a preset adjustment weight, used for limiting. The range of values, specifically, The value can be 0.9, obtained based on prior experience. Used to construct a negative correlation where the larger the ratio, the smaller the value.

[0116] This allows for the determination of the number of path points and the operational cost of executing instructions. When combined with the effectiveness of the nodes traversed and their distribution, specifically the higher the distance between nodes during scheduling, the fewer other devices are traversed on the journey from the starting point to the destination. This reduces the potential for shared connections between nodes, assuming the instruction itself is correct. Consequently, it avoids conflicts between the scheduling requirements of other instructions and the device states required by the target instruction (e.g., instruction A requires device B to remain disconnected, but the target instruction requires device B to be closed, resulting in a state conflict).

[0117] Specifically, in another embodiment, please refer to Figure 5 Step S4, which determines the degree of occupancy of the target path by the target scheduling instruction based on the probability of avoiding conflicts, includes:

[0118] Step S401: Determine the average probability of avoiding conflict for other paths that are not the target path corresponding to the target scheduling instruction;

[0119] Step S402: Determine the difference in conflict avoidance probability between the conflict avoidance probability of the target path and the average conflict avoidance probability.

[0120] Step S403: Using the difference in conflict avoidance probability and the minimum conflict avoidance probability of the path corresponding to the target scheduling instruction, determine the degree of occupancy of the target path by the target scheduling instruction.

[0121] In this embodiment, the probability of avoiding conflicts is calculated for the connection paths between devices affected by the target instruction. Next, further analysis was conducted on the degree to which instruction q occupied the target path L when it was required by different instructions. The scheduling path is allocated by comparing the priority of the instructions:

[0122]

[0123] In the formula: This represents a very small constant, used to prevent the denominator from being zero. Its dimensions are the same as... The same applies; its value can be, for example, 0.01. The resulting error is within acceptable limits, and this constant concept is not introduced during subsequent logical analysis. For the target instruction q, the total number of topological paths it contains... First, for the j-th path... (Here, the target path refers to any path under the target instruction q.) Extract the probability of avoiding conflicts within the selected range of the target instruction q. Combine it with the command except for the target path Mean probability of avoiding conflict for all other paths besides Evaluate the difference between the two, i.e., the difference in the probability of avoiding conflict, and compare the value of the difference with the minimum probability of avoiding conflict for the path in instruction q. The ratio between As a measure of the overall demand for device nodes by the target instruction, the greater the overall fluctuation, the more sufficient system performance is required for the instruction to execute power dispatching tasks. Therefore, when different instructions compete for the same path, path allocation is achieved through an assessment of the overall occupancy level. The fourth power is used to implement kurtosis calculation.

[0124] Step S5: Sort the degree of occupation of each scheduling instruction on the target path to determine the occupation order of each scheduling instruction on the target path.

[0125] In this embodiment, when different instructions compete for the same path, the priority is determined by the degree of occupancy of each instruction. The descending order of the commands serves as the order in which the commands occupy and use the path, thus completing the judgment to prevent errors and conflicts in power dispatch commands.

[0126] Based on the execution order of the target instructions on the path, the topological path that is about to flow can also be represented by glowing lines of different thicknesses or colors (for example, based on the degree of occupancy of the path by the instructions, from high to low, corresponding to a red-green color mapping, thereby achieving a visual display).

[0127] If multiple instructions compete for a certain path segment, the physical location can be marked with a flashing red circle. Clicking on the circle with an interactive device will display the competition list (i.e., a sorted descending list).

[0128] For the topology path that generates instructions, the degree of occupancy is considered. The sorting of values ​​(values ​​greater than 0.8 indicate high priority execution; values ​​greater than 0.5 but less than or equal to 0.8 indicate waiting; values ​​less than or equal to 0.5 indicate being in the queue) is displayed to achieve a visual analysis of instruction conflicts, as shown in Table 1.

[0129] Table 1

[0130] Execution order Command ID Instruction type Occupancy level (zq) Involving path nodes Status Label 01 CMD_2026_001 Load shearing 0.95 NodeA->Node B Execute with high priority 02 CMD_2026_005 reactive power compensation 0.78 NodeB->Node C Waiting 03 CMD_2026_002 Line maintenance 0.45 NodeA->NodD In the queue

[0131] This invention obtains the power grid topology by treating power equipment as nodes, and then digitally assesses dispatching needs based on the real-time operation of the power equipment in the topology. It compares the operating states between any two nodes in the power grid topology to determine the connectivity of the paths between them, facilitating accurate assessment of the load levels of different dispatching needs. It uses the influence range of the target dispatching command in the power grid topology to determine the path reuse factor, characterizing path redundancy, thus assessing the influence range of the dispatching command in the topology for further path selection. It uses the connectivity and path reuse factor of the target path corresponding to the target dispatching command to determine the necessity of selecting the target path, thereby accurately assessing the execution compatibility between the dispatching command and the node equipment on the path, and finding the optimal path more suitable for execution. It uses the necessity of selecting the target path and the number of nodes to determine the probability of conflict avoidance in selecting the target path for the target dispatching command, and uses the probability of conflict avoidance to determine the degree of occupancy of the target path by the target dispatching command, thus determining the occupancy requirements of different dispatching commands on the target path. It then sorts the occupancy degrees of each dispatching command on the target path to determine the occupancy order of each dispatching command on the target path, thereby completing the judgment of error prevention and conflict prevention for power dispatching commands through the priority of different commands on different paths. This invention achieves intelligent planning of power dispatch instructions by comprehensively analyzing the actual operating conditions of node devices affected by the current dispatch, the compatibility of instructions on different paths of the topology, and the reliability of different paths, through dynamic instruction conflict detection. This improves the ability to respond to avoid dispatch deployment conflicts, thereby ensuring that each dispatch instruction can be implemented correctly and in an orderly manner, and ensuring the safe, stable and efficient operation of the power system.

[0132] Please see Figure 6 One embodiment of the present invention provides a power dispatching command error prevention system based on topology sorting and conflict detection. The power dispatching command error prevention system based on topology sorting and conflict detection may include: a node monitoring module, a path analysis module, and a command deployment module.

[0133] The node monitoring module A10 is used to obtain the power grid topology by treating power equipment as nodes in the topology, and to determine the connectivity degree between the paths of any two nodes by comparing their operating statuses.

[0134] The path analysis module A20 is used to determine the influence range of the target scheduling instruction in the power grid topology, and use the influence range to determine the path reuse factor that characterizes the path redundancy; use the connectivity correlation degree and path reuse factor of the target path corresponding to the target scheduling instruction to determine the necessity of selecting the target path; use the necessity of selecting the target path and the number of nodes to determine the probability of avoiding conflict when the target scheduling instruction selects the target path, and use the probability of avoiding conflict to determine the degree of occupancy of the target path by the target scheduling instruction.

[0135] The instruction deployment module A30 is used to sort the occupancy of each scheduling instruction on the target path to determine the occupancy order of each scheduling instruction on the target path.

[0136] Furthermore, the node monitoring module A10 is also used for:

[0137] By utilizing the operating temperature change information of any starting node and any ending node in the power grid topology, the difference in operating temperature change between the starting node and the ending node can be determined.

[0138] The connectivity degree of the path between two corresponding nodes is determined by using the difference in operating temperature changes between the two nodes.

[0139] Furthermore, the node monitoring module A10 is also used for:

[0140] Determine the impedance difference and physical path length between the start and end nodes, and combine the impedance difference and physical path length to determine the equipment spacing characteristics between the corresponding two nodes;

[0141] By utilizing the difference in operating temperature and equipment interval characteristics between two corresponding nodes, the connectivity degree of the path between the two corresponding nodes can be determined.

[0142] Furthermore, the path analysis module A20 is also used for:

[0143] Determine the total number of all adaptable nodes corresponding to the target scheduling instruction and the number of the longest nodes in the longest path;

[0144] By combining the total number of nodes and the number of the longest nodes, the scope of influence of the target scheduling instruction in the power grid topology is determined.

[0145] Furthermore, the path analysis module A20 is also used for:

[0146] By utilizing the difference in node length between the path node length of each path corresponding to the target scheduling instruction and the average path node length of all paths, the length distribution characteristics of the overall path corresponding to the target scheduling instruction can be determined.

[0147] By utilizing the influence range and the length distribution characteristics, a path reuse factor representing the path redundancy of the target scheduling instruction is determined.

[0148] Furthermore, the path analysis module A20 is also used for:

[0149] The connectivity of the target path is weighted by using a path reuse factor to obtain the weighted connectivity of the target path;

[0150] The mean connectivity of all paths between the starting and ending nodes of the target path is determined, and the necessity of selecting the target path is determined by comparing the weighted connectivity with the mean connectivity.

[0151] Furthermore, the path analysis module A20 is also used for:

[0152] Determine the load comparison information between the start and end nodes of the target path, and combine the necessity of selecting the target path with the load comparison information to obtain the degree of importance matching between the target path and its nodes.

[0153] By utilizing the degree of importance matching and the number of nodes in the target path, the likelihood of avoiding conflicts when selecting the target path for the target scheduling instruction can be determined.

[0154] Furthermore, the path analysis module A20 is also used for:

[0155] Determine the maximum number of nodes between the start node and the end node corresponding to the target scheduling instruction, and determine the ratio between the number of nodes in the target path and the maximum number of nodes;

[0156] By combining the importance matching degree and the quantity ratio, the probability of avoiding conflict when the target scheduling instruction selects the target path is calculated.

[0157] Furthermore, the path analysis module A20 is also used for:

[0158] Determine the average probability of avoiding conflict for other paths that are not the target path corresponding to the target scheduling instruction;

[0159] Determine the difference in conflict avoidance probability between the target path's conflict avoidance probability and the mean conflict avoidance probability;

[0160] By utilizing the difference in conflict avoidance probability and the minimum conflict avoidance probability of the path corresponding to the target scheduling instruction, the degree of occupancy of the target path by the target scheduling instruction can be determined.

[0161] The specific functions and effects of the power dispatch command error prevention system based on topology sorting and conflict detection can be explained by referring to other embodiments in this specification, and will not be repeated here. Each module in the power dispatch command error prevention system based on topology sorting and conflict detection can be implemented entirely or partially through software, hardware, or a combination thereof. Each module can be embedded in or independent of the processor in a computer device in hardware form, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0162] Please see Figure 7One embodiment of the present invention can provide an electronic device, the electronic device comprising:

[0163] A memory, and one or more processors communicatively connected to the memory;

[0164] The memory stores instructions that can be executed by the one or more processors, which, when executed by the one or more processors, enable the one or more processors to implement the power dispatch instruction error prevention method based on topology sorting and conflict detection in any of the above embodiments.

[0165] One embodiment of the present invention also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the power dispatching instruction error prevention method based on topology sorting and conflict detection described in any of the above embodiments.

[0166] The embodiments of this specification also provide a computer program product containing instructions that, when executed by a computer, cause the computer to perform the power dispatching instruction error prevention method based on topology sorting and conflict detection described in any of the above embodiments.

[0167] It is understood that the specific examples in this document are only intended to help those skilled in the art better understand the embodiments described herein, and are not intended to limit the scope of the invention.

[0168] It is understood that in the various embodiments described in this specification, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments described in this specification.

[0169] It is understood that the various implementation methods described in this specification can be implemented individually or in combination, and the implementation methods in this specification are not limited in this respect.

[0170] Unless otherwise stated, all technical and scientific terms used in the embodiments of this specification have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of this specification. The term "and / or" as used in this specification includes any and all combinations of one or more of the associated listed items. The singular forms "a," "the," and "the" as used in the embodiments of this specification and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0171] It is understood that the processor in this invention can be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method implementation can be completed by the integrated logic circuitry in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this specification. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this specification can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method.

[0172] It is understood that the memory in this invention can be volatile memory or non-volatile memory, or may include both. Specifically, the non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM). It should be noted that the memory in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0173] The user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in the embodiments of the present invention are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, use and processing of the relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and corresponding operation entry points are provided for users to choose to authorize or refuse.

[0174] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this specification.

[0175] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the aforementioned method implementations, and will not be repeated here.

[0176] In the several embodiments provided in this specification, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0177] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0178] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0179] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of this specification, in essence, or the parts that contribute to the prior art, or parts of the technical solutions, can be embodied in the form of software products. These computer software products are stored in a storage medium and include several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this specification. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0180] The above description is merely a specific embodiment of this specification, but the scope of protection of this invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this specification should be included within the scope of protection of this specification. Therefore, the scope of protection of this invention should be determined by the scope of the claims.

Claims

1. A method for preventing errors in power dispatching instructions based on topology sorting and conflict detection, characterized in that, The method includes: The power grid topology is obtained by treating power equipment as nodes in the topology. The connectivity degree between the paths between any two nodes is determined by comparing the operating status between any two nodes in the power grid topology. Determine the scope of influence of the target scheduling instruction in the power grid topology, and use the scope of influence to determine the path reuse factor that characterizes path redundancy; The necessity of selecting a target path is determined by using the connectivity and path reuse factor of the target path corresponding to the target scheduling instruction. The necessity of selecting the target path and the number of nodes are used to determine the probability of avoiding conflict when the target scheduling instruction selects the target path, and the probability of avoiding conflict is used to determine the degree of occupation of the target path by the target scheduling instruction. The occupancy levels of each scheduling instruction on the target path are sorted to determine the order in which the scheduling instructions occupy the target path.

2. The power dispatching command error prevention method based on topology sorting and conflict detection according to claim 1, characterized in that, The determination of the connectivity degree of the path between any two nodes in the power grid topology by comparing their operating states includes: By utilizing the operating temperature change information of any starting node and any ending node in the power grid topology, the difference in operating temperature change between the starting node and the ending node can be determined. The connectivity degree of the path between two corresponding nodes is determined by using the difference in operating temperature changes between the two nodes.

3. The power dispatching command error prevention method based on topology sorting and conflict detection according to claim 2, characterized in that, The method of determining the connectivity of the path between two corresponding nodes by utilizing the difference in operating temperature changes includes: Determine the impedance difference and physical path length between the start and end nodes, and combine the impedance difference and physical path length to determine the equipment spacing characteristics between the corresponding two nodes; By utilizing the difference in operating temperature and equipment interval characteristics between two corresponding nodes, the connectivity degree of the path between the two corresponding nodes can be determined.

4. The power dispatching command error prevention method based on topology sorting and conflict detection according to claim 1, characterized in that, Determining the scope of influence of the target scheduling instruction in the power grid topology includes: Determine the total number of all adaptable nodes corresponding to the target scheduling instruction and the number of the longest nodes in the longest path; By combining the total number of nodes and the number of the longest nodes, the scope of influence of the target scheduling instruction in the power grid topology is determined.

5. The power dispatching command error prevention method based on topology sorting and conflict detection according to claim 1, characterized in that, Determining the path reuse factor characterizing path redundancy using the aforementioned influence range includes: By utilizing the difference in node length between the path node length of each path corresponding to the target scheduling instruction and the average path node length of all paths, the length distribution characteristics of the overall path corresponding to the target scheduling instruction can be determined. By utilizing the influence range and the length distribution characteristics, a path reuse factor representing the path redundancy of the target scheduling instruction is determined.

6. The power dispatching command error prevention method based on topology sorting and conflict detection according to claim 1, characterized in that, The step of determining the necessity of selecting a target path by utilizing the connectivity and path reuse factor of the target path corresponding to the target scheduling instruction includes: The connectivity of the target path is weighted by using a path reuse factor to obtain the weighted connectivity of the target path; The mean connectivity of all paths between the starting and ending nodes of the target path is determined, and the necessity of selecting the target path is determined by comparing the weighted connectivity with the mean connectivity.

7. The power dispatching command error prevention method based on topology sorting and conflict detection according to claim 1, characterized in that, The method of determining the likelihood of conflict avoidance when selecting a target path using the necessity of the target path selection and the number of nodes includes: Determine the load comparison information between the start and end nodes of the target path, and combine the necessity of selecting the target path with the load comparison information to obtain the degree of importance matching between the target path and its nodes. By utilizing the degree of importance matching and the number of nodes in the target path, the likelihood of avoiding conflicts when selecting the target path for the target scheduling instruction can be determined.

8. The power dispatching command error prevention method based on topology sorting and conflict detection according to claim 7, characterized in that, The method of determining the likelihood of conflict avoidance when selecting a target path for a target scheduling instruction by utilizing the importance matching degree and the number of nodes in the target path includes: Determine the maximum number of nodes between the start node and the end node corresponding to the target scheduling instruction, and determine the ratio between the number of nodes in the target path and the maximum number of nodes; By combining the importance matching degree and the quantity ratio, the probability of avoiding conflict when the target scheduling instruction selects the target path is calculated.

9. The power dispatching command error prevention method based on topology sorting and conflict detection according to claim 1, characterized in that, The method of determining the degree of occupancy of the target path by utilizing the probability of avoiding conflicts includes: Determine the average probability of avoiding conflict for other paths that are not the target path corresponding to the target scheduling instruction; Determine the difference in conflict avoidance probability between the target path's conflict avoidance probability and the mean conflict avoidance probability; By utilizing the difference in conflict avoidance probability and the minimum conflict avoidance probability of the path corresponding to the target scheduling instruction, the degree of occupancy of the target path by the target scheduling instruction can be determined.

10. A power dispatching command error prevention system based on topology sorting and conflict detection, characterized in that, The system includes: The node monitoring module is used to obtain the power grid topology by treating power equipment as nodes in the topology, and to determine the connectivity degree between the paths of any two nodes by comparing their operating statuses. The path analysis module is used to determine the influence range of the target scheduling instruction in the power grid topology, and use the influence range to determine the path reuse factor that characterizes the path redundancy; use the connectivity correlation degree and path reuse factor of the target path corresponding to the target scheduling instruction to determine the necessity of selecting the target path; use the necessity of selecting the target path and the number of nodes to determine the probability of avoiding conflict when the target scheduling instruction selects the target path, and use the probability of avoiding conflict to determine the degree of occupation of the target path by the target scheduling instruction. The instruction deployment module is used to sort the occupancy of each scheduling instruction on the target path to determine the occupancy order of each scheduling instruction on the target path.