SVG high-frequency oscillation suppression method and device with RLC impedance structure

Abstract

This invention relates to the field of static var generator (SVR) technology, and particularly to a method and device for suppressing high-frequency oscillations of an SVG with an RLC impedance structure. The method includes adding an RLC parallel impedance between the H-bridge cascade arm (2) and the AC power grid; determining the optimal parameters of the reactor L and capacitor C in the RLC parallel impedance; determining the optimal resistance value of the resistor R in the RLC parallel impedance; determining the wiring configuration of the SVG; and S5, utilizing the wide-band impedance characteristics of the RLC parallel impedance to suppress high-frequency oscillations. The advantages of this invention are: through the hardware design and systematic parameter design of the RLC parallel impedance unit, the SVG exhibits stable positive impedance characteristics in the high-frequency band, effectively offsetting the high-frequency negative impedance caused by control delay, suppressing high-frequency oscillations between the SVG and the AC power grid from the root, avoiding problems such as harmonic exceedance and system tripping caused by high-frequency oscillations, and significantly improving the operational stability of the SVG under complex operating conditions such as weak power grids and high-proportion new energy grid connection.

Description

Technical Field

[0001] This invention relates to the field of static var generator (SVG) technology, and more particularly to a method and apparatus for suppressing high-frequency oscillations of an SVG with an RLC impedance structure. Background Technology

[0002] The chain-type H-bridge cascaded static var generator (SVG) is a core device for reactive power compensation and harmonic control in medium and high voltage power grids. It can be connected in star or delta configurations, and the core power topology of each phase / arm is a chain-type H-bridge cascaded structure. It is widely used in scenarios such as new energy grid connection and industrial load compensation.

[0003] Traditional chain-type H-bridge cascaded SVG only connects a single reactor in series between each phase / arm power topology and the AC grid, which has the following technical drawbacks: Because of the control delay, SVG exhibits negative impedance characteristics in the high-frequency band, which makes it prone to high-frequency oscillation with the power grid, leading to excessive harmonics or even system tripping. A single reactor has a large impedance to high-frequency characteristic subharmonics such as 35, 37, 47, and 49. When performing harmonic mitigation, the amplitude of the modulation signal is too high, exceeding the operating range of the device, which affects the harmonic mitigation effect and the stability of the device operation.

[0004] In existing technologies, high-frequency oscillation suppression methods for flexible DC converters effectively suppress high-frequency oscillations by adding a bridge arm impedance device (L connected in parallel with an RC series branch) between the bridge arms and designing its parameters. For example, patent CN215682154U, entitled "A Flexible DC Converter Bridge Arm Impedance Device Capable of Suppressing High-Frequency Oscillations," employs the following parameter design strategy: the parallel resonant frequency formed by capacitor C and reactor L must avoid the fundamental frequency and be higher than the bandwidth of the control system; the resistance value of resistor R must be greater than the critical value of the converter's equivalent damping. This allows the impedance device to function as an equivalent reactor in the low-frequency range to ensure basic power transmission, and to exhibit resistive characteristics in the high-frequency range to offset the negative impedance effect of the converter.

[0005] However, this method, designed for the bridge arm topology of flexible DC converters, differs significantly from the topology and operating conditions of cascaded H-bridge SVG, making it unsuitable for direct application. The main reason is as follows: 1. Flexible DC converters adopt modular multilevel topology (MMC), whose arm currents include DC components and second harmonic circulating current components, while SVG chain H-bridge topology only handles AC reactive current. The current spectrum characteristics of the two are different, resulting in an essential difference in the design basis of the resonant frequency of RLC parameters. 2. The control delay distribution of flexible DC converters is different from that of SVG, and their negative impedance characteristics vary in frequency range. Direct transplantation will lead to parameter mismatch.

[0006] 3. SVG needs to filter out the characteristic subharmonics generated by conventional DC, while flexible DC converters generally do not have harmonic control. Therefore, SVG requires RLC parameter matching for harmonic control, while the RLC of flexible DC converters does not. Summary of the Invention

[0007] The purpose of this invention is to provide a method and device for suppressing high-frequency oscillations of SVG with an RLC impedance structure. Through hardware and parameter design of the RLC parallel impedance unit, the high-frequency impedance characteristics of the SVG are reshaped, enabling it to present a stable positive impedance in the high-frequency band, thus offsetting the negative impedance caused by control delay and suppressing high-frequency oscillations at the source. At the same time, it reduces the impedance of high-frequency characteristic subharmonics such as 35, 37, 47, and 49, reducing modulation pressure. The dual neutral point design enables the reactor and RC branch to be arranged in different locations, optimizing the project footprint. It also supports dynamic adjustment of the capacitance value of the half-bridge submodule group to adapt to complex power grid conditions, improving the operational stability and engineering applicability of the device.

[0008] To achieve the above objectives, the present invention provides the following technical solution: A method for suppressing high-frequency oscillations of an SVG with an RLC impedance structure includes: S1. Add an RLC parallel impedance (1) between the H-bridge cascade arm (2) and the AC power grid. S2. Determine the optimal parameters for reactor L (11) and capacitor C (12) in the parallel impedance (1) of RLC; S3. Determine the optimal resistance value of resistor R (13) in the parallel impedance (1) of RLC; S4. Determine the wiring configuration of the SVG; If it is a star-connected SVG, select to connect the RLC parallel impedance (1) in series above or below the H-bridge cascade arm (2); If it is a corner SVG, each arm in the H-bridge cascade arm (2) is connected in series with an RLC parallel impedance (1), and the parameters of each RLC parallel impedance (1) are perfectly matched; S5. High-frequency oscillation suppression is achieved by utilizing the wide-band impedance characteristics of the RLC parallel impedance (1). In the low-frequency band, the parallel impedance of RLC (1) is equivalent to a reactor, maintaining the power frequency reactive power compensation capability of SVG; In the high-frequency band, the parallel impedance of RLC (1) is equivalent to a resistor, which cancels the high-frequency negative impedance characteristics of SVG, suppresses high-frequency oscillations and reduces the high-frequency characteristic subharmonic impedances of SVG at 35, 37, 47 and 49.

[0009] This also includes optimizing the layout of the land area; If the area of ​​the valve hall is limited, a dual neutral point design with independent reactor neutral point (4) and RC neutral point (5) is adopted. The reactor L (11) is placed outside the valve hall, and the capacitor C (12) and resistor R (13) are placed inside the valve hall.

[0010] It also includes dynamic capacitance adjustment; If the power grid operating conditions fluctuate frequently and the harmonic and oscillation states are varied, the capacitor C (12) is replaced with a half-bridge sub-module group (15). The harmonic content and oscillation state of the power grid are detected in real time through the SVG system. Based on the detection results, the number of half-bridge sub-modules is switched on and off, and the equivalent capacitance value of the parallel impedance (1) of RLC is dynamically adjusted.

[0011] In S2, the optimal parameters for reactor L (11) and capacitor C (12) are determined as follows: The parallel resonant frequency formed by capacitor C(12) and reactor L(11) is greater than 100Hz and lower than the negative impedance characteristic frequency of SVG. ; SVG negative impedance characteristic frequency The calculation formula is: ; in: This represents the total delay of the SVG's current control, measured in seconds (s).

[0012] In S3, the optimal resistance value of resistor R(13) is determined as follows: The resistance of resistor R (13) is more than twice the actual value of the proportional coefficient of the SVG current controller.

[0013] The current controller is the proportional-integral control element used by the SVG for current feedback control; the proportional coefficient of the current controller is the proportional element coefficient in the proportional-integral control element, and needs to be converted to the actual value; The conversion expression for the true value is: ; in: This represents the true value of the proportionality coefficient, in units of Ω. This represents the proportionality factor at per-unit values; This represents the voltage reference value, in units of V; This indicates the current reference value, with the unit being A.

[0014] In S5: In the low frequency band, the RLC parallel impedance (1) is equivalent to a reactor. At the power frequency, the impedance of the RC branch (14) is much greater than the inductive reactance of the reactor L (11). The current flows through the reactor L (11), making the RLC parallel impedance (1) exhibit inductive characteristics as a whole, thus maintaining the power frequency reactive power compensation capability of the SVG. In the high-frequency range, the parallel impedance (1) of RLC is equivalent to a resistor. In the high-frequency range, the inductive reactance of reactor L (11) increases, the capacitive reactance of RC branch (14) decreases, the current flows through RC branch (14), and the resistor R (13) plays a dominant role, so that the overall parallel impedance (1) of RLC presents a resistive characteristic, which cancels the negative impedance generated by the control delay of SVG, suppresses high-frequency oscillation and reduces high-frequency harmonic impedance.

[0015] A high-frequency oscillation suppression device for SVG with RLC impedance structure includes H-bridge cascade arms (2) and RLC parallel impedance (1). The H-bridge cascade arms (2) are composed of phase A H-bridge cascade arms (2), phase B H-bridge cascade arms (2), and phase C H-bridge cascade arms (2), and are connected to the AC power grid in a star or delta connection manner. The RLC parallel impedance (1) includes reactor L (11), capacitor C (12) and resistor R (13). Capacitor C (12) and resistor R (13) are connected in series to form RC branch (14). Reactor L (11) and RC branch (14) are connected in parallel to form RLC parallel impedance (1). The parallel impedance (1) of the RLC is connected in series with the H-bridge cascade arms (2) in each phase of the SVG.

[0016] The H-bridge cascade arm (2) consists of multiple power modules connected in series. The power modules are composed of full-bridge or half-bridge power sub-modules made of IGBTs.

[0017] The RLC parallel impedance (1) is connected in series above or below the corresponding phase H-bridge cascade arm (2): When the RLC parallel impedance (1) is connected in series below the corresponding phase H bridge cascade arm (2), the reactor L (11) and RC branch (14) share a common neutral point (3); or the reactor L (11) shares the reactor neutral point (4), and the RC branch (14) shares the RC neutral point (5), and the reactor neutral point (4) and RC neutral point (5) are designed as a double neutral point.

[0018] Compared with the prior art, the beneficial effects of the present invention are: 1. Through the hardware design and systematic parameter design of the RLC parallel impedance unit, the SVG exhibits stable positive impedance characteristics in the high-frequency band, effectively offsetting the high-frequency negative impedance caused by control delay, suppressing high-frequency oscillation between the SVG and the AC grid from the root, avoiding problems such as harmonic exceedance and system tripping caused by high-frequency oscillation, and significantly improving the operational stability of the SVG under complex conditions such as weak grid and high proportion of new energy grid connection. 2. The RLC parallel impedance unit can significantly reduce the impedance of SVG to high-frequency characteristic sub-impedances such as the 35th, 37th, 47th and 49th orders, reduce the amplitude of the modulation signal during harmonic mitigation, and reduce the modulation pressure of the chain H-bridge cascade topology. Compared with the traditional single reactor solution, the present invention improves the accuracy of high-frequency harmonic mitigation, while improving the dynamic response speed of the device to high-frequency harmonics and improving the power quality management effect. 3. The independent dual neutral point structural design enables the off-site arrangement of reactors and RC branches: the reactor L is relatively large and can be placed outside the valve hall; the capacitor C and resistor R are small in size and have high protection requirements, so they can be placed inside the valve hall; this design effectively frees up the internal space of the valve hall and is particularly suitable for applications with limited space, such as urban substations and offshore wind power platforms. 4. The design of replacing the fixed capacitor with a half-bridge sub-module group realizes the stepless adjustment of the equivalent capacitance value of the RLC parallel impedance unit; by using the SVG main control system to detect the harmonic content and oscillation state of the power grid in real time and dynamically switch the number of half-bridge sub-modules, the resonant frequency and impedance characteristics of the RLC parallel impedance unit can be optimized and adjusted according to the changes in power grid conditions, thereby improving the device's adaptability to complex and variable power grid conditions. 5. This invention is compatible with both star and delta connection, two mainstream wiring forms of chain H-bridge cascaded SVG, covering the core application scenarios of medium and high voltage SVG. Whether it is a new energy grid-connected power station (mostly using star connection) or an industrial load compensation (mostly using delta connection), the technical solution of this invention can be directly applied, which has good versatility and engineering promotion value. 6. The RLC parallel impedance unit is equivalent to a traditional reactor in the low-frequency band, which does not affect the basic reactive power compensation function of the SVG. This invention allows the SVG to be directly upgraded and modified in operation: it only needs to be connected in parallel to the RC branch at the original reactor position, or the whole device can be replaced with an RLC parallel impedance unit. There is no need to modify the control system parameters, resulting in low modification cost, short construction period and strong compatibility. 7. This invention not only provides hardware structural innovation, but also proposes a systematic high-frequency oscillation suppression method covering parameter design, layout optimization, and capacitance adjustment, solving the problem that existing technologies lack a systematic solution adapted to SVG. From the calculation of negative impedance characteristic frequency and the determination of RLC parameters to the selection of wiring form, optimized layout of land use, and dynamic capacitance adjustment, a complete technical chain is formed, providing a replicable and scalable technical solution for high-frequency oscillation suppression of chain-type H-bridge cascaded SVG. Attached Figure Description

[0019] Appendix Figure 1 This is a diagram of the overall structure of RLC parallel impedance units connected in series above the star-connected SVG phase chain H-bridge cascade topology. Appendix Figure 2 The diagram shows the overall structure of RLC parallel impedance units connected in series below the star-connected SVG phase chain H-bridge cascade topology with a common neutral point. Appendix Figure 3 A diagram showing the separate arrangement of reactor neutral point and RC neutral point for star-connected SVG; Appendix Figure 4 This is a structural diagram showing the replacement of capacitors with half-bridge sub-modules in a star-connected SVG. Appendix Figure 5 Overall structural diagram of an RLC parallel impedance unit adapted to a corner-connected SVG; Appendix Figure 6 A schematic diagram of a single RLC parallel impedance unit; Appendix Figure 7 This is a flowchart of a method for suppressing high-frequency oscillations in SVG. Detailed Implementation

[0020] The present invention will now be described in detail with reference to the accompanying drawings, but it should be noted that the implementation of the present invention is not limited to the following embodiments.

[0021] The following embodiments are implemented based on the technical solution of the present invention, providing detailed implementation methods and specific operation processes. However, the scope of protection of the present invention is not limited to the following embodiments. Unless otherwise specified, the methods used in the following embodiments are conventional methods. Example 1:

[0022] An SVG high-frequency oscillation suppression device with an RLC impedance structure includes an H-bridge cascaded arm (2) and an RLC parallel impedance (1) for reactive power compensation and high-frequency oscillation suppression in medium and high voltage power grids.

[0023] I. Overall Structure; The H-bridge cascade arm (2) consists of the A-phase H-bridge cascade arm, the B-phase H-bridge cascade arm, and the C-phase H-bridge cascade arm. Each phase H-bridge cascade arm (2) is composed of multiple power modules connected in series. The power modules are full-bridge power sub-modules or half-bridge power sub-modules composed of power devices such as IGBTs.

[0024] The RLC parallel impedance (1) is connected in series with the H-bridge cascade arm (2) in each phase of the SVG, that is, each phase H-bridge cascade arm (2) is connected in series with an independent RLC parallel impedance (1).

[0025] II. RLC parallel impedance structure; See Figure 6 The RLC parallel impedance (1) includes reactor L (11), capacitor C (12), and resistor R (13). Wherein: Capacitor C (12) and resistor R (13) are connected in series to form RC branch (14), and reactor L (11) is connected in parallel with RC branch (14) to form RLC parallel impedance (1).

[0026] III. Multiple connection methods under star connection; See Figures 1-4 The SVG adopts a star connection configuration. Based on actual engineering requirements, the RLC parallel impedance (1) can be selected to be connected in series above or below the corresponding phase H-bridge cascade arm (2): (a) Top-side connection method: See Figure 1 The RLC parallel impedance (1) is connected in series between the H-bridge cascade arm (2) and the AC grid input line, located above the arm. For example, in a star-connected SVG, the three input lines A, B, and C of the three-phase AC grid are connected to the upper end of the corresponding phase's RLC parallel impedance (1), and the lower end of the RLC parallel impedance (1) is connected to the input end of the H-bridge cascade arm (2) of that phase. The output ends of the H-bridge cascade arm (2) converge at the common neutral point (3), forming a typical star-connected topology. In newly built SVG projects, during the SVG body design stage, the RLC parallel impedance (1) is integrated above the arm, which facilitates overall layout and standardized design. It is suitable for scenarios such as new energy grid-connected power plants and industrial load compensation stations with high requirements for equipment integration. When the background harmonic content of the power grid (especially the 35th and above high-frequency harmonics) is high, the RLC parallel impedance (1) located above the arm can directly pre-process the harmonic current entering the SVG, reducing the impact of harmonics on the power module. The RLC parallel impedance (1) is arranged above the bridge arm, close to the power grid incoming line side. During maintenance, it does not need to go deep into the valve hall. The operating space is large and it is suitable for projects with high requirements for operation and maintenance convenience.

[0027] (ii) Connecting method below: When the RLC parallel impedance (1) is connected in series below the corresponding phase H-bridge cascade arm (2), two neutral point design schemes are further provided: 1. Public Neutral Point Design: See Figure 2The reactor L (11) and the RC branch (14) share a common neutral point (3). The three-phase RLC parallel impedance (1) is directly connected at the neutral point, which is compact and occupies a small area. That is, the lower end of the three-phase RLC parallel impedance (1) is directly connected to the same common neutral point (3), forming a star-connected neutral point bus. Inside the RLC parallel impedance (1), after the reactor L (11) and the RC branch (14) are connected in parallel, their common end is connected to the common neutral point (3).

[0028] 2. Double Neutral Point Design: See Figure 3 The reactor L (11) shares the reactor neutral point (4), and the RC branch (14) shares the RC neutral point (5), forming a dual neutral point structure where the reactor neutral point (4) and the RC neutral point (5) are independent of each other. This design can realize the off-site arrangement of the reactor and the RC branch, meeting the engineering requirements of the space-constrained scenario.

[0029] A. The connection relationship of the neutral point (4) of the reactor is as follows: The neutral point (4) of the reactor is the common connection point of the three-phase reactor L (11). One end of the three-phase reactor L (11) is connected to the lower end of the H-bridge cascade arm (2) of the corresponding phase, and the other end of the three-phase reactor L (11) is connected to the neutral point (4) of the reactor, forming a star connection structure of the reactor part.

[0030] B. The connection relationship of the RC neutral point (5) is as follows: The RC neutral point (5) is the common connection point of the three-phase RC branch (14). One end of the three-phase RC branch (14) is connected to the lower end of the H-bridge cascade arm (2) of the corresponding phase (the same as the parallel connection point of the reactor L (11), and the other end is connected to the RC neutral point (5) to form a star connection structure of the RC branch.

[0031] IV. Working Principle; Under power frequency operation conditions, the impedance of the RC branch (14) is much greater than the inductive reactance of the reactor L (11). The current mainly flows through the reactor L (11), so that the RLC parallel impedance (1) exhibits inductive characteristics as a whole, maintaining the basic reactive power compensation function of the SVG and not affecting the normal operation of the device.

[0032] At high frequencies (e.g., above 1000Hz), the inductive reactance of reactor L (11) increases significantly, while the capacitive reactance of RC branch (14) decreases. The current mainly flows through RC branch (14), and resistor R (13) plays a dominant role, making the overall resistance characteristic of the RLC parallel impedance (1) stable. This resistance characteristic can effectively offset the high-frequency negative impedance generated by the SVG due to the control delay, fundamentally suppressing the high-frequency oscillation between the SVG and the AC power grid. At the same time, it reduces the impedance of the SVG to characteristic sub-high frequency harmonics such as the 35th, 37th, 47th, and 49th orders, reduces the amplitude of the modulation signal during harmonic mitigation, and improves the stability of device operation and the accuracy of harmonic mitigation.

[0033] By connecting the RLC parallel impedance (1) in series with the H-bridge cascade arm (2) and adopting a flexible neutral point design, the inductive characteristics are maintained in the low-frequency band, without affecting the reactive power compensation function of the SVG foundation; the resistive characteristics are presented in the high-frequency band, effectively suppressing high-frequency oscillation and reducing high-frequency harmonic impedance; the common neutral point design and the dual neutral point design can be flexibly adapted to different engineering scenarios and meet the needs of site optimization; the structure is simple, the transformation cost is low, and the existing SVG can be directly upgraded and transformed, with strong compatibility. Example 2:

[0034] In this embodiment, the method and apparatus for suppressing high-frequency oscillations of SVG with an RLC impedance structure are the same as in Embodiment 1, except that a method for suppressing high-frequency oscillations of SVG with an RLC impedance structure is added.

[0035] This paper takes a 35kV, 20MVA star-connected chain H-bridge cascaded SVG engineering application as an example for specific illustration. This SVG is used in new energy grid connection scenarios, requiring minimal valve hall footprint and adaptability to complex grid conditions, with a minimum total current control delay. =200μs, the proportional gain of the current controller, after conversion to a true value, is 80. The proportional gain of the controller is usually designed and debugged in per-unit form, but in actual physical systems, it needs to be converted to a true value (actual ohmic value) for comparison or matching with hardware parameters (such as the resistance value of resistor R). The conversion expression for the true value is: ; in: This represents the true value of the proportionality coefficient, in units of Ω. This represents the proportionality factor at per-unit values; This represents the voltage reference value, in units of V; This indicates the current reference value, with the unit being A.

[0036] Assume a 35kV SVG system: Line voltage RMS value KV; Rated capacity MVA; but: Voltage reference value KV; Current reference value A; If in the controller design, the per-unit value of the proportional coefficient but: Ω; S1. Add an RLC parallel impedance (1) between the H-bridge cascade arm (2) and the AC power grid. The optimal parameters for reactor L(11) and capacitor C(12) are determined as follows: The parallel resonant frequency formed by capacitor C(12) and reactor L(11) is greater than 100Hz and lower than the negative impedance characteristic frequency of SVG. : SVG negative impedance characteristic frequency The calculation formula is: ; in: This indicates the total delay of the SVG's current control, in seconds. Substitute μs into the formula; Hz; That is, the negative impedance characteristic frequency of SVG is 1250Hz.

[0037] Design the parallel resonant frequency of the RLC parallel impedance (1). According to design requirements Must meet: 100Hz <1250Hz, select Hz.

[0038] According to the formula for calculating the parallel resonant frequency: ; Select the inductance value of reactor L(11) as 40mH, and substitute it into the formula to calculate the capacitance value of capacitor C(12): C= ; Therefore, the parameters of reactor L(11) are determined to be 40mH and the parameters of capacitor C(12) are determined to be 2.533μF.

[0039] S3. Determine the optimal resistance value of resistor R (13) in the parallel impedance (1) of RLC; The optimal resistance value of resistor R(13) is determined as follows: The resistance of resistor R (13) is more than twice the actual value of the proportional coefficient of the SVG current controller.

[0040] The current controller is the proportional-integral (PI) control element used by the SVG for current feedback control; The proportional coefficient of the current controller is the proportional element coefficient in the PI control loop, and it needs to be converted to the actual value.

[0041] The conversion expression for the true value of the proportionality coefficient is: The conversion expression for the true value is: ; in: This represents the true value of the proportionality coefficient, in units of Ω. This represents the proportionality factor at per-unit values; This represents the voltage reference value, in units of V; This indicates the current reference value, with the unit being A.

[0042] The proportional coefficient of the current controller is 80Ω after conversion to the actual value. According to the design requirements, the resistance value of resistor R (13) needs to be more than twice 80Ω, that is, more than 160Ω. The resistance value of resistor R (13) is selected as 200Ω, which meets the design requirements.

[0043] S4. Determine the wiring configuration of the SVG; The SVG adopts a star connection configuration. Based on engineering requirements, the RLC parallel impedance (1) is connected in series below the H-bridge cascade arm (2), and a dual neutral point design is adopted where the reactor neutral point (4) and the RC neutral point (5) are independent of each other. (See...) Figure 3 .

[0044] If the SVG is connected in a corner configuration, then each arm of the H-bridge cascade (2) should be connected in series with an RLC parallel impedance (1), and the parameters of each RLC parallel impedance (1) should be perfectly matched. The structure is shown in the figure. Figure 5 .

[0045] S5. Optimized layout of land use; The project has strict limitations on the floor space of the valve hall, therefore a dual neutral point design is adopted to achieve the off-site layout scheme: A 40mH reactor L(11) is placed in the grid-side area outside the valve hall. A 2.533μF capacitor C(12) and a 200Ω resistor R(13) are integrated and placed next to the SVG cabinet inside the valve hall. The reactor L(11) is electrically connected to the RC branch (14) via a high-voltage cable. See Figure 3 .

[0046] S6. Dynamic capacitance adjustment; Due to the complex operating conditions of the power grid and the variable harmonics and oscillations, in order to further improve the adaptability of the device, capacitor C (12) was replaced with a half-bridge sub-module group (15), see Figure 4 The half-bridge module group (15) is composed of multiple half-bridge modules of the same specifications connected in series.

[0047] The harmonic content of the power grid and the oscillation state of the SVG are detected in real time by the SVG master control system. The number of half-bridge sub-modules is dynamically switched according to the detection results, thereby adjusting the equivalent capacitance value of the RLC parallel impedance (1) and realizing the online optimization and adjustment of impedance characteristics.

[0048] S7. High-frequency oscillation suppression is achieved by utilizing the wide-band impedance characteristics of the RLC parallel impedance (1). After the SVG is put into operation, the RLC parallel impedance (1) exhibits different impedance characteristics in different frequency bands: In the low-frequency range (such as 50Hz power frequency), the impedance of the RC branch (14) is much greater than the inductive reactance of the reactor L (11). The current mainly flows through the reactor L (11), so that the RLC parallel impedance (1) presents an overall inductive characteristic of 40mH, maintaining the power frequency reactive power compensation capability of the SVG and not affecting the basic function of the device.

[0049] At high frequencies (e.g., above 1000Hz), the inductive reactance of reactor L (11) increases significantly, while the capacitive reactance of RC branch (14) decreases. The current mainly flows through RC branch (14), and resistor R (13) plays a dominant role, making the RLC parallel impedance (1) exhibit a stable resistance characteristic of 200Ω. This resistance characteristic effectively offsets the high-frequency negative impedance generated by the SVG due to the control delay, fundamentally suppressing the high-frequency oscillation between the SVG and the AC power grid; at the same time, it significantly reduces the impedance of the SVG to high-frequency harmonics such as the 35th, 37th, 47th, and 49th orders, reduces the amplitude of the modulation signal during harmonic mitigation, and greatly improves the operating stability and harmonic mitigation accuracy of the SVG.

[0050] By designing the parameters of the RLC parallel impedance (1), the parallel resonant frequency (500Hz) is made to satisfy 100Hz < The design requirement of <1250Hz ensures that the device plays its expected role in the critical frequency band; the resistance value of resistor R (13) (200Ω) is more than twice the actual value of the proportional coefficient of the current controller (160Ω), which meets the design requirements and ensures that the device presents stable resistance characteristics in the high frequency band; the dual neutral point design realizes the off-site arrangement of reactor and RC branch, which meets the engineering requirements of limited space in the valve hall; the design of the half-bridge sub-module group (15) realizes the dynamic adjustment of the equivalent capacitance value, which improves the adaptability of the device to complex power grid conditions; the device maintains inductive characteristics in the 50Hz power frequency band without affecting the basic reactive power compensation; it presents resistive characteristics in the high frequency band, effectively suppressing high frequency oscillations and reducing high frequency harmonic impedance.

[0051] This invention, through the hardware design and systematic parameter design of the RLC parallel impedance unit, enables the SVG to exhibit stable positive impedance characteristics in the high-frequency band, effectively offsetting the high-frequency negative impedance caused by control delay. This fundamentally suppresses high-frequency oscillations between the SVG and the AC grid, avoiding problems such as harmonic exceedances and system tripping caused by high-frequency oscillations. It significantly improves the operational stability of the SVG under complex conditions such as weak grids and high-proportion renewable energy grid integration. The RLC parallel impedance unit can significantly reduce the impedance of the SVG to high-frequency characteristic sub-impedances such as the 35th, 37th, 47th, and 49th orders, reducing the amplitude of the modulation signal during harmonic mitigation and lowering the modulation pressure of the cascaded H-bridge topology. Compared with traditional single reactor solutions, this invention... This invention improves the accuracy of high-frequency harmonic mitigation while enhancing the device's dynamic response speed to high-frequency harmonics, thus improving power quality management. The independent dual-neutral point design allows for the off-site arrangement of the reactor and RC branch: the reactor L, being relatively large, can be placed outside the valve hall; the capacitor C and resistor R, being small and requiring high protection, can be placed inside the valve hall. This design effectively frees up internal space in the valve hall, making it particularly suitable for space-constrained applications such as urban substations and offshore wind power platforms. The design replaces the fixed capacitor with a half-bridge submodule group, enabling stepless adjustment of the equivalent capacitance value of the RLC parallel impedance unit. The SVG main control system monitors the grid harmonic content and oscillation status in real time, dynamically switching the half-bridge submodules. The number of bridge modules allows for optimized adjustment of the resonant frequency and impedance characteristics of the RLC parallel impedance unit according to changes in grid conditions, enhancing the device's adaptability to complex and variable grid conditions. This invention is compatible with both star and delta connection types of chain-type H-bridge cascaded SVG, covering core application scenarios for medium and high voltage SVGs. Whether it's a new energy grid-connected power station (mostly using star connection) or industrial load compensation (mostly using delta connection), the technical solution of this invention can be directly applied, demonstrating good versatility and engineering promotion value. The RLC parallel impedance unit is equivalent to a traditional reactor in the low-frequency band, without affecting the basic reactive power compensation function of the SVG, allowing this invention to directly apply to already operating SVGs. Upgrading G: Only requires connecting an RC branch in parallel at the original reactor location, or replacing the entire reactor with an RLC parallel impedance unit. No modification to control system parameters is needed, resulting in low upgrade costs, short construction time, and strong compatibility. This invention not only provides hardware structural innovation but also proposes a systematic high-frequency oscillation suppression method encompassing parameter design, layout optimization, and capacitance adjustment, addressing the lack of a systematic solution adapted to SVG in existing technologies. From negative impedance characteristic frequency calculation and RLC parameter determination to wiring selection, optimized layout, and dynamic capacitance adjustment, a complete technical chain is formed, providing a replicable and scalable technical solution for high-frequency oscillation suppression of chain-type H-bridge cascaded SVGs.

Claims

1. A method for suppressing high frequency oscillation of SVG with RLC impedance structure, characterized in that, include: S1. Add an RLC parallel impedance (1) between the H-bridge cascade arm (2) and the AC power grid. S2. Determine the optimal parameters for reactor L (11) and capacitor C (12) in the parallel impedance (1) of RLC; S3. Determine the optimal resistance value of resistor R (13) in the parallel impedance (1) of RLC; S4. Determine the wiring configuration of the SVG; If it is a star-connected SVG, select to connect the RLC parallel impedance (1) in series above or below the H-bridge cascade arm (2); If it is a corner SVG, each arm in the H-bridge cascade arm (2) is connected in series with an RLC parallel impedance (1), and the parameters of each RLC parallel impedance (1) are perfectly matched; S5. High-frequency oscillation suppression is achieved by utilizing the wide-band impedance characteristics of the RLC parallel impedance (1). In the low-frequency band, the parallel impedance of RLC (1) is equivalent to a reactor, maintaining the power frequency reactive power compensation capability of SVG; In the high-frequency band, the parallel impedance of RLC (1) is equivalent to a resistor, which cancels the high-frequency negative impedance characteristics of SVG, suppresses high-frequency oscillations and reduces the high-frequency characteristic subharmonic impedances of SVG at 35, 37, 47 and 49.

2. The SVG high frequency oscillation suppression method with RLC impedance structure according to claim 1, characterized in that, This also includes optimizing the layout of the land area; If the area of ​​the valve hall is limited, a dual neutral point design with independent reactor neutral point (4) and RC neutral point (5) is adopted. The reactor L (11) is placed outside the valve hall, and the capacitor C (12) and resistor R (13) are placed inside the valve hall.

3. The method for suppressing high-frequency oscillations of an SVG with an RLC impedance structure according to claim 1, characterized in that, It also includes dynamic capacitance adjustment; If the power grid operating conditions fluctuate frequently and the harmonic and oscillation states are varied, the capacitor C (12) is replaced with a half-bridge sub-module group (15). The harmonic content and oscillation state of the power grid are detected in real time through the SVG system. Based on the detection results, the number of half-bridge sub-modules is switched on and off, and the equivalent capacitance value of the parallel impedance (1) of RLC is dynamically adjusted.

4. The method for suppressing high-frequency oscillations of an SVG with an RLC impedance structure according to claim 1, characterized in that, In S2, the optimal parameters of the reactor L (11) and capacitor C (12) are determined as follows: The parallel resonant frequency formed by capacitor C(12) and reactor L(11) is greater than 100Hz and lower than the negative impedance characteristic frequency of SVG. ; SVG negative impedance characteristic frequency The calculation formula is: ； in: This represents the total delay of the SVG's current control, measured in seconds (s).

5. The method for suppressing high-frequency oscillations of an SVG with an RLC impedance structure according to claim 1, characterized in that, In S3, the optimal resistance value of resistor R (13) is determined as follows: The resistance of resistor R (13) is more than twice the actual value of the proportional coefficient of the SVG current controller.

6. The method for suppressing high-frequency oscillations of an SVG with an RLC impedance structure according to claim 5, characterized in that, The current controller is the proportional-integral control element used by the SVG for current feedback control; the proportional coefficient of the current controller is the proportional element coefficient in the proportional-integral control element, and needs to be converted to the actual value. The conversion expression for the true value is: ； in: This represents the true value of the proportionality coefficient, in units of Ω. This represents the proportionality factor at per-unit values; This represents the voltage reference value, in units of V; This indicates the current reference value, with the unit being A.

7. The method for suppressing high-frequency oscillations of an SVG with an RLC impedance structure according to claim 1, characterized in that, In S5: In the low-frequency band, the RLC parallel impedance (1) is equivalent to a reactor. At the power frequency, the impedance of the RC branch (14) is much greater than the inductive reactance of the reactor L (11). The current flows through the reactor L (11), making the RLC parallel impedance (1) exhibit inductive characteristics as a whole, thus maintaining the power frequency reactive power compensation capability of the SVG. In the high-frequency band, the RLC parallel impedance (1) is equivalent to a resistor. In the high-frequency band, the inductive reactance of the reactor L (11) increases, the capacitive reactance of the RC branch (14) decreases, the current flows through the RC branch (14), and the resistor R (13) plays a dominant role, so that the RLC parallel impedance (1) as a whole presents a resistive characteristic, which cancels the negative impedance generated by the SVG due to the control delay, suppresses high-frequency oscillation and reduces high-frequency harmonic impedance.

8. A high-frequency oscillation suppression device for an SVG with an RLC impedance structure that implements the method according to any one of claims 1-7, characterized in that, Includes H-bridge cascade arm (2) and RLC parallel impedance (1). The H-bridge cascade arm (2) is composed of phase A H-bridge cascade arm (2), phase B H-bridge cascade arm (2), and phase C H-bridge cascade arm (2), and is connected to the AC power grid in a star or delta connection manner. The RLC parallel impedance (1) includes reactor L (11), capacitor C (12) and resistor R (13). Capacitor C (12) and resistor R (13) are connected in series to form RC branch (14). Reactor L (11) and RC branch (14) are connected in parallel to form RLC parallel impedance (1). The parallel impedance (1) of the RLC is connected in series with the H-bridge cascade arms (2) in each phase of the SVG.

9. The SVG high-frequency oscillation suppression device with RLC impedance structure according to claim 8, characterized in that, The H-bridge cascaded bridge arm (2) is composed of multiple power modules connected in series. The power modules are composed of full-bridge or half-bridge power sub-modules made of IGBTs.

10. The SVG high-frequency oscillation suppression device with RLC impedance structure according to claim 8, characterized in that, The RLC parallel impedance (1) is connected in series above or below the corresponding phase H-bridge cascade arm (2): When the RLC parallel impedance (1) is connected in series below the corresponding phase H bridge cascade arm (2), the reactor L (11) and RC branch (14) share a common neutral point (3); or the reactor L (11) shares the reactor neutral point (4), and the RC branch (14) shares the RC neutral point (5), and the reactor neutral point (4) and RC neutral point (5) are designed as a double neutral point.

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