Solar cell and method of manufacturing the same, stacked cell, photovoltaic module

Abstract

This application provides a solar cell and its fabrication method, a tandem solar cell, and a photovoltaic module. The solar cell fabrication method includes: providing a substrate; forming a tunneling layer and a semiconductor layer on a second surface of the substrate; performing a first laser treatment on the semiconductor layer to form a pre-doped semiconductor layer; performing a heat treatment on the pre-doped semiconductor layer to transform it into a doped conductive layer; forming a passivation layer on the surface of the doped conductive layer; the second surface of the substrate includes alternately arranged first and second regions; performing a second laser treatment on the first region, wherein the energy density of the first laser treatment is lower than the energy density of the second laser treatment; performing a wet etching treatment on the first region; and forming an electrode in the first region. This application can reduce the thermal damage problem caused by laser grooving.

Description

Technical Field

[0001] This application relates to the field of solar cell technology, and in particular to a solar cell and its preparation method, a tandem cell, and a photovoltaic module. Background Technology

[0002] Photovoltaic cells are a type of clean power generation system that uses sunlight to generate electricity. Photovoltaic power generation systems are expected to meet electricity demand in the future without harming the environment. As a result, public attention has been focused on photovoltaic power generation systems. The core component of a photovoltaic power generation system is a solar cell, which can directly convert sunlight into electrical energy.

[0003] The fabrication of solar cells requires laser grooving to form electrode contact points, but current laser grooving technology cannot meet this requirement. Summary of the Invention

[0004] This application provides a solar cell and its preparation method, a tandem cell, and a photovoltaic module, which can effectively reduce the thermal damage problem caused by laser grooving at electrode contact points.

[0005] In a first aspect, embodiments of this application provide a method for preparing a solar cell, comprising:

[0006] A substrate is provided, the substrate having a first surface and a second surface disposed opposite to each other;

[0007] A tunneling layer and a semiconductor layer are formed on the second surface of the substrate;

[0008] The semiconductor layer undergoes a first laser treatment to form a pre-doped semiconductor layer;

[0009] The pre-doped semiconductor layer is heat-treated to transform it into a doped conductive layer.

[0010] A passivation layer is formed on the surface of the doped conductive layer;

[0011] The second surface of the substrate includes alternating first and second regions. The first region is subjected to a second laser treatment, and the energy density of the first laser treatment is less than the energy density of the second laser treatment.

[0012] The first region is subjected to wet etching.

[0013] An electrode is formed in the first region.

[0014] Secondly, embodiments of this application provide a solar cell, the solar cell comprising:

[0015] The substrate has a first surface and a second surface;

[0016] The tunneling layer and the doped conductive layer are located on the second surface of the substrate;

[0017] A passivation layer located on the surface of the doped conductive layer;

[0018] An electrode is located on the second surface of a substrate, the second surface of the substrate comprising alternating first and second regions, wherein the electrode is electrically connected to the substrate in the first region.

[0019] Thirdly, embodiments of this application provide a tandem solar cell, including a perovskite top cell and a crystalline silicon bottom cell stacked sequentially, wherein the crystalline silicon bottom cell is a solar cell formed by the method of preparing a solar cell in the first aspect or a solar cell in the second aspect.

[0020] Fourthly, embodiments of this application provide a photovoltaic module, comprising:

[0021] A battery string is formed by connecting solar cells, solar cells, or tandem cells formed by the first method of preparing solar cells;

[0022] Encapsulation layer, which covers the surface of the battery string;

[0023] Cover plate, used to cover the surface of the encapsulation layer away from the battery string.

[0024] The beneficial effects of this application are as follows:

[0025] This application performs a first laser treatment and thermal treatment on the semiconductor layer to form a doped conductive layer. The first laser treatment has a low energy density, which effectively reduces the thermal shock and laser damage to the substrate during the laser treatment process. It also allows for precise control of the activation concentration and junction depth of the dopant elements in the doped conductive layer, which is beneficial for forming a uniform and flat heavily doped region and reducing the metal-semiconductor contact resistance. This application performs a second laser treatment on the passivation layer and the doped conductive layer, etching the passivation layer and the doped conductive layer located in the first region. Further wet etching is then performed on the first region to etch the tunneling layer. This application uses a two-step process of high-energy-density second laser treatment combined with wet etching to remove the film layer in the first region. On the one hand, this greatly reduces the thermal shock and lattice damage to the substrate caused by the laser, effectively suppressing thermal damage to the substrate and reducing the recombination center density from the source. On the other hand, the combination of second laser treatment and wet etching results in neat edges of the exposed openings in the first region, and a smooth and undamaged substrate surface in the first region, which is beneficial for the filling of the electrode paste and the formation of a high-quality ohmic contact between the electrode paste and the substrate. The method for fabricating solar cells in this application can greatly reduce laser thermal damage while improving the ohmic contact between the electrode and the semiconductor, thereby improving the photoelectric conversion efficiency of the fabricated solar cells. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of a solar cell fabrication process provided in an embodiment of this application;

[0027] Figure 2 A schematic diagram of a solar cell provided in an embodiment of this application;

[0028] Figure 3 This is a schematic diagram of the structure of a TOPCon battery provided in an embodiment of this application;

[0029] Figure 4 This is a schematic diagram of the structure of a BC battery provided in an embodiment of this application;

[0030] Figure 5 This is a schematic diagram of the structure of the stacked battery provided in the embodiments of this application;

[0031] Figure 6 This is a schematic diagram of the structure of a photovoltaic module provided in an embodiment of this application.

[0032] In the attached image:

[0033] 1000 - Photovoltaic modules;

[0034] 100-Solar Cell;

[0035] 200 - First cover plate;

[0036] 300 - First encapsulating adhesive layer;

[0037] 400 - Second encapsulating adhesive layer;

[0038] 500 - Second cover plate;

[0039] 600-TOPCon battery;

[0040] 700-BC battery;

[0041] 2000-Stacked Battery;

[0042] 2001-Perovskite Top Cell;

[0043] 2002 - Crystalline silicon bottom cell;

[0044] 1-Substrate; 1a-First region; 1b-Second region; 2-Tunneling layer; 3-Doped conductive layer; 4-Passivation layer; 5-Electrode; 6-Opening;

[0045] 11-First substrate; 11a-First substrate region 1; 11b-First substrate region 2; 12-First emitter; 13-First tunneling layer; 14-First doped conductive layer; 15-First passivation layer; 16-First electrode; 17-Second passivation layer; 18-Second electrode; 19-First opening;

[0046] 21-Second substrate; 21A-First conductive region; 21B-Second conductive region; 21a-Second substrate region one; 21b-Second substrate region two; 21c-Second substrate region three; 21d-Second substrate region four; 22-Second emitter; 23-Second tunneling layer; 24-Second doped conductive layer; 25-Third tunneling layer; 26-Third doped conductive layer; 27-Fourth passivation layer; 28-Fifth passivation layer; 29-Third electrode; 210-Fourth electrode; 211-Third passivation layer; 212-Second opening; 213-Third opening. Detailed Implementation

[0047] In this embodiment of the application, unless otherwise stated, the character " / " indicates that the preceding and following objects are in an OR relationship. For example, A / B can represent A or B. "AND / OR" describes the relationship between the associated objects, indicating that three relationships can exist. For example, A AND / OR B can represent: A existing alone, A and B existing simultaneously, and B existing alone.

[0048] It should be noted that the terms "first" and "second" used in the embodiments of this application are used only for distinguishing descriptive purposes and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated, nor should they be construed as indicating or implying order.

[0049] In the embodiments of this application, "at least one" means one or more, and "more than one" means two or more. Furthermore, "at least one of the following" or similar expressions refer to any combination of these items, which may include any combination of a single item or a plurality of items. For example, at least one of A, B, or C can represent: A, B, C, A and B, A and C, B and C, or A, B, and C. Each of A, B, and C can be an element itself or a set containing one or more elements.

[0050] In this application, terms such as "exemplary," "in some embodiments," and "in another embodiment" are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" in this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of the term "exemplary" is intended to present the concept in a concrete manner.

[0051] In the embodiments of this application, the term "equal to" can be used in conjunction with "greater than" to apply to technical solutions employing the condition of "greater than", and can also be used in conjunction with "less than" to apply to technical solutions employing the condition of "less than". It should be noted that when "equal to" is used with "greater than", it cannot be used with "less than"; and when "equal to" is used with "less than", it cannot be used with "greater than".

[0052] This application provides a method for preparing a solar cell. Figure 1 A schematic diagram of a solar cell fabrication process is shown, such as... Figure 1 As shown, the method for fabricating a solar cell includes the following steps:

[0053] A substrate is provided, the substrate having a first surface and a second surface disposed opposite to each other;

[0054] A tunneling layer and a semiconductor layer are formed on the second surface of the substrate;

[0055] The semiconductor layer undergoes a first laser treatment to form a pre-doped semiconductor layer;

[0056] The pre-doped semiconductor layer is heat-treated to transform it into a doped conductive layer.

[0057] A passivation layer is formed on the surface of the doped conductive layer;

[0058] The second surface of the substrate includes alternating first and second regions. The first region is subjected to a second laser treatment, and the energy density of the first laser treatment is less than the energy density of the second laser treatment.

[0059] The first region is subjected to wet etching.

[0060] An electrode is formed in the first region.

[0061] In the above scheme, this application performs a first laser treatment and thermal treatment on the semiconductor layer to form a doped conductive layer. The energy density of the first laser treatment is low, which can effectively reduce the thermal shock and laser damage to the substrate during the laser treatment process. Moreover, it can precisely control the activation concentration and junction depth of the dopant elements in the doped conductive layer, which is conducive to forming a uniform and flat heavily doped region and reducing the metal-semiconductor contact resistance. This application performs a second laser treatment on the passivation layer and the doped conductive layer to etch the passivation layer and the doped conductive layer located in the first region, and further performs wet etching on the first region to etch the tunneling layer. This application uses a two-step process of second laser treatment with higher energy density combined with wet etching to remove the film layer in the first region. On the one hand, it greatly reduces the thermal shock and lattice damage to the substrate caused by the laser, effectively suppresses the thermal damage of the substrate, and reduces the recombination center density from the source. On the other hand, the combination of second laser treatment and wet etching makes the exposed opening edge of the first region neat and the substrate surface in the first region smooth and undamaged, which is conducive to the filling of electrode paste and the formation of high-quality ohmic contact between the electrode paste and the substrate. The method for fabricating solar cells in this application can greatly reduce laser thermal damage while improving the ohmic contact between the electrode and the semiconductor, thereby improving the photoelectric conversion efficiency of the fabricated solar cells.

[0062] Optionally, the energy density of both the first and second laser treatments is less than or equal to 2000 mJ / cm². 2 Specifically, it can be 50 mJ / cm 2 100 mJ / cm 2 300 mJ / cm 2 500 mJ / cm 2 800 mJ / cm 2 1000 mJ / cm 2 1500mJ / cm 2 1800 mJ / cm 2 2000 mJ / cm 2 Or any value within the range of any two of the above values. In this application, the energy densities of both the first and second laser treatments are controlled at low levels, with the energy density of the first laser treatment being lower than that of the second laser treatment. By controlling the laser energy density in stages, precise processing is achieved while minimizing thermal damage.

[0063] The preparation method of the solar cell of this application is described in detail below.

[0064] S100, A substrate is provided, the substrate having a first surface and a second surface disposed opposite to each other.

[0065] In some embodiments, the substrate is an N-type crystalline silicon substrate (or silicon wafer), but it can also be a P-type crystalline silicon substrate (silicon wafer). The crystalline silicon substrate (or silicon wafer) is, for example, a polycrystalline silicon substrate, a monocrystalline silicon substrate, a microcrystalline silicon substrate, or a silicon carbide substrate; the specific type of substrate is not limited in the embodiments of this application. Optionally, the substrate is an N-type monocrystalline silicon substrate, and the doping element of the N-type monocrystalline silicon substrate is at least one of nitrogen, phosphorus, arsenic, antimony, or bismuth.

[0066] In this application, the substrate includes a first surface and a second surface disposed opposite to each other. For example, the first surface refers to the front surface of the substrate (also known as the light-receiving surface), that is, the surface that receives sunlight, and the second surface refers to the surface opposite to the front surface, that is, the rear surface (also known as the back-lighting surface).

[0067] In some embodiments, the first and second surfaces of the substrate can be texturized to form a textured surface (e.g., a pyramid structure). The texturing process can be chemical etching, laser etching, mechanical etching, plasma etching, etc., and is not limited thereto. For example, a NaOH solution can be used to texturize the first and second surfaces of a silicon wafer. Due to the anisotropic corrosion properties of the NaOH solution, a pyramid-shaped textured surface can be prepared.

[0068] In this embodiment, texturing is used to create a textured surface on the substrate, which produces a light-trapping effect, increasing the amount of light absorbed by the solar cell and thus improving the conversion efficiency of the solar cell.

[0069] In some embodiments, the method for fabricating a solar cell further includes the step of forming a first surface passivation layer on a first surface of a substrate. It should be noted that the first surface passivation layer can also reduce incident light reflection; in some instances, it may be referred to as an anti-reflection layer. For example, a chain magnetron sputtering process can be used to form the first surface passivation layer.

[0070] In some embodiments, the first surface passivation layer includes, but is not limited to, single-layer or multi-layer oxide structures such as silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide. Of course, other types of passivation layers can also be used, and the present invention does not limit the specific material of the first surface passivation layer.

[0071] In some implementations, plasma-enhanced chemical vapor deposition can be used to deposit the first surface passivation layer. Of course, other methods can also be used, such as organic chemical vapor deposition.

[0072] S200, a tunneling layer and a semiconductor layer are formed on the second surface of the substrate.

[0073] In some embodiments, the tunneling layer can be made of one or more dielectric materials with tunneling properties, such as silicon oxide, silicon nitride, silicon oxynitride, molybdenum oxide, hafnium oxide, silicon carbide, magnesium fluoride, nanocrystalline silicon, intrinsic amorphous silicon, and intrinsic polycrystalline silicon, forming a single-layer or multi-layer structure. The tunneling layer can be formed using chemical vapor deposition, physical vapor deposition, or atomic layer deposition processes.

[0074] In some embodiments, the material of the tunneling layer includes at least one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, and silicon oxynitride.

[0075] In some implementations, a semiconductor layer is formed on the surface of the tunneling layer using chemical vapor deposition, physical vapor deposition, or atomic layer deposition processes.

[0076] In some embodiments, the process after S200 and before S300 further includes: forming a doped source layer on the surface of the semiconductor layer, the doped source layer containing phosphorus. It is understood that the conductivity type of the doped source is the same as the conductivity type of the dopant element in the substrate.

[0077] Specifically, a material containing a dopant source can be coated onto the surface of a semiconductor layer, for example, by spin coating. The material containing the dopant source can be, for example, an aqueous solution of phosphoric acid.

[0078] S300, Perform a first laser treatment on the semiconductor layer to form a pre-doped semiconductor layer.

[0079] In some embodiments, when a doped source layer is not formed on the surface of the semiconductor layer, a gaseous atmosphere containing phosphorus can be set on the second surface of the substrate during the first laser treatment. For example, it can be gaseous POCl3.

[0080] In some embodiments, the energy density of the first laser treatment is 100 mJ / cm². 2 ~300mJ / cm 2 Specifically, it can be 100mJ / cm 2 130mJ / cm 2 150mJ / cm 2 180mJ / cm 2 200mJ / cm 2 220mJ / cm 2 250mJ / cm 2 280mJ / cm 2 300mJ / cm 2 Or any value within the range of any two of the above values. By controlling the energy density of the first laser treatment within the above range, the crystallization and doping of the semiconductor layer can be achieved simultaneously, while avoiding the first laser treatment from burning through the semiconductor layer and tunneling layer, and reducing the thermal shock and lattice damage to the second surface of the substrate caused by the first laser treatment.

[0081] In some embodiments, the laser used for the first laser treatment is infrared light or green light, with infrared light corresponding to a wavelength of 1064 nm and green light corresponding to a wavelength of 532 nm. Infrared light or green light can produce a lower energy density.

[0082] In some embodiments, the pulse width of the first laser treatment is 10ns to 100ns, specifically 10ns, 20ns, 30ns, 40ns, 50ns, 60ns, 70ns, 80ns, 90ns, 100ns, or any value within the range of any two of the above values.

[0083] In some embodiments, the scanning speed of the first laser processing is 1 m / s to 10 m / s, specifically 1 m / s, 2 m / s, 3 m / s, 4 m / s, 5 m / s, 6 m / s, 7 m / s, 8 m / s, 9 m / s, 10 m / s, or any value within the range of any two of the above values.

[0084] This application controls the laser type, wavelength, pulse width, and scanning speed of the first laser processing, so that the laser energy is mainly absorbed by the semiconductor layer and converted into a polycrystalline silicon layer. At the same time, phosphorus atoms in the material containing the dopant source (such as a phosphorus source) are activated and propelled into the substrate to form a selectively heavily doped N++ region in the first region.

[0085] S400. The pre-doped semiconductor layer is heat-treated to transform it into a doped conductive layer.

[0086] In some embodiments, the heat treatment temperature is 700°C to 1200°C, specifically 700°C, 800°C, 900°C, 1000°C, 1100°C, 1200°C, or any value within the range of any two of the above values.

[0087] In this application, through heat treatment, a dopant source (e.g., a phosphorus source) reacts with a pre-doped semiconductor layer to form doped atoms that diffuse into the interior of the pre-doped semiconductor layer.

[0088] In some embodiments, the doping concentration of the conductive layer is 1×10⁻⁶. 20 cm -3 ~5×10 20 cm -3 Specifically, it can be 1×10 20 cm -3 2×10 20 cm -3 3×10 20 cm -3 4×10 20 cm -3 5×10 20 cm -3 Or any value within the range formed by any two of the above values.

[0089] S500: A passivation layer is formed on the surface of the doped conductive layer.

[0090] The passivation layer can reduce the minority carrier concentration on the substrate surface by utilizing the passivation effect, suppress carrier recombination on the battery surface, thereby reducing the surface recombination rate. It can also reduce the series resistance and improve the electron transport capability.

[0091] In some implementations, the process for forming the passivation layer includes, but is not limited to, chain magnetron sputtering. Of course, other methods can also be used, such as organic chemical vapor deposition.

[0092] In some embodiments, the passivation layer material includes at least one of hydrogen-containing silicon nitride, hydrogen-containing silicon oxynitride, hydrogen-containing silicon carbon oxynitride, and hydrogen-containing silicon carbon oxynitride. The passivation layer is a single-layer or multi-layer film structure prepared from the above materials, and the passivation layer of the above materials has excellent surface passivation properties.

[0093] S600, the second surface of the substrate includes alternating first and second regions, and the first region is subjected to a second laser treatment.

[0094] It should be noted that the first region in this application refers to the region that is in contact with the electrode, i.e., the metallized region; the second region refers to the region that is not in contact with the electrode, i.e., the non-metallized region.

[0095] Since a stacked structure of a tunneling layer, a doped conductive layer, and a passivation layer has been formed on the second surface of the substrate in the aforementioned S100~S500 processes, the passivation layer and the doped conductive layer of the metallized region can be removed by laser processing of the first region.

[0096] In some embodiments, the energy density of the second laser treatment is less than or equal to 2000 mJ / cm². 2 Specifically, it could be 500mJ / cm 2 800mJ / cm 2 1000mJ / cm 2 1200mJ / cm 2 1500mJ / cm 2 1800mJ / cm 2 2000mJ / cm 2 Or any value within the range of any two of the above values. Optionally, the energy density of the second laser treatment is 500 mJ / cm². 2 ~2000mJ / cm 2 .

[0097] By controlling the energy density of the second laser treatment within the aforementioned range, the passivation layer and doped conductive layer in the metallized region can be precisely removed, and etching can be stopped at the tunneling layer, thereby improving the etching accuracy and reducing the thermal shock and lattice damage to the second surface of the substrate caused by the second laser treatment.

[0098] It should be noted that the first laser treatment is a doping treatment, and the second laser treatment is an etching treatment. The energy density of the first laser treatment in this application is less than the energy density of the second laser treatment.

[0099] In some embodiments, the laser used for the second laser treatment is ultraviolet light with a wavelength of 355 nm. Ultraviolet light can produce a large energy density.

[0100] In some embodiments, the pulse width of the second laser processing is 10ns to 30ns, specifically 10ns, 15ns, 20ns, 25ns, 30ns, or any value within the range of any two of the above values.

[0101] In some embodiments, the scanning speed of the second laser processing is 0.5 m / s to 2 m / s, specifically 1 m / s, 2 m / s, 3 m / s, 4 m / s, 5 m / s, 6 m / s, 7 m / s, 8 m / s, 9 m / s, 10 m / s, or any value within the range of any two of the above values.

[0102] By controlling the laser wavelength of the second laser treatment at 355nm and combining it with the energy density of the second laser treatment, the passivation layer absorbs the laser wavelength of the second laser treatment more effectively, while the absorption rate of the tunneling layer is lower and the ablation threshold is higher. This allows the second laser treatment to precisely remove the passivation layer and the doped conductive layer, and to stop etching at the tunneling layer. Furthermore, by adjusting the pulse width and scanning speed of the second laser treatment in this application, the passivation layer and the doped conductive layer can be removed uniformly and thoroughly, ensuring the uniformity and controllability of the etching process without damaging the substrate.

[0103] S700, perform wet etching on the first region.

[0104] Specifically, a mask layer is first formed on the second surface of the substrate, then the mask layer is patterned to expose the tunneling layer of the first region, and then the exposed tunneling layer is etched away by wet etching to expose a clean substrate and form a back contact hole.

[0105] In some embodiments, the mask material of the mask layer includes, but is not limited to, silicon nitride, photoresist, and other materials that are not easily etched away by wet etching. Methods for forming the mask layer include: coating the mask material onto a second surface of the substrate by spraying and / or spin coating.

[0106] In some implementations, patterning processes include, but are not limited to, photoresist patterning processes.

[0107] In some embodiments, the solution used for wet etching includes an acid solution, such as a hydrofluoric acid solution, wherein the volume ratio of water to hydrofluoric acid in the hydrofluoric acid solution is 1:(5~15), specifically 1:5, 1:8, 1:10, 1:12, 1:15, or any value within the range of any two of the above values.

[0108] By combining the first laser processing and the second laser processing with wet etching, a clean back contact hole can be prepared. The opening edge of the back contact hole is neat, and there is no polysilicon residue on the surface of the substrate inside the back contact hole, which is beneficial for filling the electrode paste and forming a high-quality ohmic contact between the electrode paste and the substrate.

[0109] S800, an electrode is formed in the first region.

[0110] Specifically, electrodes can be fabricated using screen printing by metallizing within back contact holes in the first region of the second surface of the substrate, followed by sintering. Alternatively, at least one of metal evaporation and electroplating methods can be used to form the electrode in the first region, i.e., the back electrode.

[0111] In some embodiments, the method for fabricating a solar cell further includes, after S100 and before S200, performing boron diffusion on a first surface of a substrate to form an emitter; and in S800, forming a first surface electrode on the first surface of the substrate. Thus, the fabricated solar cell is a TOPCon cell (Tumnel Oxide Passivated Contact).

[0112] In some embodiments, boron diffusion can be performed on the first surface of the substrate using one or more methods, such as high-temperature diffusion, slurry doping, or ion implantation. For example, boron source can be boron tribromide diffusion treatment, which transforms the microcrystalline silicon phase of crystalline silicon into a polycrystalline silicon phase. Because the semiconductor substrate surface has a high concentration of boron, a borosilicate glass (BSG) layer is typically formed. This BSG layer has metal gettering properties, which can affect the normal operation of the solar cell and requires subsequent removal.

[0113] In some embodiments, the first surface electrode is formed using a metallization process, which can be achieved by screen printing followed by sintering. Alternatively, at least one of metal vapor deposition and electroplating methods can be used to form the first surface electrode in the first region.

[0114] In some embodiments, the specific material of the electrode is not limited in this application. For example, the electrode material includes one or more of aluminum, silver, gold, nickel, molybdenum, or copper.

[0115] In some embodiments, electrodes are provided only on the second surface of the substrate, and the prepared solar cell is a BC cell (Back Contact Cell).

[0116] Specifically, when the prepared solar cell is a BC cell, the preparation method of the solar cell replaces S200~S400 as follows: the second surface of the substrate includes alternating first conductive regions and second conductive regions, a tunneling layer and a doped conductive layer are formed in the first conductive region, and a passivation contact structure film layer with a different conductivity type than the first conductive region is formed in the second conductive region.

[0117] The following illustrates a fabrication process for a BC battery, including the following steps:

[0118] 1. A substrate is provided, the substrate having a first surface and a second surface disposed opposite to each other, the second surface of the substrate including alternating first conductive regions and second conductive regions;

[0119] 2. A first tunneling layer and a first semiconductor layer are formed in the first conductive region;

[0120] 3. Perform a first laser treatment on the first conductive region to form a first pre-doped conductive layer;

[0121] 4. Perform heat treatment on the first pre-doped conductive layer to transform the first pre-doped semiconductor layer into the first doped conductive layer;

[0122] 5. A second tunneling layer and a second semiconductor layer are formed in the second conductive region;

[0123] 6. Perform a first laser treatment on the second conductive region to form a second pre-doped conductive layer;

[0124] 7. The second pre-doped conductive layer is heat-treated to transform the second pre-doped semiconductor layer into the second doped conductive layer. The first doped conductive layer and the second doped conductive layer have different conductivity types.

[0125] 8. The second surface of the substrate includes alternating first and second regions, and the first region is subjected to a second laser treatment, wherein the energy density of the first laser treatment is less than the energy density of the second laser treatment.

[0126] 9. Perform wet etching on the first area;

[0127] 10. In the first conductive region, a first electrode is formed by metallization within the back contact hole of the first region; and in the second conductive region, a second electrode is formed by metallization within the back contact hole of the first region.

[0128] It should be noted that on the second surface of the substrate, the first region and the second region are alternately arranged, as are the first conductive region and the second conductive region. The sum of the first region and the second region constitutes the second surface of the substrate, and the sum of the first conductive region and the second conductive region also constitutes the second surface of the substrate. That is, the first region and the second region, and the first conductive region and the second conductive region overlap, the difference being that the two are divided according to different criteria. The first region and the second region are divided according to whether they correspond to an electrode; the first region corresponds to an electrode, and the second region does not correspond to an electrode. The first conductive region and the second conductive region are divided according to conductivity type. The conductivity types of the first conductive region and the second conductive region are different. In some embodiments, the first conductive region is an N-type conductive region, and the second conductive region is a P-type conductive region. In other embodiments, the first conductive region is a P-type conductive region, and the second conductive region is an N-type conductive region.

[0129] In steps 2 and 5 above, the first tunneling layer and the second tunneling layer can be prepared using a method similar to that in S200.

[0130] In steps 3 and 6 above, the first pre-doped conductive layer and the second pre-doped conductive layer can be prepared using a method similar to that in S300.

[0131] In steps 4 and 7 above, the first doped conductive layer and the second doped conductive layer can be prepared using a method similar to S400. It should be noted that the difference between the first doped conductive layer and the second doped conductive layer lies in their conductivity types. For example, the doping element in the first doped conductive layer includes at least one of phosphorus, arsenic, and antimony. The doping element in the second doped conductive layer includes at least one of boron, aluminum, and gallium.

[0132] It should be noted that the fabrication of the first and second conductive regions of the BC battery requires additional patterning processes (such as photolithography, masking, etc.) to set the second surface as the first and second conductive regions with different conductivity types on the basis of the overall passivation contact structure, thereby forming two passivation contact structures with different conductivity types on the second surface of the substrate at the same time.

[0133] It should be noted that the above-mentioned BC cell fabrication process is only an example. Based on the aforementioned solar cell fabrication method, different BC cell fabrication processes can be derived. For example, when the first conductive region of the above-mentioned BC cell is an N-type conductive region, the second conductive region is a P-type conductive region. The P-type conductive region can also be other passivated contact structures, that is, the P-type conductive region does not have a tunneling layer. This application does not impose any restrictions here.

[0134] Based on the same inventive concept, this application also provides a solar cell, which is prepared using the above-described preparation method. Figure 2 A schematic diagram of a solar cell structure is shown, such as... Figure 2 As shown, the solar cell 100 includes:

[0135] Substrate 1, having a first surface and a second surface disposed opposite to each other;

[0136] The tunneling layer 2 and the doped conductive layer 3 are located on the second surface of the substrate 1;

[0137] Passivation layer 4 is located on the surface of the doped conductive layer 3;

[0138] The electrode 5 is located on the second surface of the substrate 1. The second surface of the substrate 1 includes an alternately arranged first region 1a and a second region 1b. In the first region 1a, the electrode 5 is electrically connected to the substrate 1.

[0139] In some embodiments, the solar cell described above is a TOPCon cell. Figure 3 A schematic diagram of a TOPCon battery structure is shown, such as... Figure 3 As shown, the TOPCon battery 600 includes:

[0140] A first substrate 11 has a first surface and a second surface disposed opposite to each other;

[0141] A first emitter 12, a second passivation layer 17, and a second electrode 18 are located on the first surface of the first substrate 11;

[0142] The first tunneling layer 13 and the first doped conductive layer 14 are located on the second surface of the first substrate 11;

[0143] A first passivation layer 15 is located on the surface of the first doped conductive layer 14;

[0144] The first electrode 16 is located on the second surface of the first substrate 11. The second surface of the first substrate 11 includes alternating first substrate region 11a and first substrate region 11b. In the first substrate region 11a, the first electrode 16 is electrically connected to the first substrate 11.

[0145] Solar cells fabricated using the above method exhibit minimal thermal damage to the substrate, and the contact resistivity between the electrode and the substrate can be stably controlled at 1.0 mΩ / cm. 2 The following significantly improves the fill factor, thereby enhancing the photoelectric conversion efficiency of solar cells.

[0146] In some embodiments, the solar cell described above is a BC cell. Figure 4 A schematic diagram of a BC battery structure is shown, such as... Figure 4 As shown, the BC battery 700 includes:

[0147] The second substrate 21 has a first surface and a second surface disposed opposite to each other;

[0148] The second surface of the second substrate 21 includes alternating first conductive regions 21A and second conductive regions 21B, the first conductive regions 21A and the second conductive regions 21B having different conductivity types, and the first conductive regions 21A and the second conductive regions 21B having a gap region.

[0149] The second emitter 22 and the third passivation layer 211 are located on the first surface of the second substrate 21;

[0150] The second tunneling layer 23 and the second doped conductive layer 24 are located in the first conductive region 21A;

[0151] The third tunneling layer 25 and the third doped conductive layer 26 are located in the second conductive region 21B;

[0152] The fourth passivation layer 27 is located on the surface of the second doped conductive layer 24 and the fifth passivation layer 28 is located on the surface of the third doped conductive layer 26;

[0153] The third electrode 29 is located in the first conductive region 21A and the fourth electrode 210 is located in the second conductive region 21B. The first conductive region 21A includes a second substrate region 21a and a second substrate region 21b located on both sides of the second substrate region 21a. In the second substrate region 21a, the third electrode 29 is electrically connected to the second substrate 21. The second conductive region 21B includes a second substrate region 21c and a second substrate region 21d located on both sides of the second substrate region 21c. In the second substrate region 21c, the fourth electrode 210 is electrically connected to the second substrate 21.

[0154] Solar cells fabricated using the above method exhibit minimal thermal damage to the substrate, and the contact resistivity between the electrode and the substrate can be stably controlled at 1.0 mΩ / cm. 2 The following significantly improves the fill factor, thereby enhancing the photoelectric conversion efficiency of solar cells.

[0155] It should be noted that the above structure is only one example of a BC battery structure. Based on the solar cell preparation method described above in this application, other BC batteries with different structures can be derived, and this application does not impose any restrictions on them.

[0156] In some embodiments, the first surface of at least one of substrate 1, first substrate 11 and second substrate 21 has a textured surface.

[0157] In some embodiments, the thickness of at least one of substrate 1, first substrate 11 and second substrate 21 is 60μm to 240μm, specifically 60μm, 80μm, 90μm, 100μm, 120μm, 150μm, 200μm or 240μm, etc., which are not limited here.

[0158] In some embodiments, the thickness of at least one of the tunneling layer 2, the first tunneling layer 13, the second tunneling layer 23 and the third tunneling layer 25 is 0.5nm to 2nm, specifically 0.5nm, 0.8nm, 1nm, 1.2nm, 2.5nm, 2nm or any value within the range of any two of the above values.

[0159] In some embodiments, the doping concentration of at least one of the doped conductive layer 3, the first doped conductive layer 14, the second doped conductive layer 24, and the third doped conductive layer 26 is 1×10⁻⁶. 20 cm -3 ~5×10 20 cm -3 Specifically, it can be 1×10 20 cm -3 2×10 20 cm -3 3×10 20 cm -3 4×10 20 cm -3 5×10 20 cm -3 Or any value within the range formed by any two of the above values.

[0160] In some embodiments, the thickness of at least one of the passivation layer 4, the first passivation layer 15, the second passivation layer 17, the third passivation layer 211, the fourth passivation layer 27, and the fifth passivation layer 28 is 70 nm to 120 nm, specifically 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, or any value within the range of any two of the above values. Optionally, the thickness of at least one of the passivation layer 4, the first passivation layer 15, the second passivation layer 17, the third passivation layer 211, the fourth passivation layer 27, and the fifth passivation layer 28 is 80 nm to 100 nm.

[0161] In some embodiments, at least one of the passivation layers 4, 15, 17, 211, 27, and 28 may be made of a single-layer oxide layer or a multi-layer structure, including but not limited to silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide, which can produce a good passivation effect on the substrate and help improve the conversion efficiency of the battery. It should be noted that at least one of the passivation layers 4, 15, 17, 211, 27, and 28 can also reduce incident light reflection; in some instances, they may be referred to as anti-reflection layers.

[0162] In some embodiments, the thickness of at least one of the passivation layer 4, the first passivation layer 15, the second passivation layer 17, the third passivation layer 211, the fourth passivation layer 27, and the fifth passivation layer 28 is in the range of 10nm to 120nm, specifically 10nm, 20nm, 30nm, 42nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, or 120nm, etc., or other values ​​within the above range, which are not limited here.

[0163] In some implementations, such as Figure 2 As shown, the first region 1a has an opening 6, and at least a portion of the electrode 5 is disposed within the opening 6. Figure 3 As shown, a region 11a of the first substrate has a first opening 19, and the first electrode 16 and the second electrode 18 are respectively disposed within different first openings 19. Figure 4 As shown, the second substrate region 21a has a second opening 212, the second substrate region 21c has a third opening 213, the third electrode 29 is located in the second opening 212, and the fourth electrode 210 is located in the third opening 213.

[0164] In some embodiments, opening 6, the first opening 19, the second opening 212, and the third opening 213 each include a connected sidewall and a bottom wall. The angle between the plane containing the sidewall and the bottom wall is 80° to 120°, specifically 80°, 85°, 90°, 95°, 100°, 105°, 110°, 115°, 120°, or any value within the range of any two of the above values. Controlling the angle between the plane containing the sidewall and the bottom wall within the above range indicates that the edges of opening 6, the first opening 19, the second opening 212, and the third opening 213 are steep and neat. This is beneficial for filling the electrode paste and forming a high-quality ohmic contact between the electrode paste and the substrate, which helps to reduce contact resistance and carrier transport path losses, improves the fill factor of the solar cell, and thus improves the photoelectric conversion efficiency.

[0165] In some embodiments, the roughness Ra of the bottom wall is less than or equal to 50 nm, specifically 50 nm, 45 nm, 40 nm, 35 nm, 30 nm, 25 nm, 20 nm, 10 nm, or any value within the range of any two of the above values. Controlling the roughness Ra of the bottom wall within the above range indicates that the substrate surface in contact with the electrode is smooth and undamaged, which can reduce the recombination current density at the electrode paste-substrate interface, improve open-circuit voltage and reliability, and enhance the photoelectric conversion efficiency of the solar cell.

[0166] It should be noted that the roughness Ra of the bottom wall can be characterized using the profile method.

[0167] Based on the same inventive concept, this application also provides a stacked battery. Figure 5 This is a schematic diagram of the structure of a stacked battery, as shown below. Figure 5 As shown, the stacked solar cell 2000 includes a perovskite top cell 2001 and a crystalline silicon bottom cell 2002 stacked sequentially along a predetermined direction; wherein, the crystalline silicon bottom cell 2002 includes the solar cell 100 provided in the above embodiments of the present invention, and the solar cell 100 may be, for example, a TOPCon cell 600 or a BC cell 700. It should be noted that the stacked solar cell 2000 provided by the present invention has the technical effects of the solar cell 100 in the present invention, and repeated descriptions will not be repeated.

[0168] Based on the same inventive concept, this application also provides a photovoltaic module, which includes:

[0169] A battery string is formed by electrically connecting multiple solar cells or tandem cells prepared by the above-mentioned preparation methods.

[0170] Encapsulation layer, which covers the surface of the battery string;

[0171] Cover plate, used to cover the surface of the encapsulation layer away from the battery string.

[0172] Specifically, Figure 6 This is a schematic diagram of a photovoltaic module, such as... Figure 6 As shown, the photovoltaic module 1000 includes a first cover plate 200, a first encapsulating layer 300, a solar cell string, a second encapsulating layer 400, and a second cover plate 500.

[0173] In some embodiments, the solar cell string includes multiple solar cells 100 as described above, connected by conductive strips. The solar cells 100 may be, for example, TOPCon cells 600 or BC cells 700. Alternatively, the solar cell string includes multiple stacked cells 2000 as described above, connected by conductive strips. The connection between the solar cells 100 can be partial stacking or splicing. The connection between the stacked cells 2000 can also be partial stacking or splicing.

[0174] In some embodiments, the first cover plate 200 and the second cover plate 500 can be transparent or opaque covers, such as glass covers or plastic covers.

[0175] The first encapsulating adhesive layer 300 is in contact with and bonded to the first cover plate 200 and the battery string on both sides, respectively. The second encapsulating adhesive layer 400 is in contact with and bonded to the second cover plate 500 and the battery string on both sides, respectively. The first encapsulating adhesive layer 300 and the second encapsulating adhesive layer 400 can be ethylene-vinyl acetate copolymer (EVA) film, polyethylene octene coelastomer (POE) film, or polyethylene terephthalate (PET) film, respectively.

[0176] The photovoltaic module 1000 can also be fully encapsulated on the sides, that is, the sides of the photovoltaic module 1000 are completely covered and encapsulated with encapsulating tape to prevent lamination shift during the lamination process.

[0177] The photovoltaic module 1000 also includes an edge sealing component, which is fixedly encapsulated on a portion of the edge of the photovoltaic module 1000. This edge sealing component can be fixedly encapsulated on the edge of the photovoltaic module 1000 near a corner. The edge sealing component can be a high-temperature resistant tape. This high-temperature resistant tape has excellent high-temperature resistance properties and will not decompose or detach during lamination, ensuring reliable encapsulation of the photovoltaic module 1000. The two ends of the high-temperature resistant tape are respectively fixed to the second cover plate 500 and the first cover plate 200. The two ends of the high-temperature resistant tape can be bonded to the second cover plate 500 and the first cover plate 200 respectively, while the middle portion can limit the side of the photovoltaic module 1000, preventing lamination displacement of the photovoltaic module 1000 during the lamination process.

[0178] The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for preparing a solar cell, characterized in that, include: A substrate is provided, the substrate having a first surface and a second surface disposed opposite to each other; A tunneling layer and a semiconductor layer are formed on the second surface of the substrate; The semiconductor layer is subjected to a first laser treatment to form a pre-doped semiconductor layer; The pre-doped semiconductor layer is heat-treated to transform it into a doped conductive layer. A passivation layer is formed on the surface of the doped conductive layer; The second surface of the substrate includes alternating first and second regions. The first region is subjected to a second laser treatment to etch a passivation layer and a doped conductive layer located in the first region. The energy density of the first laser treatment is less than the energy density of the second laser treatment. The first region is subjected to wet etching to etch the tunneling layer; An electrode is formed in the first region.

2. The method for preparing a solar cell according to claim 1, characterized in that, The energy density of both the first laser treatment and the second laser treatment is less than or equal to 2000 mJ / cm². 2 .

3. The method for preparing a solar cell according to claim 1 or 2, characterized in that, The energy density of the first laser treatment is 100 mJ / cm². 2 ~300mJ / cm 2 .

4. The method for preparing a solar cell according to claim 1 or 2, characterized in that, The energy density of the second laser treatment is 500 mJ / cm². 2 ~2000mJ / cm 2 .

5. The method for preparing a solar cell according to claim 1 or 2, characterized in that, The laser used in the first laser treatment is infrared light or green light.

6. The method for preparing a solar cell according to claim 1 or 2, characterized in that, The laser used in the second laser treatment is ultraviolet light.

7. The method for preparing a solar cell according to claim 1 or 2, characterized in that, The pulse width of the first laser treatment is 10ns to 100ns.

8. The method for preparing a solar cell according to claim 1 or 2, characterized in that, The pulse width of the second laser treatment is 10ns~30ns.

9. The method for preparing a solar cell according to claim 1 or 2, characterized in that, The scanning speed of the first laser processing is 1m / s to 10m / s.

10. The method for preparing a solar cell according to claim 1 or 2, characterized in that, The scanning speed of the second laser processing is 0.5m / s to 2m / s.

11. A solar cell, characterized in that, The solar cell is formed using the method for preparing a solar cell according to any one of claims 1 to 10, and the solar cell comprises: A substrate having a first surface and a second surface; The tunneling layer and the doped conductive layer are located on the second surface of the substrate; A passivation layer located on the surface of the doped conductive layer; An electrode is located on a second surface of the substrate, the second surface of the substrate including an alternately arranged first region and a second region, in the first region the electrode is electrically connected to the substrate.

12. The solar cell according to claim 11, characterized in that, The first region has an opening, and at least a portion of the electrodes are disposed within the opening; The opening has connected sidewalls and a bottom wall, and the angle between the plane containing the sidewalls and the bottom wall is 80° to 120°.

13. The solar cell according to claim 12, characterized in that, The roughness Ra of the bottom wall is less than or equal to 50 nm.

14. A stacked battery, characterized in that, The tandem solar cell comprises: a perovskite top cell and a crystalline silicon bottom cell stacked sequentially, wherein the crystalline silicon bottom cell is a solar cell formed by the method of preparing a solar cell according to any one of claims 1 to 10 or a solar cell according to any one of claims 11 to 13.

15. A photovoltaic module, characterized in that, The photovoltaic module includes: A battery string, wherein the battery string is formed by connecting multiple solar cells formed by the method of preparing solar cells according to any one of claims 1 to 10, or solar cells according to any one of claims 11 to 13, or tandem cells according to claim 14; An encapsulation layer that covers the surface of the battery string; A cover plate for covering the surface of the encapsulation layer away from the battery string.

Images