A micro light emitting diode chip with a lead electrode

Abstract

This invention relates to a micro-LED chip with lead electrodes, comprising: a driving backplane; and a functional layer disposed on the driving backplane, the functional layer having a plurality of lead electrodes, each lead electrode comprising: a first metal layer electrically contacting the driving backplane; and a second metal layer located on the side of the first metal layer opposite to the driving backplane and electrically contacting the first metal layer. The lead electrodes of the micro-LED chip of this invention comprise two metal layers, and the sum of the thicknesses of the two metal layers satisfies the condition for protecting the electrodes of the underlying driving backplane, thereby preventing damage to the electrodes of the driving backplane from high temperature and pressure during the wire bonding process.

Description

Technical Field

[0001] This invention relates to the field of micro light-emitting diode technology, and more particularly to a micro light-emitting diode chip with leaded electrodes. Background Technology

[0002] Micro-LED (Micro Light Emitting Diode) is an emerging display technology that miniaturizes traditional light-emitting diodes to the micrometer level and integrates these tiny LED arrays onto a single chip, thereby enabling the formation of high-density display panels.

[0003] During the packaging of miniature light-emitting diode (LED) chips, wire bonding is used to electrically connect the lead electrodes on the LED chip to the flexible circuit board. However, the lead electrodes on existing miniature LED chips consist of only one thin metal layer. During wire bonding, the high temperature and pressure can damage the electrodes of the integrated circuit board beneath the metal layer. Summary of the Invention

[0004] To address at least some of the problems mentioned above in the prior art, the present invention aims to provide a miniature light-emitting diode chip with leaded electrodes, characterized in that it comprises:

[0005] Drive backplane; and

[0006] A functional layer, disposed on a drive backplane, has a plurality of lead electrodes, the lead electrodes including:

[0007] A first metal layer, which is in electrical contact with the drive backplane; and

[0008] The second metal layer is located on the side of the first metal layer opposite to the drive backplate and is in electrical contact with the first metal layer.

[0009] Furthermore, the thickness of the first metal layer is 0.5-1.5 μm.

[0010] Furthermore, the thickness of the second metal layer is 0.5-1.5 μm.

[0011] Furthermore, the sum of the thicknesses of the first metal layer and the second metal layer is 1-3 μm.

[0012] Furthermore, the first metal layers of all lead electrodes are not in contact with each other, and the second metal layers of all lead electrodes are not in contact with each other.

[0013] Furthermore, the lead electrode also includes a first dielectric layer that covers the sides and the edges of the upper surface of the first metal layer.

[0014] Furthermore, the central region of the first dielectric layer is hollowed out.

[0015] Furthermore, the first dielectric layer is located between the first metal layer and the second metal layer, the edge of the second metal layer is located on the first dielectric layer, the middle region of the second metal layer is in electrical contact with the first metal layer, and the middle region of the second metal layer is recessed downward relative to the edge of the second metal layer.

[0016] Furthermore, the height difference between the edge of the second metal layer and the central region of the second metal layer is

[0017] Furthermore, the first dielectric layers of all lead electrodes are interconnected.

[0018] Furthermore, the lead electrode also includes a second dielectric layer that covers the side surface of the second metal layer and the edge of the upper surface of the second metal layer, thereby surrounding the second metal layer.

[0019] Furthermore, the second medium layer forms a fence, the four inner corners of which are rounded.

[0020] Furthermore, the second dielectric layers of all lead electrodes are interconnected.

[0021] Furthermore, the first metal layer is in electrical contact with the electrodes of the drive backplate.

[0022] Furthermore, the electrodes of the drive backplate are grid-type, wherein the electrodes include an electrode electrical contact layer and a plurality of arrayed electrode insulation structures, wherein the electrode electrical contact layer surrounds the arrayed electrode insulation structures and is located between the arrayed electrode insulation structures.

[0023] Furthermore, the top view shape of the electrode insulation structure is a quadrilateral, and the top view shape of the electrode electrical contact layer is the grid shape remaining after removing the quadrilateral.

[0024] Furthermore, the electrodes of the drive backplate are striped, and the electrodes include an electrode electrical contact layer and multiple parallel-arranged elongated electrode insulation structures.

[0025] Furthermore, the top view shape of the electrode electrical contact layer is the shape remaining after removing the elongated shape.

[0026] Furthermore, the electrodes of the drive backplate are a single piece of metal.

[0027] Furthermore, insulating material is arranged around the electrodes of the drive backplate.

[0028] Furthermore, the central region of the second metal layer is grid-like.

[0029] Furthermore, the central region of the second metal layer is striped.

[0030] Furthermore, the functional layer includes a light-emitting region and a non-light-emitting region, with the non-light-emitting region located around the light-emitting region and surrounding it. The light-emitting region contains multiple micro light-emitting diodes arranged in an array.

[0031] Furthermore, the micro LED is in electrical contact with the driving backplane.

[0032] Furthermore, the light-emitting region also includes a current-spreading structure located between the micro-light-emitting diodes in the light-emitting region and in electrical contact with the micro-light-emitting diodes.

[0033] Furthermore, the lead electrode is located in the non-light-emitting region.

[0034] The present invention has at least the following beneficial effects: (1) The lead electrode of the micro light-emitting diode chip of the present invention comprises two metal layers, and the sum of the thicknesses of the two metal layers meets the condition for protecting the electrode of the driving backplane below, which can prevent the electrode of the driving backplane from being damaged by high temperature and pressure during the wire bonding process. (2) The lead electrode is square in shape. Compared with the circular electrode, the square electrode has a larger welding area in the same area, which helps to improve the reliability and stability of welding. In addition, the square electrode has relatively low requirements for the alignment accuracy of the automatic welding equipment, which is conducive to reducing production costs. (3) The height difference between the middle region (welding area) of the second metal layer and the edge of the second metal layer is small, and the welding area is large, which helps to improve the reliability and stability of welding. Attached Figure Description

[0035] To further illustrate the above and other advantages and features of the various embodiments of the present invention, a more specific description of the embodiments of the invention will be presented with reference to the accompanying drawings. It is to be understood that these drawings depict only typical embodiments of the invention and are therefore not intended to limit its scope. In the drawings, identical or corresponding parts will be indicated by identical or similar reference numerals for clarity.

[0036] Figure 1 A cross-sectional schematic diagram of a micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0037] Figure 2 A top view schematic diagram of a miniature light-emitting diode chip according to an embodiment of the present invention is shown;

[0038] Figure 3 A schematic cross-sectional view of a lead electrode according to an embodiment of the present invention is shown;

[0039] Figure 4 A top view schematic diagram of a lead electrode according to an embodiment of the present invention is shown;

[0040] Figure 5 A top view schematic diagram of a grid-type electrode of a drive backplate according to an embodiment of the present invention is shown;

[0041] Figure 6 A top view schematic diagram of a striped electrode of a drive backplate according to an embodiment of the present invention is shown;

[0042] Figure 7 A top view schematic diagram of an integral electrode of a drive backplate according to an embodiment of the present invention is shown;

[0043] Figure 8 A top view schematic diagram of the light-emitting area of ​​a micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0044] Figure 9 A top view schematic diagram of a current extension structure according to an embodiment of the present invention is shown;

[0045] Figure 10 A longitudinal cross-sectional schematic diagram of the light-emitting region of a micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0046] Figure 11 A longitudinal cross-sectional schematic diagram of a current extension structure according to an embodiment of the present invention is shown;

[0047] Figure 12 A longitudinal cross-sectional schematic diagram of a current-extending structure according to another embodiment of the present invention is shown;

[0048] Figure 13 A longitudinal cross-sectional schematic diagram of a micro light-emitting diode chip according to another embodiment of the present invention is shown; and

[0049] Figure 14 A longitudinal cross-sectional schematic diagram of a micro-light-emitting diode chip with microlenses according to an embodiment of the present invention is shown. Detailed Implementation

[0050] It should be noted that the components in the accompanying drawings may be shown exaggerated for illustrative purposes and may not be to scale.

[0051] In this invention, the various embodiments are merely intended to illustrate the solutions of the invention and should not be construed as limiting.

[0052] In this invention, unless otherwise specified, the quantifiers “a” and “one” do not exclude scenarios involving multiple elements.

[0053] It should also be noted that, in the embodiments of the present invention, only a portion of the parts or components may be shown for clarity and simplicity. However, those skilled in the art will understand that, under the teachings of the present invention, the required parts or components can be added as needed for specific scenarios.

[0054] It should also be noted that within the scope of this invention, the terms "same", "equal", and "equal to" do not mean that the two values ​​are absolutely equal, but allow for a certain reasonable error. In other words, the terms also cover "substantially the same", "substantially equal", and "substantially equal to".

[0055] It should also be noted that in the description of this invention, the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not explicitly or implicitly suggest that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0056] Furthermore, the embodiments of the present invention describe the process steps in a specific order. However, this is only for the convenience of distinguishing each step, and is not a limitation on the order of each step. In different embodiments of the present invention, the order of each step can be adjusted according to the process.

[0057] In this application, the term "configuration" refers to setting the shape, structure, material and / or function of a target object to achieve a desired technical effect. "Configuration" includes a variety of alternative technical means to achieve the technical effect, which become apparent from the teachings of this application.

[0058] In this invention, the term "horizontal profile" has the following meanings: for regular shapes, it refers to the horizontal dimension; for irregular shapes, it refers to the maximum horizontal dimension. For example, for a hemispherical microlens, its horizontal profile refers to its bottom diameter; for a cylindrical micro-light-emitting diode, its horizontal profile refers to the diameter of its cylindrical cross-section. The maximum horizontal profile refers to the maximum value of the aforementioned dimension.

[0059] like Figure 1 As shown, the miniature light-emitting diode chip includes a driving backplane 2 and a functional layer 1 disposed on the driving backplane. The driving backplane 2 and the functional layer 1 are connected by metal bonding and are electrically connected.

[0060] like Figure 2As shown, functional layer 1 includes a light-emitting region 10 and a non-light-emitting region. The non-light-emitting region surrounds the light-emitting region. The light-emitting region contains multiple micro-light-emitting diodes arranged in an array. The micro-light-emitting diodes are in electrical contact with a driving backplane 2, which controls the lighting and extinguishing of the micro-light-emitting diodes.

[0061] The light-emitting region 10 of the micro LED chip also includes a current-spreading structure, which is located between the micro LEDs in the light-emitting region and is in electrical contact with the micro LEDs.

[0062] The non-luminescent area includes a first region 11 and a second region 12, with the second region 12 surrounding the luminescent area 10.

[0063] Furthermore, the first region 11 includes a plurality of lead electrodes 13. The lead electrodes 13 are used for electrical connection to the flexible circuit board via wire bonding during packaging. The lead electrodes 13 are in electrical contact with the drive backplane 2.

[0064] Furthermore, the surface of the second region 12 is covered with a continuous metal layer, and the metal layer of the second region 12 is electrically connected to the current extension structure and the lead electrode 13.

[0065] In embodiments of the present invention, such as Figure 3 As shown, the lead electrode 13 includes a first metal layer 131 and a second metal layer 132.

[0066] The first metal layer 131 is in electrical contact with the electrodes of the drive backplate 2. The second metal layer 132 is located on the side of the first metal layer 131 opposite to the drive backplate 2 and is in electrical contact with the first metal layer 131. The first metal layer 131 has an upper surface that is in electrical contact with the second metal layer 132 and a lower surface that is in electrical contact with the electrodes of the drive backplate 2.

[0067] Furthermore, the thickness of the first metal layer 131 is 0.5-1.5 μm; the thickness of the second metal layer 132 is 0.5-1.5 μm; and the sum of the thicknesses of the first metal layer 131 and the second metal layer 132 is 1-3 μm.

[0068] Furthermore, the material of the first metal layer 131 can be one or more of Cr, Ti, Pt, Au, and Al. The material of the second metal layer 132 can be one or more of Cr, Ti, Pt, Au, and Al.

[0069] The lead electrode 13 comprises two metal layers, and the sum of the thicknesses of the two metal layers meets the condition of protecting the electrodes of the underlying drive backplane, thus preventing the electrodes of the drive backplane from being damaged by high temperature and pressure during the wire bonding process.

[0070] The lead electrode 13 is square in shape. Compared with a circular electrode, a square electrode has a larger welding area for the same area, which helps to improve the reliability and stability of welding. In addition, square electrodes have relatively lower requirements for the alignment accuracy of automatic welding equipment, which helps to reduce production costs.

[0071] Furthermore, the first metal layers 131 of all lead electrodes 13 are not in contact with each other, and the second metal layers 132 of all lead electrodes 13 are not in contact with each other.

[0072] In some embodiments, the lead electrode 13 further includes a first dielectric layer 133 covering the side and upper surface of the first metal layer 131. The middle part of the first dielectric layer 133 is hollowed out, so that the middle region of the first dielectric layer 133 is exposed. The middle region of the first metal layer 131 is not covered by the first dielectric layer 133. The first dielectric layer 133 covers the side and upper surface edges of the first metal layer 131.

[0073] Furthermore, the hollowed-out portion of the first dielectric layer 133 is quadrilateral, preferably square.

[0074] Furthermore, the first dielectric layer 133 of all lead electrodes 13 is interconnected.

[0075] Furthermore, the second metal layer 132 is located above the first dielectric layer 133. Since the middle part of the first dielectric layer 133 is hollowed out, the middle region of the first metal layer 131 is exposed, and the second metal layer 132 is in electrical contact with the first metal layer 131.

[0076] Due to the presence of the first dielectric layer 133, the central region of the second metal layer 132 is recessed downwards relative to its edge. The transition between the edge of the second metal layer 132 and the central region of the second metal layer 132 is a ramp, not a vertical transition.

[0077] The height difference between the edge of the second metal layer 132 and the central region of the second metal layer 132 is

[0078] The central region of the second metal layer 132 is the effective area for wire bonding, and the transition between the edge of the second metal layer 132 and the central region of the second metal layer 132 is a slope. Therefore, under the same lead electrode area, the smaller the height difference between the edge of the second metal layer 132 and the horizontal central region, the larger the welding area, which helps to improve the reliability and stability of welding.

[0079] In some embodiments, the lead electrode 13 further includes a second dielectric layer 134 that covers the side surface of the second metal layer 132 and the edge of the upper surface of the second metal layer 132.

[0080] Furthermore, such as Figure 3 and4 As shown, since the second dielectric layer 134 covers the side of the second metal layer 132 and the edge of the upper surface of the second metal layer 132, the highest point of the second dielectric layer 134 is higher than the upper surface of the second metal layer 132. The second dielectric layer 134 forms a fence that surrounds the second metal layer 132.

[0081] Furthermore, the second dielectric layer 134 does not cover the middle region of the second metal layer 132, and the middle region of the second metal layer 132 that can be used for welding is completely exposed.

[0082] Furthermore, such as Figure 4 As shown, the four inner corners of the fence formed by the second medium layer 134 are rounded.

[0083] Furthermore, the second dielectric layers 134 of all lead electrodes 13 are interconnected.

[0084] In some embodiments, such as Figure 5 As shown, the electrodes 21 of the driving backplate 2 are grid-shaped. The electrodes 21 of the driving backplate 2 include an electrode electrical contact layer 22 and multiple arrayed electrode insulating structures 23. The electrode electrical contact layer 22 surrounds the arrayed electrode insulating structures 23 and is located between the arrayed electrode insulating structures 23.

[0085] In some embodiments, the top view shape (cross-sectional shape) of the electrode insulating structure 23 is a quadrilateral, and the top view shape of the electrode electrical contact layer 22 is the grid shape remaining after removing the quadrilateral.

[0086] Furthermore, the overall shape of the electrode electrical contact layer 22 is quadrilateral, such as square or rectangular. The material of the electrode electrical contact layer 22 can be, for example, copper.

[0087] Furthermore, multiple electrode insulating structures 23 are arranged in a circular array, a rectangular array, a parallelogram array, or other polygonal arrays, etc.

[0088] Furthermore, the dimensions of each electrode insulation structure 23 can be the same or different, and there is no limitation on this.

[0089] In some embodiments, the electrode insulating structure 23 protrudes relative to the electrode electrical contact layer 22.

[0090] In addition, an insulating material 24 is arranged around the electrode 21, and the insulating material 24 surrounds the electrode electrical contact layer 22.

[0091] Furthermore, the materials of the electrode dielectric layer 23 and the insulating material 24 can be inorganic dielectric materials such as silicon dioxide and silicon nitride.

[0092] The electrode 21 of the driving backplate 2 is located on the outermost layer of the driving backplate 2.

[0093] Furthermore, since the electrodes of the driving backplate 2 are grid-shaped, the intermediate regions of the first and second metal layers of the lead electrodes corresponding to the electrodes of the driving backplate 2 are also grid-shaped. This is because the intermediate regions of the first and second metal layers are deposited sequentially on the electrodes of the driving backplate 2. For the first and second metal layers, the metal directly above the electrode insulating structure 23 protrudes relative to the metal above the electrode electrical contact layer 22. The bonding portion of the second metal layer of the lead electrodes has an arrayed block structure. The grid-shaped second metal layer of the lead electrodes increases surface roughness, which helps to improve the reliability and stability of the lead bonding.

[0094] In some embodiments, such as Figure 6 As shown, the electrodes of the driving backplate 2 are striped. The electrodes 21 of the driving backplate 2 include an electrode electrical contact layer 22 and a plurality of parallel-arranged elongated electrode insulating structures 23. The electrode electrical contact layer 22 surrounds the arrayed electrode insulating structures 23 and is located between the arrayed electrode insulating structures 23.

[0095] In some embodiments, the top view shape of the electrode insulating structure 23 is elongated, and the top view shape of the electrode electrical contact layer 22 is the shape remaining after removing the elongated shape. Multiple elongated electrode insulating structures 23 form the stripes of the electrode 21.

[0096] Furthermore, the overall shape of the electrode electrical contact layer 22 is quadrilateral, such as square or rectangular. The material of the electrode electrical contact layer 22 can be, for example, copper.

[0097] In some embodiments, the electrode insulating structure 23 protrudes relative to the electrode electrical contact layer 22.

[0098] In addition, an insulating material 24 is arranged around the electrode 21, and the insulating material 24 surrounds the electrode electrical contact layer 22.

[0099] Furthermore, the materials of the electrode insulation structure 23 and the insulation material 24 can be inorganic dielectric materials such as silicon dioxide and silicon nitride.

[0100] The electrode 21 of the driving backplate 2 is located on the outermost layer of the driving backplate 2.

[0101] Since the electrodes of the driving backplate 2 are striped, the intermediate regions of the first and second metal layers of the lead electrodes corresponding to the electrodes of the driving backplate 2 are also striped. This is because the intermediate regions of the first and second metal layers are deposited sequentially on the electrodes of the driving backplate 2. For the first and second metal layers, the metal directly above the electrode insulating structure 23 protrudes relative to the metal above the electrode electrical contact layer 22. The bonding portion of the second metal layer of the lead electrodes has a parallel striped structure. The striped shape of the second metal layer of the lead electrodes increases the surface roughness, which helps to improve the reliability and stability of the lead bonding.

[0102] In some embodiments, such as Figure 7 As shown, the electrode 21 of the drive backplate 2 is integral. The electrode 21 of the drive backplate 2 is a single piece of metal. In addition, an insulating material 24 is arranged around the electrode 21.

[0103] Furthermore, the electrode 21 is a quadrilateral with four straight angles. In other embodiments, the electrode 21 can be a rectangle, trapezoid, triangle, or other polygon. There are no limitations on the shape of the electrode 21.

[0104] The electrode 21 of the driving backplate 2 is located on the outermost layer of the driving backplate 2.

[0105] In some embodiments, the first region 11 further includes a test electrode, the structure of which may be the same as that of the lead electrode. Furthermore, the size of the test electrode is smaller than that of the lead electrode.

[0106] In some embodiments, the non-light-emitting area further includes a chip alignment region 14. The chip alignment region 14 is used for each photolithography alignment in the chip manufacturing process.

[0107] In some embodiments, when packaging a micro LED chip, there may be portions of the non-light-emitting area that are not encapsulated by molding compound. To prevent metallic reflections from the exposed non-light-emitting area, a shielding layer is needed to block this portion. The shielding layer is made of a black light-absorbing material. The position of the shielding layer is determined according to the exposed area of ​​the encapsulation. The shielding layer can be placed around the light-emitting area, on opposite sides or adjacent sides of the light-emitting area, or on three sides or one side of the light-emitting area.

[0108] The light-emitting region comprises multiple arrays of micro-light-emitting diodes (LEDs). Each micro-LED chip has a size not exceeding 1 cm, preferably not exceeding 20 micrometers. The micro-LEDs are formed in an array within the micro-LED chip, with resolutions such as 720*480, 640*480, 1920*1080, 1280*720, 2K, or 4K. The diameter of the micro-LED structure is in the nanometer range, for example, 20 nm to 100 nm. Each micro-LED can form at least a portion of a pixel element on the micro-LED chip.

[0109] In some embodiments, the spacing of the micro-LED array, i.e. the minimum center-to-center distance between the micro-LEDs, can be between about 2 micrometers and about 50 micrometers.

[0110] In some embodiments, the number of pixels on a micro LED chip can range from thousands to millions.

[0111] like Figure 8 and 10 As shown, the current extension structure 102 is located between the miniature light-emitting diodes 101 in the light-emitting area. The current extension structure 102 surrounds the miniature light-emitting diodes 101. The current extension structure 102 is electrically connected to the miniature light-emitting diodes 101.

[0112] The second metal layer 132 of the lead electrode 13 is made of the same material as the current extension structure 102 and is deposited simultaneously during fabrication.

[0113] like Figure 10 As shown, the miniature light-emitting diode 101 includes a first transparent conductive layer 104, an epitaxial layer 103, an insulating layer 105, and a second transparent conductive layer 106.

[0114] In an embodiment of the present invention, the epitaxial layer 103 is located between the first transparent conductive layer 104 and the second transparent conductive layer 106. The epitaxial layer 103 is located above the first transparent conductive layer 104, and the first transparent conductive layer 104 is in contact with the bottom surface of the epitaxial layer 103.

[0115] The size of the first transparent conductive layer 104 is larger than the size of the epitaxial layer 103.

[0116] In an embodiment of the present invention, the second transparent conductive layer 106 is located on the top and side of the epitaxial layer 103, and the second transparent conductive layers 106 of all micro light-emitting diodes are electrically connected to each other. The second transparent conductive layer 106 is also electrically connected to the current spreading structure 102.

[0117] In embodiments of the present invention, the material of the first transparent conductive layer 104 and / or the second transparent conductive layer 106 may include indium tin oxide (In2O5Sn), thereby improving conductivity and light emission.

[0118] It should be noted that the materials of the first transparent conductive layer 104 and / or the second transparent conductive layer 106 may also include other suitable materials, such as fluorine-doped tin oxide (FTO) or zinc oxide (ZnO).

[0119] In an embodiment of the present invention, the insulating layer 105 is located on the side of the epitaxial layer 103 and the side of the first transparent conductive layer 104, and the insulating layers 105 of all the micro-light-emitting diodes are interconnected. The insulating layer 105 is used to isolate the first transparent conductive layer 104 and the second transparent conductive layer 106. Furthermore, the insulating layer 105 is transparent.

[0120] In other embodiments, the insulating layer 105 covers the sides of the first transparent conductive layer 104, the sides of the epitaxial layer 103, and a portion of the top region.

[0121] Because the size of the first transparent conductive layer 104 is larger than the size of the bottom of the epitaxial layer 103, a step is formed. The insulating layer 105 and the second transparent conductive layer 106 cover the sides of the first transparent conductive layer 104 and the epitaxial layer 103. Due to the step at the first transparent conductive layer 104, steps will also exist in the insulating layer 105 and the second transparent conductive layer 106.

[0122] In an embodiment of the present invention, the bottom dimension of the epitaxial layer 103 is larger than the top dimension of the epitaxial layer 103. It should be noted that the transverse cross-sectional shape of the epitaxial layer 103 is not limited to a circle, but may also be other suitable shapes, such as rectangles, squares, or polygons.

[0123] like Figure 10 As shown, the epitaxial layer 103 includes a first type epitaxial layer 1031, a second type epitaxial layer 1032, and a light-emitting layer 1033 located between the two.

[0124] In an embodiment of the present invention, a first type epitaxial layer 1031 is located above the light-emitting layer 1033, and a second type epitaxial layer 1032 is located below the light-emitting layer 1033. The second type epitaxial layer 1032 is electrically connected to the first transparent conductive layer 104, and the first type epitaxial layer 1031 is electrically connected to the second transparent conductive layer 106.

[0125] In some embodiments, the light-emitting layer is formed of a plurality of stacked quantum well layers, particularly superlattice stacked quantum well layers. Preferably, the superlattice stacked quantum well layers include multiple pairs of quantum well layers stacked with quantum barrier layers.

[0126] In some embodiments, the first type epitaxial layer is a semiconductor material having a first type epitaxial layer and includes multiple semiconductor layers. The main substrate material of the first type epitaxial layer may be, but is not limited to, composed of at least two or more elements selected from Ga, N, As, P, In, and Al. Furthermore, the first type epitaxial layer may include, from top to bottom, a confinement layer and a waveguide layer; additionally, in some embodiments, an ohmic contact layer may be formed on the confinement layer.

[0127] In some embodiments, the second type of epitaxial layer is a semiconductor material having a second conductivity type and includes multiple semiconductor layers. The main substrate material of the second type of epitaxial layer may be, but is not limited to, materials such as Ga, N, As, P, In, or Al. Furthermore, the second type of epitaxial layer may, from top to bottom, include, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer; additionally, an ohmic contact layer may be formed below the window layer. In one embodiment, the first conductivity type is different from the second conductivity type.

[0128] In some embodiments, the first type of epitaxial layer is an N-type GaN layer or an N-type Al GaN layer, and the second type of epitaxial layer is a P-type GaN layer or a P-type Al GaN layer. That is, the material of the second type of epitaxial layer can be a material layer of a second conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P, and the first type of epitaxial layer can be a material layer of a first conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P. In one embodiment, the light-emitting layer includes a multi-quantum-well layer and an electron-blocking layer. The multi-quantum-well layer is an InGaN / GaN multi-quantum-well layer, an InGaN / AlGaN multi-quantum-well layer, or an InGaAs / AlGaAs multi-quantum-well layer. In another embodiment, the first type of epitaxial layer can also be a P-type GaN layer or a P-type Al GaN layer, and the second type of epitaxial layer can be an N-type GaN layer or an N-type Al GaN layer.

[0129] In some embodiments, the light-emitting layer includes at least one quantum well layer. The thickness of the quantum well layer is between 20 nm and 40 nm, for example, 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al). x Ga 1-x ) y I n 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the light-emitting layer is a multiple quantum well (MQW).

[0130] In some embodiments, one of the first type epitaxial layer and the second type epitaxial layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer. The N-type cladding layer is formed on the doped N-type contact layer. The material of the N-type cladding layer is Al. x I n 1-x P, where x ranges from 0.1 to 0.5, for example, x is 0.5. Furthermore, in these embodiments, the thickness of the N-type cladding layer is no greater than 350 nm, for example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e⁻¹. 17 cm -3 up to 1e 18 cm -3 In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer formed on the doped N-type contact layer. The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e⁻¹. 18 cm -3 up to 1e 19 cm -3 In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al). x Ga 1-x ) y I n 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer is 50 nm to 75 nm, for example, 65 nm. In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light-emitting layer, and the doped P-type contact layer is formed on the P-type cladding layer.

[0131] In some embodiments, the material of the P-type coating is Al. x I n 1-x P, where x is 0.3 to 0.5, for example, x is 0.5. In such an embodiment, the thickness of the P-type coating is no greater than 380 nm, for example, the thickness of the P-type coating is 360 nm.

[0132] In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is 10 nm to 30 nm, for example, 20 nm.

[0133] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed under the P-type cladding layer, a first-doped P-type transition layer formed on the P-type cladding layer, and a second-doped P-type transition layer formed on the first-doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al). x Ga 1-x ) y I n 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer is 50 nm to 70 nm, for example, 65 nm.

[0134] In some embodiments, the material of the first doped P-type transition layer is (Al) x Ga 1-x ) y I n 1-y P, where x ranges from 0.1 to 0.3 and y ranges from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times x. In some embodiments, the thickness of the first doped P-type transition layer is 20 nm to 40 nm, for example, 30 nm.

[0135] In some embodiments, the material of the second doped P-type transition layer is Al. x Ga 1-x As, where x ranges from 0.5 to 0.9, for example, x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is from 10 nm to 30 nm, for example, 20 nm.

[0136] In some embodiments, the doping concentration of the second-doped P-type transition layer is greater than the doping density of the first-doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times that of the second-doped P-type transition layer.

[0137] In some embodiments, the doping concentration of the doped P-type contact layer is greater than the doping concentration of the second-doped P-type transition layer. Furthermore, in some embodiments, the doping concentration of the second-doped P-type transition layer is 2 to 4 times that of the first-doped P-type transition layer.

[0138] For example, the doping concentration of the first doped P-type transition layer is greater than 1e. 18 cm -3 The doping density of the second-doped P-type transition layer is 2e 18 cm -3 -4e 18 cm -3Within the range, the doping density of the doped P-type contact layer is greater than 5e 18 cm -3 .

[0139] In an embodiment of the present invention, the micro light-emitting diode 101 further includes a first bonding layer 107, which is located on the side of the first transparent conductive layer 104 opposite to the epitaxial layer 103, that is, the first bonding layer 107 is located below the first transparent conductive layer 104. The number of first bonding layers 107 is the same as the number of epitaxial layers 103. The first bonding layer 107 of each micro light-emitting diode 101 is independent, and all first bonding layers 107 are not connected to each other.

[0140] The size of the first bonding layer 107 is greater than or equal to the size of the first transparent conductive layer 104.

[0141] In an embodiment of the present invention, the insulating layer 105 also covers the side surface of the first bonding layer 107.

[0142] like Figure 11 As shown, the current extension structure 102 can be divided into a first part 1023 whose inner wall is in direct contact with the micro LED, and a second part 1024 whose inner wall is not in direct contact with the micro LED. The second part 1024 is located above the first part 1023. As shown in the figure, it is divided by a dashed line; the part below the dashed line is the first part 1023, and the part above the dashed line is the second part 1024. The inner wall of the first part 1023 is in electrical contact with the second transparent conductive layer 106.

[0143] The second part 1024 of the current extension structure 102 has a three-dimensional shape. For example... Figure 11 As shown, in one embodiment, the three-dimensional shape of the second part 1024 is a cup shape with an open bottom, and the angle α between the inner wall of the second part 1024 and the horizontal direction is at least 90°, such that light incident from the micro light-emitting diode 101 onto the inner wall is reflected to the outside of the micro light-emitting diode 101.

[0144] like Figure 12 As shown, in another embodiment, the three-dimensional shape of the second part 1024 is a bowl shape with an open bottom, and the inner wall of the second part 1024 is arc-shaped. The angle β between the tangent at each point on the inner wall and the horizontal direction is at least 90°, so that the light incident from the micro light-emitting diode 101 onto the inner wall is reflected to the outside of the micro light-emitting diode 101.

[0145] The cup-shaped structure creates a reflective effect. When light from the miniature LED shines at a wide angle onto the inner wall of the cup-shaped metal, the reflection increases the light extraction efficiency at narrow angles. This cup-shaped structure achieves better light focusing.

[0146] The current extension structure 102 has a light-reflecting capability on its surface facing the light-emitting diode 101, for example, it is made of metal, so that the current extension structure 102 can at least partially reflect the light emitted by the light-emitting diode 101. Figure 10 As shown, the reflection process is as follows: light emitted from the light-emitting layer of the LED 101 passes through its transparent layer (e.g., a second transparent conductive layer). A first portion of this light (with a sufficiently small exit angle to avoid hitting the side current extension structure 102, within a preset exit angle, such as ±20°) is emitted directly. A second portion of this light (with a sufficiently large exit angle to hit the side current extension structure 102) hits the current extension structure 102 and is reflected before being emitted, changing the light path direction to within the preset exit angle, thereby effectively improving the light extraction rate. Preferably, the proportion of light reflected by the current extension structure 102 to the light emitted by the LED 101 can be, for example, 10%-60%. By providing a current extension structure 102 with light reflection capability, the amount of light absorbed by the sidewalls can be significantly reduced, thereby significantly increasing the total light output. Simultaneously, the current extension structure 102 can also isolate light, preventing light crosstalk between adjacent LEDs 101.

[0147] In an embodiment of the present invention, the current extension structure 102 is electrically connected to the second transparent conductive layer 106. By arranging the current extension structure 102 to surround the second transparent conductive layer 106 of the micro LED 101 in an electrical contact manner, the electrical contact area between the current extension structure 102 and the micro LED 101 can be significantly increased, thereby enabling the active layer (light-emitting layer) of the micro LED 101 to emit light more uniformly, effectively avoiding light emission only at or near the electrical contact area or excessively high brightness at or near the electrical contact area.

[0148] like Figure 10 As shown, the current extension structure 102 has an inner wall 1021 facing the micro LED and an outer wall 1022 facing away from the micro LED. The lower ends of the outer walls 1022 of adjacent current extension structures 102 are connected.

[0149] The bottom dimension of the current extension structure is larger than the top dimension. Since the bottoms of adjacent current extension structures 102 are connected, the longitudinal cross-section of two adjacent current extension structures 102 exhibits a bifurcated peak shape.

[0150] Furthermore, the longitudinal cross-sectional shape of two adjacent current extension structures 102 may be asymmetrical, and their heights may be different; no restrictions are imposed here.

[0151] The bottoms of adjacent current extension structures 102 are connected. Furthermore, all current extension structures 102 are connected into a single unit, with an overall top-view shape as shown... Figure 9 As shown.

[0152] In an embodiment of the present invention, the bottom of the current extension structure 102 is below the epitaxial layer 103 of the micro light-emitting diode 101.

[0153] In embodiments of the present invention, the top of the current extension structure 102 may be higher than the top of the epitaxial layer 103; the top of the current extension structure 102 may also be flush with the top of the epitaxial layer 103; the top of the current extension structure 102 may also be slightly lower than the top of the epitaxial layer 103 (0-1 micrometer). One, two, or three of the above situations may coexist in a single chip.

[0154] Preferably, the top of the current extension structure 102 is higher than the top of the epitaxial layer 103 of the micro light-emitting diode 101. By making the height of the top of the current extension structure 102 greater than the height of the top plane of the epitaxial layer 103 of the micro light-emitting diode 101, a higher current extension structure 102 can be obtained, which further increases the chance of light reflection and increases the light extraction efficiency.

[0155] In this embodiment, the top view (i.e., cross-sectional shape) of the micro LED 101 is circular, and the top view of the overall current expansion structure is the grid shape remaining after removing the circle (e.g., Figure 9 ).

[0156] In other embodiments, the top view shape of the micro LED 101 may also be other suitable shapes, such as rectangles, squares, or regular polygons. The top view shape of the overall current extension structure may also be the shape remaining after removing other suitable shapes, such as the grid shape remaining after removing rectangles, squares, or polygons.

[0157] like Figure 10 As shown, the bottom dimension of the current extension structure 102 is larger than the top dimension. By making the bottom dimension of the current extension structure 102 larger than the top dimension, a more stable current extension structure 102 can be obtained, thereby improving the stability of the miniature light-emitting diode 101 device.

[0158] In an embodiment of the present invention, the number of current extension structures 102 may be the same as the number of micro light-emitting diodes 101, with each current extension structure 102 surrounding one micro light-emitting diode 101.

[0159] In other embodiments, the number of current extension structures 102 may be 1 / 4 or 1 / 9 of the number of micro LEDs 101, with each current extension structure 102 surrounding 4 micro LEDs 101 or 9 micro LEDs 101, without limitation.

[0160] In an embodiment of the present invention, the current extension structure 102 can be a multilayer structure, and the current extension structure 102 includes one or more main metal layers.

[0161] In this embodiment of the invention, the material of the main metal layer can be one or more of Pt, Au, Al, and Ag. The current spreading structure can increase the current spread between adjacent micro-LEDs, reduce the resistance between adjacent micro-LEDs, and reduce losses. The current spreading structure allows the current to spread rapidly and uniformly to all micro-LEDs.

[0162] In some embodiments, the current extension structure 102 may further include: an isolation layer corresponding to each main metal layer; wherein the isolation layer and the main metal layer are staggered, and each main metal layer is located on the corresponding isolation layer.

[0163] By employing isolation layers that correspond one-to-one with each main metal layer, and by staggering the isolation layers with the main metal layers, with each main metal layer located on its corresponding isolation layer, the influence of electromigration within the current extension structure 102 can be effectively suppressed by setting the isolation layers. Especially when the density of micro-light-emitting diodes 101 in the micro-light-emitting diode chip is large, it is possible to increase the height of the current extension structure 102 by setting the isolation layers, thereby further improving the light extraction efficiency through the higher current extension structure 102.

[0164] Furthermore, the insulating layer may include a titanium (Ti) metal layer. It should be noted that the insulating layer may also include other suitable materials, such as titanium nitride (TiN).

[0165] In some embodiments, the current spreading structure 102 may further include: an adhesive layer located at the bottom layer of the current spreading structure 102, and an isolation layer and a main metal layer located on the adhesive layer.

[0166] An adhesive layer is formed between the micro-light-emitting diodes 101, and the isolation layer and the main metal layer are located on the adhesive layer. The adhesive layer can effectively improve the bottom stability of the current extension structure 102. Especially when the density of micro-light-emitting diodes 101 in the micro-light-emitting diode chip is large, the adhesive layer can be set to increase the height of the current extension structure 102, thereby further improving the light extraction efficiency through the higher current extension structure 102.

[0167] Furthermore, the adhesive layer may include a chromium (Cr) metal layer. It should be noted that the adhesive layer material may also include other suitable materials, such as one or more of the following: titanium (Ti), titanium nitride (TiN), and tungsten (W).

[0168] In this embodiment of the invention, the current spreading structure 102 may further include: an anti-diffusion layer corresponding to the isolation layer, with each isolation layer located on the corresponding anti-diffusion layer.

[0169] By forming anti-diffusion layers that correspond one-to-one with the isolation layers, and with each isolation layer located on the corresponding anti-diffusion layer, the stability of the current extension structure 102 can be improved by utilizing the high hardness and good corrosion resistance of the anti-diffusion layer. Especially when the density of micro-light-emitting diodes 101 in the micro-light-emitting diode chip is large, the height of the current extension structure 102 can be increased by setting the anti-diffusion layer, thereby further improving the light extraction efficiency through the higher current extension structure 102.

[0170] The anti-diffusion layer may include a platinum (Pt) metal layer and a nickel (Ni) metal layer. It should be noted that the anti-diffusion layer may be a single platinum metal layer, a single nickel metal layer, or a stack of single platinum metal layers and single nickel metal layers.

[0171] Figure 13 A longitudinal cross-sectional schematic diagram of a micro light-emitting diode chip according to another embodiment of the present invention is shown.

[0172] In some embodiments, such as Figure 13 As shown, there is a gap 1025 in the current extension structure 102.

[0173] The current extension structure 102 can be formed by metal vapor deposition. The gaps 1025 are formed during the metal vapor deposition process. The presence of the gaps has the advantage of reducing the film stress in the current extension structure 102. The number of gaps 1025 is not fixed, and the position of the gaps 1025 in the current extension structure 102 is not fixed. For example, the gaps 1025 may exist in the second part and / or the first part of the current extension structure 102. Figure 13 The number and location of the overlapping gaps 1025 are for illustrative purposes only.

[0174] Figure 14 A longitudinal cross-sectional schematic diagram of a micro-light-emitting diode chip with microlenses according to an embodiment of the present invention is shown.

[0175] like Figure 14 As shown, the micro-LED chip also includes a microlens 300. The microlens 300 is disposed on the micro-LED, wherein at least one microlens 300 is disposed on the epitaxial layer of the micro-LED to form a microlens array, adjacent microlenses 300 are connected to each other, and the horizontal profile of the microlens 300 is larger than the maximum horizontal profile of the micro-LED.

[0176] like Figure 14As shown, in an embodiment of the present invention, a gap 301 is provided between adjacent microlenses. In an embodiment of the present invention, the bottom of the gap 301 is higher than the top of the epitaxial layer 103. In another embodiment of the present invention, the bottom of the gap 301 is lower than the top of the epitaxial layer 103 and higher than the bottom of the epitaxial layer 103. In yet another embodiment of the present invention, the bottom of the gap is located above the current spreading structure 102. Specifically, as shown, the gap 301 is located between two adjacent current spreading structures (i.e., between bifurcation peaks).

[0177] In addition, such as Figure 14 As shown, in embodiments of the present invention, the microlens may also have an air gap 302 inside. Each lens may have multiple air gaps, and the size and length of each air gap may be the same or different. Furthermore, within the same chip, the number of air gaps and / or the position and / or size of the air gaps in different microlenses may be the same or different. As shown, in some embodiments of the present invention, the air gap 302 is located at the edge of the microlens 300, specifically, for example, on both sides of the epitaxial layer 103, preferably, it is located between the epitaxial layer 103 and the current extension structure 102. Also, as shown, in some embodiments of the present invention, the top of the air gap 302 is higher than the top of the epitaxial layer 103, and its bottom may be higher than or lower than the top of the epitaxial layer 103. As shown, in some embodiments of the present invention, the bottom of the air gap 302 is higher than the top of the current extension structure 102. In still other embodiments of the present invention, the bottom of the air gap 302 is lower than the top of the current extension structure 102. It should be noted that in other embodiments of the present invention, the microlens may also be without an air gap 302.

[0178] In embodiments of the present invention, such as Figure 10 As shown, the driving backplane 2 also has driving electrodes 201, with one driving electrode 201 corresponding to each micro LED. The driving electrode 201 can be a conductive via, such as a copper via.

[0179] In an embodiment of the present invention, a second bonding layer 202 is disposed on the surface of the driving electrode 201, and the second bonding layer 202 is in electrical contact with the driving electrode 201; the second bonding layer 202 is bonded to the first bonding layer 107. The driving backplate 2 can turn the micro light-emitting diode on and off.

[0180] While some embodiments of the present invention have been described in this application, those skilled in the art will understand that these embodiments are merely illustrative. Numerous variations, alternatives, and improvements will arise in those skilled in the art under the teachings of this invention without departing from its scope. The appended claims are intended to define the scope of the invention and thereby cover methods and structures within the scope of the claims themselves and their equivalents.

Claims

1. A miniature light-emitting diode chip with leaded electrodes, characterized in that, include: Drive backplane; as well as A functional layer, disposed on a drive backplane, has a plurality of lead electrodes, the lead electrodes including: The first metal layer is in electrical contact with the drive backplane; as well as The second metal layer is located on the side of the first metal layer opposite to the drive backplate and is in electrical contact with the first metal layer.

2. The micro light-emitting diode chip with leaded electrodes according to claim 1, characterized in that, The thickness of the first metal layer is 0.5-1.5 μm.

3. The micro light-emitting diode chip with leaded electrodes according to claim 1, characterized in that, The thickness of the second metal layer is 0.5-1.5 μm.

4. The micro light-emitting diode chip with leaded electrodes according to claim 1, characterized in that, The sum of the thicknesses of the first metal layer and the second metal layer is 1-3 μm.

5. The micro light-emitting diode chip with leaded electrodes according to claim 1, characterized in that, The first metal layers of all lead electrodes are not in contact with each other, and the second metal layers of all lead electrodes are not in contact with each other.

6. The miniature light-emitting diode chip with leaded electrodes according to claim 1, characterized in that, The lead electrode further includes a first dielectric layer that covers the side surface and the edge of the upper surface of the first metal layer.

7. The micro light-emitting diode chip with leaded electrodes according to claim 6, characterized in that, The central region of the first dielectric layer is hollowed out.

8. The micro light-emitting diode chip with leaded electrodes according to claim 7, characterized in that, The first dielectric layer is located between the first metal layer and the second metal layer, the edge of the second metal layer is located on the first dielectric layer, the middle region of the second metal layer is in electrical contact with the first metal layer, and the middle region of the second metal layer is recessed downward relative to the edge of the second metal layer.

9. The micro light-emitting diode chip with leaded electrodes according to claim 7, characterized in that, The height difference between the edge of the second metal layer and the central region of the second metal layer is 10. The micro light-emitting diode chip with leaded electrodes according to claim 6, characterized in that, The first dielectric layer of all lead electrodes is interconnected.

11. The micro light-emitting diode chip with leaded electrodes according to claim 1, characterized in that, The lead electrode further includes a second dielectric layer that covers the side surface of the second metal layer and the edge of the upper surface of the second metal layer, thereby surrounding the second metal layer.

12. The micro light-emitting diode chip with leaded electrodes according to claim 11, characterized in that, The second medium layer forms a fence, and the four inner corners of the fence are rounded.

13. The micro light-emitting diode chip with leaded electrodes according to claim 11, characterized in that, The second dielectric layers of all lead electrodes are interconnected.

14. The micro light-emitting diode chip with leaded electrodes according to claim 1, characterized in that, The first metal layer is in electrical contact with the electrodes of the drive backplate.

15. The micro light-emitting diode chip with leaded electrodes according to claim 14, characterized in that, The electrodes of the drive backplate are grid-type, wherein each electrode includes an electrode electrical contact layer and multiple arrayed electrode insulation structures, wherein the electrode electrical contact layer surrounds the arrayed electrode insulation structures and is located between the arrayed electrode insulation structures.

16. The micro light-emitting diode chip with leaded electrodes according to claim 15, characterized in that, The electrode insulation structure has a quadrilateral shape when viewed from above, and the electrode electrical contact layer has a grid shape remaining after removing the quadrilateral when viewed from above.

17. The micro light-emitting diode chip with leaded electrodes according to claim 14, characterized in that, The electrodes of the drive backplate are striped, and the electrodes include an electrode electrical contact layer and multiple parallel long strip-shaped electrode insulation structures.

18. The micro light-emitting diode chip with leaded electrodes according to claim 17, characterized in that, The top view shape of the electrode electrical contact layer is the shape remaining after removing the elongated strip.

19. The micro light-emitting diode chip with leaded electrodes according to claim 14, characterized in that, The electrodes of the drive backplate are made of a single piece of metal.

20. The micro light-emitting diode chip with leaded electrodes according to any one of claims 15-19, characterized in that, The electrodes of the drive backplate are surrounded by insulating material.

21. The micro light-emitting diode chip with leaded electrodes according to claim 1, characterized in that, The central region of the second metal layer is grid-like.

22. The micro light-emitting diode chip with leaded electrodes according to claim 1, characterized in that, The central region of the second metal layer is striped.

23. The micro light-emitting diode chip with leaded electrodes according to claim 1, characterized in that, The functional layer includes a light-emitting region and a non-light-emitting region. The non-light-emitting region is located around the light-emitting region and surrounds it. The light-emitting region contains multiple micro light-emitting diodes arranged in an array.

24. The micro light-emitting diode chip with leaded electrodes according to claim 21, characterized in that, The miniature light-emitting diode is in electrical contact with the driving backplate.

25. The micro light-emitting diode chip with leaded electrodes according to claim 21, characterized in that, The light-emitting region also includes a current-spreading structure located between the micro-light-emitting diodes in the light-emitting region and in electrical contact with the micro-light-emitting diodes.

26. The micro light-emitting diode chip with leaded electrodes according to claim 21, characterized in that, The lead electrode is located in the non-light-emitting area.

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