Display device with light emitting device and method of manufacturing the same

Abstract

A display device having a light-emitting device and a method for manufacturing the same are disclosed. The display device according to an embodiment of the present invention may include: a substrate; and a light-emitting device disposed on the substrate and located in a display area. The light-emitting device may include: a first electrode; an intermediate layer disposed on the first electrode; a second electrode disposed on the intermediate layer; and an encapsulation layer surrounding at least a portion of the first electrode and the intermediate layer. The second electrode may be disposed on the intermediate layer and the encapsulation layer.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0190265, filed on December 18, 2024, which is incorporated herein by reference for all purposes, as if fully set forth herein. Technical Field

[0003] The embodiments of the present invention relate to a display device having a light-emitting device and a method for manufacturing the same. Background Technology

[0004] Display devices are used in various electronic devices, such as televisions, mobile phones, laptops, and tablets. Display devices include self-emissive organic light-emitting display (OLED) devices and liquid crystal display (LCD) devices that require a separate light source.

[0005] Recently, display devices with light-emitting diodes (LEDs) have attracted attention as the next generation of display devices. Because LEDs are made of inorganic materials rather than organic materials, LED-based display devices have faster illumination speeds and better luminous efficiency compared to liquid crystal displays or organic light-emitting displays, and can display high-brightness images. Summary of the Invention

[0006] Embodiments of the present invention may provide a display device having a second electrode capable of improving the luminous efficiency of a light-emitting device.

[0007] Embodiments of the present invention may provide a display device having an encapsulation layer that enhances the reliability of light-emitting devices.

[0008] Embodiments of the present invention may provide a display device having an auxiliary electrode connected to a first electrode of a light-emitting device through at least one hole.

[0009] The embodiments of the present invention provide a method for manufacturing light-emitting devices that can easily detect defective light-emitting devices.

[0010] The objectives of the embodiments of the present invention are not limited to those described herein, and other objectives not mentioned will be clearly understood by those skilled in the art from the following description.

[0011] A display device according to an embodiment of the present invention may include: a substrate; and a light-emitting device disposed on the substrate and located in a display area. The light-emitting device may include: a first electrode; an intermediate layer disposed on the first electrode; a second electrode disposed on the intermediate layer; and an encapsulation layer surrounding at least a portion of the first electrode and the intermediate layer. The second electrode may be disposed on the intermediate layer and the encapsulation layer.

[0012] A method for manufacturing a light-emitting device according to an embodiment of the present invention may include the following steps: forming a crystal layer on a sapphire substrate; forming a first metal layer on the crystal layer; separating the first metal layer into a plurality of first electrodes and etching the crystal layer to a predetermined first depth; forming an encapsulation layer on the side portion of the crystal layer and on the plurality of first electrodes; forming at least one hole in the encapsulation layer; forming a plurality of auxiliary electrodes on the encapsulation layer and connecting the plurality of auxiliary electrodes to the plurality of first electrodes to form a first intermediate product; bonding the first intermediate product to a first carrier substrate using a first adhesive layer and positioning the plurality of auxiliary electrodes on the first carrier substrate; removing the first adhesive layer and the upper portion of the encapsulation layer; forming a second metal layer on the first adhesive layer and the encapsulation layer; forming a second adhesive layer on the second metal layer and forming a second carrier substrate on the second adhesive layer; removing the first carrier substrate and the first adhesive layer to form a second intermediate product; and separating the second metal layer into a plurality of second electrodes to form a plurality of light-emitting devices based on the second intermediate product, wherein the second electrodes are disposed on the encapsulation layer.

[0013] According to an embodiment of the present invention, a display device may be provided having a second electrode capable of improving the luminous efficiency of a light-emitting device.

[0014] According to an embodiment of the present invention, a display device may be provided having an encapsulation layer that enhances the reliability of the light-emitting device.

[0015] According to an embodiment of the present invention, a display device may be provided having an auxiliary electrode connected to a first electrode of a light-emitting device through at least one hole.

[0016] According to embodiments of the present invention, a method for manufacturing a light-emitting device that can easily detect defective light-emitting devices can be provided.

[0017] According to embodiments of the present invention, a method for manufacturing a light-emitting device that enables process optimization without requiring a separate mask process for etching the second electrode of the light-emitting device can be provided.

[0018] The effects of the embodiments of the present invention are not limited to those described above, and those skilled in the art will clearly understand from the description of the present invention other effects not mentioned. Attached Figure Description

[0019] The invention will be more fully understood from the following detailed description and accompanying drawings, which are for illustrative purposes only and are not intended to limit the invention.

[0020] Figure 1 A light-emitting device according to an embodiment of the present invention is shown.

[0021] Figures 2 to 14 This illustrates a method for forming according to an embodiment of the present invention. Figure 1 The process cross-sectional diagram of the structural steps.

[0022] Figure 15 This illustration shows a plurality of light-emitting devices transferred onto a substrate of a display panel according to an embodiment of the present invention.

[0023] Figure 16 This is a plan view of a display device according to an embodiment of the present invention.

[0024] Figure 17 This is a plan view of a display panel according to an embodiment of the present invention.

[0025] Figure 18 This is a plan view of a unit driving area of ​​a display panel according to an embodiment of the present invention.

[0026] Figure 19 Subpixels of a display panel according to an embodiment of the present invention are shown.

[0027] Figure 20 This is a plan view of a display panel according to an embodiment of the present invention.

[0028] Figure 21 This is a cross-sectional view of a display panel according to an embodiment of the present invention.

[0029] Figure 22 This is a cross-sectional view of a display panel according to an embodiment of the present invention.

[0030] Figure 23 This is an enlarged cross-sectional view of a sub-pixel of a display panel according to an embodiment of the present invention. Detailed Implementation

[0031] In the following description of examples or embodiments of the invention, reference will be made to the accompanying drawings, which are shown by way of illustrating specific examples or embodiments that may be implemented, and wherein the same reference numerals and symbols may be used to designate the same or similar components, even if they are shown in different drawings. Furthermore, in the following description of examples or embodiments of the invention, detailed descriptions of well-known functions and components incorporated herein will be omitted where it is determined that such detailed descriptions would obscure the subject matter of some embodiments of the invention. Terms such as “comprising,” “having,” “including,” and “constituting” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.” As used herein, singular forms are intended to include plural forms unless the context clearly indicates otherwise.

[0032] In this document, terms such as “first,” “second,” “A,” “B,” “(A),” or “(B)” may be used to describe elements of the invention. Each of these terms is not used to define the nature, order, sequence, or number of elements, but is only used to distinguish the corresponding element from other elements.

[0033] When referring to the first element and the second element as "connected or joined" or "overlapping," it should be interpreted as meaning that not only can the first element be "directly connected or joined" or "directly in contact with or overlapping" the second element, but a third element can also be "inserted" between the first and second elements, or the first and second elements can be "connected or joined" or "overlapping" with each other through a fourth element. Here, the second element may be included in at least one of two or more elements that are "connected or joined" or "overlapping" with each other.

[0034] When time-relative terms such as “after,” “following,” “next,” “before,” etc., are used to describe the process or operation of an element or structure, or the flow or steps in an operation, processing, or manufacturing method, these terms may be used to describe discontinuous or non-sequential processes or operations, unless the terms “directly” or “immediately following” are used together.

[0035] Furthermore, when referring to any size, relative dimensions, etc., it should be assumed that the numerical values ​​or corresponding information of an element or feature (e.g., level, range, etc.) include the range of tolerances or errors that can be caused by various factors (e.g., process factors, internal or external impacts, noise, etc.), even if no relevant description is specified. In addition, the term "may" fully encompasses all the meanings of the term "can".

[0036] In the following, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0037] Figure 1 An ED light-emitting device according to an embodiment of the present invention is shown.

[0038] Reference Figure 1 According to an embodiment of the present invention, a light-emitting device ED may include: a first electrode E1; an intermediate layer 110 disposed on the first electrode E1; a second electrode E2 disposed on the intermediate layer 110; an encapsulation layer 120 surrounding at least a portion of the intermediate layer 110 and the first electrode E1; and an auxiliary electrode 130 disposed below the first electrode E1.

[0039] In the light-emitting device (ED) according to an embodiment of the present invention, the first electrode E1 can be an anode, and the second electrode E2 can be a cathode. Optionally, the first electrode E1 can be a cathode, and the second electrode E2 can be an anode. In the following description, the first electrode E1 can be an anode, and the second electrode E2 can be a cathode, but the embodiments of the present invention are not limited thereto.

[0040] Each of the first electrode E1 and the second electrode E2 can be a transparent electrode. For example, the first electrode E1 and the second electrode E2 can include transparent conductive oxides, such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0041] Reference Figure 1 The intermediate layer 110 can be disposed between the first electrode E1 and the second electrode E2.

[0042] Reference Figure 1 The intermediate layer 110 may include: a light-emitting layer 112; a first semiconductor layer 111 between the first electrode E1 and the light-emitting layer 112; and a second semiconductor layer 113 between the second electrode E2 and the light-emitting layer 112.

[0043] One of the first semiconductor layer 111 and the second semiconductor layer 113 may be implemented as a III-V or II-VI group compound semiconductor, and may be doped with impurities (or dopants). For example, one of the first semiconductor layer 111 and the second semiconductor layer 113 may be a semiconductor layer doped with n-type impurities, and the other may be a semiconductor layer doped with p-type impurities, but the embodiments of the present invention are not limited thereto. For example, at least one of the first semiconductor layer 111 and the second semiconductor layer 113 may be a layer doped with n-type or p-type impurities in a material such as gallium nitride (GaN), gallium phosphide (GaP), gallium arsenide phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), indium aluminum phosphide (InAlP), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), aluminum indium gallium nitride (AlInGaN), aluminum gallium arsenide (AlGaAs), or gallium arsenide (GaAs), but the embodiments of the present invention are not limited thereto. For example, n-type impurities can be silicon (Si), germanium (Ge), selenium (Se), carbon (C), tellurium (Te), or tin (Sn), but the embodiments of the present invention are not limited thereto. For example, p-type impurities can be magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), or beryllium (Be), but the embodiments of the present invention are not limited thereto.

[0044] For example, the first semiconductor layer 111 and the second semiconductor layer 113 may be a nitride semiconductor including n-type impurities and a nitride semiconductor including p-type impurities, respectively. For example, the first semiconductor layer 111 may be a nitride semiconductor including p-type impurities, and the second semiconductor layer 113 may be a nitride semiconductor including n-type impurities.

[0045] The light-emitting layer 112 may be disposed between the first semiconductor layer 111 and the second semiconductor layer 113. The light-emitting layer 112 may be positioned closer to the first electrode E1 than the second electrode E2, but is not limited thereto. For example, the light-emitting layer 112 may be positioned closer to the second electrode E2 than the first electrode E1. As another example, the distance from the light-emitting layer 112 to the first electrode E1 may be the same as the distance from the light-emitting layer 112 to the second electrode E2.

[0046] A light-emitting layer 112 may be disposed between a first semiconductor layer 111 and a second semiconductor layer 113. The light-emitting layer 112 may receive holes and electrons from the first semiconductor layer 111 and the second semiconductor layer 113 to emit light. For example, the light-emitting layer 112 may be configured as a single-well structure, a multi-well structure, a single quantum well structure, a multiple quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure. For example, the light-emitting layer 112 may be configured as indium gallium nitride (InGaN) or gallium nitride (GaN). As another example, the light-emitting layer 112 may include a multiple quantum well (MQW) structure, which includes a well layer and a barrier layer having a higher band gap than the well layer. For example, the light-emitting layer 112 may be formed of an InGaN layer as the well layer and an AlGaN layer as the barrier layer.

[0047] Reference Figure 1 The encapsulation layer 120 may be disposed on at least a portion of the first semiconductor layer 111, the light-emitting layer 112, the second semiconductor layer 113, the first electrode E1, and the second electrode E2. For example, the encapsulation layer 120 may surround at least a portion of the first semiconductor layer 111, the light-emitting layer 112, the second semiconductor layer 113, the first electrode E1, and the second electrode E2.

[0048] For example, the encapsulation layer 120 may protect the first semiconductor layer 111, the light-emitting layer 112, and the second semiconductor layer 113. For example, the encapsulation layer 120 may cover the side of the first semiconductor layer 111, the side of the light-emitting layer 112, and the side of the second semiconductor layer 113.

[0049] The encapsulation layer 120 may have a structure in which reflective material is dispersed in a resin layer, but embodiments of the present invention are not limited thereto. For example, the encapsulation layer 120 may be manufactured as a reflector with various structures, but embodiments of the present invention are not limited thereto. Light emitted from the light-emitting layer 112 may be reflected upward by the encapsulation layer 120, thereby improving light extraction efficiency. For example, the encapsulation layer 120 may be a reflective layer.

[0050] In a light-emitting device (ED) according to an embodiment of the present invention, the encapsulation layer 120 may include: a side portion 120s surrounding the side portion of the first electrode E1 and the intermediate layer 110; and a lower portion 120b surrounding the rear surface of the first electrode E1 and having at least one hole. For example, the lower portion 120b may have a single hole. As another example, the lower portion 120b may have two or more holes.

[0051] The first electrode E1 can be electrically connected to electrodes and / or wiring disposed outside the light-emitting device ED via at least one hole included in the lower portion 120b. If the lower portion 120b has two or more holes, the contact resistance between the first electrode E1 and the external electrodes and / or wiring can be reduced compared to the case where the lower portion 120b has a single hole.

[0052] Reference Figure 1 In the light-emitting device ED according to an embodiment of the present invention, the encapsulation layer 120 may include a first encapsulation layer 121 surrounding the first electrode E1 and the intermediate layer 110 and a second encapsulation layer 122 surrounding the first encapsulation layer 121.

[0053] Because the encapsulation layer 120 is formed as a double-layer structure including a first encapsulation layer 121 and a second encapsulation layer 122, the reliability of the light-emitting device (ED) can be improved. If the encapsulation layer 120 is not robust enough and cracks appear, a short-circuit defect may occur due to the crack migrating to the second electrode E2. Therefore, bright spots, dark spots, bright lines, or dark lines in the light-emitting device (ED) can be identified.

[0054] The encapsulation layer 120 includes a first encapsulation layer 121 surrounding the first electrode E1 and the intermediate layer 110, and a second encapsulation layer 122 surrounding the first encapsulation layer 121, thereby preventing short-circuit defects caused by crack migration to the second electrode E2, thereby increasing the reliability of the light-emitting device ED.

[0055] In the light-emitting device (ED) according to an embodiment of the present invention, the first encapsulation layer 121 may include a material different from that of the second encapsulation layer 122. For example, the first encapsulation layer 121 may include aluminum oxide (Al2O3), and the second encapsulation layer 122 may include silicon nitride (SiNx) or silicon oxide (SiOx), but is not limited thereto.

[0056] In the light-emitting device ED according to an embodiment of the present invention, the thickness of the first encapsulation layer 121 may be less than the thickness of the second encapsulation layer 122, or the density of the first encapsulation layer 121 may be higher than the density of the second encapsulation layer 122.

[0057] As will be described later, the process methods for forming the first encapsulation layer 121 and the process methods for forming the second encapsulation layer 122 may be different. Therefore, the thickness and density of the first encapsulation layer 121 may differ from the thickness and density of the second encapsulation layer 122.

[0058] Reference Figure 1 In the light-emitting device ED according to an embodiment of the present invention, a second electrode E2 may be disposed on the intermediate layer 110 and the encapsulation layer 120. The rear surface of the second electrode E2 may contact the upper surface of the encapsulation layer 120. That is, the second electrode E2 may be configured to cover the upper surface of the intermediate layer 110 and the upper surface of the encapsulation layer 120.

[0059] As will be described later, during the manufacturing process of the light-emitting device (ED), the material of the second electrode E2 can be etched while leaving a predetermined size to form the second electrode E2. The light-emitting device ED according to an embodiment of the present invention can maximize the predetermined size during the etching process of the second electrode E2. Therefore, the efficiency of the light-emitting device ED can be improved, and the image quality of the display panel can be enhanced.

[0060] Reference Figure 1 In the light-emitting device ED according to an embodiment of the present invention, the auxiliary electrode 130 may be located below the lower portion 120b of the encapsulation layer 120 and may be electrically connected to the first electrode E1 via at least one hole.

[0061] The auxiliary electrode 130 may be an opaque electrode. For example, the auxiliary electrode 130 may include gold (Au), but is not limited thereto.

[0062] For example, the auxiliary electrode 130 may be made of a conductive material capable of eutectic bonding. For instance, the auxiliary electrode 130 of the light-emitting device ED may be made of gold (Au), tin (Sn), tungsten (W), silicon (Si), silver (Ag), titanium (Ti), iridium (Ir), chromium (Cr), indium (In), zinc (Zn), lead (Pb), nickel (Ni), platinum (Pt), and copper (Cu), or alloys thereof.

[0063] In the transfer process of the light-emitting device (ED), the auxiliary electrode 130 can be electrically connected to an electrode connection pattern arranged in the display panel. As will be described later, if the auxiliary electrode 130 is made of gold (Au), the auxiliary electrode 130 and the electrode connection pattern can be joined by eutectic bonding through heat and pressure.

[0064] Figures 2 to 14 This illustrates a method for forming according to an embodiment of the present invention. Figure 1 The process cross-sectional diagram of the structural steps.

[0065] The method for manufacturing a light-emitting device according to an embodiment of the present invention may include steps 1 to 13 (S1' to S13').

[0066] Reference Figure 2 The first step S1' can be the step of forming a crystal layer 110' on a sapphire substrate 200.

[0067] The crystal layer 110' can be a wafer comprising gallium nitride (GaN). For example, a crystal layer 110' with a thickness of 5 μm to 6 μm can be formed on a sapphire substrate 200. The crystal layer 110' can be formed by an epitaxial growth technique. The epitaxial growth technique can be a method in which all smaller single crystals grown at the interface of the substrate (i.e., the sapphire substrate 200) are uniformly aligned to form a single crystal layer.

[0068] The crystal layer 110' can be epitaxially grown sequentially using an undoped semiconductor layer, a semiconductor layer doped with n-type impurities, an active layer, and a semiconductor layer doped with p-type impurities. The semiconductor layer doped with n-type impurities may include materials for forming a second semiconductor layer, the active layer may include materials for forming a light-emitting layer, and the semiconductor layer doped with p-type impurities may include materials for forming a first semiconductor layer.

[0069] Reference Figure 3 The second step S2' can be the step of forming a first metal layer E1' on the crystal layer 110'.

[0070] The first metal layer E1' may include indium tin oxide (ITO). The first metal layer E1' may include a material used to form the first electrode E1. For example, the first metal layer E1' may be formed on the crystal layer 110' with a thickness of 120 nm.

[0071] Reference Figure 4 The third step S3' may be the step of separating the first metal layer E1' into a plurality of first electrodes E1 and etching the crystal layer 110' to a predetermined first depth D1.

[0072] Reference Figure 4 The region of the first metal layer E1' that does not include the plurality of first electrodes E1 can be removed. Two adjacent first electrodes E1 among the plurality of first electrodes E1 can be spaced apart by a predetermined distance. The crystal layer 110' that overlaps with the region that does not include the plurality of first electrodes E1 can be etched at a first depth D1. For example, the first depth D1 can be 3 μm.

[0073] Reference Figure 5 The fourth step S4' may be the step of forming an encapsulation layer 120 on the side of the plurality of first electrodes E1 and the crystal layer 110'.

[0074] Reference Figure 5 A first encapsulation layer 121 may be formed to surround the sides of the plurality of first electrodes E1 and the crystal layer 110'. The first encapsulation layer 121 may include aluminum oxide (Al2O3). The first encapsulation layer 121 may be formed using an atomic layer deposition (ALD) method that deposits one atomic layer per cycle. Therefore, the first encapsulation layer 121 may include aluminum oxide with a relatively thin thickness and a high density.

[0075] Reference Figure 5The second encapsulation layer 122 may be formed around the first encapsulation layer 121. The second encapsulation layer 122 may include silicon nitride (SiNx) or silicon oxide (SiOx). The second encapsulation layer 122 may be formed using a sputtering method, wherein the sputtering method physically deposits particles that are detached by high-energy collisions with a target material. As a result, the second encapsulation layer 122 may be thicker than the first encapsulation layer 121 and may include silicon nitride or silicon oxide with a lower density.

[0076] Reference Figure 6 The fifth step S5' can be the step of forming at least one hole H in the encapsulation layer 120.

[0077] Reference Figure 6 At least one hole H can be formed by etching the first encapsulation layer 121 and the second encapsulation layer 122. For example, at least one hole H can be formed with a depth of 1.5 μm. By forming multiple holes H, a portion of the upper surface of the first electrode E1 can be exposed.

[0078] Reference Figure 7 The sixth step S6' may be the step of forming a plurality of auxiliary electrodes 130 on the encapsulation layer 120 and connecting the plurality of auxiliary electrodes 130 to a plurality of first electrodes E1 to generate a first intermediate product 700.

[0079] Reference Figure 7 Multiple auxiliary electrodes 130 may be formed to fill at least one hole H formed in the encapsulation layer 120. The multiple auxiliary electrodes 130 may be electrically connected to the first electrode E1 while simultaneously contacting a portion of the upper surface of the first electrode E1 exposed in the fifth step. The multiple auxiliary electrodes 130 may comprise gold (Au).

[0080] Reference Figure 8 The seventh step S7' may be the step of using the first adhesive layer 810 to bond the first intermediate product 700 to the first carrier substrate 800 and to position the plurality of auxiliary electrodes 130 on the first carrier substrate 800.

[0081] The first adhesive layer 810, comprising organic adhesive material, can be coated on Figure 7 The first intermediate product 700 is bonded to the first carrier substrate 800. (See reference...) Figure 8 The first intermediate product 700 and the first carrier substrate 800, which are bonded to each other, can be placed upside down. Therefore, the first carrier substrate 800 can be located at the bottom, a plurality of auxiliary electrodes 130 can be located on the first carrier substrate, and the sapphire substrate 200 can be located at the top.

[0082] Reference Figure 9 The eighth step S8' can be a step of removing or completely removing the upper part of the first adhesive layer 810 and the encapsulation layer 120.

[0083] Reference Figure 9 The sapphire substrate 200 located at the top can be separated from the crystal layer 110' by laser lift-off.

[0084] The crystal layer 110' exposed after the sapphire substrate 200 is removed can be etched until the upper surface of the first adhesive layer 810 and the encapsulation layer 120 is exposed. The etched crystal layer 110' may be a region including an undoped semiconductor layer.

[0085] The remaining multiple crystal layers 110' after etching can be arranged spaced apart from each other, and each can include a semiconductor layer doped with n-type impurities, an active layer, and a semiconductor layer doped with p-type impurities. That is, each of the multiple crystal layers 110' can include a first semiconductor layer, a light-emitting layer, and a second semiconductor layer, thereby forming an intermediate layer 110 of the light-emitting device according to an embodiment of the present invention.

[0086] Reference Figure 10 The ninth step S9' can be the step of forming a second metal layer E2' on the first adhesive layer 810 and the encapsulation layer 120.

[0087] The second metal layer E2' may include indium tin oxide (ITO), which is a transparent electrode material. The second metal layer E2' may include materials used to form the second electrode E2.

[0088] The second metal layer E2' can be formed on the entire surface. That is, the second metal layer E2' can be formed on the upper surface of the intermediate layer 110, the upper surface of the encapsulation layer 120, and the upper surface of the first adhesive layer 810.

[0089] Reference Figure 11 The tenth step S10' may be the step of forming a second adhesive layer 1110 on the second metal layer E2' and forming a second carrier substrate 1100 on the second adhesive layer 1110.

[0090] The second adhesive layer 1110 may be formed on the entire surface. The second adhesive layer 1110, which includes an organic material that reacts with the laser, may be coated on the second metal layer E2' to bond the second metal layer E2' and the second carrier substrate 1100.

[0091] Reference Figure 12 The eleventh step S11' may be the step of removing the first carrier substrate 800 and the first adhesive layer 810 to produce the second intermediate product 1200.

[0092] Reference Figure 12The first carrier substrate 800 and the first adhesive layer 810 can be separated by laser peeling. The second intermediate product 1200, after the first carrier substrate 800 and the first adhesive layer 810 have been removed, can be placed upside down. Therefore, the second carrier substrate 1100 can be located at the bottom, the second metal layer E2' can be located on the second carrier substrate, and the auxiliary electrode 130 can be located at the top.

[0093] Reference Figure 12 The second intermediate product 1200 may be in a state where the upper surface of the second metal layer E2' is exposed by removing the first adhesive layer 810.

[0094] Reference Figure 13 The twelfth step S12' can be a step of using the test device 1350 to supply a first voltage V1 to all or part of the plurality of auxiliary electrodes 130 in the state of the second intermediate product 1200, and to supply a second voltage V2 different from the first voltage V1 to the second metal layer E2'.

[0095] The electro-optical characteristics of the light-emitting device according to an embodiment of the present invention can be tested by supplying a first voltage V1 to the auxiliary electrode 130 and a second voltage V2 to the second metal layer E2'.

[0096] Because the upper surface of the second metal layer E2' is exposed, the probe used to apply the second voltage V2 can easily make contact. This allows for accurate measurement of the electrical / optical characteristics of the light-emitting device according to an embodiment of the invention, and enables the detection and removal of defective light-emitting devices. Therefore, the yield of normal light-emitting devices that can be mounted on a display panel can be improved.

[0097] Reference Figure 14 The thirteenth step S13' can be a step of forming multiple light-emitting devices ED based on the second intermediate product 1200 by separating the second metal layer E2' into multiple second electrodes E2.

[0098] Reference Figure 14 The area of ​​the second metal layer E2' other than the multiple second electrodes E2 can be removed by wet etching.

[0099] The second metal layer E2' can be etched using the encapsulation layer 120 and the intermediate layer 110 as a mask. Therefore, a separate photolithography process for patterning the second metal layer E2' can be eliminated, thereby reducing process costs.

[0100] Since the second metal layer E2' is not dry-etched into multiple second electrodes E2 by photolithography, it is not limited by the wavelength of light used in the photolithography process. Therefore, the second electrodes E2 can be etched without exceeding a predetermined etching amount. That is, the second electrodes E2 can cover the upper surface of the intermediate layer 110 and the upper surface of the encapsulation layer 120. Figure 14 (The electrode is inverted in the middle), thereby maximizing the size of the second electrode. Therefore, the luminous efficiency of the light-emitting device (ED) according to an embodiment of the present invention can be improved, and the image quality of the display panel can be enhanced.

[0101] Reference Figure 14 Each of the plurality of light-emitting devices ED according to embodiments of the present invention may include: a corresponding first electrode E1 among a plurality of first electrodes E1; a corresponding second electrode E2 among a plurality of second electrodes E2; and an intermediate layer 110 between the corresponding first electrode E1 and the corresponding second electrode E2.

[0102] Reference Figure 14 , Figure 4 The first depth D1 of the etched crystal layer 110' in the middle can correspond to the thickness of the intermediate layer 110.

[0103] The plurality of light-emitting devices (EDs) formed in step thirteen S13' can be transferred from the second carrier substrate 1100 to the substrate of the display panel by a laser transfer method. After aligning the second carrier substrate 1100 and the substrate of the display panel to match the areas where the plurality of light-emitting devices (EDs) are to be positioned, a laser can be irradiated in the direction in which the plurality of light-emitting devices (EDs) are disposed on the second carrier substrate 1100. Since the second adhesive layer 1110 reacts to the laser, the plurality of light-emitting devices (EDs) can be separated from the second carrier substrate 1100 and transferred to the substrate of the display panel.

[0104] Instead of laser transfer, multiple light-emitting devices (EDs) can be transferred using pick-and-place or imprint transfer methods.

[0105] Figure 15 This illustration shows a plurality of light-emitting devices transferred onto a substrate of a display panel according to an embodiment of the present invention.

[0106] Reference Figure 15 The plurality of light-emitting devices (EDs) formed on the carrier substrate 1500 may include normal light-emitting devices (EDs) and defective light-emitting devices (EDs). The carrier substrate 1500 may be... Figure 14 The second carrier substrate 1100.

[0107] The first display panel 1510 shows that normal light-emitting devices (EDs) that were not accurately detected and defective light-emitting devices (EDs) are transferred together onto the first substrate 1511.

[0108] In this situation, complex subsequent processes are required to repair the defective light-emitting devices (EDs) on the first substrate 1511 with normal EDs. Alternatively, a redundant structure can be used, in which the defective EDs and replacement EDs are arranged in duplicate.

[0109] The second display panel 1520 shows the following situation: according to the manufacturing method of the light-emitting device ED according to an embodiment of the present invention, the electrical / optical characteristics of the light-emitting device ED are checked to remove defective light-emitting devices ED in advance, and only normal light-emitting devices ED are transferred to the second substrate 1521.

[0110] Normal light-emitting diodes (EDs) can be individually transferred to the empty spaces where defective EDs were not transferred. This simplifies the repair process. Furthermore, since only normal EDs are placed and no redundant structures are required, material costs are reduced.

[0111] In the following text, for ease of explanation, the second display panel 1520 and the second substrate 1521, on which only a normal light-emitting device ED is disposed, will be referred to as "display panel" and "substrate", respectively, and a display device including a display panel or a substrate will be described in detail.

[0112] Figure 16 This is a plan view of a display device according to an embodiment of the present invention.

[0113] Reference Figure 16 The display panel 1520 may include a substrate 1521. The substrate 1521 may be a component on which various elements, such as multiple metal layers and multiple insulating material layers, are formed. The substrate 1521 may be made of an insulating material. For example, the substrate 1521 may be made of glass or resin. Alternatively, the substrate 1521 may be made of a flexible material. For example, the substrate 1521 may be made of a flexible plastic material such as polyimide (PI).

[0114] Display panel 1520 may display information, video, and / or images provided to a user. For example, display panel 1520 may include a display area DA and a non-display area NDA. For example, substrate 1521 may include a display area DA and a non-display area NDA. The display area DA and the non-display area NDA are not limited to substrate 1521, but may be described throughout the display device 1600.

[0115] The display area DA can be an area for displaying an image. The display area DA may include multiple pixels P. Each of the multiple pixels P may be composed of multiple sub-pixels. At least one light-emitting device may be arranged in each of the multiple sub-pixels. The light-emitting devices may be configured differently depending on the type of display device 1600. For example, if the display device 1600 is an inorganic light-emitting display device, the light-emitting devices may be inorganic-based light-emitting devices, such as light-emitting diodes (LEDs), micro LEDs, or mini LEDs.

[0116] The non-display area NDA can be an area where no image is displayed. Various wiring and circuits for driving the multiple pixels P of the display area DA can be arranged in the non-display area NDA. For example, various driving circuits and wiring can be arranged in the non-display area NDA, and pad portions 1621 connected to integrated circuits and printed circuits can be arranged therein.

[0117] For example, the driving circuit may include a data driving circuit and / or a gate driving circuit, but embodiments of the invention are not limited thereto. Wires or lines provided with control signals for controlling the driving circuit may be arranged on the substrate 1521. For example, the control signals may include various timing signals, including clock signals, input data enable signals, and synchronization signals, but embodiments of the invention are not limited thereto. The control signals may be supplied to the substrate 1521 from the outside via pad portions 1621. For example, circuit components such as flexible printed circuit 1602 and printed circuit board 1604 may be connected to the pad portions 1621.

[0118] According to this embodiment of the invention, the non-display area NDA may include a first non-display area NDA1, a curved area BA, and a second non-display area NDA2. For example, the first non-display area NDA1 may be a region surrounding at least a portion of the display area DA. The curved area BA may be a region extending from at least one of the multiple sides of the first non-display area NDA1, and may be a flexible region. The second non-display area NDA2 may be a region extending from the curved area BA, and may include a pad portion 1621. For example, the curved area BA may be in a curved state, and the remaining area of ​​the substrate 1521 other than the curved area BA may be in a flat state. In this case, as the curved area BA bends, the second non-display area NDA2 may be located on the rear surface of the display area DA.

[0119] The display area DA of the substrate 1521 or the display device 1600 can be configured in various shapes according to the design of the display device 1600. For example, the display area DA can be configured as a rectangular shape with four corners formed in a rounded shape, a rectangular shape with four corners formed in a right-angled shape, or a circular shape.

[0120] The flexible printed circuit 1602 and the printed circuit board 1604 may be disposed on the lower part of the display panel 1520. The flexible printed circuit 1602 and the printed circuit board 1604 may be arranged at one edge of the display panel 1520. One side of the flexible printed circuit 1602 may be connected to the display panel 1520, and the other side may be connected to the printed circuit board 1604. The flexible printed circuit 1602 may be a flexible film.

[0121] The pad portion 1621, located in the second non-display area NDA2, includes multiple pads and can be attached to or joined to a driving assembly comprising one or more flexible printed circuits 1602 and a printed circuit board 1604. The multiple pads included in the pad portion 1621 are electrically connected to one or more flexible printed circuits 1602 and can transmit various signals (or power supplies) from the printed circuit board 1604 and the one or more flexible printed circuits 1602 to a driving circuit arranged in the display area DA (e.g., Figure 17 The driver (DRV).

[0122] The flexible printed circuit 1602 can be a film on which various components are arranged on a flexible base film. For example, a first circuit component 1630 (such as a gate driver integrated circuit and / or a data driver integrated circuit) can be arranged on one or more flexible printed circuits 1602. The first circuit component 1630 can be a component that processes data and drive signals for displaying an image. The flexible printed circuit 1602 can be attached or bonded to multiple pads via a conductive adhesive layer.

[0123] Printed circuit board 1604 may be a component electrically connected to flexible printed circuit 1602 and providing signals to first circuit assembly 1630. Various components for providing various signals to first circuit assembly 1630 may be arranged on printed circuit board 1604. For example, various second circuit components 1640 such as timing controllers, power supplies, memory, or processors may be arranged on printed circuit board 1604.

[0124] Figure 17 This is a plan view of a display panel 1520 according to an embodiment of the present invention.

[0125] Reference Figure 17 According to an embodiment of the present invention, the display area DA of the display panel 1520 may include a plurality of unit driving areas UDA.

[0126] The display panel 1520 according to an embodiment of the present invention may include a plurality of driver DRVs. The plurality of driver DRVs may be respectively arranged in each of a plurality of unit driving regions UDA. For example, the driver DRV may be a driver chip manufactured on a semiconductor substrate using a MOSFET (metal-oxide-semiconductor field-effect transistor) manufacturing process. The display panel 1520 may include a substrate 1521, which includes a display region DA and a plurality of pixels P arranged in a matrix in the display region DA.

[0127] Multiple pixels P can be arranged in each of multiple unit driving areas UDA. Each of the multiple pixels P may include multiple sub-pixels SP. Each of the multiple sub-pixels SP may include at least one light-emitting device.

[0128] For example, multiple sub-pixels SP may include a first sub-pixel SPa, a second sub-pixel SPb, and a third sub-pixel SPc, but are not limited thereto. The first sub-pixel SPa may include a first light-emitting device that emits a first color light, the second sub-pixel SPb may include a second light-emitting device that emits a second color light, and the third sub-pixel SPc may include a third light-emitting device that emits a third color light. For example, the first color light, the second color light, and the third color light may be red light, green light, and blue light, respectively.

[0129] Figure 18 This is a plan view of a unit driving area of ​​a display panel according to an embodiment of the present invention.

[0130] A display panel 1520 according to an embodiment of the present invention may include a plurality of row lines RL and a plurality of column lines CL. Each of the plurality of row lines RL may be arranged to extend in the row direction. The plurality of row lines RL may be electrically connected to a second electrode of each of a plurality of light-emitting devices ED. Each of the plurality of column lines CL may be arranged to extend in the column direction. The plurality of column lines CL may be electrically connected to a first electrode of each of the plurality of light-emitting devices ED.

[0131] Each of the multiple row lines RL can be electrically connected to the second electrode of each of the multiple light-emitting devices ED. That is, the second electrode of each of the multiple light-emitting devices ED can be connected to a single row line RL.

[0132] Each of the multiple column lines CL can be electrically connected to the first electrode of each of the multiple light-emitting devices ED. That is, the first electrode of each of the multiple light-emitting devices ED can be connected to a single column line CL.

[0133] For example, the line width of each row line RL in a plurality of row lines RL can be wider than the line width of each column line CL in a plurality of column lines CL.

[0134] Reference Figure 18 The display panel 1520 according to an embodiment of the present invention may include a plurality of drivers DRV. The plurality of drivers DRV can drive a plurality of light-emitting devices ED, a plurality of column lines CL, and a plurality of row lines RL.

[0135] Multiple driver DRVs can be integrated into the display panel 1520. Multiple driver DRVs can be arranged in the display area DA and can also be arranged on the substrate 1521. Multiple driver DRVs can correspond to multiple unit drive areas UDA. That is, one driver DRV can be arranged in one unit drive area UDA.

[0136] Each of the multiple drivers DRV can drive multiple row lines RL and multiple column lines CL arranged in the corresponding unit drive area UDA, thereby emitting light from multiple light-emitting devices ED arranged in the corresponding unit drive area UDA.

[0137] Multiple driver DRVs are arranged in the display area DA and can be positioned closer to the substrate 1521 than multiple light-emitting devices EDs.

[0138] For example, multiple line lines RL can be driven sequentially. As another example, multiple line lines RL can be driven simultaneously. As yet another example, two or more line lines RL can be driven simultaneously.

[0139] For example, during a specific display driving period, at least one of the multiple row lines RL arranged in the unit driving area UDA can be driven, while the remaining row lines RL may not be driven.

[0140] According to embodiments of the present invention, the voltage applied to the horizontal line RL may be referred to as a low-potential voltage, and the low-potential voltage may also be referred to as the horizontal line voltage or cathode voltage. Depending on the driving type or driving state, the low-potential voltage may have various voltage values. For example, the low-potential voltage may include a first low-potential voltage, a second low-potential voltage, and a third low-potential voltage.

[0141] Driving a row line RL can mean supplying a first low-potential voltage to the row line RL. Not driving a row line RL can mean supplying a second low-potential voltage higher than the first low-potential voltage to the row line RL. Therefore, light-emitting devices ED that overlap with a driven row line RL can emit light, and light-emitting devices ED that overlap with an undriven row line RL can not emit light.

[0142] For example, any of the multiple row lines RL can be supplied with a first low potential voltage during a first time period, and can be supplied with a second low potential voltage higher than the first low potential voltage during a second time period different from the first time period. Therefore, the light-emitting device ED overlapping with the first row line RL can emit light during the first time period, and may not emit light during the second time period different from the first time period. For example, the first and second time periods may be included in one display driving period. As another example, the first and second time periods may be included in different display driving periods.

[0143] Reference Figure 18 A unit drive area UDA can be divided into a first sub-drive area SDA1 and a second sub-drive area SDA2. As another example, a unit drive area UDA can be divided into three or more sub-drive areas. As yet another example, a unit drive area UDA may not be divided into two or more sub-drive areas.

[0144] A unit driving area UDA may include a driver DRV driven by a driver DRV and (2n×m) pixels P(1,1), ..., P(1,m), P(2,1), ..., P(2,m), ..., P(2n,1), ..., P(2n,m).

[0145] In embodiments of the present invention, n can be the row number or the number of rows in each of the first sub-driving areas SDA1 and SDA2, or the number of row lines RL in each of the first sub-driving areas SDA1 and SDA2, or the number of pixel rows in each of the first sub-driving areas SDA1 and SDA2. m can be the column number or the number of columns in each of the first sub-driving areas SDA1 and SDA2, or the number of column lines CL in each of the first sub-driving areas SDA1 and SDA2, or the number of pixel columns in each of the first sub-driving areas SDA1 and SDA2.

[0146] In embodiments of the present invention, n can be a natural number greater than or equal to 1, and m can be a natural number greater than or equal to 1.

[0147] Reference Figure 18 ,(2n×m) pixels P(1,1),…,P(1,m),P(2,1),…,P(2,m),…,P(2n,1),…,P(2n,m) can be arranged into 2n rows R(1),…,R(2n) and m columns C(1),…,C(m).

[0148] Among the (2n×m) pixels P(1,1), ..., P(1,m), P(2,1), ..., P(2,m), ..., P(2n,1), ..., P(2n,m), the (n×m) pixels P(1,1), ..., P(1,m), P(2,1), ..., P(2,m), ..., P(n,1), ..., P(n,m) arranged in the first to nth rows R(1), ..., R(n) can be arranged in the first sub-driving area SDA1.

[0149] Among the (2n×m) pixels P(1,1), ..., P(1,m), P(2,1), ..., P(2,m), ..., P(2n,1), ..., P(2n,m), the (n×m) pixels P(n+1,1), ..., P(n+1,m), P(n+2,1), ..., P(n+2,m), ..., P(2n,1), ..., P(2n,m) arranged in rows (n+1) to 2n, R(n+1), ..., R(2n), can be arranged in the second sub-driving area SDA2.

[0150] Reference Figure 18A unit driving area UDA may include 2n line lines RL(1), ..., RL(2n) to drive (2n×m) pixels P(1,1), ..., P(1,m), P(2,1), ..., P(2,m), ..., P(2n,1), ..., P(2n,m).

[0151] Among the 2n line lines RL(1), ..., RL(2n), the first to the nth line lines RL(1), ..., RL(n) can be arranged in the first sub-driving area SDA1. Among the 2n line lines RL(1), ..., RL(2n), the (n+1)th to the 2nth line lines R(n+1), ..., R(2n) can be arranged in the second sub-driving area SDA2.

[0152] Each of the 2n row lines RL(1),…,RL(n) can overlap with m pixels. For example, the first row line RL(1) can overlap with m pixels P(1,1),…,P(1,m) arranged in the first row R(1). The nth row line RL(n) can overlap with m pixels P(n,1),…,P(n,m) arranged in the nth row R(n). The (n+1)th row line RL(n+1) can overlap with m pixels P(n+1,1),…,P(n+1,m) arranged in the (n+1)th row R(n+1). The 2nth row line RL(2n) can overlap with m pixels P(2n,1),...,P(2n,m) arranged in the 2nth row R(2n).

[0153] For example, the first row line RL(1) may be connected to k sub-pixels Spa, SPb, and SPc of each of the m pixels P(1,1),..., P(1,m) arranged in the first row R(1). More specifically, the first row line RL(1) may be connected to the second electrode of k light-emitting devices EDa, EDb, and EDc of each of the m pixels P(1,1),..., P(1,m) arranged in the first row R(1).

[0154] For example, the nth row line RL(n) can be connected to k sub-pixels SPa, SPb, and SPc of each of the m pixels P(n,1),...,P(n,m) arranged in the nth row R(n). More specifically, the nth row line RL(n) can be connected to the first electrode of the k light-emitting devices EDa, EDb, and EDc of each of the m pixels P(n,1),...,P(n,m) arranged in the nth row R(n).

[0155] For example, the (n+1)th row line RL(n+1) can be connected to k sub-pixels Spa, SPb, and SPc of each of the m pixels P(n+1,1), ..., P(n+1,m) arranged in the (n+1)th row R(n+1). More specifically, the (n+1)th row line RL(n+1) can be connected to the first electrode of the k light-emitting devices EDa, EDb, and EDc of each of the m pixels P(n+1,1), ..., P(n+1,m) arranged in the (n+1)th row R(n+1).

[0156] For example, the 2n-th row line RL(2n) can be connected to k sub-pixels SPa, SPb, and SPc of each of the m pixels P(2n,1), ..., P(2n,m) included in the 2n-th row R(2n). More specifically, the 2n-th row line RL(2n) can be connected to the first electrode of the k light-emitting devices EDa, EDb, and EDc of each of the m pixels P(2n,1), ..., P(2n,m) arranged in the 2n-th row R(2n).

[0157] Reference Figure 18 A single driving region (UDA) may include (m×k×2) columns of lines CL to drive (2n×m) pixels P(1,1), ..., P(1,m), P(2,1), ..., P(2,m), ..., P(2n,1), ..., P(2n,m). Here, k is the number of subpixels SP included in a pixel P. Figure 18 In the example, k is 3. That is, a pixel P can include three sub-pixels SPa, SPb, and SPc.

[0158] The first sub-driving area SDA1 may include (m×k) columns of lines CL to drive (n×m) pixels P(1,1), ..., P(1,m), ..., P(n,1), ..., P(n,m) arranged in the first sub-driving area SDA1. Figure 18 In the example, since k is 3, the first sub-driving area SDA1 can include 3m column lines CL.

[0159] In the first sub-driving region SDA1, k column lines CLa, CLb, and CLb can be arranged in each of the m columns C(1), ..., C(m). Figure 18 In the example, since k is 3, each of the m columns C(1), ..., C(m) in the first sub-driving area SDA1 may include three column lines CLa, CLb and CLc.

[0160] In each of the m columns C(1), ..., C(m), each of the k column lines CL can be connected to n pixels arranged in the corresponding column. In each of the m columns C(1), ..., C(m), each of the k column lines CL can be connected to the first electrode of n light-emitting devices ED arranged in the corresponding column. Figure 18 In the example, since k is 3, in each of the m columns C(1), ..., C(m), the three column lines CLa, CLb, and CLc can be connected to the first electrodes of the 3n light-emitting devices ED in the n pixels arranged in the corresponding column. For example, in each of the m columns C(1), ..., C(m), the first column line CLa can be connected together to the first electrodes of the n first light-emitting devices EDa arranged in the corresponding column. In each of the m columns C(1), ..., C(m), the second column line CLb can be connected together to the first electrodes of the n second light-emitting devices EDb arranged in the corresponding column. In each of the m columns C(1), ..., C(m), the third column line CLc can be connected together to the first electrodes of the n third light-emitting devices EDc arranged in the corresponding column.

[0161] The second sub-driving area SDA2 may include (m×k) columns of lines CL to drive (n×m) pixels P(n+1,1), ..., P(n+1,m), ..., P(2n,1), ..., P(2n,m) arranged in the second sub-driving area SDA2. Figure 18 In the example, since k is 3, the second sub-driving area SDA2 can include 3m column lines CL.

[0162] In the second sub-driving region SDA2, k column lines CL can be arranged in each of m columns C(1), ..., C(m). Figure 18 In the example, since k is 3, each of the m columns C(1), ..., C(m) in the second sub-driving area SDA2 may include three column lines CLa, CLb and CLc.

[0163] In each of the m columns C(1), ..., C(m), each of the k column lines CL can be connected to n pixels arranged in the corresponding column. In each of the m columns C(1), ..., C(m), each of the k column lines CL can be connected to the first electrode of n light-emitting devices ED arranged in the corresponding column. Figure 18In the example, since k is 3, in each of the m columns C(1), ..., C(m), the three column lines CLa, CLb, and CLc can be connected to the first electrodes of the 3n light-emitting devices ED in the n pixels arranged in the corresponding column. For example, in each of the m columns C(1), ..., C(m), the first column line CLa can be connected together to the first electrodes of the n first light-emitting devices EDa arranged in the corresponding column. In each of the m columns C(1), ..., C(m), the second column line CLb can be connected together to the first electrodes of the n second light-emitting devices EDb arranged in the corresponding column. In each of the m columns C(1), ..., C(m), the third column line CLc can be connected together to the first electrodes of the n third light-emitting devices EDc arranged in the corresponding column.

[0164] Figure 19 The sub-pixels SP of a display panel according to an embodiment of the present invention are shown.

[0165] According to an embodiment of the present invention, a sub-pixel SP may include: a light-emitting device ED, including a first electrode E1 and a second electrode E2; a column driver C-DRV for driving a column line CL electrically connected to the first electrode E1 of the light-emitting device ED; and a row driver R-DRV for driving a row line RL electrically connected to the second electrode E2 of the light-emitting device ED.

[0166] A light-emitting device (ED) may include a first electrode E1 and a second electrode E2. The first electrode E1 may be electrically connected to a column line CL, and the second electrode E2 may be electrically connected to a row line RL. For example, the first electrode E1 may be an anode, and the second electrode E2 may be a cathode. As another example, the first electrode E1 may be a cathode, and the second electrode E2 may be an anode.

[0167] The column driver C-DRV included in the unit driving area UDA can be connected to and can drive the multiple column lines CL included in the unit driving area UDA. Each of the multiple column lines CL can be connected to the first electrode E1 of each of the multiple light-emitting devices ED included in the multiple sub-pixels SP arranged in the corresponding column.

[0168] The row driver R-DRV included in the unit driving area UDA can be connected to and can drive multiple row lines RL included in the unit driving area UDA. Each of the multiple row lines RL can be connected together to the second electrode E2 of each of the multiple light-emitting devices ED included in multiple sub-pixels SP arranged in the corresponding row.

[0169] The column driver C-DRV may include master nodes, which include a first node N1, a second node N2, a third node N3, and a fourth node N4. The column driver C-DRV may include a driving transistor DRT and a first light-emitting control transistor EMT1.

[0170] The first node N1 can be a node to which a voltage Vg is applied to control the switching on / off state of the driving transistor DRT. The second node N2 can be a node electrically connected to the high-potential voltage node NVDD to which a high-potential voltage VDD is applied. The third node N3 can be a node connected to the driving transistor DRT and the first light-emitting control transistor EMT1. The fourth node N4 can be a node electrically connected to the first light-emitting control transistor EMT1 and the light-emitting device ED, and can also be a node electrically connected to the column line CL. Here, the source or drain of the first light-emitting control transistor EMT1 and the first electrode E1 of the light-emitting device ED can be jointly connected to the column line CL.

[0171] The driving transistor DRT provides driving current to make the light-emitting device ED emit light. The driving transistor DRT is connected between the second node N2 and the third node N3, and the connection between the second node N2 and the third node N3 can be controlled according to the voltage of the first node N1.

[0172] The gate of the driving transistor DRT is electrically connected to the first node N1, and a gate voltage Vg can be applied to it. The drain or source of the driving transistor DRT can be electrically connected to the second node N2. The source or drain of the driving transistor DRT can be electrically connected to the third node N3.

[0173] The first light-emitting control transistor EMT1 can control the connection of the path through which the drive current flows and can play a role in controlling the light emission of the light-emitting device ED.

[0174] If the driving transistor DRT and the first light-emitting control transistor EMT1 are turned on between the high potential voltage VDD and the low potential voltage VSS, the driving current can be supplied to the light-emitting device ED through the driving transistor DRT and the first light-emitting control transistor EMT1. Therefore, the light-emitting device ED can emit light.

[0175] The first light-emitting control transistor EMT1 is connected between the third node N3 and the fourth node N4, and the connection between the third node N3 and the fourth node N4 can be controlled according to the first light-emitting control signal EM1. The first light-emitting control signal EM1 can be applied to the gate of the first light-emitting control transistor EMT1. The drain or source of the first light-emitting control transistor EMT1 can be electrically connected to the third node N3. The source or drain of the first light-emitting control transistor EMT1 can be electrically connected to the fourth node N4.

[0176] The first emission control signal EM1 may be a pulse width modulation signal that varies at predetermined intervals (e.g., each frame or each subframe included in a frame), but the embodiments of the present invention are not limited thereto.

[0177] The row driver R-DRV can drive at least one row line RL by providing a low potential voltage VSS to at least one row line RL.

[0178] The horizontal driver R-DRV can perform display-on driving or display-off driving on a horizontal line RL. The horizontal driver R-DRV can provide a low-potential voltage to a horizontal line RL for display-on driving, and a low-potential voltage to a horizontal line RL for display-off driving, thus performing display-off driving on a horizontal line RL.

[0179] The low potential voltage used to display the power-on drive and the low potential voltage used to display the power-off drive may be different. For example, the low potential voltage used to display the power-on drive may be lower than the low potential voltage used to display the power-off drive. In embodiments of the present invention, the "low potential voltage used to display the power-on drive" is also referred to as the "first low potential voltage," and the "low potential voltage used to display the power-off drive" is also referred to as the "second low potential voltage."

[0180] In addition to the driving transistor DRT and the first light-emitting control transistor EMT1, the column driver C-DRV may also include at least one switching element and / or at least one transistor. Each transistor included in the column driver C-DRV may be an n-type transistor or a p-type transistor.

[0181] The column driver C-DRV may also include at least one capacitor. The column driver C-DRV may also include at least one circuit element. For example, at least one circuit element may include a power output buffer.

[0182] The row driver R-DRV may include at least one switching element and / or at least one transistor. Each transistor included in the row driver R-DRV may be an n-type transistor or a p-type transistor. The row driver R-DRV may also include at least one circuit element. For example, at least one circuit element may include a power output buffer.

[0183] The column driver C-DRV and the row driver R-DRV may be internal circuitry included in the driver DRV. As another example, the column driver C-DRV and the row driver R-DRV may not be included in the driver DRV and may be circuitry formed on the substrate 1521 of the display panel 1520.

[0184] Figure 20 This is a plan view of a display panel according to an embodiment of the present invention.

[0185] According to an embodiment of the present invention, the substrate 1521 of the display panel 1520 may include a display area DA and a non-display area NDA, and the non-display area NDA may include a first non-display area NDA1, a curved area BA and a second non-display area NDA2.

[0186] Multiple driver DRVs can be arranged in the display area DA. The multiple driver DRVs can be disposed between the substrate 1521 and the light-emitting device ED and electrically connected to the first and second electrodes of the light-emitting device ED. Each of the multiple driver DRVs can be used to drive components included in a corresponding unit driving area (…). Figure 17 and Figure 18 The circuitry for the light-emitting devices of multiple sub-pixels in the UDA (Unified Array of Light-Emitting Devices). Each of the multiple driver DRVs may include a row driver R-DRV for driving multiple row lines and a column driver C-DRV for driving multiple column lines, so as to drive the light-emitting devices included in the respective unit drive area (UDA). Figure 17 and Figure 18 Multiple light-emitting devices (EDs) in UDA.

[0187] The pad section 1621, which includes multiple pads PD, can be arranged in the second non-display area NDA2.

[0188] Multiple signal lines SL and multiple connection lines LL for signal transmission between multiple drivers DRV arranged in the display area DA and the pad section 1621 can be arranged on the substrate 1521. The multiple signal lines SL can be electrically connected between the multiple connection lines LL and the multiple drivers DRV. The multiple connection lines LL can be electrically connected to multiple pads PD and the multiple signal lines SL.

[0189] Multiple connection lines LL can be arranged in the non-display area NDA, and all or part of each of the multiple signal lines SL can be arranged in the display area DA.

[0190] Each of the multiple driver DRVs can receive various signals to perform drive operations via multiple connection lines LL and multiple signal lines SL. Here, the various signals may include various power supply voltages and various signals required for the drive operation of each driver in the multiple driver DRVs.

[0191] When the bending region BA bends, a portion of the multiple connecting lines LL may also bend. Stress can concentrate on a portion of the bent connecting lines LL, thus cracks may appear in the connecting lines LL. Therefore, the multiple connecting lines LL may be formed of a conductive material with excellent ductility to reduce cracking when the bending region BA bends. For example, the multiple connecting lines LL may be formed of a conductive material with excellent ductility. Alternatively, the multiple connecting lines LL may be composed of one of various conductive materials used in the display region DA. The multiple connecting lines LL may be composed of a multilayer structure including various conductive materials. The multiple connecting lines LL may be formed in various shapes to reduce stress. At least a portion of the multiple connecting lines LL arranged on the bending region BA may extend in the same direction as the extension direction of the bending region BA, or may extend in a direction different from the extension direction of the bending region BA to reduce stress.

[0192] Figure 21 This is a cross-sectional view of a display panel according to an embodiment of the present invention. Specifically, Figure 21 It is a cross-sectional view of a portion of a unit drive area UDA with a driver DRV.

[0193] Reference Figure 21 The display panel 2100 may include: a substrate 1521; a driver DRV on the substrate 1521; a layer stack 2110 on the driver DRV; a plurality of light-emitting devices ED disposed on the layer stack 2110; an optical layer 2120 disposed on the layer stack 2110 and between the plurality of light-emitting devices ED; an overcoat layer 2130 disposed on the plurality of light-emitting devices ED and the optical layer 2120; an adhesive layer 2140 disposed on the overcoat layer 2130; and a cover member 2150 disposed on the adhesive layer 2140.

[0194] Multiple column lines CL can be arranged on the layer stack 2110. Each of the multiple column lines CL can be arranged between the layer stack 2110 and the light-emitting device ED. Multiple row lines RL can be arranged on multiple light-emitting devices ED and optical layer 2120.

[0195] The display panel 2100 may include: a substrate 1521 including a display area DA; a plurality of light-emitting devices ED disposed in the display area DA; a plurality of column lines CL electrically connected to a first electrode E1 of each of the plurality of light-emitting devices ED; a plurality of row lines RL electrically connected to a second electrode E2 of each of the plurality of light-emitting devices ED; and a plurality of drivers DRV configured to drive the plurality of light-emitting devices ED, the plurality of column lines CL and the plurality of row lines RL.

[0196] Multiple drivers DRV can be arranged in the display area DA and between the substrate 1521 and multiple light-emitting devices ED, but can be positioned closer to the substrate 1521 than the multiple light-emitting devices ED.

[0197] The layer stack 2110 may include multiple insulating layers. These multiple insulating layers may include multiple organic layers. At least one of the multiple organic layers may be disposed on a side of the driver DRV. For example, two or more organic layers may be disposed on a side of the driver DRV.

[0198] The layer stack 2110 may further include: at least one metal layer connecting the driver DRV and the column line CL; and at least one metal layer connecting the driver DRV and the row line RL.

[0199] Figure 22 It is along Figure 20 A detailed cross-sectional view of the display panel 1520 according to an embodiment of the present invention, taken by the AB cutting line. Figure 23 This is an enlarged cross-sectional view of the sub-pixel SP of the display panel 1520 according to an embodiment of the present invention. However, Figure 22 This is a cross-sectional view of the display area DA, the first non-display area NDA, the curved area BA, and the second non-display area NDA.

[0200] Meanwhile, for ease of illustration, Figure 20 The AB cut-off line is shown as not overlapping with the signal line SL and the connector line LL, but Figure 20 The AB cut line is intended to indicate the same position as the adjacent signal line SL and connector line LL.

[0201] The buffer layer 2211 may be included on the substrate 1521. The buffer layer 2211 may include a first buffer layer 2211a and a second buffer layer 2211b. The first buffer layer 2211a and the second buffer layer 2211b may be disposed in the display area DA, the first non-display area NDA1 and the second non-display area NDA, and may not be disposed in the entirety or part of the bending area BA.

[0202] The first buffer layer 2211a and the second buffer layer 2211b can reduce the penetration of moisture or impurities through the substrate 1521. The first buffer layer 2211a and the second buffer layer 2211b can be made of inorganic insulating materials. For example, the first buffer layer 2211a and the second buffer layer 2211b can be composed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx).

[0203] For example, a portion of the first buffer layer 2211a and the second buffer layer 2211b on the bending region BA can be removed. The upper surface of the substrate 1521 located on the bending region BA can be exposed through the area (e.g., an opening) where the first buffer layer 2211a and the second buffer layer 2211b have been removed.

[0204] By removing the first buffer layer 2211a and the second buffer layer 2211b from the bending region BA, the occurrence of cracks in the first buffer layer 2211a and the second buffer layer 2211b that may occur during bending can be minimized.

[0205] Multiple alignment marks MK may be arranged between the first buffer layer 2211a and the second buffer layer 2211b. The multiple alignment marks MK may be configured to identify the position of the driver DRV during the manufacturing process of the display panel 1520. For example, the multiple alignment marks MK may be configured to align the position of the driver DRV transferred on the adhesive layer 2212. In another example, the multiple alignment marks MK may be omitted.

[0206] The adhesive layer 2212 may be disposed on the second buffer layer 2211b. The adhesive layer 2212 may be disposed in the display area DA, the first non-display area NDA1, the bending area BA, and the second non-display area NDA2. As another example, at least a portion of the adhesive layer 2212 may be removed from the non-display area NDA, including the bending area BA. For example, the adhesive layer 2212 may be made of any one of the following: adhesive polymer, epoxy resin, UV-curable resin, polyimide series, acrylate series, urethane series, and polydimethylsiloxane (PDMS).

[0207] The driver DRV can be disposed on the adhesive layer 2212 in the display area DA. If the driver DRV is implemented as a driver chip (e.g., a driver integrated circuit), the driving driver can be mounted on the adhesive layer 2212 via a transfer process.

[0208] The display panel 1520 may further include: a side protective layer 2213 disposed on the sides of a plurality of driver DRVs; and an upper protective layer 2214 disposed on the plurality of driver DRVs and the side protective layer 2213. For example, the side protective layer 2213 may include at least one of a first protective layer 2213a and a second protective layer 2213b disposed on the sides of the plurality of driver DRVs, and in some cases may further include at least one additional protective layer. The first protective layer 2213a and the second protective layer 2213b may be disposed on the adhesive layer 2212. The first protective layer 2213a and the second protective layer 2213b may be arranged to surround the side surface of the driver DRV. For example, the second protective layer 2213b may be arranged to cover at least a portion of the upper surface of the driver DRV.

[0209] At least one of the first protective layer 2213a and the second protective layer 2213b disposed on the curved area BA can be omitted. For example, the first protective layer 2213a can be disposed entirely on the display area DA and the non-display area NDA, and the second protective layer 2213b can be disposed partially on the display area DA, the first non-display area NDA1, and the second non-display area NDA2.

[0210] For example, the side protective layer 2213, which includes at least one of the first protective layer 2213a and the second protective layer 2213b, may be made of an organic insulating material (i.e., an organic layer), but embodiments of the present invention are not limited thereto. For example, the first protective layer 2213a and the second protective layer 2213b may be made of photoresist, polyimide (PI), or photo acrylic-based materials. For example, the first protective layer 2213a and the second protective layer 2213b may be an outer coating or an insulating layer.

[0211] The display panel 1520 may also include a plurality of insulating layers 2215 disposed on the upper protective layer 2214. For example, the plurality of insulating layers 2215 may include a first insulating layer 2215a, a second insulating layer 2215b, and a third insulating layer 2215c.

[0212] In the display area DA, multiple line connection patterns (LCPs) can be arranged on the second protective layer 2213b. The multiple line connection patterns (LCPs) can be wiring for electrically connecting the driver DRV to other components. For example, the driver DRV can be electrically connected via multiple line connection patterns (LCPs) to multiple column lines (CL), multiple row lines (RL), and multiple row connection electrodes (RCE).

[0213] For example, multiple line connection patterns (LCPs) may include a first line connection pattern (LCP1), a second line connection pattern (LCP2), a third line connection pattern (LCP3), and a fourth line connection pattern (LCP4). For example, the first line connection pattern (LCP1), the second line connection pattern (LCP2), the third line connection pattern (LCP3), and the fourth line connection pattern (LCP4) may be arranged in different metal layers.

[0214] For example, a plurality of first line connection patterns LCP1 may be arranged on the second protective layer 2213b. The plurality of first line connection patterns LCP1 may be electrically connected to the driver DRV. The plurality of first line connection patterns LCP1 may transmit the voltage output from the driver DRV to the column line CL or the row line RL.

[0215] The display panel 1520 may further include a side protective layer 2213 and an upper protective layer 2214. The side protective layer 2213 includes at least one of a first protective layer 2213a and a second protective layer 2213b, and the upper protective layer 2214 is disposed on a plurality of driver DRVs. For example, the upper protective layer 2214 may include a third protective layer 2214, and in some cases, may further include at least one additional protective layer. The third protective layer 2214 may be disposed on the second protective layer 2213b and a plurality of first line connection patterns LCP1. The third protective layer 2214 may be integrally disposed in the display area DA and the non-display area NDA. In the curved area BA, the third protective layer 2214 may cover or surround the side surface of the second protective layer 2213b and the upper surface of the first protective layer 2213a.

[0216] For example, the third protective layer 2214 may be made of an organic insulating material. For example, the third protective layer 2214 may be made of photoresist, polyimide (PI), or optical acrylic-based material. For example, the first protective layer 2213a, the second protective layer 2213b, and the third protective layer 2214 may be made of the same insulating material, or at least one of the first protective layer 2213a, the second protective layer 2213b, and the third protective layer 2214 may be made of an insulating material different from the remaining protective layers.

[0217] Multiple second-line connection patterns LCP2 may be arranged on the third protective layer 2214. These multiple second-line connection patterns LCP2 may be electrically connected or directly connected to the driver DRV. For example, some of the second-line connection patterns LCP2 may be directly or indirectly connected to the driver DRV through contact holes in the third protective layer 2214. Other portions of the second-line connection patterns LCP2 may be electrically connected to the first-line connection pattern LCP1 through contact holes in the third protective layer 2214. The voltage output from the driver DRV can be transmitted to the column line CL or row line RL through the multiple second-line connection patterns LCP2 and other connection patterns.

[0218] The first insulating layer 2215a may be disposed on a plurality of second line connection patterns LCP2. The first insulating layer 2215a may be disposed integrally on the display area DA and the non-display area NDA. The first insulating layer 2215a may be made of an organic insulating material. For example, the first insulating layer 2215a may be made of photoresist, polyimide (PI) or optical acrylic-based material.

[0219] Multiple third-wire connection patterns LCP3 may be disposed on the first insulating layer 2215a. The multiple third-wire connection patterns LCP3 may be electrically connected to multiple second-wire connection patterns LCP2. For example, the third-wire connection patterns LCP3 may be electrically connected to the second-wire connection patterns LCP2 through contact holes in the first insulating layer 2215a.

[0220] The second insulating layer 2215b may be disposed on a plurality of third-line connection patterns LCP3. The second insulating layer 2215b may be disposed in the display area DA, the first non-display area NDA1, and the second non-display area NDA2, and may not be disposed in the entirety or a portion of the curved area BA. For example, the second insulating layer 2215b may be removed from the entirety or a portion of the curved area BA. The second insulating layer 2215b may be made of an organic insulating material. For example, the second insulating layer 2215b may be made of photoresist, polyimide (PI), or optical acrylic-based materials.

[0221] Multiple fourth-wire connection patterns LCP4 may be arranged on the second insulating layer 2215b. The multiple fourth-wire connection patterns LCP4 may be electrically connected to multiple third-wire connection patterns LCP3. For example, the fourth-wire connection patterns LCP4 may be electrically connected to the third-wire connection patterns LCP3 through contact holes in the second insulating layer 2215b.

[0222] In the non-display area (NDA), multiple pad connection patterns (PCPs) can be arranged on the second protective layer 2213b. The multiple pad connection patterns (PCPs) can be wiring for transmitting signals from the flexible printed circuit 1602 to the pad portion 1621 to the driver DRV of the display area (DA). For example, the multiple pad connection patterns (PCPs) can be electrically connected to multiple pads (PDs) and can receive signals from the flexible printed circuit 1602 through the multiple pads (PDs). The flexible printed circuit 1602 can be connected to the printed circuit board 1604 (see...). Figure 16 ).

[0223] For example, multiple pad connection patterns PCP can extend from the pad portion 1621 toward the display area DA and transmit signals to the wiring of the display area DA. In this case, the multiple pad connection patterns PCP can be used as connection lines LL (see...). Figure 20 Multiple pad connection patterns (PCPs) may include a first pad connection pattern (PCP1), a second pad connection pattern (PCP2), a third pad connection pattern (PCP3), and a fourth pad connection pattern (PCP4).

[0224] Multiple first pad connection patterns PCP1 may be arranged on the second protective layer 2213b. Each of the multiple first pad connection patterns PCP1 may be arranged across the second non-display area NDA2, the curved area BA, and the first non-display area NDA1. Each of the multiple first pad connection patterns PCP1 may include a first portion arranged in the curved area BA, a second portion extending from the first portion to the first non-display area NDA1, and a third portion extending from the first portion to the second non-display area NDA2. Each of the multiple first pad connection patterns PCP1 may extend from the first non-display area NDA1 to a portion of the display area DA. The multiple first pad connection patterns PCP1 may transmit signals from the flexible printed circuit 1602 to the pad portion 1621 to the driver DRV of the display area DA.

[0225] Each of the plurality of first pad connection patterns PCP1 can be electrically connected to the pad PD of the pad portion 1621 via a connection pattern arranged in the second non-display area NDA2. Here, the connection pattern that electrically connects each of the plurality of first pad connection patterns PCP1 to the pad PD may include at least one of the second pad connection pattern PCP2, the third pad connection pattern PCP3, and the fourth pad connection pattern PCP4 arranged in the second non-display area NDA2.

[0226] Each of the plurality of first pad connection patterns PCP1 can be electrically connected to the driver DRV via a connection pattern arranged in the display area DA. Here, the connection pattern that electrically connects each of the plurality of first pad connection patterns PCP1 to the driver DRV may include at least one of the second pad connection pattern PCP2, the third pad connection pattern PCP3, and the fourth pad connection pattern PCP4 arranged in the display area DA.

[0227] Multiple second pad connection patterns PCP2 can be arranged on the third protective layer 2214. Multiple second pad connection patterns PCP2 can be arranged in the second non-display area NDA2. The second pad connection patterns PCP2 can be electrically connected to the first pad connection pattern PCP1 through contact holes in the third protective layer 2214. Therefore, signals provided from the flexible printed circuit 1602 can be transmitted to the first pad connection pattern PCP1 through the second pad connection patterns PCP2.

[0228] The third pad connection pattern PCP3 can be disposed on the first insulating layer 2215a. The third pad connection pattern PCP3 can be disposed in the second non-display area NDA2. The third pad connection pattern PCP3 can be electrically connected to the second pad connection pattern PCP2 through the contact holes of the first insulating layer 2215a. Therefore, the signal provided from the flexible printed circuit 1602 can be transmitted to the second pad connection pattern PCP2 through the third pad connection pattern PCP3, and the signal transmitted to the second pad connection pattern PCP2 can be transmitted back to the first pad connection pattern PCP1.

[0229] The fourth pad connection pattern PCP4 can be disposed on the second insulating layer 2215b. The fourth pad connection pattern PCP4 can be disposed in the second non-display area NDA2. The fourth pad connection pattern PCP4 can be electrically connected to the third pad connection pattern PCP3 through the contact holes of the second insulating layer 2215b. The pad PD of the pad portion 1621 can be electrically connected to the fourth pad connection pattern PCP4 through the contact holes of the third insulating layer 2215c.

[0230] Signals from the flexible printed circuit 1602 are input to pads PD in the pad section 1621. These signals are transmitted to pads PD via a fourth pad connection pattern PCP4 to a third pad connection pattern PCP3. Signals transmitted to the third pad connection pattern PCP3 are then transmitted again to the first pad connection pattern PCP1 via a second pad connection pattern PCP2. Signals transmitted to the first pad connection pattern PCP1 are then transmitted to the driver DRV via connection patterns arranged in the display area DA.

[0231] Multiple line connection patterns (LCPs) and multiple pad connection patterns (PCPs) can be arranged in various metal layers. The multiple line connection patterns (LCPs) and multiple pad connection patterns (PCPs) can be formed from conductive materials with excellent ductility, as well as any of the various conductive materials used in the display area (DA).

[0232] For example, a metal pattern such as the first pad connection pattern PCP1, which is at least partially disposed in the bending region BA, can be made of a conductive material with excellent ductility (such as gold (Au), silver (Ag), or aluminum (Al)). As another example, multiple line connection patterns LCP and multiple pad connection patterns PCP can be made of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys of silver (Ag) and magnesium (Mg) or their alloys.

[0233] The third insulating layer 2215c can be disposed on multiple line connection patterns LCP and multiple pad connection patterns PCP. The third insulating layer 2215c is disposed in the display area DA, the first non-display area NDA1, and the second non-display area NDA2, and can be disposed in all or part of the bending area BA. In the bending area BA, a portion of the third insulating layer 2215c can be removed. The third insulating layer 2215c can be made of an organic insulating material. For example, the third insulating layer 2215c can be made of photoresist, polyimide (PI), or optical acrylic-based materials.

[0234] Multiple dam portions BNK may be disposed on the third insulating layer 2215c in the display area DA. The multiple dam portions BNK may be arranged to overlap at least a portion of each of a plurality of sub-pixels SPa, SPb, and SPc. For example, the first sub-pixel SPa may include a first light-emitting device EDa emitting a first color of light, the second sub-pixel SPb may include a second light-emitting device EDb emitting a second color of light, and the third sub-pixel SPc may include a third light-emitting device EDc emitting a third color of light.

[0235] The light-emitting device (ED) may be located on the embankment BNK. As an example, one ED may be arranged on top of each of multiple embankment BNKs. As another example, two or more EDs may be arranged on top of each of multiple embankment BNKs. The two or more EDs arranged on top of each of multiple embankment BNKs may be of the same type. For example, EDs of the same type may be light-emitting devices that emit the same color of light. For example, the two or more EDs arranged on top of each of multiple embankment BNKs may include a main light-emitting device and redundant light-emitting devices.

[0236] In the display area DA, multiple row connection electrodes RCE can be arranged on the third insulating layer 2215c. The multiple row connection electrodes RCE can transmit the low potential voltage VSS output from the driver DRV to the row line RL.

[0237] In the display area DA, multiple column lines CL can be arranged on the third insulating layer 2215c. Multiple column lines CL can be arranged in the area between multiple embankment BNKs. For example, multiple column lines CL can be arranged adjacent to one of the multiple embankment BNKs.

[0238] Each of the multiple column lines CL may include a wiring portion and a column connection electrode CCE protruding from the wiring portion. The wiring portion and column connection electrode CCE in each of the multiple column lines CL may be integrally formed, or they may be different metals electrically connected.

[0239] For example, each of the multiple column lines CL may include a column connection electrode CCE, which is a portion protruding above an adjacent embankment BNK among the multiple embankments BNK. The column connection electrode CCE may be disposed on the embankment BNK and electrically connected to the first electrode of the light-emitting device ED. The column connection electrode CCE of each of the multiple column lines CL may be arranged to extend along the side surface and top surface of the embankment BNK. The column connection electrode CCE may be an electrode electrically connected to each of the multiple column lines CL, or it may be a portion protruding from each of the multiple column lines CL. That is, the column line CL and the column connection electrode CCE may be connected along the side of the embankment BNK.

[0240] Reference Figure 23 The column connection electrode CCE of the column line CL may be composed of one or more conductive layers. For example, the column connection electrode CCE electrically connected to or protruding from the column line CL may include a first conductive layer 2301, a second conductive layer 2302, a third conductive layer 2303, and a fourth conductive layer 2304.

[0241] A first conductive layer 2301 may be disposed on the embankment BNK. A second conductive layer 2302 may be disposed on the first conductive layer 2301. A third conductive layer 2303 may be disposed on the second conductive layer 2302, and a fourth conductive layer 2304 may be disposed on the third conductive layer 2303. For example, each of the first conductive layer 2301, the second conductive layer 2302, the third conductive layer 2303, and the fourth conductive layer 2304 may be composed of titanium (Ti), molybdenum (Mo), aluminum (Al), or titanium (Ti) and indium tin oxide (ITO).

[0242] Among the multiple conductive layers constituting the column connection electrode CCE, some conductive layers with good reflectivity can be configured as alignment marks and / or reflectors for aligning the light-emitting device ED. For example, among the multiple conductive layers constituting the column connection electrode CCE, the second conductive layer 2302 may include a reflective material. For example, the second conductive layer 2302 may include aluminum (Al). Therefore, the second conductive layer 2302 can be configured as a reflector. In addition, due to the high reflectivity of the second conductive layer 2302, it can be easily identified in the manufacturing process, so the position or relocation position of the light-emitting device ED can be aligned based on the second conductive layer 2302.

[0243] For example, to configure the second conductive layer 2302 as a reflector, the third conductive layer 2303 and the fourth conductive layer 2304 disposed on the second conductive layer 2302 can be partially removed or etched. For instance, a portion of the third conductive layer 2303 and the fourth conductive layer 2304 disposed on the embankment BNK can be removed or etched to expose the upper surface of the second conductive layer 2302. That is, the openings of the third conductive layer 2303 and the fourth conductive layer 2304 can overlap with a portion of the upper surface of the second conductive layer 2302. For example, in the third conductive layer 2303 and the fourth conductive layer 2304, the central and edge portions in which the electrode connection pattern ECP is disposed can be retained, and the remaining portions (e.g., the central and edge portions) can be removed. For example, the edge portions of each of the third conductive layer 2303 made of titanium (Ti) and the fourth conductive layer 2304 made of indium tin oxide (ITO) can be left unetched. Therefore, it can prevent other conductive layers of the column connection electrode CCE of the column line CL from being corroded by the TMAH (tetramethylammonium hydroxide) solution used in the masking process of the column connection electrode CCE.

[0244] The first conductive layer 1601 and the third conductive layer 1603 may include titanium (Ti) or molybdenum (Mo). The second conductive layer 1602 may include aluminum (Al). The fourth conductive layer 1604 may include a transparent conductive oxide layer, such as indium tin oxide (ITO) or indium zinc oxide (IZO), which has good adhesion to the electrode connection pattern ECP and is corrosion-resistant and acid-resistant.

[0245] The first conductive layer 2301, the second conductive layer 2302, the third conductive layer 2303 and the fourth conductive layer 2304 can be deposited sequentially and then patterned by performing photolithography and etching processes.

[0246] Two or more of the column connection electrodes (CCE), column lines (CL), row connection electrodes (RCE), and pads (PD) may be arranged on the same layer. The column connection electrodes (CCE), column lines (CL), row connection electrodes (RCE), and pads (PD) may be composed of a single layer or multiple layers of conductive material. For example, two or more of the column connection electrodes (CCE), column lines (CL), row connection electrodes (RCE), and pads (PD) may be composed of multiple layers of indium tin oxide (ITO) / titanium (Ti) / aluminum (Al) / titanium (Ti).

[0247] An electrode connection pattern (ECP) can be disposed between a first electrode E1 and a column connection electrode CCE in each of multiple sub-pixels. The ECP can bond the light-emitting device (ED) to the column connection electrode CCE. The column connection electrode CCE and the ED can be electrically connected via eutectic bonding using the ECP. For example, if the ECP is made of indium (In) and the auxiliary electrode 130 of the ED is made of gold (Au), the ECP and the auxiliary electrode 130 can be bonded by applying heat and pressure during the transfer process of the ED. Through eutectic bonding, the ED can be bonded to the ECP and the column connection electrode CCE without a separate adhesive. For example, the ECP can be made of indium (In), tin (Sn), or an alloy thereof. For example, the ECP can be a bonding pad.

[0248] The passivation layer 2216 can be disposed on multiple column lines CL, multiple column connection electrodes CCE, multiple row connection electrodes RCE and the third insulating layer 2215c.

[0249] For example, passivation layer 2216 may be disposed on display area DA, first non-display area NDA1, and second non-display area NDA2. At least a portion of the passivation layer 2216 covering multiple pads PD may be removed in the entirety or a portion of the curved area BA. The portion of passivation layer 2216 covering multiple pads PD in the second non-display area NDA2 may be removed. Furthermore, as... Figure 23 As shown, the passivation layer 2216 can be removed from the area where the electrode connection pattern ECP is arranged.

[0250] Because the passivation layer 2216 is arranged to cover the area except for the bending region BA, the multiple pads PD, and the area where the electrode connection pattern ECP is arranged, the penetration of moisture or impurities into the light-emitting device ED can be reduced. For example, the passivation layer 2216 can be composed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx). For example, the passivation layer 2216 can be a protective layer or an insulating layer. For example, as... Figure 23 As shown, the passivation layer 2216 may include holes that expose the electrode connection pattern (ECP). That is, the holes in the passivation layer 2216 may overlap with the electrode connection pattern (ECP).

[0251] The light-emitting device (ED) can be arranged on the electrode connection pattern (ECP) in each of the multiple sub-pixels (SPs). The ED can be formed on a silicon wafer by methods such as metal-organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PDCVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPD), or sputtering.

[0252] A light-emitting device (ED) may include a first electrode E1, a first semiconductor layer 111, a light-emitting layer 112, a second semiconductor layer 113, a second electrode E2, encapsulation layers 121 and 122, and an auxiliary electrode 130. In some cases, the light-emitting device ED may not include encapsulation layers 121 and 122 and the auxiliary electrode 130; these components may be omitted. Figure 1 The configuration is described repeatedly.

[0253] An auxiliary electrode 130 of the light-emitting device ED may be disposed between the first electrode E1 and the electrode connection pattern ECP. For example, the auxiliary electrode 130 of the light-emitting device ED may be electrically connected to the first electrode E1 and the column connection electrode CCE. The column line voltage (e.g., anode voltage) output from the driver DRV may be applied to the first semiconductor layer 111 through the column line CL, the column connection electrode CCE, the auxiliary electrode 130, and the first electrode E1.

[0254] The second electrode E2 of the light-emitting device ED can be disposed on the second semiconductor layer 113. For example, the second electrode E2 of the light-emitting device ED can be electrically connected to the second semiconductor layer 113 and the row line RL. The row line voltage (e.g., a low potential voltage VSS referred to as the cathode voltage) output from the driver DRV can be applied to the second semiconductor layer 113 through the row connection electrode RCE, the row line RL, and the second electrode E2. The second electrode E2 of the light-emitting device ED can be made of a transparent conductive material, so that light emitted from the light-emitting device ED can be guided to the upper part of the light-emitting device ED.

[0255] The light-emitting device (ED) can have a vertical structure. Alternatively, the ED can have a lateral structure or a flip-chip structure.

[0256] Figure 23 The structure of the light-emitting device ED shown can be applied essentially equivalently to all of the first light-emitting device EDa, the second light-emitting device EDb, and the third light-emitting device EDc.

[0257] The first optical layer 2217a may be arranged to surround a plurality of light-emitting devices ED in the display area DA. For example, the first optical layer 2217a may be configured to surround the sides of the light-emitting devices ED. For example, the first optical layer 2217a may be arranged to cover a plurality of light-emitting devices ED and a dam BNK in a region of a plurality of sub-pixels SP. For example, the first optical layer 2217a may cover a portion of the dam BNK, a passivation layer 2216, and the region between the plurality of light-emitting devices ED. The first optical layer 2217a may be arranged or cover the regions between the plurality of light-emitting devices ED included in a pixel and between the plurality of dam BNK. For example, the first optical layer 2217a may be arranged to surround the sides of the dam BNK and the light-emitting devices ED between the passivation layer 2216 and the row lines RL. For example, the first optical layer 2217a may be a diffusion layer or a sidewall diffusion layer.

[0258] The first optical layer 2217a may include a plurality of light-scattering particles. The first optical layer 2217a may include an organic insulating material in which fine particles (i.e., light-scattering particles) are dispersed. For example, the first optical layer 2217a may be composed of a siloxane in which fine metal particles (such as titanium dioxide (TiO2) particles) are dispersed. Light from the plurality of light-emitting devices (EDs) can be scattered by the fine particles included in the first optical layer 2217a and emitted to the outside of the display device 1600. Therefore, the first optical layer 2217a can improve the extraction efficiency of light emitted from the plurality of light-emitting devices (EDs).

[0259] The first optical layer 2217a may be disposed on each of a plurality of pixels, or may be disposed together on some pixels located in the same row. For example, the first optical layer 2217a may be disposed on each of a plurality of pixels, or a plurality of pixels may share a first optical layer 2217a. As another example, each of a plurality of sub-pixels may separately include the first optical layer 2217a.

[0260] In the display area DA, the second optical layer 2217b may be disposed on the passivation layer 2216. For example, the second optical layer 2217b may be disposed around the first optical layer 2217a. For example, the second optical layer 2217b may be disposed in the region between multiple pixels. For example, the second optical layer 2217b may be a diffusion layer, a diffusion layer window, or a window diffusion layer.

[0261] The second optical layer 2217b may be made of an organic insulating material. The second optical layer 2217b may be made of the same material as the first optical layer 2217a. For example, the first optical layer 2217a may include fine particles, and the second optical layer 2217b may not include fine particles. For example, the second optical layer 2217b may be made of a siloxane.

[0262] For example, the thickness of the first optical layer 2217a may be less than the thickness of the second optical layer 2217b. Therefore, when viewed from a plan view, the area where the first optical layer 2217a is disposed may include a recess that is recessed inward from the upper surface of the second optical layer 2217b.

[0263] Row lines RL can be disposed on the first optical layer 2217a and the second optical layer 2217b. The second optical layer 2217b may include at least one contact hole. For example, row lines RL can be electrically connected to multiple row connection electrodes RCE through the contact hole of the second optical layer 2217b. For example, row lines RL can be disposed on multiple light-emitting devices ED. For example, row lines RL may include transparent conductive oxides, such as indium tin oxide (ITO) or indium zinc oxide (IZO). Row lines RL can be disposed on the second electrode E2 of the light-emitting device ED. For example, row lines RL may be arranged to contact the second electrode E2 of the light-emitting device ED. For example, row lines RL may overlap with the first optical layer 2217a. For example, row lines RL may cover the plane on the outer side of the first optical layer 2217a.

[0264] The row lines RL can extend continuously in the first direction X of the substrate 1521. Therefore, the row lines RL can be collectively connected to multiple pixels arranged in the first direction X of the substrate 1521. For example, the row lines RL can be collectively connected to multiple pixels.

[0265] The line lines RL can extend continuously on the first optical layer 2217a, the second optical layer 2217b, and the light-emitting device ED. The region where the first optical layer 2217a is disposed may include a recess that is recessed inward from the upper surface of the second optical layer 2217b. Therefore, the first portion of the line lines RL disposed on the first optical layer 2217a can be disposed along the recess, thereby being disposed at a lower position than the second portion of the line lines RL disposed on the second optical layer 2217b.

[0266] The third optical layer 2217c can be disposed on the row lines RL. The third optical layer 2217c can be configured to overlap with the plurality of light-emitting devices ED and the first optical layer 2217a. Since the third optical layer 2217c is disposed on the row lines RL and the plurality of light-emitting devices ED, it can improve the mura that may appear in some of the plurality of light-emitting devices ED. For example, when the plurality of light-emitting devices ED are transferred to the substrate 1521 of the display panel 1520, areas may appear where the spacing between the plurality of light-emitting devices ED is uneven due to process variations. If the spacing between the plurality of light-emitting devices ED is uneven, the light-emitting area of ​​each of the plurality of light-emitting devices ED can be unevenly arranged, and thus the user can see the mura. Therefore, since the third optical layer 2217c is arranged to uniformly diffuse light above the plurality of light-emitting devices ED, the light emitted from some of the light-emitting devices ED that is visible as mura can be reduced. Therefore, since the light emitted from the plurality of light-emitting devices ED is uniformly diffused by the third optical layer 2217c and extracted to the outside of the display device 1600, the brightness uniformity of the display device 1600 can be improved.

[0267] The third optical layer 2217c may be composed of an organic insulating material in which fine particles are dispersed. For example, the third optical layer 2217c may be composed of a siloxane in which fine metal particles such as titanium dioxide (TiO2) particles are dispersed, but embodiments of the present invention are not limited thereto. For example, the third optical layer 2217c may be composed of the same material as the first optical layer 2217a. For example, the third optical layer 2217c may be a diffusion layer or an upper diffusion layer.

[0268] Light from multiple light-emitting devices (EDs) can be scattered and emitted to the outside of the display device 1600 by fine particles dispersed in the third optical layer 2217c. The third optical layer 2217c can uniformly mix the light emitted from the multiple EDs, thereby further improving the brightness uniformity of the display device 1600. For example, light emitted from multiple EDs covered by a black matrix BM disposed on the third optical layer 2217c can be scattered by the third optical layer 2217c and directed to the outside of the display device 1600. In addition, the light extraction efficiency of the display device 1600 can be improved by the light scattered from the multiple fine particles, thereby enabling the display device 1600 to be driven at low power.

[0269] A black matrix BM can be disposed on the row lines RL, the first optical layer 2217a, the second optical layer 2217b, and the third optical layer 2217c in the display area DA. For example, the black matrix BM can fill the contact holes of the second optical layer 2217b. The black matrix BM can be configured to cover the display area DA, thereby reducing color mixing of light from multiple sub-pixels and external light reflection. For example, the black matrix BM can also be disposed in the contact holes where the row lines RL and the row connection electrodes RCE are connected, thereby preventing light leakage between multiple adjacent sub-pixels. For example, the black matrix BM can be made of an opaque material. For example, the black matrix BM can be an organic insulating material with added black pigment or black dye.

[0270] A cover layer 2218 may be disposed on the black matrix BM in the display area DA. The cover layer 2218 may be disposed on the third optical layer 2217c. The cover layer 2218 protects the configuration located beneath it. For example, the cover layer 2218 may be made of an organic insulating material. For example, the cover layer 2218 may be made of photoresist, polyimide (PI), or optical acrylic-based materials. For example, the cover layer 2218 may be an outer coating or an insulating layer.

[0271] In the display panel 1520 according to an embodiment of the present invention, the refractive index of the third optical layer 2217c may be greater than the refractive index of the second electrode E2 and less than the refractive index of the cover layer 2218. Since the refractive index of the third optical layer 2217c has a value between the refractive index of the second electrode E2 and the refractive index of the cover layer 2218, the extraction efficiency of light emitted from the plurality of light-emitting devices ED can be improved.

[0272] The polarizing layer 224 may be disposed on the cover layer 2218 via the first adhesive layer 222. The cover member 2150 may be disposed on the polarizing layer 224 via the second adhesive layer 226. For example, the first adhesive layer 222 and the second adhesive layer 226 may include optically clear adhesive (OCA), optically clear resin (OCR), or pressure-sensitive adhesive (PSA).

[0273] Multiple pads (PDs) may be arranged on a third insulating layer 2215c in the second non-display area (NDA2). For example, at least a portion of the multiple pads (PDs) may be exposed from the passivation layer 2216. For example, the multiple pads (PDs) may be electrically connected to a fourth pad connection pattern (PCP4) through contact holes in the third insulating layer 2215c.

[0274] An adhesive layer ACF can be disposed on multiple pads PD. The adhesive layer ACF can be an adhesive layer in which conductive balls are dispersed in an insulating material. The adhesive layer ACF can be disposed between the multiple pads PD and the flexible printed circuit 1602, such that the flexible printed circuit 1602 can be attached or bonded to the multiple pads PD. For example, the adhesive layer ACF can be an anisotropic conductive film ACF.

[0275] The flexible printed circuit 1602 can be disposed on the adhesive layer ACF. The flexible printed circuit 1602 can be electrically connected to multiple pads PD through the adhesive layer ACF. Therefore, the signal provided from the flexible printed circuit 1602 can be transmitted to the driver DRV of the display area DA via the multiple pads PD, the fourth pad connection pattern PCP4, the third pad connection pattern PCP3, the second pad connection pattern PCP2, and the first pad connection pattern PCP1.

[0276] The display panel 1520 according to an embodiment of the present invention may include: a substrate 1521; a layer stack 2110 located on a plurality of driver DRVs disposed on the substrate 1521; an optical layer 2217a disposed between a plurality of light-emitting devices EDa, EDb and EDc disposed on the layer stack 2110; an adhesive layer 226 disposed on the plurality of light-emitting devices EDa, EDb and EDc and the optical layer 2217a; and a cover member 2150 disposed on the adhesive layer 226.

[0277] Multiple column lines CL can be disposed between the layer stack 2110 and multiple light-emitting devices EDa, EDb, and EDc. Multiple row lines RL can be arranged on the multiple light-emitting devices EDa, EDb, and EDc and the optical layer 2217a. Multiple row lines RL can be arranged between the multiple light-emitting devices EDa, EDb, and EDc, the optical layer 2217a, and the adhesive layer 226.

[0278] The layer stack 2110 may include: a plurality of protective layers 2213a, 2213b and 2214 disposed on the side and top surfaces of each of the plurality of driver DRVs; a plurality of insulating layers 2215a, 2215b and 2215c disposed on the plurality of protective layers 2213a, 2213b and 2214; and a dam BNK disposed on the plurality of insulating layers.

[0279] The plurality of protective layers 2213a, 2213b and 2214 may further include a side protective layer 2213 disposed on each side of the plurality of driver DRVs and an upper protective layer 2214 disposed on the upper surface of each of the plurality of driver DRs.

[0280] The side protective layer 2213 may include a first protective layer 2213a disposed on the substrate 1521 and a second protective layer 2213b disposed on the first protective layer 2213a. The upper protective layer 2214 may include a third protective layer 2214 disposed on the second protective layer 2213b and the plurality of driver DRVs.

[0281] The plurality of insulating layers 2215a, 2215b, and 2215c may include a first insulating layer 2215a disposed on the upper protective layer 2214 and a second insulating layer 2215b disposed on the first insulating layer 2215a. The plurality of insulating layers 2215a, 2215b, and 2215c may also include a third insulating layer 2215c disposed on the second insulating layer 2215b.

[0282] Each of the multiple light-emitting devices EDa, EDb and EDc can be disposed on the embankment BNK and positioned in the opening of the optical layer 2217a.

[0283] At least a portion of each of the multiple column lines CL may extend to the embankment BNK on the multiple insulating layers 2215a, 2215b and 2215c. Each of the multiple row lines RL may be arranged on the optical layer 2217a and the multiple light-emitting devices EDa, EDb and EDc.

[0284] The first electrode E1 of each of the plurality of light-emitting devices EDa, EDb, and EDc is electrically connected to at least a portion of the column line CL that extends onto the embankment BNK. The second electrode E2 of each of the plurality of light-emitting devices EDa, EDb, and EDc is electrically connected to one of the plurality of row lines RL.

[0285] The display panel 1520 according to an embodiment of the present invention may include a plurality of line connection patterns LCP that connect each of a plurality of lines including a plurality of row lines RL and a plurality of column lines CL to a plurality of drivers DRV.

[0286] The plurality of line connection patterns (LCPs) may include: a first line connection pattern (LCP1) disposed on the side protective layer 2213; a second line connection pattern (LCP2) disposed on the upper protective layer 2214 and electrically connected to the first line connection pattern (LCP1) through a hole in the upper protective layer 2214; a third line connection pattern (LCP3) disposed on the first insulating layer 2215a and electrically connected to the second line connection pattern (LCP2) through a hole in the first insulating layer 2215a; and a fourth line connection pattern (LCP4) disposed on the second insulating layer 2215b and electrically connected to the third line connection pattern (LCP3) through a hole in the second insulating layer 2215b.

[0287] The first connection pattern LCP1 can be electrically connected to one of the multiple drivers DRV. The fourth connection pattern LCP4 can be electrically connected to at least one second electrode E2 of the multiple light-emitting devices EDa, EDb and EDc, or can be electrically connected to at least one first electrode E1 of the multiple light-emitting devices EDa, EDb and EDc.

[0288] The side protection layer 2213 arranged on each side of the multiple driver DRVs may include two or more organic layers.

[0289] The first protective layer 2213a and the second protective layer 2213b, which serve as the side protective layer 2213, the third protective layer 2214, which serves as the upper protective layer 2214, and the first insulating layer 2215a, the second insulating layer 2215b, and the third insulating layer 2215c can all be composed of organic layers.

[0290] The display device according to an embodiment of the present invention can be described as follows.

[0291] A display device according to an embodiment of the present invention may include: a substrate; and a light-emitting device disposed on the substrate and located in a display area. The light-emitting device may include: a first electrode; an intermediate layer disposed on the first electrode; a second electrode disposed on the intermediate layer; and an encapsulation layer surrounding at least a portion of the first electrode and the intermediate layer, wherein the second electrode is disposed on the intermediate layer and the encapsulation layer.

[0292] In a display device according to an embodiment of the present invention, the rear surface of the second electrode may contact the upper surface of the encapsulation layer.

[0293] In a display device according to an embodiment of the present invention, the encapsulation layer may include: a side portion surrounding the side portion of the first electrode and the intermediate layer; and a lower portion surrounding the rear surface of the first electrode and having at least one hole.

[0294] The display device according to an embodiment of the present invention may further include an auxiliary electrode, the auxiliary electrode being positioned below the lower portion and electrically connected to the first electrode through the at least one hole.

[0295] In a display device according to an embodiment of the present invention, each of the first electrode and the second electrode may be a transparent electrode, and the auxiliary electrode may be an opaque electrode.

[0296] In a display device according to an embodiment of the present invention, the encapsulation layer may include: a first encapsulation layer surrounding the first electrode and the intermediate layer; and a second encapsulation layer surrounding the first encapsulation layer.

[0297] In a display device according to an embodiment of the present invention, the first encapsulation layer may include a material different from that of the second encapsulation layer.

[0298] In a display device according to an embodiment of the present invention, the thickness of the first encapsulation layer may be less than the thickness of the second encapsulation layer, or the density of the first encapsulation layer may be higher than the density of the second encapsulation layer.

[0299] In a display device according to an embodiment of the present invention, the intermediate layer may include: a light-emitting layer; a first semiconductor layer between the first electrode and the light-emitting layer; and a second semiconductor layer between the second electrode and the light-emitting layer. The light-emitting layer may be positioned closer to the first electrode than the second electrode, and the encapsulation layer may cover the sides of the light-emitting layer.

[0300] The display device according to an embodiment of the present invention may further include a first optical layer and a second optical layer, wherein the first optical layer is configured to surround the side portion of the light-emitting device and includes a plurality of light-scattering particles, and the second optical layer is configured to surround the first optical layer and includes at least one contact hole.

[0301] The display device according to an embodiment of the present invention may further include a black matrix disposed on the first optical layer and the second optical layer. The black matrix may fill the contact holes of the second optical layer.

[0302] The display device according to an embodiment of the present invention may further include: a row line disposed on the second electrode; a third optical layer disposed on the row line; and a cover layer disposed on the third optical layer. The refractive index of the third optical layer may be greater than the refractive index of the second electrode and less than the refractive index of the cover layer.

[0303] The display device according to an embodiment of the present invention may further include a driver disposed between the substrate and the light-emitting device and electrically connected to the first electrode and the second electrode.

[0304] The display device according to an embodiment of the present invention may further include: a side protective layer disposed on a side of the driver; an upper protective layer disposed on the side protective layer; an insulating layer disposed on the upper protective layer; and a retaining wall disposed on the insulating layer. The light-emitting device may be located on the retaining wall.

[0305] The display device according to an embodiment of the present invention may further include: a column connection electrode disposed on the embankment and electrically connected to the first electrode; and column lines disposed on the insulating layer. The column lines and the column connection electrode may be connected along the side of the embankment.

[0306] The display device according to an embodiment of the present invention may further include: an electrode connection pattern disposed between the first electrode and the column connection electrode.

[0307] A method for manufacturing a light-emitting device according to an embodiment of the present invention may include the following steps: forming a crystal layer on a sapphire substrate; forming a first metal layer on the crystal layer; separating the first metal layer into a plurality of first electrodes and etching the crystal layer to a predetermined first depth; forming an encapsulation layer on the side portion of the crystal layer and on the plurality of first electrodes; forming at least one hole in the encapsulation layer; forming a plurality of auxiliary electrodes on the encapsulation layer and connecting the plurality of auxiliary electrodes to the plurality of first electrodes to form a first intermediate product; bonding the first intermediate product to a first carrier substrate using a first adhesive layer and positioning the plurality of auxiliary electrodes on the first carrier substrate; removing the first adhesive layer and the upper portion of the encapsulation layer; forming a second metal layer on the first adhesive layer and the encapsulation layer; forming a second adhesive layer on the second metal layer and forming a second carrier substrate on the second adhesive layer; removing the first carrier substrate and the first adhesive layer to form a second intermediate product; and separating the second metal layer into a plurality of second electrodes to form a plurality of light-emitting devices based on the second intermediate product, wherein the second electrodes are disposed on the encapsulation layer.

[0308] The method for manufacturing a light-emitting device according to an embodiment of the present invention may further include the following steps: between the step of forming the second intermediate product and the step of forming the plurality of light-emitting devices, in the state of the second intermediate product, supplying a first voltage to all or part of the plurality of auxiliary electrodes, and supplying a second voltage different from the first voltage to the second metal layer.

[0309] In a method for manufacturing a light-emitting device according to an embodiment of the present invention, in the step of etching the crystal layer, two adjacent first electrodes among the plurality of first electrodes may be spaced apart by a predetermined distance, and in the step of forming the second intermediate product, the second intermediate product may be in a state where the second metal layer is exposed.

[0310] In a method for manufacturing a light-emitting device according to an embodiment of the present invention, the second metal layer may include a transparent electrode material.

[0311] In a method for manufacturing a light-emitting device according to an embodiment of the present invention, each of the plurality of light-emitting devices may include: a corresponding first electrode among the plurality of first electrodes, a corresponding second electrode among the plurality of second electrodes; and an intermediate layer between the corresponding first electrode and the corresponding second electrode. The first depth may correspond to the thickness of the intermediate layer.

[0312] The above description is provided to enable those skilled in the art to implement and use the technical concepts of the invention, and has been provided in the context of a particular application and its requirements. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the invention. The above description and drawings are provided as examples of the technical concepts of the invention for illustrative purposes only. That is, the disclosed embodiments are intended to illustrate the scope of the technical concepts of the invention.

Claims

1. A display device, comprising: substrate; as well as Light-emitting devices disposed on the substrate and located in the display area The light-emitting device includes: First electrode; An intermediate layer disposed on the first electrode; The second electrode disposed on the intermediate layer; and An encapsulation layer surrounding at least a portion of the first electrode and the intermediate layer. The second electrode is disposed on the intermediate layer and the encapsulation layer.

2. The display device according to claim 1, wherein the rear surface of the second electrode is in contact with the upper surface of the encapsulation layer.

3. The display device according to claim 1, wherein the encapsulation layer comprises: Side portion, the side portion surrounding the first electrode and the intermediate layer; as well as The lower portion surrounds the rear surface of the first electrode and has at least one hole. The display device further includes an auxiliary electrode, which is positioned below the lower portion and electrically connected to the first electrode through the at least one hole.

4. The display device according to claim 3, wherein each of the first electrode and the second electrode is a transparent electrode. The auxiliary electrode is an opaque electrode.

5. The display device according to claim 1, wherein the encapsulation layer comprises: A first encapsulation layer surrounding the first electrode and the intermediate layer; as well as A second encapsulation layer surrounding the first encapsulation layer.

6. The display device according to claim 5, wherein the first encapsulation layer comprises a material different from the material of the second encapsulation layer.

7. The display device according to claim 5, wherein the thickness of the first encapsulation layer is less than the thickness of the second encapsulation layer, or the density of the first encapsulation layer is higher than the density of the second encapsulation layer.

8. The display device according to claim 1, wherein the intermediate layer comprises: Emissive layer; A first semiconductor layer between the first electrode and the light-emitting layer; as well as A second semiconductor layer between the second electrode and the light-emitting layer. The light-emitting layer is positioned closer to the first electrode than the second electrode. The encapsulation layer covers the side of the light-emitting layer.

9. The display device according to claim 1, further comprising: A first optical layer is configured to surround the side of the light-emitting device and includes a plurality of light-scattering particles; as well as A second optical layer is configured to surround the first optical layer and includes at least one contact hole.

10. The display device according to claim 9, further comprising: A black matrix disposed on the first optical layer and the second optical layer. The black matrix fills the contact holes of the second optical layer.

11. The display device according to claim 1, further comprising: Rows arranged on the second electrode; A third optical layer is disposed on the row line; as well as A cover layer disposed on the third optical layer The refractive index of the third optical layer is greater than that of the second electrode and less than that of the cover layer.

12. The display device according to claim 1, further comprising a driver disposed between the substrate and the light-emitting device and electrically connected to the first electrode and the second electrode.

13. The display device according to claim 12, further comprising: A side protective layer is provided on the side of the driver; An upper protective layer disposed on the side protective layer; An insulating layer disposed on the upper protective layer; as well as A dam is provided on the insulating layer. The light-emitting device is located on the embankment.

14. The display device according to claim 13, further comprising: A column connection electrode is disposed on the embankment and electrically connected to the first electrode; as well as Column lines disposed on the insulating layer The column lines and the column connecting electrodes are connected along the side of the embankment.

15. The display device according to claim 14, further comprising an electrode connection pattern disposed between the first electrode and the column connection electrode.

16. A method for manufacturing a light-emitting device, comprising the following steps: A crystal layer is formed on a sapphire substrate; A first metal layer is formed on the crystal layer; The first metal layer is separated into a plurality of first electrodes and the crystal layer is etched to a predetermined first depth; An encapsulation layer is formed on the side of the crystal layer and on the plurality of first electrodes; At least one hole is formed in the encapsulation layer; A plurality of auxiliary electrodes are formed on the encapsulation layer and the plurality of auxiliary electrodes are connected to the plurality of first electrodes to form a first intermediate product; The first intermediate product is bonded to the first carrier substrate using a first adhesive layer, and the plurality of auxiliary electrodes are positioned on the first carrier substrate. Remove the upper portion of the first adhesive layer and the encapsulation layer; A second metal layer is formed on the first adhesive layer and the encapsulation layer; A second adhesive layer is formed on the second metal layer, and a second carrier substrate is formed on the second adhesive layer; Remove the first carrier substrate and the first adhesive layer to form a second intermediate product; as well as The second metal layer is separated into multiple second electrodes to form multiple light-emitting devices based on the second intermediate product. The second electrode is disposed on the encapsulation layer.

17. The method of claim 16, further comprising the step of: supplying a first voltage to all or part of the plurality of auxiliary electrodes in the state of the second intermediate product, and supplying a second voltage different from the first voltage to the second metal layer.

18. The method of claim 16, wherein in the step of etching the crystal layer, two adjacent first electrodes of the plurality of first electrodes are spaced apart by a predetermined distance, and in the step of forming the second intermediate product, the second intermediate product is in a state where the second metal layer is exposed.

19. The method of claim 16, wherein the second metal layer comprises a transparent electrode material.

20. The method of claim 16, wherein each of the plurality of light-emitting devices comprises: The corresponding first electrode among the plurality of first electrodes; The corresponding second electrode among the plurality of second electrodes; as well as In the intermediate layer between the corresponding first electrode and the corresponding second electrode The first depth corresponds to the thickness of the intermediate layer.

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