Micro light emitting diode chip and display panel

Abstract

This invention relates to a miniature light-emitting diode (LED) chip and a display panel. The miniature LED chip includes: a miniature LED array comprising multiple miniature LEDs configured to emit light, each miniature LED including a light-emitting mesa; and a microlens disposed above the miniature LEDs, wherein the microlens has a gap within it. The miniature LED chip provided by this invention features a current-spreading structure between the miniature LEDs, which can avoid optical crosstalk between adjacent miniature LEDs; the microlens can focus the light emitted by the miniature LEDs, improving the brightness and light extraction efficiency of the miniature LED display chip.

Description

Technical Field

[0001] This invention relates to the field of light-emitting diode technology, and particularly to micro light-emitting diode chips and display panels. Background Technology

[0002] Micro-LEDs (Micro Light Emitting Diodes) are an emerging display technology that is gaining increasing importance due to their use in various applications, including self-emitting microdisplays, visible light communication, and optogenetics. Micro-LED technology uses micrometer-scale LEDs as pixel units, miniaturizing and arraying the LED structure, and then mass-producing these micro-LED chips onto a TFT or CMOS backplane to form a high-density display panel. Compared to traditional LEDs, Micro LEDs offer better strain relaxation, higher light extraction efficiency, more uniform current diffusion, and higher output performance. Micro LEDs also boast advantages such as improved thermal performance, faster response times, a wider operating temperature range, higher resolution, a wider color gamut, higher contrast, lower power consumption, and higher current density. Micro-LEDs are hailed as the next generation of display technology and are receiving increasing attention.

[0003] However, existing micro LED chips still have many problems, such as low light extraction efficiency (WPE, also known as electro-optical conversion efficiency), which needs to be further improved. Summary of the Invention

[0004] To address some or all of the problems in the prior art, the present invention first provides a first type of miniature light-emitting diode chip, comprising:

[0005] A miniature light-emitting diode array, the miniature light-emitting diode array comprising a plurality of miniature light-emitting diodes configured to emit light; and

[0006] Microlenses are arranged on the micro-light-emitting diodes, wherein adjacent microlenses are spaced apart from each other between the micro-light-emitting diodes.

[0007] Furthermore, the spacing between adjacent microlenses is 0 to 1 micrometer.

[0008] Furthermore, the micro LED chip also includes:

[0009] The driving module includes a driving backplane and a bonding layer; and

[0010] A current extension structure is located between the micro LEDs and is arranged to surround the micro LEDs in an electrical contact manner.

[0011] Furthermore, the driving backplane includes driving electrodes, with each micro LED corresponding to one driving electrode, and the driving electrodes are electrically connected to the bonding layer.

[0012] Furthermore, the material of the driving electrode is one or more alloys of the following metals: Al, Cu, and Au.

[0013] Furthermore, the bonding layer is made of one or more alloys of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn.

[0014] Furthermore, the miniature light-emitting diode includes:

[0015] Illuminated tabletop;

[0016] An ohmic contact layer is located on the lower surface of the light-emitting platform and is electrically connected to the bonding layer.

[0017] A top conductive layer, located on the side and top surfaces of the light-emitting platform, is electrically connected to the current-spreading structure; and

[0018] A passivation barrier layer, which at least partially covers the side surface of the light-emitting platform and is located between the light-emitting platform and the top conductive layer.

[0019] Furthermore, the electrode polarity of the ohmic contact layer is opposite to that of the electrode polarity of the top conductive layer.

[0020] Furthermore, adjacent top conductive layers are connected, and all top conductive layers are connected as a whole.

[0021] Furthermore, adjacent passivation isolation layers are connected, and all passivation isolation layers are connected into a whole.

[0022] Furthermore, the material of the passivation barrier layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0023] Furthermore, the bottom lateral dimension of the light-emitting platform is larger than the top lateral dimension.

[0024] Furthermore, the tilt angle of the sidewall of the light-emitting platform ranges from 60° to 85°.

[0025] Furthermore, the bottom lateral dimension of the light-emitting platform does not exceed 3 micrometers.

[0026] Furthermore, the top lateral dimension of the light-emitting platform does not exceed 1.5 micrometers.

[0027] Furthermore, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting platform.

[0028] Furthermore, the light-emitting mesa includes a first type of epitaxial layer, a second type of epitaxial layer, and a light-emitting layer located between the two.

[0029] Furthermore, the first type of epitaxial layer is electrically connected to the ohmic contact layer;

[0030] The second type of epitaxial layer is electrically connected to the top conductive layer.

[0031] Furthermore, the material of the first type of epitaxial layer is a material layer of the first conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, and the material of the second type of epitaxial layer is a material layer of the second conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P.

[0032] The first conductivity type is different from the second conductivity type.

[0033] Furthermore, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, or an InGaAs / AlGaAs multi-quantum well layer.

[0034] Furthermore, the bottoms of adjacent current extension structures are connected, and all current extension structures are connected as a whole.

[0035] Furthermore, the longitudinal cross-section of adjacent current-spreading structures exhibits a bifurcated peak shape.

[0036] Furthermore, the longitudinal cross-sectional shapes of adjacent current-extending structures are asymmetrical.

[0037] Furthermore, the material of the current spreading structure is one or more alloys of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0038] Furthermore, the microlens has an upper curvature portion and a lower spacer portion.

[0039] Furthermore, the height of the lower spacer portion of the microlens is 0.2 to 3 micrometers; and / or

[0040] The height of the upper curvature portion of the microlens is 0.5 to 2 micrometers; and / or

[0041] The spherical width of the microlens is 3 to 4 micrometers.

[0042] Furthermore, the microlens is in the shape of a perfect hemisphere.

[0043] Furthermore, the material of the microlens is silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, or aluminum oxide.

[0044] The present invention also provides a first display panel, including a first micro light-emitting diode chip.

[0045] This invention also provides a second type of miniature light-emitting diode chip, comprising:

[0046] A miniature light-emitting diode array, the miniature light-emitting diode array comprising a plurality of miniature light-emitting diodes configured to emit light, and each miniature light-emitting diode comprising a light-emitting mesa; and

[0047] Microlenses are arranged on the micro-light-emitting diode, wherein the sides of adjacent microlenses are spaced apart to form gaps, the bottoms of the gaps are connected, and the bottoms of the gaps are higher than the top of the light-emitting platform.

[0048] Furthermore, the micro LED chip also includes:

[0049] The driving module includes a driving backplane and a bonding layer; and

[0050] A current extension structure is located between the micro LEDs and is arranged to surround the micro LEDs in an electrical contact manner.

[0051] Furthermore, the spacing between the sides of adjacent microlenses is 0 to 1 micrometer.

[0052] Furthermore, the gap has a multi-step structure.

[0053] Furthermore, the sidewalls of adjacent bottom steps of the gap are in contact with each other; or

[0054] The sidewalls of adjacent bottom steps of the gap do not contact each other.

[0055] Furthermore, the gap between the sidewalls of the adjacent bottom steps of the lower spacer gap is located between the bifurcation peaks of the current spreading structure.

[0056] Furthermore, the driving backplane includes driving electrodes, with each micro LED corresponding to one driving electrode, and the driving electrodes are electrically connected to the bonding layer.

[0057] Furthermore, the material of the driving electrode is one or more alloys of the following metals: Al, Cu, and Au.

[0058] Furthermore, the bonding layer is made of one or more alloys of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn.

[0059] Furthermore, the miniature light-emitting diode also includes:

[0060] An ohmic contact layer is located on the lower surface of the light-emitting platform and is electrically connected to the bonding layer.

[0061] A top conductive layer is located on the side and top surfaces of the light-emitting platform, and the top conductive layer is electrically connected to the current extension structure.

[0062] A passivation barrier layer, which at least partially covers the side surface of the light-emitting platform and is located between the light-emitting platform and the top conductive layer.

[0063] Furthermore, the electrode polarity of the ohmic contact layer is opposite to that of the electrode polarity of the top conductive layer.

[0064] Furthermore, adjacent top conductive layers are connected, and all top conductive layers are connected as a whole.

[0065] Furthermore, adjacent passivation isolation layers are connected, and all passivation isolation layers are connected into a whole.

[0066] Furthermore, the material of the passivation barrier layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0067] Furthermore, the bottom lateral dimension of the light-emitting platform is larger than the top lateral dimension.

[0068] Furthermore, the tilt angle of the sidewall of the light-emitting platform ranges from 60° to 85°.

[0069] Furthermore, the bottom lateral dimension of the light-emitting platform does not exceed 3 micrometers.

[0070] Furthermore, the top lateral dimension of the light-emitting platform does not exceed 1.5 micrometers.

[0071] Furthermore, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting platform.

[0072] Furthermore, the light-emitting mesa includes a first type of epitaxial layer, a second type of epitaxial layer, and a light-emitting layer located between the two.

[0073] Furthermore, the first type of epitaxial layer is electrically connected to the ohmic contact layer;

[0074] The second type of epitaxial layer is electrically connected to the top conductive layer.

[0075] Furthermore, the material of the first type of epitaxial layer is a material layer of the first conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, and the material of the second type of epitaxial layer is a material layer of the second conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P.

[0076] The first conductivity type is different from the second conductivity type.

[0077] Furthermore, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, or an InGaAs / AlGaAs multi-quantum well layer.

[0078] Furthermore, the bottoms of adjacent current extension structures are connected, and all current extension structures are connected as a whole.

[0079] Furthermore, the longitudinal cross-section of adjacent current-spreading structures exhibits a bifurcated peak shape.

[0080] Furthermore, the longitudinal cross-sectional shapes of adjacent current-extending structures are asymmetrical.

[0081] Furthermore, the material of the current spreading structure is one or more alloys of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0082] Furthermore, the microlens has an upper curvature portion and a lower spacer portion.

[0083] Furthermore, the height of the lower spacer portion of the microlens is 0.2 to 3 micrometers; and / or

[0084] The height of the upper curvature portion of the microlens is 0.5 to 2 micrometers; and / or

[0085] The spherical width of the microlens is 3 to 4 micrometers.

[0086] Furthermore, the microlens is in the shape of a perfect hemisphere.

[0087] Furthermore, the material of the microlens is silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, or aluminum oxide.

[0088] The present invention also provides a second display panel, including a second micro light-emitting diode chip.

[0089] This invention also provides a third type of miniature light-emitting diode chip, comprising:

[0090] A miniature light-emitting diode array, the miniature light-emitting diode array comprising a plurality of miniature light-emitting diodes configured to emit light, the miniature light-emitting diodes including light-emitting mesa; and

[0091] Microlenses are arranged on the micro light-emitting diode, and adjacent microlenses have a connection and a gap on their sides, wherein the gap is located above the connection and the bottom of the gap is lower than the top of the light-emitting platform.

[0092] Furthermore, the micro LED chip also includes:

[0093] The driving module includes a driving backplane and a bonding layer; and

[0094] A current extension structure is located between the micro LEDs and is arranged to surround the micro LEDs in an electrical contact manner.

[0095] Furthermore, the gap between adjacent microlenses is 0 to 1 micrometer.

[0096] Furthermore, the gap is located above the bifurcation peak of the current extension structure.

[0097] Furthermore, the driving backplane includes driving electrodes, with each micro LED corresponding to one driving electrode, and the driving electrodes are electrically connected to the bonding layer.

[0098] Furthermore, the material of the driving electrode is one or more alloys of the following metals: Al, Cu, and Au.

[0099] Furthermore, the bonding layer is made of one or more alloys of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn.

[0100] Furthermore, the miniature light-emitting diode also includes:

[0101] An ohmic contact layer is located on the lower surface of the light-emitting platform and is electrically connected to the bonding layer.

[0102] A top conductive layer is located on the side and top surfaces of the light-emitting platform, and the top conductive layer is electrically connected to the current extension structure.

[0103] A passivation barrier layer, which at least partially covers the side surface of the light-emitting platform and is located between the light-emitting platform and the top conductive layer.

[0104] Furthermore, the electrode polarity of the ohmic contact layer is opposite to that of the electrode polarity of the top conductive layer.

[0105] Furthermore, adjacent top conductive layers are connected, and all top conductive layers are connected as a whole.

[0106] Furthermore, adjacent passivation isolation layers are connected, and all passivation isolation layers are connected into a whole.

[0107] Furthermore, the material of the passivation barrier layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0108] Furthermore, the bottom lateral dimension of the light-emitting platform is larger than the top lateral dimension.

[0109] Furthermore, the tilt angle of the sidewall of the light-emitting platform ranges from 60° to 85°.

[0110] Furthermore, the bottom lateral dimension of the light-emitting platform does not exceed 3 micrometers.

[0111] Furthermore, the top lateral dimension of the light-emitting platform does not exceed 1.5 micrometers.

[0112] Furthermore, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting platform.

[0113] Furthermore, the light-emitting mesa includes a first type of epitaxial layer, a second type of epitaxial layer, and a light-emitting layer located between the two.

[0114] Furthermore, the first type of epitaxial layer is electrically connected to the ohmic contact layer;

[0115] The second type of epitaxial layer is electrically connected to the top conductive layer.

[0116] Furthermore, the material of the first type of epitaxial layer is a material layer of the first conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, and the material of the second type of epitaxial layer is a material layer of the second conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P.

[0117] The first conductivity type is different from the second conductivity type.

[0118] Furthermore, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, or an InGaAs / AlGaAs multi-quantum well layer.

[0119] Furthermore, the bottoms of adjacent current extension structures are connected, and all current extension structures are connected as a whole.

[0120] Furthermore, the longitudinal cross-section of adjacent current-spreading structures exhibits a bifurcated peak shape.

[0121] Furthermore, the longitudinal cross-sectional shapes of adjacent current-extending structures are asymmetrical.

[0122] Furthermore, the material of the current spreading structure is one or more alloys of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0123] Furthermore, the microlens has an upper curvature portion and a lower spacer portion.

[0124] Furthermore, the height of the lower spacer portion of the microlens is 0.2 to 3 micrometers; and / or

[0125] The height of the upper curvature portion of the microlens is 0.5 to 2 micrometers; and / or

[0126] The spherical width of the microlens is 3 to 4 micrometers.

[0127] Furthermore, the microlens is in the shape of a perfect hemisphere.

[0128] Furthermore, the material of the microlens is silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, or aluminum oxide.

[0129] The present invention also provides a third type of display panel, including a third type of micro light-emitting diode chip.

[0130] This invention also provides a fourth type of miniature light-emitting diode chip, comprising:

[0131] A miniature light-emitting diode array, the miniature light-emitting diode array comprising a plurality of miniature light-emitting diodes configured to emit light, wherein each miniature light-emitting diode includes a light-emitting mesa; and

[0132] Microlenses are arranged on the micro-light-emitting diode, with adjacent microlenses spaced apart from each other on the sides to form gaps, wherein the gaps are closed air gaps.

[0133] Furthermore, the micro LED chip also includes:

[0134] The driving module includes a driving backplane and a bonding layer; and

[0135] A current extension structure is located between the micro LEDs and is arranged to surround the micro LEDs in an electrical contact manner.

[0136] Furthermore, the air gap is an air gap.

[0137] Furthermore, the longitudinal section of the air gap has a rectangular, circular, elliptical, crescent-shaped, or irregularly elongated shape.

[0138] Furthermore, the driving backplane includes driving electrodes, with each micro LED corresponding to one driving electrode, and the driving electrodes are electrically connected to the bonding layer.

[0139] Furthermore, the material of the driving electrode is one or more alloys of the following metals: Al, Cu, and Au.

[0140] Furthermore, the bonding layer is made of one or more alloys of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn.

[0141] Furthermore, the miniature light-emitting diode also includes:

[0142] An ohmic contact layer is located on the lower surface of the light-emitting platform and is electrically connected to the bonding layer.

[0143] A top conductive layer is located on the side and top surfaces of the light-emitting platform, and the top conductive layer is electrically connected to the current extension structure.

[0144] A passivation barrier layer, which at least partially covers the side surface of the light-emitting platform and is located between the light-emitting platform and the top conductive layer.

[0145] Furthermore, the electrode polarity of the ohmic contact layer is opposite to that of the electrode polarity of the top conductive layer.

[0146] Furthermore, adjacent top conductive layers are connected, and all top conductive layers are connected as a whole.

[0147] Furthermore, adjacent passivation isolation layers are connected, and all passivation isolation layers are connected into a whole.

[0148] Furthermore, the material of the passivation barrier layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0149] Furthermore, the bottom lateral dimension of the light-emitting platform is larger than the top lateral dimension.

[0150] Furthermore, the tilt angle of the sidewall of the light-emitting platform ranges from 60° to 85°.

[0151] Furthermore, the bottom lateral dimension of the light-emitting platform does not exceed 3 micrometers.

[0152] Furthermore, the top lateral dimension of the light-emitting platform does not exceed 1.5 micrometers.

[0153] Furthermore, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting platform.

[0154] Furthermore, the light-emitting mesa includes a first type of epitaxial layer, a second type of epitaxial layer, and a light-emitting layer located between the two.

[0155] Furthermore, the first type of epitaxial layer is electrically connected to the ohmic contact layer;

[0156] The second type of epitaxial layer is electrically connected to the top conductive layer.

[0157] Furthermore, the material of the first type of epitaxial layer is a material layer of the first conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, and the material of the second type of epitaxial layer is a material layer of the second conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P.

[0158] The first conductivity type is different from the second conductivity type.

[0159] Furthermore, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, or an InGaAs / AlGaAs multi-quantum well layer.

[0160] Furthermore, the bottoms of adjacent current extension structures are connected, and all current extension structures are connected as a whole.

[0161] Furthermore, the longitudinal cross-section of adjacent current-spreading structures exhibits a bifurcated peak shape.

[0162] Furthermore, the longitudinal cross-sectional shapes of adjacent current-extending structures are asymmetrical.

[0163] Furthermore, the material of the current spreading structure is one or more alloys of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0164] Furthermore, the microlens has an upper curvature portion and a lower spacer portion.

[0165] Furthermore, the height of the lower spacer portion of the microlens is 0.2 to 3 micrometers; and / or

[0166] The height of the upper curvature portion of the microlens is 0.5 to 2 micrometers; and / or

[0167] The spherical width of the microlens is 3 to 4 micrometers.

[0168] Furthermore, the microlens is in the shape of a perfect hemisphere.

[0169] Furthermore, the material of the microlens is silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, or aluminum oxide.

[0170] The present invention also provides a fourth type of display panel, including a fourth type of micro light-emitting diode chip.

[0171] This invention also provides a fifth type of miniature light-emitting diode chip, comprising:

[0172] A miniature light-emitting diode array, the miniature light-emitting diode array comprising a plurality of miniature light-emitting diodes, wherein the miniature light-emitting diodes are configured to emit light, and each miniature light-emitting diode includes a light-emitting mesa; and

[0173] A microlens, wherein the microlens is disposed on the micro light-emitting diode, and wherein the microlens has a gap.

[0174] Furthermore, the micro LED chip also includes:

[0175] The driving module includes a driving backplane and a bonding layer; and

[0176] A current-spreading structure is located between the miniature light-emitting diodes. The current-spreading structure is arranged to surround the miniature light-emitting diodes in an electrical contact manner.

[0177] Furthermore, the gap is located between the light-emitting platform and the current-expanding structure.

[0178] Furthermore, at least one of the gaps is located between the bifurcation peaks of the current extension structure.

[0179] Furthermore, the driving backplane includes driving electrodes, with each micro LED corresponding to one driving electrode, and the driving electrodes are electrically connected to the bonding layer.

[0180] Furthermore, the material of the driving electrode is one or more alloys of the following metals: Al, Cu, and Au.

[0181] Furthermore, the bonding layer is made of one or more alloys of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn.

[0182] Furthermore, the miniature light-emitting diode also includes:

[0183] An ohmic contact layer is located on the lower surface of the light-emitting platform and is electrically connected to the bonding layer.

[0184] A top conductive layer is located on the side and top surfaces of the light-emitting platform, and the top conductive layer is electrically connected to the current extension structure.

[0185] A passivation barrier layer, which at least partially covers the side surface of the light-emitting platform and is located between the light-emitting platform and the top conductive layer.

[0186] Furthermore, the electrode polarity of the ohmic contact layer is opposite to that of the electrode polarity of the top conductive layer.

[0187] Furthermore, adjacent top conductive layers are connected, and all top conductive layers are connected as a whole.

[0188] Furthermore, adjacent passivation isolation layers are connected, and all passivation isolation layers are connected into a whole.

[0189] Furthermore, the material of the passivation barrier layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0190] Furthermore, the bottom lateral dimension of the light-emitting platform is larger than the top lateral dimension.

[0191] Furthermore, the tilt angle of the sidewall of the light-emitting platform ranges from 60° to 85°.

[0192] Furthermore, the bottom lateral dimension of the light-emitting platform does not exceed 3 micrometers.

[0193] Furthermore, the top lateral dimension of the light-emitting platform does not exceed 1.5 micrometers.

[0194] Furthermore, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting platform.

[0195] Furthermore, the light-emitting mesa includes a first type of epitaxial layer, a second type of epitaxial layer, and a light-emitting layer located between the two.

[0196] Furthermore, the first type of epitaxial layer is electrically connected to the ohmic contact layer;

[0197] The second type of epitaxial layer is electrically connected to the top conductive layer.

[0198] Furthermore, the material of the first type of epitaxial layer is a material layer of the first conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, and the material of the second type of epitaxial layer is a material layer of the second conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P.

[0199] The first conductivity type is different from the second conductivity type.

[0200] Furthermore, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, or an InGaAs / AlGaAs multi-quantum well layer.

[0201] Furthermore, the bottoms of adjacent current extension structures are connected, and all current extension structures are connected as a whole.

[0202] Furthermore, the longitudinal cross-section of adjacent current-spreading structures exhibits a bifurcated peak shape.

[0203] Furthermore, the longitudinal cross-sectional shapes of adjacent current-extending structures are asymmetrical.

[0204] Furthermore, the material of the current spreading structure is one or more alloys of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0205] Furthermore, the microlens has an upper curvature portion and a lower spacer portion.

[0206] Furthermore, the height of the lower spacer portion of the microlens is 0.2 to 3 micrometers; and / or

[0207] The height of the upper curvature portion of the microlens is 0.5 to 2 micrometers; and / or

[0208] The spherical width of the microlens is 3 to 4 micrometers.

[0209] Furthermore, the microlens is in the shape of a perfect hemisphere.

[0210] Furthermore, the material of the microlens is silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, or aluminum oxide.

[0211] The present invention also provides a fifth type of display panel, including a fifth type of micro light-emitting diode chip.

[0212] The technical solution provided by this invention has the following beneficial effects:

[0213] 1. The first type of micro-light-emitting diode chip provided by the present invention has adjacent microlenses spaced apart from each other, which can significantly avoid light crosstalk between adjacent micro-light-emitting diodes. This is because by spaced apart the microlenses of adjacent micro-light-emitting diodes, the light intrusion of adjacent micro-light-emitting diodes can be prevented through the gap. On the contrary, the light that would originally enter the adjacent micro-light-emitting diode at the microlens connection is refracted to the desired direction at the gap. This can also improve the light emission brightness of each micro-light-emitting diode display chip, thereby improving the light emission efficiency of the micro-light-emitting diode.

[0214] 2. The second type of micro-light-emitting diode chip provided by the present invention has adjacent microlenses spaced apart from each other, with the bottom of the spacer being higher than the top of the light-emitting platform. This ensures that all upward-emitted light will not enter adjacent micro-light-emitting diodes, while light emitted to the sides will be reflected by the current-spreading structures on both sides, thus allowing all light to exit from the corresponding microlenses. Furthermore, the shorter spacing simplifies the microlens formation process.

[0215] 3. The third type of micro-light-emitting diode chip provided by the present invention has adjacent microlenses having a connecting portion and a gap on their sides, with the gap located above the connecting portion and the bottom of the gap lower than the top of the light-emitting platform. This significantly suppresses the intrusion of light emitted to the sides into adjacent micro-light-emitting diodes. This is particularly advantageous when a spacer is provided to increase the distance between the microlens and the light-emitting platform (e.g., so that the focal point of the microlens falls on the light-emitting platform), because in this case, the sides are extended, and the longer gap between the sides of the microlenses can significantly suppress the intrusion of light from the side direction into adjacent micro-light-emitting diodes.

[0216] 4. The fourth type of micro-light-emitting diode chip provided by the present invention has adjacent microlenses spaced apart from each other on the side to form a gap, and the gap is a closed air gap. In particular, the air gap can be filled with a low refractive index gas (i.e., the refractive index of the gas in the air gap is lower than the refractive index of the microlens), such as air. In this way, light entering the air gap from the microlens will undergo total internal reflection when the incident angle is greater than the critical angle, suppressing its entry into the air gap, thereby suppressing its entry into the adjacent micro-light-emitting diode, thereby suppressing optical crosstalk.

[0217] 5. The fifth type of micro-light-emitting diode chip provided by the present invention has a gap within the microlens, which can suppress the entry of light into adjacent micro-light-emitting diodes, thereby suppressing optical crosstalk. For example, the gap can be arranged between the light-emitting mesa and the current spreading structure, or at the connection between two microlenses, such as between the bifurcation peaks of the current spreading structure. This allows for flexible placement of anti-optical crosstalk positions within the microlens.

[0218] 6. Furthermore, the micro light-emitting diode chip provided by the present invention has a current-spreading structure that can reflect light between the micro light-emitting diodes, which can avoid light crosstalk between adjacent micro light-emitting diodes. In addition, the current-spreading structure can reflect the light emitted by the micro light-emitting diodes, thereby improving the brightness of the micro light-emitting diode display chip and thus improving the light extraction efficiency of the micro light-emitting diodes. Attached Figure Description

[0219] To further illustrate the above and other advantages and features of the various embodiments of the present invention, a more specific description of the various embodiments of the present invention will be presented with reference to the accompanying drawings. It is to be understood that these drawings depict only typical embodiments of the invention and are therefore not intended to limit its scope. In the drawings, identical or corresponding parts will be indicated by identical or similar reference numerals for clarity.

[0220] Figure 1 A top view schematic diagram of a first type of micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0221] Figure 2 A longitudinal cross-sectional schematic diagram of a first type of micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0222] Figure 3 A top view schematic diagram of the current extension structure of a first type of micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0223] Figure 4 A top view schematic diagram of a second type of micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0224] Figure 5 A longitudinal cross-sectional schematic diagram of a second type of micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0225] Figure 6 A top view schematic diagram of the current extension structure of a second type of micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0226] Figure 7 A longitudinal cross-sectional schematic diagram of a second type of micro light-emitting diode chip according to another embodiment of the present invention is shown;

[0227] Figure 8 A longitudinal cross-sectional schematic diagram of a second type of micro light-emitting diode chip according to yet another embodiment of the present invention is shown;

[0228] Figure 9 A top view schematic diagram of a third type of micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0229] Figure 10A longitudinal cross-sectional schematic diagram of a third type of micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0230] Figure 11 A top view schematic diagram of the current extension structure of a third type of micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0231] Figure 12 A top view schematic diagram of a fourth type of micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0232] Figure 13 A longitudinal cross-sectional schematic diagram of a fourth type of micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0233] Figure 14 A top view schematic diagram of the current extension structure of a fourth type of micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0234] Figure 15 A top view schematic diagram of a fifth type of micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0235] Figure 16 A longitudinal cross-sectional schematic diagram of a fifth type of micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0236] Figure 17 A top view schematic diagram of the current extension structure of a fifth type of micro light-emitting diode chip according to an embodiment of the present invention is shown; and

[0237] Figure 18 A longitudinal cross-sectional schematic diagram of a fifth type of micro light-emitting diode chip according to another embodiment of the present invention is shown. Detailed Implementation

[0238] In the following description, the invention is described with reference to various embodiments. However, those skilled in the art will recognize that the embodiments may be practiced without one or more specific details or with other alternatives and / or additional methods, materials, or components. In other instances, well-known structures, materials, or operations are not shown or described in detail so as not to obscure the inventive points of the invention. Similarly, for illustrative purposes, specific quantities, materials, and configurations are set forth to provide a comprehensive understanding of embodiments of the invention. However, the invention is not limited to these specific details. Furthermore, it should be understood that the embodiments shown in the drawings are illustrative representations and are not necessarily drawn to scale.

[0239] In this invention, references to "an embodiment" or "this embodiment" mean that a particular feature, structure, or characteristic described in connection with that embodiment is included in at least one embodiment of the invention. The phrase "in one embodiment" appearing throughout this invention does not necessarily refer to the same embodiment in all instances.

[0240] In this invention, unless otherwise specified, "arranged on," "arranged above," and "arranged on" do not exclude the possibility of an intermediate element between them. Furthermore, "arranged on or above" merely indicates the relative positional relationship between two components, and in certain cases, such as when the product orientation is reversed, it can also be converted to "arranged below or under," and vice versa.

[0241] In this invention, unless otherwise specified, "upper surface", "lower surface" and "side surface" are used only to describe the surfaces that distinguish the same component.

[0242] In this invention, unless otherwise specified, the quantifiers “one” and “one” do not exclude scenarios involving multiple elements, and the quantifiers “multiple” and “many” refer to one or more elements.

[0243] In this invention, the term "configuration" refers to setting the shape, structure, material and / or function of a target object to achieve a desired technical effect. "Configuration" includes a variety of alternative technical means to achieve the technical effect, which become apparent from the teachings of this application.

[0244] In this invention, the term "located at the bottom of the light-emitting platform" refers to the side of the light-emitting platform facing away from the microlens, the term "located at the top of the light-emitting platform" refers to the side of the light-emitting platform facing the microlens, and the term "side of the light-emitting platform" refers to the two sides between the top and the bottom.

[0245] In this invention, the term "profile of the metal layer" refers to the maximum dimension, such as length, within a plane (or a plane perpendicular to the thickness) formed by the length and width of the metal layer. Similarly, the bottom profile of the light-emitting platform refers to the maximum dimension, such as length, of the light-emitting platform within a bottom plane (i.e., a plane perpendicular to the thickness at the bottom).

[0246] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0247] First, the first type of miniature light-emitting diode chip and display panel is described.

[0248] Figure 1 A top view schematic diagram of a first type of micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 1 It includes a miniature light-emitting diode 101, a microlens 102, and a current-expanding structure 103. Figure 2 A longitudinal cross-sectional schematic diagram of a first type of micro-light-emitting diode (LED) chip according to an embodiment of the present invention is shown. As shown, the first type of micro-LED chip includes a driving module, a micro-LED 101, a current spreading structure 103, and a microlens 102. The driving module includes a driving backplane 108 and a bonding layer 110. The micro-LED 101 is disposed on the upper surface of the driving module and is configured to emit light. The micro-LED 101 includes a light-emitting mesa 105. The current spreading structure 103 is located between the micro-LEDs 101 and is arranged to surround the micro-LEDs 101 in an electrical contact manner. The microlenses 102 are disposed on the upper surface of the micro-LEDs, with adjacent microlenses 102 spaced apart from the micro-LEDs 101, and the spacing between adjacent microlenses is 0 to 1 micrometer.

[0249] Each micro-LED chip has a size not exceeding 1 cm, preferably not exceeding 5 mm. The micro-LEDs are formed in an array within the micro-LED display chip, with resolutions such as 720*480, 640*480, 1920*1080, 1280*720, 2K, or 4K. The diameter of the micro-LED structure is in the nanometer range, for example, 20 nm to 100 nm. Each micro-LED can form at least a portion of the pixel elements on the micro-LED display chip.

[0250] For convenience, "upward" is used to indicate away from the driving backplane 108, "downward" indicates towards the driving backplane 108, and other directional terms such as top, bottom, above, below, directly below, and under are also interpreted accordingly. In one embodiment, the driving backplane 108 includes a substrate, driving circuitry, and driving electrodes 109. Each micro-LED corresponds to one driving electrode, and the driving electrode 109 is electrically connected to the bonding layer 110. In one embodiment, the material of the driving electrode is one or more alloys of the following metals: Al, Cu, and Au. In one embodiment, the substrate is a Si substrate. In another embodiment, the substrate is a transparent substrate, such as a glass substrate. Examples of other substrates include GaAs, GaP, InP, SiC, ZnO, and sapphire substrates. In some embodiments, the substrate is approximately 700 micrometers thick. The driving circuitry forms individual pixel drivers to control the operation of individual pixel LED devices. The driving circuitry includes, for example, complementary metal oxide semiconductor (CMOS) devices or TFT devices. In one embodiment, the micro-LED can be bonded to the surface of the driving backplane 108 via bonding layer 110, and the bonding can be accomplished through eutectic bonding, thermo-press bonding, and transient liquid phase (TLP) bonding. In one embodiment, bonding layer 110 can be disposed on the driving backplane 108. In another embodiment, bonding layer 110 is grown on the driving backplane 108. In one embodiment, the thickness of bonding layer 110 is 0.1 micrometers to 3 micrometers. In a preferred embodiment, the thickness of bonding layer 110 is 0.6 micrometers. In some embodiments, bonding layer 110 may include two metal layers. The material of bonding layer 110 may be, for example, an alloy of one or more of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn. In some embodiments, bonding layer 110 may also function as a reflector to reflect light emitted from the LED structure above.

[0251] In some embodiments, the driving backplane 108 may be an integrated circuit (IC) board. The micro-LEDs are electrically connected to the driving backplane 108, which controls the lighting and extinguishing of the micro-LEDs. In some embodiments, the IC board may be electrically connected to each micro-LED in the micro-LED array via separate metal interconnects. In some embodiments, each micro-LED may be individually electrically controlled by the IC board. In some embodiments, the IC board may be electrically connected to the electrodes of the micro-LED display chip via metal interconnects. In some embodiments, a dielectric layer may be formed in the gaps between the micro-LEDs. In some embodiments, the dielectric layer may also be formed in the gaps between interconnects.

[0252] This miniature LED chip comprises multiple miniature LED arrays, each array containing multiple miniature LEDs. The driving method for these miniature LEDs is, for example, a passive matrix (PM) drive, where the cathodes of all the miniature LEDs in each array are connected to a common cathode line NL, while miniature LEDs with the same number in each array are connected to their respective anode lines PL. Thus, the on / off state and brightness of each LED can be individually controlled by adjusting the type of the corresponding cathode and anode lines.

[0253] In some embodiments, the micro-light-emitting diodes (LEDs) can be arranged in a regular or irregular manner on the upper surface of the driving module, serving as pixels of the micro-LED chip. The micro-LEDs include: a light-emitting mesa 105, an ohmic contact layer 104, a top conductive layer 107, and a passivation barrier layer 106. The ohmic contact layer 104 is located on the lower surface of the light-emitting mesa 105 and is electrically connected to the bonding layer 110. The top conductive layer 107 is located on the side and top surfaces of the light-emitting mesa 105 and is electrically connected to the current spreading structure 103. The passivation barrier layer 106 at least partially covers the side surfaces of the light-emitting mesa and is located between the light-emitting mesa 105 and the top conductive layer 107. In some embodiments, the passivation barrier layer 106 covers a portion of the top surface of the light-emitting mesa 105.

[0254] In some embodiments, the electrode polarity of the ohmic contact layer 104 is opposite to that of the top conductive layer 107. The ohmic contact layer 104 may be, for example, a P-electrode or an anode electrode, and the top conductive layer 107 may be an electrode with the opposite polarity to that of the ohmic contact layer 104, such as an N-electrode or a cathode electrode. In one embodiment, the ohmic contact layer, the top conductive layer, and their connecting components may be one or more combinations of graphene, indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), fluorine-doped tin oxide (FTO), or other transparent conductive oxides (TCO).

[0255] In one embodiment, adjacent top conductive layers are connected, and all top conductive layers are connected as a whole. In one embodiment, adjacent passivation isolation layers are connected, and all passivation isolation layers are connected as a whole. In one embodiment, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0256] In some embodiments, a top conductive layer may be formed on the top surface of the micro-LED array. In some embodiments, the top conductive layer may be shared by all micro-LEDs in the micro-LED array. In some embodiments, the light-emitting layer may include at least one quantum well layer. In some embodiments, the micro-LED array may include a single-layer micro-LED structure. In some embodiments, the micro-LED array may include a multi-layer vertically stacked micro-LED structure.

[0257] In one embodiment, the light-emitting mesa can be a trapezoidal platform, with the bottom lateral dimension being larger than the top lateral dimension. In one embodiment, the inclination angle of the sidewalls of the light-emitting mesa ranges from 60° to 85°. In one embodiment, the bottom lateral dimension of the light-emitting mesa does not exceed 3 micrometers. In one embodiment, the top lateral dimension of the light-emitting mesa does not exceed 1.5 micrometers. In one embodiment, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting mesa.

[0258] like Figure 2As shown, the light-emitting mesa 105 includes a first-type epitaxial layer 1052, a second-type epitaxial layer 1051, and a light-emitting layer 1053 located between them. The first-type epitaxial layer is electrically connected to an ohmic contact layer. The second-type epitaxial layer is electrically connected to a top conductive layer. In some embodiments, the light-emitting mesa of each micro-LED in the micro-LED array can be a micrometer-scale light-emitting mesa. In some embodiments, the micrometer-scale light-emitting mesa may include, from bottom to top, a first-type epitaxial layer, a light-emitting layer, and a second-type epitaxial layer. That is, in the three-layer structure, the first-type epitaxial layer is closest to the driving backplane 108; the light-emitting layer is located above the first-type epitaxial layer and further away from the driving backplane 108; the second-type epitaxial layer is located above the light-emitting layer and furthest away from the driving backplane 108. In some embodiments, the light-emitting layer is formed by a plurality of stacked quantum well layers, particularly superlattice stacked quantum well layers. Preferably, the superlattice stacked quantum well layers include multiple pairs of quantum well layers stacked with quantum barrier layers. In some embodiments, the first-type epitaxial layer is a semiconductor material having a first conductivity type and includes a plurality of semiconductor layers. The primary substrate material of the first type of light-emitting mesa may be, but is not limited to, materials such as Ga, N, As, P, In, or Al. Furthermore, the first type of epitaxial layer may, from top to bottom, include, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer; additionally, an ohmic contact layer may be formed below the window layer. In some embodiments, the second type of epitaxial layer is a semiconductor material having a second conductivity type and includes multiple semiconductor layers. The primary substrate material of the second type of epitaxial layer may be, but is not limited to, materials such as Ga, N, As, P, In, or Al. Furthermore, the second type of epitaxial layer may, from top to bottom, include, but is not limited to, a confinement layer and a waveguide layer; additionally, in some embodiments, an ohmic contact layer may be formed on the confinement layer. In one embodiment, the first conductivity type is different from the second conductivity type.

[0259] In some embodiments, the first type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer, and the second type of epitaxial layer is a P-type GaN layer or a P-type AlGaN layer. That is, the material of the second type of epitaxial layer can be a material layer of a second conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P, and the first type of epitaxial layer can be a material layer of a first conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P. In some embodiments, the light-emitting layer includes a multi-quantum-well layer and an electron-blocking layer. The multi-quantum-well layer is an InGaN / GaN multi-quantum-well layer, an InGaN / AlGaN multi-quantum-well layer, or an InGaAs / AlGaAs multi-quantum-well layer. In some embodiments, the light-emitting layer further includes an electron-blocking layer disposed on a first side of the light-emitting layer, the first side referring to the side along which electrons migrate out of the light-emitting layer. In another embodiment, the first type of epitaxial layer may also be a P-type GaN layer or a P-type AlGaN layer, and the second type of epitaxial layer may be an N-type GaN layer or an N-type AlGaN layer.

[0260] In some embodiments, the light-emitting layer includes at least one quantum well layer. The thickness of the quantum well layer is between 20 nm and 40 nm, for example, 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y.

[0261] In some embodiments, one of the first type epitaxial layer and the second type epitaxial layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer, and the N-type cladding layer is formed on the doped N-type contact layer. The material of the N-type cladding layer is Al. x In 1-x P, where x ranges from 0.1 to 0.5, for example, x is 0.5. Furthermore, in these embodiments, the thickness of the N-type cladding layer is no greater than 350 nm, for example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e⁻¹. 17 cm -3 up to 1e 18 cm -3 The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e⁻¹. 18cm -3 up to 1e 19 cm -3 In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al). x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer is 50 nm to 75 nm, for example, 65 nm.

[0262] In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light-emitting layer, and the doped P-type contact layer is formed on the P-type cladding layer. In some embodiments, the material of the P-type cladding layer is Al. x In 1-x P, where x is 0.3 to 0.5, for example, x is 0.5. In such embodiments, the thickness of the P-type cladding layer is no greater than 380 nm, for example, the thickness of the P-type cladding layer is 360 nm. In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is 10 nm to 30 nm, for example, 20 nm.

[0263] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed under the P-type cladding layer, a first-doped P-type transition layer formed on the P-type cladding layer, and a second-doped P-type transition layer formed on the first-doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al). x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer is 50 nm to 70 nm, for example, 65 nm.

[0264] In some embodiments, the material of the first doped P-type transition layer is (Al) x Ga 1-x ) y In 1-yP, where x ranges from 0.1 to 0.3 and y ranges from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times x. In some embodiments, the thickness of the first doped P-type transition layer is 20 nm to 40 nm, for example, 30 nm.

[0265] In some embodiments, the material of the second doped P-type transition layer is Al. x Ga 1-x As, where x ranges from 0.5 to 0.9, for example, x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is from 10 nm to 30 nm, for example, 20 nm.

[0266] In some embodiments, the doping concentration of the second-doped P-type transition layer is greater than the doping density of the first-doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times that of the second-doped P-type transition layer.

[0267] In some embodiments, the doping concentration of the doped P-type contact layer is greater than the doping concentration of the second-doped P-type transition layer. Furthermore, in some embodiments, the doping concentration of the second-doped P-type transition layer is 2 to 4 times that of the first-doped P-type transition layer.

[0268] For example, the doping concentration of the first doped P-type transition layer is greater than 1e. 18 cm -3 The doping density of the second-doped P-type transition layer is 2e 18 cm -3 -4e 18 cm -3 Within the range, the doping density of the doped P-type contact layer is greater than 5e 18 cm -3 .

[0269] The current extension structure 103 can reflect the light emitted by the micro LED, thereby significantly increasing the total light emission. Simultaneously, the current extension structure 103 can also isolate light, preventing optical crosstalk between adjacent LEDs. By arranging the current extension structure 103 to electrically surround the micro LED and electrically connect it to the top conductive layer 107, the electrical contact area between the current extension structure 103 and the micro LED can be significantly increased. This allows the active layer (light-emitting layer) of the micro LED to emit light more uniformly, effectively preventing light emission only at or near the electrical contact area or excessively high brightness at or near the electrical contact area.

[0270] Figure 3 A top view schematic diagram of the current extension structure of a first type of micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 3 As shown, the bottoms of adjacent current extension structures 103 are connected, and all current extension structures are connected into a whole. Figure 3 In this embodiment, the top view (i.e., cross-sectional shape) of the micro-LED is circular, and the top view of the overall current expansion structure is the grid shape remaining after removing the circle. In one embodiment, the top view of the micro-LED may also be other suitable shapes, such as rectangles, squares, or regular polygons, and the top view of the overall current expansion structure is correspondingly the shape remaining after removing other suitable shapes, such as the grid shape remaining after removing rectangles, squares, or polygons. Figure 2 As shown, the longitudinal cross-sections of adjacent current extension structures exhibit a bifurcated peak shape. In one embodiment, the longitudinal cross-sectional shapes of adjacent current extension structures are asymmetrical, and their heights may differ; this is not a limitation.

[0271] In one embodiment, the material of the current spreading structure is one or more alloys of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0272] Figure 2 In this embodiment, the lateral dimension of the bottom of the microlens 102 is larger than the lateral dimension of the light-emitting area of ​​the micro-LED. In some embodiments, the lateral dimension of the bottom of the microlens 102 may be equal to the lateral dimension of the light-emitting area of ​​the micro-LED.

[0273] In some embodiments, a microlens 102 can cover multiple lensless micro-light-emitting diodes (LEDs). Multiple microlenses constitute a microlens array. The microlens array is disposed above the array of micro-LEDs, wherein at least one microlens is disposed on the surface of the top conductive layer of the micro-LEDs, and the horizontal profile of the microlens is larger than the maximum horizontal profile of the micro-LEDs. The microlenses are primarily used to converge and / or collimate light rays; for example, the focal point of the microlens can be located within the light-emitting mesa of the micro-LEDs by adjusting parameters such as the thickness and curvature of the microlenses. The microlenses in the microlens array are typically identical. Examples of microlenses include spherical microlenses, aspherical microlenses, Fresnal microlenses, and cylindrical microlenses. Figure 2 As shown, in one embodiment, the microlens 102 includes an upper curvature portion 1021 and a lower spacer portion 1022. In one embodiment, the typical shape of the lower spacer portion of each microlens 102 includes a circle, a square, a rectangle, and a hexagon. The individual microlenses in the microlens array of the display panel may be the same or different in terms of shape, curvature, optical power, size, base, and spacing.

[0274] In one embodiment, the centers of curvature of the sidewalls of the lower spacer do not coincide with the centers of curvature of the upper curvature portion. The thickness of the lower spacer is set such that the focal point of the microlens is located in the light-emitting platform of the micro-LED. In one embodiment, the height of the lower spacer of the microlens is 0.2 to 3 micrometers, and / or the height of the upper curvature portion of the microlens is 0.5 to 2 micrometers, and / or the spherical width of the microlens is 3 to 4 micrometers. In yet another embodiment, the microlens may, for example, be a perfect hemisphere.

[0275] In some embodiments, the microlens 102 may be a curved hemispherical shape. In some embodiments, the height of the microlens 102 is no greater than 2 micrometers. In some embodiments, the height of the microlens 102 is no greater than 1 micrometer. In some embodiments, the height of the microlens 102 is no greater than 0.5 micrometers. In some embodiments, the width of the microlens 102 is no greater than 4 micrometers. In some embodiments, the width of the microlens 102 is no greater than 3 micrometers. In some embodiments, the width of the microlens 102 is no greater than 2 micrometers. In some embodiments, the width of the microlens 102 is no greater than 1 micrometer. In some embodiments, the width-to-height ratio of the microlens 102 is greater than 1.5.

[0276] In some embodiments, the microlens 102 may be made of various materials that are transparent to light of various wavelengths emitted by the micro-light-emitting diode. Exemplary transparent materials for the microlens 102 include polymers and dielectric materials. In some embodiments, the dielectric material includes one or more materials such as silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, aluminum oxide, etc. In some embodiments, the microlens 102 is made of photoresist. In some embodiments, the microlens is deposited directly on the surface of the micro-light-emitting diode using chemical vapor deposition (CVD) technology.

[0277] In some embodiments, the micro-LED array may include blue micro-LEDs. In some embodiments, the spacing between the micro-LED arrays, i.e., the minimum center-to-center distance between the micro-LEDs, may be between about 2 micrometers and about 50 micrometers. In some embodiments, the number of pixels on the micro-LED chip may be between thousands and millions.

[0278] In one embodiment of the present invention, a first display panel is also provided, the display panel including the first micro light-emitting diode display chip described above.

[0279] Next, the second type of micro LED chip and display panel will be described.

[0280] Figure 4 A top view schematic diagram of a second type of micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 4It includes a miniature light-emitting diode 201, a microlens 202, and a current-expanding structure 203. Figure 5 A longitudinal cross-sectional schematic diagram of a second type of micro-light-emitting diode chip according to an embodiment of the present invention is shown. As shown, the second type of micro-light-emitting diode chip includes a driving module, micro-light-emitting diodes 201, a current spreading structure 203, and a microlens 202. The driving module includes a driving backplate 208 and a bonding layer 210. The micro-light-emitting diodes 201 are disposed on the upper surface of the driving module, and the micro-light-emitting diodes 201 include light-emitting mesa. The current spreading structure 203 is located between the micro-light-emitting diodes 201, and the current spreading structure 203 is arranged to surround the micro-light-emitting diodes 201 in an electrical contact manner. Figure 5 As shown, microlenses 202 are arranged on the upper surface of the micro-light-emitting diodes 201, adjacent microlenses 202 are connected between the micro-light-emitting diodes 201, and the sides of adjacent microlenses 202 are separated to form a gap. The bottom of the gap is higher than the top of the light-emitting platform, and the spacing between adjacent microlenses is 0 to 1 micrometer.

[0281] Each micro-LED chip has a size not exceeding 1 cm, preferably not exceeding 5 mm. The micro-LEDs are formed in an array within the micro-LED display chip, with resolutions such as 720*480, 640*480, 1920*1080, 1280*720, 2K, or 4K. The diameter of the micro-LED structure is in the nanometer range, for example, 20 nm to 100 nm. Each micro-LED can form at least a portion of the pixel elements on the micro-LED display chip.

[0282] For convenience, "upward" is used to indicate away from the driving backplane 208, "downward" indicates towards the driving backplane 208, and other directional terms such as top, bottom, above, below, directly below, and under are also interpreted accordingly. In one embodiment, the driving backplane 208 includes a substrate, driving circuitry, and driving electrodes 209. Each micro-LED corresponds to one driving electrode, and the driving electrode 209 is electrically connected to the bonding layer 210. In one embodiment, the material of the driving electrode is one or more alloys of the following metals: Al, Cu, and Au. In one embodiment, the substrate is a Si substrate. In another embodiment, the substrate is a transparent substrate, such as a glass substrate. Examples of other substrates include GaAs, GaP, InP, SiC, ZnO, and sapphire substrates. In some embodiments, the substrate is approximately 700 micrometers thick. The driving circuitry forms individual pixel drivers to control the operation of individual pixel LED devices. The driving circuitry includes, for example, complementary metal oxide semiconductor (CMOS) devices or TFT devices. In one embodiment, the micro-LED can be bonded to the surface of the driving backplane 208 via bonding layer 210, and the bonding can be accomplished through eutectic bonding, thermo-press bonding, and transient liquid phase (TLP) bonding. In one embodiment, bonding layer 210 can be disposed on the driving backplane 208. In another embodiment, bonding layer 210 is grown on the driving backplane 208. In one embodiment, the thickness of bonding layer 210 is 0.1 micrometers to 3 micrometers. In a preferred embodiment, the thickness of bonding layer 210 is 0.6 micrometers. In some embodiments, bonding layer 210 may include two metal layers. The material of bonding layer 210 may be, for example, an alloy of one or more of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn. In some embodiments, bonding layer 210 may also function as a reflector to reflect light emitted from the LED structure above.

[0283] In some embodiments, the driving backplane 208 may be an integrated circuit (IC) board. The micro-LEDs are electrically connected to the driving backplane 208, which controls the lighting and extinguishing of the micro-LEDs. In some embodiments, the IC board may be electrically connected to each micro-LED in the micro-LED array via separate metal interconnects. In some embodiments, each micro-LED may be individually electrically controlled by the IC board. In some embodiments, the IC board may be electrically connected to the electrodes of the micro-LED display chip via metal interconnects. In some embodiments, a dielectric layer may be formed in the gaps between the micro-LEDs. In some embodiments, the dielectric layer may also be formed in the gaps between interconnects.

[0284] This miniature LED chip comprises multiple miniature LED arrays, each array containing multiple miniature LEDs. The driving method for these miniature LEDs is, for example, a passive matrix (PM) drive, where the cathodes of all the miniature LEDs in each array are connected to a common cathode line NL, while miniature LEDs with the same number in each array are connected to their respective anode lines PL. Thus, the on / off state and brightness of each LED can be individually controlled by adjusting the type of the corresponding cathode and anode lines.

[0285] In some embodiments, the micro-light-emitting diodes (LEDs) can be arranged in a regular or irregular manner on the upper surface of the driving module, serving as pixels of the micro-LED chip. The micro-LEDs include: a light-emitting mesa 205, an ohmic contact layer 204, a top conductive layer 207, and a passivation barrier layer 206. The ohmic contact layer 204 is located on the lower surface of the light-emitting mesa 205 and is electrically connected to the bonding layer 210. The top conductive layer 207 is located on the side and top surfaces of the light-emitting mesa 205 and is electrically connected to the current spreading structure 203. The passivation barrier layer 206 at least partially covers the side surfaces of the light-emitting mesa and is located between the light-emitting mesa 205 and the top conductive layer 207. In some embodiments, the passivation barrier layer 206 covers a portion of the top surface of the light-emitting mesa 205.

[0286] In some embodiments, the electrode polarity of the ohmic contact layer 204 is opposite to that of the top conductive layer 207. The ohmic contact layer 204 can be, for example, a P-electrode or an anode electrode, and the top conductive layer 207 can be an electrode with the opposite polarity to that of the ohmic contact layer 204, such as an N-electrode or a cathode electrode. In one embodiment, the ohmic contact layer, the top conductive layer, and their connecting components can be one or more combinations of graphene, indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), fluorine-doped tin oxide (FTO), or other transparent conductive oxides (TCO).

[0287] In one embodiment, adjacent top conductive layers are connected, and all top conductive layers are connected as a whole. In one embodiment, adjacent passivation isolation layers are connected, and all passivation isolation layers are connected as a whole. In one embodiment, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0288] In some embodiments, a top conductive layer may be formed on the top surface of the micro-LED array. In some embodiments, the top conductive layer may be shared by all micro-LEDs in the micro-LED array. In some embodiments, the light-emitting layer may include at least one quantum well layer. In some embodiments, the micro-LED array may include a single-layer micro-LED structure. In some embodiments, the micro-LED array may include a multi-layer vertically stacked micro-LED structure.

[0289] In one embodiment, the light-emitting mesa can be a trapezoidal platform, with the bottom lateral dimension being larger than the top lateral dimension. In one embodiment, the inclination angle of the sidewalls of the light-emitting mesa ranges from 60° to 85°. In one embodiment, the bottom lateral dimension of the light-emitting mesa does not exceed 3 micrometers. In one embodiment, the top lateral dimension of the light-emitting mesa does not exceed 1.5 micrometers. In one embodiment, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting mesa.

[0290] like Figure 5As shown, the light-emitting mesa 205 includes a first-type epitaxial layer 2052, a second-type epitaxial layer 2051, and a light-emitting layer 2053 located between them. The first-type epitaxial layer is electrically connected to the ohmic contact layer. The second-type epitaxial layer is electrically connected to the top conductive layer. In some embodiments, the light-emitting mesa of each micro-LED in the micro-LED array can be a micrometer-scale light-emitting mesa. In some embodiments, the micrometer-scale light-emitting mesa may include, from bottom to top, a first-type epitaxial layer, a light-emitting layer, and a second-type epitaxial layer. That is, in the three-layer structure, the first-type epitaxial layer is closest to the driving backplane 208; the light-emitting layer is located above the first-type epitaxial layer and further away from the driving backplane 208; the second-type epitaxial layer is located above the light-emitting layer and furthest away from the driving backplane 208. In some embodiments, the light-emitting layer is formed by multiple stacked quantum well layers, particularly superlattice stacked quantum well layers. Preferably, the superlattice stacked quantum well layers include multiple pairs of quantum well layers stacked with quantum barrier layers. In some embodiments, the first-type epitaxial layer is a semiconductor material having a first conductivity type and includes multiple semiconductor layers. The primary substrate material of the first type of light-emitting mesa may be, but is not limited to, materials such as Ga, N, As, P, In, or Al. Furthermore, the first type of epitaxial layer may, from top to bottom, include, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer; additionally, an ohmic contact layer may be formed below the window layer. In some embodiments, the second type of epitaxial layer is a semiconductor material having a second conductivity type and includes multiple semiconductor layers. The primary substrate material of the second type of epitaxial layer may be, but is not limited to, materials such as Ga, N, As, P, In, or Al. Furthermore, the second type of epitaxial layer may, from top to bottom, include, but is not limited to, a confinement layer and a waveguide layer; additionally, in some embodiments, an ohmic contact layer may be formed on the confinement layer. In one embodiment, the first conductivity type is different from the second conductivity type.

[0291] In some embodiments, the first type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer, and the second type of epitaxial layer is a P-type GaN layer or a P-type AlGaN layer. That is, the material of the second type of epitaxial layer can be a material layer of a second conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P, and the first type of epitaxial layer can be a material layer of a first conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P. In some embodiments, the light-emitting layer includes a multi-quantum-well layer and an electron-blocking layer. The multi-quantum-well layer is an InGaN / GaN multi-quantum-well layer, an InGaN / AlGaN multi-quantum-well layer, or an InGaAs / AlGaAs multi-quantum-well layer. In some embodiments, the light-emitting layer further includes an electron-blocking layer disposed on a first side of the light-emitting layer, the first side referring to the side along which electrons migrate out of the light-emitting layer. In another embodiment, the first type of epitaxial layer may also be a P-type GaN layer or a P-type AlGaN layer, and the second type of epitaxial layer may be an N-type GaN layer or an N-type AlGaN layer.

[0292] In some embodiments, the light-emitting layer includes at least one quantum well layer. The thickness of the quantum well layer is between 20 nm and 40 nm, for example, 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y.

[0293] In some embodiments, one of the first type epitaxial layer and the second type epitaxial layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer, and the N-type cladding layer is formed on the doped N-type contact layer. The material of the N-type cladding layer is Al. x In 1-x P, where x ranges from 0.1 to 0.5, for example, x is 0.5. Furthermore, in these embodiments, the thickness of the N-type cladding layer is no greater than 350 nm, for example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e⁻¹. 17 cm -3 up to 1e 18 cm -3 The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e⁻¹. 18cm -3 up to 1e 19 cm -3 In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al). x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer is 50 nm to 75 nm, for example, 65 nm.

[0294] In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light-emitting layer, and the doped P-type contact layer is formed on the P-type cladding layer. In some embodiments, the material of the P-type cladding layer is Al. x In 1-x P, where x is 0.3 to 0.5, for example, x is 0.5. In such embodiments, the thickness of the P-type cladding layer is no greater than 380 nm, for example, the thickness of the P-type cladding layer is 360 nm. In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is 10 nm to 30 nm, for example, 20 nm.

[0295] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed under the P-type cladding layer, a first-doped P-type transition layer formed on the P-type cladding layer, and a second-doped P-type transition layer formed on the first-doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al). x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer is 50 nm to 70 nm, for example, 65 nm.

[0296] In some embodiments, the material of the first doped P-type transition layer is (Al) x Ga 1-x ) y In 1-yP, where x ranges from 0.1 to 0.3 and y ranges from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times x. In some embodiments, the thickness of the first doped P-type transition layer is 20 nm to 40 nm, for example, 30 nm.

[0297] In some embodiments, the material of the second doped P-type transition layer is Al. x Ga 1-x As, where x ranges from 0.5 to 0.9, for example, x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is from 10 nm to 30 nm, for example, 20 nm.

[0298] In some embodiments, the doping concentration of the second-doped P-type transition layer is greater than the doping density of the first-doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times that of the second-doped P-type transition layer.

[0299] In some embodiments, the doping concentration of the doped P-type contact layer is greater than the doping concentration of the second-doped P-type transition layer. Furthermore, in some embodiments, the doping concentration of the second-doped P-type transition layer is 2 to 4 times that of the first-doped P-type transition layer.

[0300] For example, the doping concentration of the first doped P-type transition layer is greater than 1e. 18 cm -3 The doping density of the second-doped P-type transition layer is 2e 18 cm -3 -4e 18 cm -3 Within the range, the doping density of the doped P-type contact layer is greater than 5e 18 cm -3 .

[0301] The current extension structure 203 can reflect the light emitted by the micro LED, thereby significantly increasing the total light emission. Simultaneously, the current extension structure 203 can also isolate light, preventing optical crosstalk between adjacent LEDs. By arranging the current extension structure 203 to electrically surround the micro LED and electrically connect it to the top conductive layer 207, the electrical contact area between the current extension structure 203 and the micro LED can be significantly increased. This allows the active layer (light-emitting layer) of the micro LED to emit light more uniformly, effectively preventing light emission only at or near the electrical contact area or excessively high brightness at or near the electrical contact area.

[0302] Figure 6 A top view schematic diagram of the current extension structure of a second type of micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 6 As shown, the bottoms of adjacent current extension structures 203 are connected, and all current extension structures are connected into a whole. Figure 6 In this embodiment, the top view (i.e., cross-sectional shape) of the micro-LED is circular, and the top view of the overall current expansion structure is the grid shape remaining after removing the circle. In one embodiment, the top view of the micro-LED may also be other suitable shapes, such as rectangles, squares, or regular polygons, and the top view of the overall current expansion structure is correspondingly the shape remaining after removing other suitable shapes, such as the grid shape remaining after removing rectangles, squares, or polygons. Figure 5 As shown, the longitudinal cross-sections of adjacent current extension structures exhibit a bifurcated peak shape. In one embodiment, the longitudinal cross-sectional shapes of adjacent current extension structures are asymmetrical, and their heights may differ; this is not a limitation.

[0303] In one embodiment, the material of the current spreading structure is one or more alloys of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0304] Figure 5 In this embodiment, the lateral dimension of the bottom of the microlens 202 is larger than the lateral dimension of the light-emitting area of ​​the micro-LED. In some embodiments, the lateral dimension of the bottom of the microlens 102 may be equal to the lateral dimension of the light-emitting area of ​​the micro-LED.

[0305] Figure 7 A top view schematic diagram of a second type of micro light-emitting diode chip according to another embodiment of the present invention is shown. Figure 7 As shown, in another embodiment of the second type of micro LED chip, the gap formed by the side separation of adjacent microlenses 202 has a multi-step structure, the sidewalls of the bottom step of the adjacent gaps are in contact, and the gap of the sidewalls of the bottom step is located between the bifurcation peaks of the current extension structure 203. Figure 8 A top view schematic diagram of a second type of micro light-emitting diode chip according to yet another embodiment of the present invention is shown. Figure 8 As shown, in another embodiment of the second type of micro LED chip, the gap formed by the side separation of adjacent microlenses 202 has a multi-level stepped structure. The sidewalls of the bottom step of the adjacent gap do not contact each other and are separated from each other. The gap of the sidewalls of the bottom step is located between the bifurcation peaks of the current extension structure 203.

[0306] In some embodiments, a microlens 202 can cover multiple lensless micro-light-emitting diodes (LEDs). Multiple microlenses constitute a microlens array. The microlens array is disposed above the array of micro-LEDs, wherein at least one microlens is disposed on the surface of the top conductive layer of the micro-LEDs, and the horizontal profile of the microlens is larger than the maximum horizontal profile of the micro-LEDs. The microlenses are primarily used to converge and / or collimate light rays; for example, the focal point of the microlens can be located within the light-emitting mesa of the micro-LEDs by adjusting parameters such as the thickness and curvature of the microlenses. The microlenses in the microlens array are typically identical. Examples of microlenses include spherical microlenses, aspherical microlenses, Fresnal microlenses, and cylindrical microlenses. Figure 2 As shown, in one embodiment, the microlens 202 includes an upper curvature portion 2021 and a lower spacer portion 2022. In one embodiment, the typical shape of the lower spacer portion of each microlens 202 includes a circle, a square, a rectangle, and a hexagon. The individual microlenses in the microlens array of the display panel may be the same or different in terms of shape, curvature, optical power, size, base, and spacing.

[0307] In one embodiment, the centers of curvature of the sidewalls of the lower spacer do not coincide with the centers of curvature of the upper curvature portion. The thickness of the lower spacer is set such that the focal point of the microlens is located in the light-emitting platform of the micro-LED. In one embodiment, the height of the lower spacer of the microlens is 0.2 to 3 micrometers, and / or the height of the upper curvature portion of the microlens is 0.5 to 2 micrometers, and / or the spherical width of the microlens is 3 to 4 micrometers. In yet another embodiment, the microlens may, for example, be a perfect hemisphere.

[0308] In some embodiments, the microlens 202 may be a curved hemispherical shape. In some embodiments, the height of the microlens 202 is no greater than 2 micrometers. In some embodiments, the height of the microlens 202 is no greater than 1 micrometer. In some embodiments, the height of the microlens 202 is no greater than 0.5 micrometers. In some embodiments, the width of the microlens 202 is no greater than 4 micrometers. In some embodiments, the width of the microlens 202 is no greater than 3 micrometers. In some embodiments, the width of the microlens 202 is no greater than 2 micrometers. In some embodiments, the width of the microlens 202 is no greater than 1 micrometer. In some embodiments, the width-to-height ratio of the microlens 202 is greater than 1.5.

[0309] In some embodiments, the microlens 202 may be made of various materials that are transparent to light of various wavelengths emitted by the micro-light-emitting diode. Exemplary transparent materials for the microlens 202 include polymers and dielectric materials. In some embodiments, the dielectric material includes one or more materials such as silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, aluminum oxide, etc. In some embodiments, the microlens 202 is made of photoresist. In some embodiments, the microlens is deposited directly on the surface of the micro-light-emitting diode using chemical vapor deposition (CVD) technology.

[0310] In some embodiments, the micro-LED array may include blue micro-LEDs. In some embodiments, the spacing between the micro-LED arrays, i.e., the minimum center-to-center distance between the micro-LEDs, may be between about 2 micrometers and about 50 micrometers. In some embodiments, the number of pixels on the micro-LED chip may be between thousands and millions.

[0311] In one embodiment of the present invention, a second display panel is also provided, which includes the aforementioned second type of micro light-emitting diode display chip.

[0312] Next, the third type of micro LED chip and display panel will be described.

[0313] Figure 9 A top view schematic diagram of a third type of micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 9 It includes a miniature light-emitting diode 301, a microlens 302, and a current-expanding structure 303. Figure 10 A longitudinal cross-sectional schematic diagram of a third type of micro-LED chip according to an embodiment of the present invention is shown. As shown, the third type of micro-LED chip includes a driving module, micro-LEDs 301, a current spreading structure 303, and a microlens 302. The driving module includes a driving backplate 308 and a bonding layer 310. The micro-LEDs 301 are disposed on the upper surface of the driving module and include a light-emitting mesa. The current spreading structure 303 is located between the micro-LEDs 301 and is arranged to surround the micro-LEDs 301 in an electrical contact manner. Figure 10 As shown, microlenses 302 are disposed on the upper surface of the micro-light-emitting diodes 301, and adjacent microlenses 302 are connected between the micro-light-emitting diodes 301. The side surfaces of adjacent microlenses 302 are separated to form a gap, the bottom of which is lower than the top of the light-emitting mesa, and the gap is located above the bifurcation peak of the current extension structure 303. In one embodiment, the gap spacing between the side surfaces of adjacent microlenses is 0 to 1 micrometer.

[0314] Each micro-LED chip has a size not exceeding 1 cm, preferably not exceeding 5 mm. The micro-LEDs are formed in an array within the micro-LED display chip, with resolutions such as 720*480, 640*480, 1920*1080, 1280*720, 2K, or 4K. The diameter of the micro-LED structure is in the nanometer range, for example, 20 nm to 100 nm. Each micro-LED can form at least a portion of the pixel elements on the micro-LED display chip.

[0315] For convenience, "upward" is used to indicate away from the driving backplane 308, "downward" indicates towards the driving backplane 308, and other directional terms such as top, bottom, above, below, directly below, and under are also interpreted accordingly. In one embodiment, the driving backplane 308 includes a substrate, driving circuitry, and driving electrodes 309. Each micro-LED corresponds to one driving electrode, and the driving electrode 309 is electrically connected to the bonding layer 310. In one embodiment, the material of the driving electrode is one or more alloys of the following metals: Al, Cu, and Au. In one embodiment, the substrate is a Si substrate. In another embodiment, the substrate is a transparent substrate, such as a glass substrate. Examples of other substrates include GaAs, GaP, InP, SiC, ZnO, and sapphire substrates. In some embodiments, the substrate is approximately 700 micrometers thick. The driving circuitry forms individual pixel drivers to control the operation of individual pixel LED devices. The driving circuitry includes, for example, complementary metal oxide semiconductor (CMOS) devices or TFT devices. In one embodiment, the micro-LED can be bonded to the surface of the driving backplane 308 via a bonding layer 310, and the bonding can be accomplished through eutectic bonding, thermo-press bonding, and transient liquid phase (TLP) bonding. In one embodiment, the bonding layer 310 can be disposed on the driving backplane 308. In another embodiment, the bonding layer 310 is grown on the driving backplane 308. In one embodiment, the thickness of the bonding layer 310 is 0.1 micrometers to 3 micrometers. In a preferred embodiment, the thickness of the bonding layer 310 is 0.6 micrometers. In some embodiments, the bonding layer 310 may include two metal layers. The material of the bonding layer 310 may be, for example, an alloy of one or more of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn. In some embodiments, the bonding layer 310 may also function as a reflector to reflect light emitted from the LED structure above.

[0316] In some embodiments, the driving backplane 308 may be an integrated circuit (IC) board. The micro-LEDs are electrically connected to the driving backplane 308, which controls the lighting and extinguishing of the micro-LEDs. In some embodiments, the IC board may be electrically connected to each micro-LED in the micro-LED array via separate metal interconnects. In some embodiments, each micro-LED may be individually electrically controlled by the IC board. In some embodiments, the IC board may be electrically connected to the electrodes of the micro-LED display chip via metal interconnects. In some embodiments, a dielectric layer may be formed in the gaps between the micro-LEDs. In some embodiments, the dielectric layer may also be formed in the gaps between interconnects.

[0317] This miniature LED chip comprises multiple miniature LED arrays, each array containing multiple miniature LEDs. The driving method for these miniature LEDs is, for example, a passive matrix (PM) drive, where the cathodes of all the miniature LEDs in each array are connected to a common cathode line NL, while miniature LEDs with the same number in each array are connected to their respective anode lines PL. Thus, the on / off state and brightness of each LED can be individually controlled by adjusting the type of the corresponding cathode and anode lines.

[0318] In some embodiments, the micro-light-emitting diodes (LEDs) can be arranged in a regular or irregular manner on the upper surface of the driving module, serving as pixels of the micro-LED chip. The micro-LEDs include: a light-emitting mesa 305, an ohmic contact layer 304, a top conductive layer 307, and a passivation barrier layer 306. The ohmic contact layer 304 is located on the lower surface of the light-emitting mesa 305 and is electrically connected to the bonding layer 310. The top conductive layer 307 is located on the side and top surfaces of the light-emitting mesa 305 and is electrically connected to the current spreading structure 303. The passivation barrier layer 306 at least partially covers the side surfaces of the light-emitting mesa and is located between the light-emitting mesa 305 and the top conductive layer 307. In some embodiments, the passivation barrier layer 306 covers a portion of the top surface of the light-emitting mesa 305.

[0319] In some embodiments, the electrode polarity of the ohmic contact layer 304 is opposite to that of the top conductive layer 307. The ohmic contact layer 304 can be, for example, a P-electrode or an anode electrode, and the top conductive layer 307 can be an electrode with the opposite polarity to that of the ohmic contact layer 304, such as an N-electrode or a cathode electrode. In one embodiment, the ohmic contact layer, the top conductive layer, and their connecting components can be one or more combinations of graphene, indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), fluorine-doped tin oxide (FTO), or other transparent conductive oxides (TCO).

[0320] In one embodiment, adjacent top conductive layers are connected, and all top conductive layers are connected as a whole. In one embodiment, adjacent passivation isolation layers are connected, and all passivation isolation layers are connected as a whole. In one embodiment, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0321] In some embodiments, a top conductive layer may be formed on the top surface of the micro-LED array. In some embodiments, the top conductive layer may be shared by all micro-LEDs in the micro-LED array. In some embodiments, the light-emitting layer may include at least one quantum well layer. In some embodiments, the micro-LED array may include a single-layer micro-LED structure. In some embodiments, the micro-LED array may include a multi-layer vertically stacked micro-LED structure.

[0322] In one embodiment, the light-emitting mesa can be a trapezoidal platform, with the bottom lateral dimension being larger than the top lateral dimension. In one embodiment, the inclination angle of the sidewalls of the light-emitting mesa ranges from 60° to 85°. In one embodiment, the bottom lateral dimension of the light-emitting mesa does not exceed 3 micrometers. In one embodiment, the top lateral dimension of the light-emitting mesa does not exceed 1.5 micrometers. In one embodiment, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting mesa.

[0323] like Figure 10As shown, the light-emitting mesa 305 includes a first-type epitaxial layer 3052, a second-type epitaxial layer 3051, and a light-emitting layer 3053 located between them. The first-type epitaxial layer is electrically connected to the ohmic contact layer. The second-type epitaxial layer is electrically connected to the top conductive layer. In some embodiments, the light-emitting mesa of each micro-LED in the micro-LED array can be a micrometer-scale light-emitting mesa. In some embodiments, the micrometer-scale light-emitting mesa may include, from bottom to top, the first-type epitaxial layer, the light-emitting layer, and the second-type epitaxial layer. That is, in the three-layer structure, the first-type epitaxial layer is closest to the driving backplane 308; the light-emitting layer is located above the first-type epitaxial layer and further away from the driving backplane 308; the second-type epitaxial layer is located above the light-emitting layer and furthest away from the driving backplane 308. In some embodiments, the light-emitting layer is formed by a plurality of stacked quantum well layers, particularly superlattice stacked quantum well layers. Preferably, the superlattice stacked quantum well layers include multiple pairs of quantum well layers stacked with quantum barrier layers. In some embodiments, the first-type epitaxial layer is a semiconductor material having a first conductivity type and includes a plurality of semiconductor layers. The primary substrate material of the first type of light-emitting mesa may be, but is not limited to, materials such as Ga, N, As, P, In, or Al. Furthermore, the first type of epitaxial layer may, from top to bottom, include, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer; additionally, an ohmic contact layer may be formed below the window layer. In some embodiments, the second type of epitaxial layer is a semiconductor material having a second conductivity type and includes multiple semiconductor layers. The primary substrate material of the second type of epitaxial layer may be, but is not limited to, materials such as Ga, N, As, P, In, or Al. Furthermore, the second type of epitaxial layer may, from top to bottom, include, but is not limited to, a confinement layer and a waveguide layer; additionally, in some embodiments, an ohmic contact layer may be formed on the confinement layer. In one embodiment, the first conductivity type is different from the second conductivity type.

[0324] In some embodiments, the first type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer, and the second type of epitaxial layer is a P-type GaN layer or a P-type AlGaN layer. That is, the material of the second type of epitaxial layer can be a material layer of a second conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P, and the first type of epitaxial layer can be a material layer of a first conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P. In some embodiments, the light-emitting layer includes a multi-quantum-well layer and an electron-blocking layer. The multi-quantum-well layer is an InGaN / GaN multi-quantum-well layer, an InGaN / AlGaN multi-quantum-well layer, or an InGaAs / AlGaAs multi-quantum-well layer. In some embodiments, the light-emitting layer further includes an electron-blocking layer disposed on a first side of the light-emitting layer, the first side referring to the side along which electrons migrate out of the light-emitting layer. In another embodiment, the first type of epitaxial layer may also be a P-type GaN layer or a P-type AlGaN layer, and the second type of epitaxial layer may be an N-type GaN layer or an N-type AlGaN layer.

[0325] In some embodiments, the light-emitting layer includes at least one quantum well layer. The thickness of the quantum well layer is between 20 nm and 40 nm, for example, 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y.

[0326] In some embodiments, one of the first type epitaxial layer and the second type epitaxial layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer, and the N-type cladding layer is formed on the doped N-type contact layer. The material of the N-type cladding layer is Al. x In 1-x P, where x ranges from 0.1 to 0.5, for example, x is 0.5. Furthermore, in these embodiments, the thickness of the N-type cladding layer is no greater than 350 nm, for example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e⁻¹. 17 cm -3 up to 1e 18 cm -3 The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e⁻¹. 18cm -3 up to 1e 19 cm -3 In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al). x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer is 50 nm to 75 nm, for example, 65 nm.

[0327] In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light-emitting layer, and the doped P-type contact layer is formed on the P-type cladding layer. In some embodiments, the material of the P-type cladding layer is Al. x In 1-x P, where x is 0.3 to 0.5, for example, x is 0.5. In such embodiments, the thickness of the P-type cladding layer is no greater than 380 nm, for example, the thickness of the P-type cladding layer is 360 nm. In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is 10 nm to 30 nm, for example, 20 nm.

[0328] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed under the P-type cladding layer, a first-doped P-type transition layer formed on the P-type cladding layer, and a second-doped P-type transition layer formed on the first-doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al). x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer is 50 nm to 70 nm, for example, 65 nm.

[0329] In some embodiments, the material of the first doped P-type transition layer is (Al) x Ga 1-x ) y In 1-yP, where x ranges from 0.1 to 0.3 and y ranges from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times x. In some embodiments, the thickness of the first doped P-type transition layer is 20 nm to 40 nm, for example, 30 nm.

[0330] In some embodiments, the material of the second doped P-type transition layer is Al. x Ga 1-x As, where x ranges from 0.5 to 0.9, for example, x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is from 10 nm to 30 nm, for example, 20 nm.

[0331] In some embodiments, the doping concentration of the second-doped P-type transition layer is greater than the doping density of the first-doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times that of the second-doped P-type transition layer.

[0332] In some embodiments, the doping concentration of the doped P-type contact layer is greater than the doping concentration of the second-doped P-type transition layer. Furthermore, in some embodiments, the doping concentration of the second-doped P-type transition layer is 2 to 4 times that of the first-doped P-type transition layer.

[0333] For example, the doping concentration of the first doped P-type transition layer is greater than 1e. 18 cm -3 The doping density of the second-doped P-type transition layer is 2e 18 cm -3 -4e 18 cm -3 Within the range, the doping density of the doped P-type contact layer is greater than 5e 18 cm -3 .

[0334] The current spreading structure 303 can reflect the light emitted by the micro LED, thereby significantly increasing the total light output. Simultaneously, the current spreading structure 303 can also isolate light, preventing optical crosstalk between adjacent LEDs. By arranging the current spreading structure 303 to electrically surround the micro LED and electrically connect it to the top conductive layer 307, the electrical contact area between the current spreading structure 303 and the micro LED can be significantly increased. This allows the active layer (light-emitting layer) of the micro LED to emit light more uniformly, effectively preventing light emission only at or near the electrical contact area or excessively high brightness at or near the electrical contact area.

[0335] Figure 11 A top view schematic diagram of the current extension structure of a third type of micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 11 As shown, the bottoms of adjacent current extension structures 303 are connected, and all current extension structures are connected into a whole. Figure 11 In this embodiment, the top view (i.e., cross-sectional shape) of the micro-LED is circular, and the top view of the overall current expansion structure is the grid shape remaining after removing the circle. In one embodiment, the top view of the micro-LED may also be other suitable shapes, such as rectangles, squares, or regular polygons, and the top view of the overall current expansion structure is correspondingly the shape remaining after removing other suitable shapes, such as the grid shape remaining after removing rectangles, squares, or polygons. Figure 10 As shown, the longitudinal cross-sections of adjacent current extension structures exhibit a bifurcated peak shape. In one embodiment, the longitudinal cross-sectional shapes of adjacent current extension structures are asymmetrical, and their heights may differ; this is not a limitation.

[0336] In one embodiment, the material of the current spreading structure is one or more alloys of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0337] Figure 10 In this embodiment, the lateral dimension of the bottom of the microlens 302 is larger than the lateral dimension of the light-emitting area of ​​the micro-LED. In some embodiments, the lateral dimension of the bottom of the microlens 302 may be equal to the lateral dimension of the light-emitting area of ​​the micro-LED.

[0338] In some embodiments, a microlens 302 can cover multiple lensless micro-light-emitting diodes (LEDs). Multiple microlenses constitute a microlens array. The microlens array is disposed above the array of micro-LEDs, wherein at least one microlens is disposed on the surface of the top conductive layer of the micro-LEDs, and the horizontal profile of the microlens is larger than the maximum horizontal profile of the micro-LEDs. The microlenses are primarily used to converge and / or collimate light rays; for example, the focal point of the microlens can be located within the light-emitting mesa of the micro-LEDs by adjusting parameters such as the thickness and curvature of the microlenses. The microlenses in the microlens array are typically identical. Examples of microlenses include spherical microlenses, aspherical microlenses, Fresnal microlenses, and cylindrical microlenses. Figure 10 As shown, in one embodiment, the microlens 302 includes an upper curvature portion 3021 and a lower spacer portion 3022. In one embodiment, the typical shape of the lower spacer portion of each microlens 302 includes a circle, a square, a rectangle, and a hexagon. The individual microlenses in the microlens array of the display panel may be the same or different in terms of shape, curvature, optical power, size, base, and spacing.

[0339] In one embodiment, the centers of curvature of the sidewalls of the lower spacer do not coincide with the centers of curvature of the upper curvature portion. The thickness of the lower spacer is set such that the focal point of the microlens is located in the light-emitting platform of the micro-LED. In one embodiment, the height of the lower spacer of the microlens is 0.2 to 3 micrometers, and / or the height of the upper curvature portion of the microlens is 0.5 to 2 micrometers, and / or the spherical width of the microlens is 3 to 4 micrometers. In yet another embodiment, the microlens may, for example, be a perfect hemisphere.

[0340] In some embodiments, the microlens 302 may be a curved hemispherical shape. In some embodiments, the height of the microlens 302 is no greater than 2 micrometers. In some embodiments, the height of the microlens 302 is no greater than 1 micrometer. In some embodiments, the height of the microlens 302 is no greater than 0.5 micrometers. In some embodiments, the width of the microlens 302 is no greater than 4 micrometers. In some embodiments, the width of the microlens 302 is no greater than 3 micrometers. In some embodiments, the width of the microlens 302 is no greater than 2 micrometers. In some embodiments, the width of the microlens 302 is no greater than 1 micrometer. In some embodiments, the width-to-height ratio of the microlens 302 is greater than 1.5.

[0341] In some embodiments, the microlens 302 may be made of various materials that are transparent to light of various wavelengths emitted by the micro-light-emitting diode. Exemplary transparent materials for the microlens 302 include polymers and dielectric materials. In some embodiments, the dielectric material includes one or more materials such as silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, aluminum oxide, etc. In some embodiments, the microlens 302 is made of photoresist. In some embodiments, the microlens is deposited directly on the surface of the micro-light-emitting diode using chemical vapor deposition (CVD) technology.

[0342] In some embodiments, the micro-LED array may include blue micro-LEDs. In some embodiments, the spacing between the micro-LED arrays, i.e., the minimum center-to-center distance between the micro-LEDs, may be between about 2 micrometers and about 50 micrometers. In some embodiments, the number of pixels on the micro-LED chip may be between thousands and millions.

[0343] In one embodiment of the present invention, a third display panel is also provided, which includes the aforementioned third type of micro light-emitting diode display chip.

[0344] Next, the fourth type of miniature light-emitting diode chip and display panel will be described.

[0345] Figure 12 A top view schematic diagram of a fourth type of micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 12It includes a miniature light-emitting diode 401, a microlens 402, and a current-expanding structure 403. Figure 13 A longitudinal cross-sectional schematic diagram of a fourth type of micro LED chip according to an embodiment of the present invention is shown. As shown, the fourth type of micro LED chip includes a driving module, micro LEDs 401, a current spreading structure 403, and a microlens 402. The driving module includes a driving backplate 408 and a bonding layer 410. The micro LEDs 401 are disposed on the upper surface of the driving module and include a light-emitting mesa. The current spreading structure 403 is located between the micro LEDs 401 and is arranged to surround the micro LEDs 401 in an electrical contact manner. Figure 13 As shown, microlenses 402 are arranged on the upper surface of the micro-light-emitting diodes (LEDs). Adjacent microlenses 402 are connected between the micro-LEDs 401, and the sides of adjacent microlenses 402 are separated to form gaps, which constitute a closed air gap 4023. In one embodiment, the air gap 4023 is an air gap, which is a deposition defect in the microlens material. The longitudinal section of the air gap 4023 can be rectangular, circular, elliptical, crescent-shaped, or irregularly elongated.

[0346] Each micro-LED chip has a size not exceeding 1 cm, preferably not exceeding 5 mm. The micro-LEDs are formed in an array within the micro-LED display chip, with resolutions such as 720*480, 640*480, 1920*1080, 1280*720, 2K, or 4K. The diameter of the micro-LED structure is in the nanometer range, for example, 20 nm to 100 nm. Each micro-LED can form at least a portion of the pixel elements on the micro-LED display chip.

[0347] For convenience, "upward" is used to indicate away from the driving backplane 408, "downward" indicates towards the driving backplane 408, and other directional terms such as top, bottom, above, below, directly below, and under are also interpreted accordingly. In one embodiment, the driving backplane 408 includes a substrate, driving circuitry, and driving electrodes 409. Each micro-LED corresponds to one driving electrode, and the driving electrode 409 is electrically connected to the bonding layer 410. In one embodiment, the material of the driving electrode is one or more alloys of the following metals: Al, Cu, and Au. In one embodiment, the substrate is a Si substrate. In another embodiment, the substrate is a transparent substrate, such as a glass substrate. Examples of other substrates include GaAs, GaP, InP, SiC, ZnO, and sapphire substrates. In some embodiments, the substrate is approximately 700 micrometers thick. The driving circuitry forms individual pixel drivers to control the operation of individual pixel LED devices. The driving circuitry includes, for example, complementary metal oxide semiconductor (CMOS) devices or TFT devices. In one embodiment, the micro-LED can be bonded to the surface of the driving backplane 408 via a bonding layer 410, which can be achieved through eutectic bonding, thermo-press bonding, and transient liquid phase (TLP) bonding. In one embodiment, the bonding layer 410 can be disposed on the driving backplane 408. In another embodiment, the bonding layer 410 is grown on the driving backplane 408. In one embodiment, the thickness of the bonding layer 410 is 0.1 micrometers to 3 micrometers. In a preferred embodiment, the thickness of the bonding layer 410 is 0.6 micrometers. In some embodiments, the bonding layer 410 may include two metal layers. The material of the bonding layer 410 may be, for example, an alloy of one or more of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn. In some embodiments, the bonding layer 410 may also function as a reflector to reflect light emitted from the LED structure above.

[0348] In some embodiments, the driving backplane 408 may be an integrated circuit (IC) board. The micro-LEDs are electrically connected to the driving backplane 408, which controls the lighting and extinguishing of the micro-LEDs. In some embodiments, the IC board may be electrically connected to each micro-LED in the micro-LED array via separate metal interconnects. In some embodiments, each micro-LED may be individually electrically controlled by the IC board. In some embodiments, the IC board may be electrically connected to the electrodes of the micro-LED display chip via metal interconnects. In some embodiments, a dielectric layer may be formed in the gaps between the micro-LEDs. In some embodiments, the dielectric layer may also be formed in the gaps between interconnects.

[0349] This miniature LED chip comprises multiple miniature LED arrays, each array containing multiple miniature LEDs. The driving method for these miniature LEDs is, for example, a passive matrix (PM) drive, where the cathodes of all the miniature LEDs in each array are connected to a common cathode line NL, while miniature LEDs with the same number in each array are connected to their respective anode lines PL. Thus, the on / off state and brightness of each LED can be individually controlled by adjusting the type of the corresponding cathode and anode lines.

[0350] In some embodiments, the micro-light-emitting diodes (LEDs) can be arranged in a regular or irregular manner on the upper surface of the driving module, serving as pixels of the micro-LED chip. The micro-LEDs include: a light-emitting mesa 405, an ohmic contact layer 404, a top conductive layer 407, and a passivation barrier layer 406. The ohmic contact layer 404 is located on the lower surface of the light-emitting mesa 405 and is electrically connected to the bonding layer 410. The top conductive layer 407 is located on the side and top surfaces of the light-emitting mesa 405 and is electrically connected to the current spreading structure 403. The passivation barrier layer 406 at least partially covers the side surfaces of the light-emitting mesa and is located between the light-emitting mesa 405 and the top conductive layer 407. In some embodiments, the passivation barrier layer 406 covers a portion of the top surface of the light-emitting mesa 405.

[0351] In some embodiments, the electrode polarity of the ohmic contact layer 404 is opposite to that of the top conductive layer 407. The ohmic contact layer 404 can be, for example, a P-electrode or an anode electrode, and the top conductive layer 407 can be an electrode with the opposite polarity to that of the ohmic contact layer 404, such as an N-electrode or a cathode electrode. In one embodiment, the ohmic contact layer, the top conductive layer, and their connecting components can be one or more combinations of graphene, indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), fluorine-doped tin oxide (FTO), or other transparent conductive oxides (TCO).

[0352] In one embodiment, adjacent top conductive layers are connected, and all top conductive layers are connected as a whole. In one embodiment, adjacent passivation isolation layers are connected, and all passivation isolation layers are connected as a whole. In one embodiment, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0353] In some embodiments, a top conductive layer may be formed on the top surface of the micro-LED array. In some embodiments, the top conductive layer may be shared by all micro-LEDs in the micro-LED array. In some embodiments, the light-emitting layer may include at least one quantum well layer. In some embodiments, the micro-LED array may include a single-layer micro-LED structure. In some embodiments, the micro-LED array may include a multi-layer vertically stacked micro-LED structure.

[0354] In one embodiment, the light-emitting mesa can be a trapezoidal platform, with the bottom lateral dimension being larger than the top lateral dimension. In one embodiment, the inclination angle of the sidewalls of the light-emitting mesa ranges from 60° to 85°. In one embodiment, the bottom lateral dimension of the light-emitting mesa does not exceed 3 micrometers. In one embodiment, the top lateral dimension of the light-emitting mesa does not exceed 1.5 micrometers. In one embodiment, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting mesa.

[0355] like Figure 13As shown, the light-emitting mesa 405 includes a first-type epitaxial layer 4052, a second-type epitaxial layer 4051, and a light-emitting layer 4053 located between them. The first-type epitaxial layer is electrically connected to the ohmic contact layer. The second-type epitaxial layer is electrically connected to the top conductive layer. In some embodiments, the light-emitting mesa of each micro-LED in the micro-LED array can be a micrometer-scale light-emitting mesa. In some embodiments, the micrometer-scale light-emitting mesa may include, from bottom to top, the first-type epitaxial layer, the light-emitting layer, and the second-type epitaxial layer. That is, in the three-layer structure, the first-type epitaxial layer is closest to the driving backplane 408; the light-emitting layer is located above the first-type epitaxial layer and further away from the driving backplane 408; the second-type epitaxial layer is located above the light-emitting layer and furthest away from the driving backplane 408. In some embodiments, the light-emitting layer is formed by a plurality of stacked quantum well layers, particularly superlattice stacked quantum well layers. Preferably, the superlattice stacked quantum well layers include multiple pairs of quantum well layers stacked with quantum barrier layers. In some embodiments, the first-type epitaxial layer is a semiconductor material having a first conductivity type and includes a plurality of semiconductor layers. The primary substrate material of the first type of light-emitting mesa may be, but is not limited to, materials such as Ga, N, As, P, In, or Al. Furthermore, the first type of epitaxial layer may, from top to bottom, include, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer; additionally, an ohmic contact layer may be formed below the window layer. In some embodiments, the second type of epitaxial layer is a semiconductor material having a second conductivity type and includes multiple semiconductor layers. The primary substrate material of the second type of epitaxial layer may be, but is not limited to, materials such as Ga, N, As, P, In, or Al. Furthermore, the second type of epitaxial layer may, from top to bottom, include, but is not limited to, a confinement layer and a waveguide layer; additionally, in some embodiments, an ohmic contact layer may be formed on the confinement layer. In one embodiment, the first conductivity type is different from the second conductivity type.

[0356] In some embodiments, the first type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer, and the second type of epitaxial layer is a P-type GaN layer or a P-type AlGaN layer. That is, the material of the second type of epitaxial layer can be a material layer of a second conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P, and the first type of epitaxial layer can be a material layer of a first conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P. In some embodiments, the light-emitting layer includes a multi-quantum-well layer and an electron-blocking layer. The multi-quantum-well layer is an InGaN / GaN multi-quantum-well layer, an InGaN / AlGaN multi-quantum-well layer, or an InGaAs / AlGaAs multi-quantum-well layer. In some embodiments, the light-emitting layer further includes an electron-blocking layer disposed on a first side of the light-emitting layer, the first side referring to the side along which electrons migrate out of the light-emitting layer. In another embodiment, the first type of epitaxial layer may also be a P-type GaN layer or a P-type AlGaN layer, and the second type of epitaxial layer may be an N-type GaN layer or an N-type AlGaN layer.

[0357] In some embodiments, the light-emitting layer includes at least one quantum well layer. The thickness of the quantum well layer is between 20 nm and 40 nm, for example, 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y.

[0358] In some embodiments, one of the first type epitaxial layer and the second type epitaxial layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer, and the N-type cladding layer is formed on the doped N-type contact layer. The material of the N-type cladding layer is Al. x In 1-x P, where x ranges from 0.1 to 0.5, for example, x is 0.5. Furthermore, in these embodiments, the thickness of the N-type cladding layer is no greater than 350 nm, for example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e⁻¹. 17 cm -3 up to 1e 18 cm -3 The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e⁻¹. 18cm -3 up to 1e 19 cm -3 In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al). x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer is 50 nm to 75 nm, for example, 65 nm.

[0359] In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light-emitting layer, and the doped P-type contact layer is formed on the P-type cladding layer. In some embodiments, the material of the P-type cladding layer is Al. x In 1-x P, where x is 0.3 to 0.5, for example, x is 0.5. In such embodiments, the thickness of the P-type cladding layer is no greater than 380 nm, for example, the thickness of the P-type cladding layer is 360 nm. In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is 10 nm to 30 nm, for example, 20 nm.

[0360] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed under the P-type cladding layer, a first-doped P-type transition layer formed on the P-type cladding layer, and a second-doped P-type transition layer formed on the first-doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al). x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer is 50 nm to 70 nm, for example, 65 nm.

[0361] In some embodiments, the material of the first doped P-type transition layer is (Al) x Ga 1-x ) y In 1-yP, where x ranges from 0.1 to 0.3 and y ranges from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times x. In some embodiments, the thickness of the first doped P-type transition layer is 20 nm to 40 nm, for example, 30 nm.

[0362] In some embodiments, the material of the second doped P-type transition layer is Al. x Ga 1-x As, where x ranges from 0.5 to 0.9, for example, x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is from 10 nm to 30 nm, for example, 20 nm.

[0363] In some embodiments, the doping concentration of the second-doped P-type transition layer is greater than the doping density of the first-doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times that of the second-doped P-type transition layer.

[0364] In some embodiments, the doping concentration of the doped P-type contact layer is greater than the doping concentration of the second-doped P-type transition layer. Furthermore, in some embodiments, the doping concentration of the second-doped P-type transition layer is 2 to 4 times that of the first-doped P-type transition layer.

[0365] For example, the doping concentration of the first doped P-type transition layer is greater than 1e. 18 cm -3 The doping density of the second-doped P-type transition layer is 2e 18 cm -3 -4e 18 cm -3 Within the range, the doping density of the doped P-type contact layer is greater than 5e 18 cm -3 .

[0366] The current spreading structure 403 can reflect the light emitted by the micro LED, thereby significantly increasing the total light emission. Simultaneously, the current spreading structure 403 can also isolate light, preventing optical crosstalk between adjacent LEDs. By arranging the current spreading structure 403 to electrically surround the micro LED and electrically connect it to the top conductive layer 407, the electrical contact area between the current spreading structure 403 and the micro LED can be significantly increased. This allows the active layer (light-emitting layer) of the micro LED to emit light more uniformly, effectively preventing light emission only at or near the electrical contact area or excessively high brightness at or near the electrical contact area.

[0367] Figure 14 A top view schematic diagram of the current extension structure of a fourth type of micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 14 As shown, the bottoms of adjacent current extension structures 403 are connected, and all current extension structures are connected into a whole. Figure 14 In this embodiment, the top view (i.e., cross-sectional shape) of the micro-LED is circular, and the top view of the overall current expansion structure is the grid shape remaining after removing the circle. In one embodiment, the top view of the micro-LED may also be other suitable shapes, such as rectangles, squares, or regular polygons, and the top view of the overall current expansion structure is correspondingly the shape remaining after removing other suitable shapes, such as the grid shape remaining after removing rectangles, squares, or polygons. Figure 13 As shown, the longitudinal cross-sections of adjacent current extension structures exhibit a bifurcated peak shape. In one embodiment, the longitudinal cross-sectional shapes of adjacent current extension structures are asymmetrical, and their heights may differ; this is not a limitation.

[0368] In one embodiment, the material of the current spreading structure is one or more alloys of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0369] Figure 13 In this embodiment, the lateral dimension of the bottom of the microlens 402 is larger than the lateral dimension of the light-emitting area of ​​the micro-LED. In some embodiments, the lateral dimension of the bottom of the microlens 402 may be equal to the lateral dimension of the light-emitting area of ​​the micro-LED.

[0370] In some embodiments, a microlens 402 can cover multiple lensless micro-light-emitting diodes (LEDs). Multiple microlenses constitute a microlens array. The microlens array is disposed above the array of micro-LEDs, wherein at least one microlens is disposed on the surface of the top conductive layer of the micro-LEDs, and the horizontal profile of the microlens is larger than the maximum horizontal profile of the micro-LEDs. The microlenses are primarily used to converge and / or collimate light rays; for example, the focal point of the microlens can be located within the light-emitting mesa of the micro-LEDs by adjusting parameters such as the thickness and curvature of the microlenses. The microlenses in the microlens array are typically identical. Examples of microlenses include spherical microlenses, aspherical microlenses, Fresnal microlenses, and cylindrical microlenses. Figure 2 As shown, in one embodiment, the microlens 402 includes an upper curvature portion 4021 and a lower spacer portion 4022. In one embodiment, the typical shape of the lower spacer portion of each microlens 402 includes a circle, a square, a rectangle, and a hexagon. The individual microlenses in the microlens array of the display panel may be the same or different in terms of shape, curvature, optical power, size, base, and spacing.

[0371] In one embodiment, the centers of curvature of the sidewalls of the lower spacer do not coincide with the centers of curvature of the upper curvature portion. The thickness of the lower spacer is set such that the focal point of the microlens is located in the light-emitting platform of the micro-LED. In one embodiment, the height of the lower spacer of the microlens is 0.2 to 3 micrometers, and / or the height of the upper curvature portion of the microlens is 0.5 to 2 micrometers, and / or the spherical width of the microlens is 3 to 4 micrometers. In yet another embodiment, the microlens may, for example, be a perfect hemisphere.

[0372] In some embodiments, the microlens 402 may be a curved hemispherical shape. In some embodiments, the height of the microlens 402 is no greater than 2 micrometers. In some embodiments, the height of the microlens 402 is no greater than 1 micrometer. In some embodiments, the height of the microlens 402 is no greater than 0.5 micrometers. In some embodiments, the width of the microlens 402 is no greater than 4 micrometers. In some embodiments, the width of the microlens 402 is no greater than 3 micrometers. In some embodiments, the width of the microlens 402 is no greater than 2 micrometers. In some embodiments, the width of the microlens 402 is no greater than 1 micrometer. In some embodiments, the width-to-height ratio of the microlens 402 is greater than 1.5.

[0373] The sides of adjacent microlenses 402 are separated to form gaps, which constitute closed air gaps. Typical shapes of the longitudinal section of the air gap include circular, square, rectangular, hexagonal, elliptical, crescent-shaped, or irregular elongated shapes.

[0374] In some embodiments, the microlens 402 may be made of various materials that are transparent to light of various wavelengths emitted by the micro-light-emitting diode. Exemplary transparent materials for the microlens 402 include polymers and dielectric materials. In some embodiments, the dielectric material includes one or more materials such as silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, aluminum oxide, etc. In some embodiments, the microlens 402 is made of photoresist. In some embodiments, the microlens is deposited directly on the surface of the micro-light-emitting diode using chemical vapor deposition (CVD) technology.

[0375] In some embodiments, the micro-LED array may include blue micro-LEDs. In some embodiments, the spacing between the micro-LED arrays, i.e., the minimum center-to-center distance between the micro-LEDs, may be between about 2 micrometers and about 50 micrometers. In some embodiments, the number of pixels on the micro-LED chip may be between thousands and millions.

[0376] In one embodiment of the present invention, a fourth display panel is also provided, which includes the aforementioned fourth micro light-emitting diode display chip.

[0377] Finally, the fifth type of miniature light-emitting diode chip and display panel is described.

[0378] Figure 15 A top view schematic diagram of a fifth type of micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 15 It includes a miniature light-emitting diode 501, a microlens 502, and a current-expanding structure 503. Figure 16 A longitudinal cross-sectional schematic diagram of a fifth type of micro-light-emitting diode (LED) chip according to an embodiment of the present invention is shown. As shown, the fifth type of micro-LED chip includes a driving module, a micro-LED 501, a current spreading structure 503, and a microlens 502. The driving module includes a driving backplate 508 and a bonding layer 510. The micro-LED 501 is disposed on the upper surface of the driving module and includes a light-emitting mesa. The current spreading structure 503 is located between the micro-LEDs 501 and is arranged to surround the micro-LEDs 501 in an electrical contact manner. Figure 16 As shown, a microlens 502 is arranged on the upper surface of the micro light-emitting diode. Adjacent microlenses 502 are connected between micro light-emitting diodes 501. The sides of adjacent microlenses 502 are separated to form a gap. The interior of the microlens 502 contains a closed air gap 5023, which is located between the light-emitting platform and the current expansion structure.

[0379] Each micro-LED chip has a size not exceeding 1 cm, preferably not exceeding 5 mm. The micro-LEDs are formed in an array within the micro-LED display chip, with resolutions such as 720*480, 640*480, 1920*1080, 1280*720, 2K, or 4K. The diameter of the micro-LED structure is in the nanometer range, for example, 20 nm to 100 nm. Each micro-LED can form at least a portion of the pixel elements on the micro-LED display chip.

[0380] For convenience, "upward" is used to indicate away from the driving backplane 508, "downward" indicates towards the driving backplane 508, and other directional terms such as top, bottom, above, below, directly below, and under are also interpreted accordingly. In one embodiment, the driving backplane 508 includes a substrate, driving circuitry, and driving electrodes 509. Each micro-LED corresponds to one driving electrode, and the driving electrode 509 is electrically connected to the bonding layer 510. In one embodiment, the material of the driving electrode is one or more alloys of the following metals: Al, Cu, and Au. In one embodiment, the substrate is a Si substrate. In another embodiment, the substrate is a transparent substrate, such as a glass substrate. Examples of other substrates include GaAs, GaP, InP, SiC, ZnO, and sapphire substrates. In some embodiments, the substrate is approximately 700 micrometers thick. The driving circuitry forms individual pixel drivers to control the operation of individual pixel LED devices. The driving circuitry includes, for example, complementary metal oxide semiconductor (CMOS) devices or TFT devices. In one embodiment, the micro-LED can be bonded to the surface of the driving backplane 508 via a bonding layer 510, which can be achieved through eutectic bonding, thermo-press bonding, and transient liquid phase (TLP) bonding. In one embodiment, the bonding layer 510 can be disposed on the driving backplane 508. In another embodiment, the bonding layer 510 is grown on the driving backplane 508. In one embodiment, the thickness of the bonding layer 510 is 0.1 micrometers to 3 micrometers. In a preferred embodiment, the thickness of the bonding layer 510 is 0.6 micrometers. In some embodiments, the bonding layer 510 may include two metal layers. The material of the bonding layer 510 may be, for example, an alloy of one or more of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn. In some embodiments, the bonding layer 510 may also function as a reflector to reflect light emitted from the LED structure above.

[0381] In some embodiments, the driving backplane 508 may be an integrated circuit (IC) board. The micro-LEDs are electrically connected to the driving backplane 508, which controls the lighting and extinguishing of the micro-LEDs. In some embodiments, the IC board may be electrically connected to each micro-LED in the micro-LED array via separate metal interconnects. In some embodiments, each micro-LED may be individually electrically controlled by the IC board. In some embodiments, the IC board may be electrically connected to the electrodes of the micro-LED display chip via metal interconnects. In some embodiments, a dielectric layer may be formed in the gaps between the micro-LEDs. In some embodiments, the dielectric layer may also be formed in the gaps between interconnects.

[0382] This miniature LED chip comprises multiple miniature LED arrays, each array containing multiple miniature LEDs. The driving method for these miniature LEDs is, for example, a passive matrix (PM) drive, where the cathodes of all the miniature LEDs in each array are connected to a common cathode line NL, while miniature LEDs with the same number in each array are connected to their respective anode lines PL. Thus, the on / off state and brightness of each LED can be individually controlled by adjusting the type of the corresponding cathode and anode lines.

[0383] In some embodiments, the micro-light-emitting diodes (LEDs) can be arranged in a regular or irregular manner on the upper surface of the driving module, serving as pixels of the micro-LED chip. The micro-LEDs include: a light-emitting mesa 505, an ohmic contact layer 504, a top conductive layer 507, and a passivation barrier layer 506. The ohmic contact layer 504 is located on the lower surface of the light-emitting mesa 505 and is electrically connected to the bonding layer 510. The top conductive layer 507 is located on the side and top surfaces of the light-emitting mesa 505 and is electrically connected to the current spreading structure 503. The passivation barrier layer 506 at least partially covers the side surfaces of the light-emitting mesa and is located between the light-emitting mesa 505 and the top conductive layer 507. In some embodiments, the passivation barrier layer 506 covers a portion of the top surface of the light-emitting mesa 505.

[0384] In some embodiments, the electrode polarity of the ohmic contact layer 504 is opposite to that of the top conductive layer 507. The ohmic contact layer 504 can be, for example, a P-electrode or an anode electrode, and the top conductive layer 507 can be an electrode with the opposite polarity to that of the ohmic contact layer 504, such as an N-electrode or a cathode electrode. In one embodiment, the ohmic contact layer, the top conductive layer, and their connecting components can be one or more combinations of graphene, indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), fluorine-doped tin oxide (FTO), or other transparent conductive oxides (TCO).

[0385] In one embodiment, adjacent top conductive layers are connected, and all top conductive layers are connected as a whole. In one embodiment, adjacent passivation isolation layers are connected, and all passivation isolation layers are connected as a whole. In one embodiment, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0386] In some embodiments, a top conductive layer may be formed on the top surface of the micro-LED array. In some embodiments, the top conductive layer may be shared by all micro-LEDs in the micro-LED array. In some embodiments, the light-emitting layer may include at least one quantum well layer. In some embodiments, the micro-LED array may include a single-layer micro-LED structure. In some embodiments, the micro-LED array may include a multi-layer vertically stacked micro-LED structure.

[0387] In one embodiment, the light-emitting mesa can be a trapezoidal platform, with the bottom lateral dimension being larger than the top lateral dimension. In one embodiment, the inclination angle of the sidewalls of the light-emitting mesa ranges from 60° to 85°. In one embodiment, the bottom lateral dimension of the light-emitting mesa does not exceed 3 micrometers. In one embodiment, the top lateral dimension of the light-emitting mesa does not exceed 1.5 micrometers. In one embodiment, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting mesa.

[0388] like Figure 16As shown, the light-emitting mesa 505 includes a first-type epitaxial layer 5052, a second-type epitaxial layer 5051, and a light-emitting layer 5053 located between them. The first-type epitaxial layer is electrically connected to the ohmic contact layer. The second-type epitaxial layer is electrically connected to the top conductive layer. In some embodiments, the light-emitting mesa of each micro-LED in the micro-LED array can be a micrometer-scale light-emitting mesa. In some embodiments, the micrometer-scale light-emitting mesa may include, from bottom to top, a first-type epitaxial layer, a light-emitting layer, and a second-type epitaxial layer. That is, in the three-layer structure, the first-type epitaxial layer is closest to the driving backplane 508; the light-emitting layer is located above the first-type epitaxial layer and further away from the driving backplane 508; the second-type epitaxial layer is located above the light-emitting layer and furthest away from the driving backplane 508. In some embodiments, the light-emitting layer is formed by a plurality of stacked quantum well layers, particularly superlattice stacked quantum well layers. Preferably, the superlattice stacked quantum well layers include multiple pairs of quantum well layers stacked with quantum barrier layers. In some embodiments, the first-type epitaxial layer is a semiconductor material having a first conductivity type and includes a plurality of semiconductor layers. The primary substrate material of the first type of light-emitting mesa may be, but is not limited to, materials such as Ga, N, As, P, In, or Al. Furthermore, the first type of epitaxial layer may, from top to bottom, include, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer; additionally, an ohmic contact layer may be formed below the window layer. In some embodiments, the second type of epitaxial layer is a semiconductor material having a second conductivity type and includes multiple semiconductor layers. The primary substrate material of the second type of epitaxial layer may be, but is not limited to, materials such as Ga, N, As, P, In, or Al. Furthermore, the second type of epitaxial layer may, from top to bottom, include, but is not limited to, a confinement layer and a waveguide layer; additionally, in some embodiments, an ohmic contact layer may be formed on the confinement layer. In one embodiment, the first conductivity type is different from the second conductivity type.

[0389] In some embodiments, the first type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer, and the second type of epitaxial layer is a P-type GaN layer or a P-type AlGaN layer. That is, the material of the second type of epitaxial layer can be a material layer of a second conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P, and the first type of epitaxial layer can be a material layer of a first conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P. In some embodiments, the light-emitting layer includes a multi-quantum-well layer and an electron-blocking layer. The multi-quantum-well layer is an InGaN / GaN multi-quantum-well layer, an InGaN / AlGaN multi-quantum-well layer, or an InGaAs / AlGaAs multi-quantum-well layer. In some embodiments, the light-emitting layer further includes an electron-blocking layer disposed on a first side of the light-emitting layer, the first side referring to the side along which electrons migrate out of the light-emitting layer. In another embodiment, the first type of epitaxial layer may also be a P-type GaN layer or a P-type AlGaN layer, and the second type of epitaxial layer may be an N-type GaN layer or an N-type AlGaN layer.

[0390] In some embodiments, the light-emitting layer includes at least one quantum well layer. The thickness of the quantum well layer is between 20 nm and 40 nm, for example, 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y.

[0391] In some embodiments, one of the first type epitaxial layer and the second type epitaxial layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer, and the N-type cladding layer is formed on the doped N-type contact layer. The material of the N-type cladding layer is Al. x In 1-x P, where x ranges from 0.1 to 0.5, for example, x is 0.5. Furthermore, in these embodiments, the thickness of the N-type cladding layer is no greater than 350 nm, for example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e⁻¹. 17 cm -3 up to 1e 18 cm -3 The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e⁻¹. 18cm -3 up to 1e 19 cm -3 In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al). x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer is 50 nm to 75 nm, for example, 65 nm.

[0392] In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light-emitting layer, and the doped P-type contact layer is formed on the P-type cladding layer. In some embodiments, the material of the P-type cladding layer is Al. x In 1-x P, where x is 0.3 to 0.5, for example, x is 0.5. In such embodiments, the thickness of the P-type cladding layer is no greater than 380 nm, for example, the thickness of the P-type cladding layer is 360 nm. In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is 10 nm to 30 nm, for example, 20 nm.

[0393] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed under the P-type cladding layer, a first-doped P-type transition layer formed on the P-type cladding layer, and a second-doped P-type transition layer formed on the first-doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al). x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer is 50 nm to 70 nm, for example, 65 nm.

[0394] In some embodiments, the material of the first doped P-type transition layer is (Al) x Ga 1-x ) y In 1-yP, where x ranges from 0.1 to 0.3 and y ranges from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times x. In some embodiments, the thickness of the first doped P-type transition layer is 20 nm to 40 nm, for example, 30 nm.

[0395] In some embodiments, the material of the second doped P-type transition layer is Al. x Ga 1-x As, where x ranges from 0.5 to 0.9, for example, x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is from 10 nm to 30 nm, for example, 20 nm.

[0396] In some embodiments, the doping concentration of the second-doped P-type transition layer is greater than the doping density of the first-doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times that of the second-doped P-type transition layer.

[0397] In some embodiments, the doping concentration of the doped P-type contact layer is greater than the doping concentration of the second-doped P-type transition layer. Furthermore, in some embodiments, the doping concentration of the second-doped P-type transition layer is 2 to 4 times that of the first-doped P-type transition layer.

[0398] For example, the doping concentration of the first doped P-type transition layer is greater than 1e. 18 cm -3 The doping density of the second-doped P-type transition layer is 2e 18 cm -3 -4e 18 cm -3 Within the range, the doping density of the doped P-type contact layer is greater than 5e 18 cm -3 .

[0399] The current extension structure 503 can reflect the light emitted by the micro LED, thereby significantly increasing the total light emission. Simultaneously, the current extension structure 503 can also isolate light, preventing optical crosstalk between adjacent LEDs. By arranging the current extension structure 503 to electrically surround the micro LED and connect it to the top conductive layer 507, the electrical contact area between the current extension structure 503 and the micro LED can be significantly increased. This allows the active layer (light-emitting layer) of the micro LED to emit light more uniformly, effectively preventing light emission only at or near the electrical contact area or excessively high brightness at or near the electrical contact area.

[0400] Figure 17 A top view schematic diagram of the current extension structure of a fifth type of micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 17 As shown, the bottoms of adjacent current extension structures 503 are connected, and all current extension structures are connected into a whole. Figure 17 In this embodiment, the top view (i.e., cross-sectional shape) of the micro-LED is circular, and the top view of the overall current expansion structure is the grid shape remaining after removing the circle. In one embodiment, the top view of the micro-LED may also be other suitable shapes, such as rectangles, squares, or regular polygons, and the top view of the overall current expansion structure is correspondingly the shape remaining after removing other suitable shapes, such as the grid shape remaining after removing rectangles, squares, or polygons. Figure 16 As shown, the longitudinal cross-sections of adjacent current extension structures exhibit a bifurcated peak shape. In one embodiment, the longitudinal cross-sectional shapes of adjacent current extension structures are asymmetrical, and their heights may differ; this is not a limitation.

[0401] In one embodiment, the material of the current spreading structure is one or more alloys of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0402] Figure 16 In this embodiment, the lateral dimension of the bottom of the microlens 502 is larger than the lateral dimension of the light-emitting area of ​​the micro-LED. In some embodiments, the lateral dimension of the bottom of the microlens 502 may be equal to the lateral dimension of the light-emitting area of ​​the micro-LED.

[0403] In some embodiments, a microlens 502 can cover multiple lensless micro-light-emitting diodes (LEDs). Multiple microlenses constitute a microlens array. The microlens array is disposed above the array of micro-LEDs, wherein at least one microlens is disposed on the surface of the top conductive layer of the micro-LEDs, and the horizontal profile of the microlens is larger than the maximum horizontal profile of the micro-LEDs. The microlenses are primarily used to converge and / or collimate light rays; for example, the focal point of the microlens can be located within the light-emitting mesa of the micro-LEDs by adjusting parameters such as the thickness and curvature of the microlenses. The microlenses in the microlens array are typically identical. Examples of microlenses include spherical microlenses, aspherical microlenses, Fresnal microlenses, and cylindrical microlenses. Figure 2 As shown, in one embodiment, the microlens 502 includes an upper curvature portion 5021 and a lower spacer portion 5022. In one embodiment, the typical shape of the lower spacer portion of each microlens 502 includes a circle, a square, a rectangle, and a hexagon. The individual microlenses in the microlens array of the display panel may be the same or different in terms of shape, curvature, optical power, size, base, and spacing.

[0404] In one embodiment, the centers of curvature of the sidewalls of the lower spacer do not coincide with the centers of curvature of the upper curvature portion. The thickness of the lower spacer is set such that the focal point of the microlens is located in the light-emitting platform of the micro-LED. In one embodiment, the height of the lower spacer of the microlens is 0.2 to 3 micrometers, and / or the height of the upper curvature portion of the microlens is 0.5 to 2 micrometers, and / or the spherical width of the microlens is 3 to 4 micrometers. In yet another embodiment, the microlens may, for example, be a perfect hemisphere.

[0405] In some embodiments, the microlens 502 may be a curved hemispherical shape. In some embodiments, the height of the microlens 502 is no greater than 2 micrometers. In some embodiments, the height of the microlens 502 is no greater than 1 micrometer. In some embodiments, the height of the microlens 502 is no greater than 0.5 micrometers. In some embodiments, the width of the microlens 502 is no greater than 4 micrometers. In some embodiments, the width of the microlens 502 is no greater than 3 micrometers. In some embodiments, the width of the microlens 502 is no greater than 2 micrometers. In some embodiments, the width of the microlens 502 is no greater than 1 micrometer. In some embodiments, the width-to-height ratio of the microlens 502 is greater than 1.5.

[0406] In some embodiments, the microlens 502 may be made of various materials that are transparent to light of various wavelengths emitted by the micro-light-emitting diode. Exemplary transparent materials for the microlens 502 include polymers and dielectric materials. In some embodiments, the dielectric material includes one or more materials such as silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, aluminum oxide, etc. In some embodiments, the microlens 402 is made of photoresist. In some embodiments, the microlens is deposited directly on the surface of the micro-light-emitting diode using chemical vapor deposition (CVD) technology.

[0407] The sides of adjacent microlenses 502 are separated to form a gap, which forms a closed air gap 5023, located between the light-emitting platform and the current expansion structure.

[0408] Figure 18 This diagram illustrates a top view of a fifth type of micro-light-emitting diode chip according to another embodiment of the present invention. The microlens 502 contains an air gap 5023, and at least one air gap 5023 is located above the bifurcation peak of the current spreading structure 503. Typical shapes of the longitudinal cross-section of the air gap include circular, square, rectangular, hexagonal, elliptical, crescent-shaped, or irregularly elongated shapes. The shapes of the air gap inside the microlens and the air gap above the bifurcation peak of the current spreading structure can be the same or different.

[0409] In some embodiments, the micro-LED array may include blue micro-LEDs. In some embodiments, the spacing between the micro-LED arrays, i.e., the minimum center-to-center distance between the micro-LEDs, may be between about 2 micrometers and about 50 micrometers. In some embodiments, the number of pixels on the micro-LED chip may be between thousands and millions.

[0410] In one embodiment of the present invention, a fifth display panel is also provided, which includes the aforementioned fifth micro light-emitting diode display chip.

[0411] Although various embodiments of the invention have been described above, it should be understood that they are presented by way of example only and not as limitations. It will be apparent to those skilled in the art that various combinations, modifications, and alterations can be made without departing from the spirit and scope of the invention. Therefore, the breadth and scope of the invention disclosed herein should not be limited by the exemplary embodiments disclosed above, but should be defined solely by the appended claims and their equivalents.

Claims

1. A miniature light-emitting diode chip, characterized in that, include: A miniature light-emitting diode array, the miniature light-emitting diode array comprising a plurality of miniature light-emitting diodes, wherein the miniature light-emitting diodes are configured to emit light, and the miniature light-emitting diodes include light-emitting mesa; as well as A microlens, wherein the microlens is disposed on the micro light-emitting diode, and wherein the microlens has a gap.

2. The micro light-emitting diode chip according to claim 1, characterized in that, Also includes: The driving module includes a driving backplane and a bonding layer; and A current-spreading structure is located between the miniature light-emitting diodes. The current-spreading structure is arranged to surround the miniature light-emitting diodes in an electrical contact manner.

3. The miniature light-emitting diode chip according to claim 1, characterized in that, The gap is located between the light-emitting platform and the current-expanding structure.

4. The micro light-emitting diode chip according to claim 1 or 2, characterized in that, At least one of the gaps is located between the bifurcation peaks of the current spreading structure.

5. The micro light-emitting diode chip according to claim 2, characterized in that, The driving backplane includes driving electrodes, with each micro LED corresponding to one driving electrode, and the driving electrodes are electrically connected to the bonding layer.

6. The miniature light-emitting diode chip according to claim 5, characterized in that, The material of the driving electrode is one or more alloys of the following metals: Al, Cu, and Au.

7. The micro light-emitting diode chip according to claim 2, characterized in that, The bonding layer is made of one or more alloys of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn.

8. The micro light-emitting diode chip according to claim 1 or 2, characterized in that, The miniature light-emitting diode also includes: An ohmic contact layer is located on the lower surface of the light-emitting platform and is electrically connected to the bonding layer. A top conductive layer, located on the side and top surfaces of the light-emitting platform, is electrically connected to the current-spreading structure; and A passivation barrier layer, which at least partially covers the side surface of the light-emitting platform and is located between the light-emitting platform and the top conductive layer.

9. The micro light-emitting diode chip according to claim 8, characterized in that, The electrode polarity of the ohmic contact layer is opposite to that of the electrode polarity of the top conductive layer.

10. The micro light-emitting diode chip according to claim 8, characterized in that, The adjacent top conductive layers are connected, and all the top conductive layers are connected as a whole.

11. The micro light-emitting diode chip according to claim 8, characterized in that, The adjacent passivation isolation layers are connected, and all the passivation isolation layers are connected into a whole.

12. The micro light-emitting diode chip according to claim 8, characterized in that, The passivation barrier layer is made of one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

13. The micro light-emitting diode chip according to claim 1, characterized in that, The bottom horizontal dimension of the light-emitting platform is greater than the top horizontal dimension.

14. The micro light-emitting diode chip according to claim 1, characterized in that, The tilt angle of the sidewall of the light-emitting platform ranges from 60° to 85°.

15. The micro light-emitting diode chip according to claim 1, characterized in that, The bottom lateral dimension of the light-emitting platform does not exceed 3 micrometers.

16. The miniature light-emitting diode chip according to claim 1, characterized in that, The top lateral dimension of the light-emitting platform does not exceed 1.5 micrometers.

17. The miniature light-emitting diode chip according to any one of claims 1-16, characterized in that, The lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting platform.

18. The micro light-emitting diode chip according to claim 1, characterized in that, The light-emitting mesa includes a first type of epitaxial layer, a second type of epitaxial layer, and a light-emitting layer located between the two.

19. The miniature light-emitting diode chip according to any one of claims 8-18, characterized in that, The first type of epitaxial layer is electrically connected to the ohmic contact layer; The second type of epitaxial layer is electrically connected to the top conductive layer.

20. The micro light-emitting diode chip according to claim 18, characterized in that, The first type of epitaxial layer is a material layer of the first conductivity type, which is composed of at least two or more elements including Ga, N, As, Al, In, and P; and the second type of epitaxial layer is a material layer of the second conductivity type, which is composed of at least two or more elements including Ga, N, As, Al, In, and P. The first conductivity type is different from the second conductivity type.

21. The micro light-emitting diode chip according to claim 18, characterized in that, The light-emitting layer includes a multi-quantum well layer and an electron blocking layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, or an InGaAs / AlGaAs multi-quantum well layer.

22. The micro light-emitting diode chip according to claim 2, characterized in that, The bottoms of adjacent current extension structures are connected, and all current extension structures are connected as a whole.

23. The micro light-emitting diode chip according to claim 2, characterized in that, The longitudinal cross-section of the adjacent current-spreading structures exhibits a bifurcated peak shape.

24. The micro light-emitting diode chip according to claim 2, characterized in that, The longitudinal cross-sectional shapes of adjacent current-extending structures are asymmetrical.

25. The micro light-emitting diode chip according to claim 2, characterized in that, The material of the current spreading structure is one or more alloys of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

26. The micro light-emitting diode chip according to claim 1, characterized in that, The microlens has an upper curvature portion and a lower spacer portion.

27. The miniature light-emitting diode chip according to claim 26, characterized in that, The lower spacer of the microlens has a height of 0.2 to 3 micrometers; and / or The height of the upper curvature portion of the microlens is 0.5 to 2 micrometers; and / or The spherical width of the microlens is 3 to 4 micrometers.

28. The micro light-emitting diode chip according to claim 1, characterized in that, The microlens is in the shape of a perfect hemisphere.

29. The micro light-emitting diode chip according to claim 1, characterized in that, The microlens is made of silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, or aluminum oxide.

30. A display panel, characterized in that, Includes a miniature light-emitting diode display chip according to any one of claims 1-29.

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