Light emitting display device

Abstract

An example of a light-emitting display device according to this disclosure includes a substrate, a driving element layer, a first planarization layer, a second planarization layer, an anode, a light-emitting layer, and a cathode. The substrate includes a plurality of pixels. The driving element layer is disposed on the substrate. The first planarization layer is disposed on the driving element layer, and the second planarization layer is disposed on the first planarization layer in each pixel. The anode is disposed on the second planarization layer. The light-emitting layer is disposed on the first planarization layer, the second planarization layer, and the anode. The cathode is disposed on the light-emitting layer.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit of Korean Patent Application No. 10-2024-0189206, filed on December 17, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to a light-emitting display device. Specifically, this disclosure relates to a bottom-emitting type light-emitting display device with micromirrors to improve light extraction efficiency. Background Technology

[0004] In display devices, light-emitting display devices can have the advantages of wide viewing angle, excellent contrast ratio, and fast response speed. The light-emitting element used in a light-emitting display device can have a light-emitting layer made of organic or inorganic materials between the anode and cathode.

[0005] In a light-emitting element, holes are supplied from the anode and electrons from the cathode. The electrons and holes then combine in the light-emitting layer to generate excitons. When the excitons transition from the excited state to the ground state, the fluorescent molecules in the light-emitting layer can emit light to exhibit color.

[0006] Some of the light emitted from the light-emitting layer of a light-emitting display device may not be emitted to the outside and may be lost due to total internal reflection within an electrode layer with a high refractive index, or due to total internal reflection occurring at the interface between the light-emitting layer and the electrode and / or the interface between the substrate and air. This can lead to a decrease in light extraction efficiency.

[0007] To overcome these problems, methods are being developed to improve the light extraction efficiency of light-emitting devices by forming microlens or microcavity structures within the device. However, while these structures improve the luminous efficiency of light emitted in the vertical direction of the display device, they cannot extract light emitted in the horizontal direction to the vertical direction. Therefore, existing methods have limitations in improving light extraction efficiency. Summary of the Invention

[0008] To address the aforementioned problems, one objective of this disclosure is to provide a bottom-emitting type light-emitting display device that maximizes light extraction efficiency by extracting light generated from the light-emitting layer that might otherwise be trapped inside the device and dissipated due to total internal reflection.

[0009] Another object of this disclosure is to provide a bottom-emitting type light-emitting display device that improves brightness and light extraction efficiency by arranging micromirror structures on the edge of the light-emitting area to maximize the area of ​​the light-emitting area.

[0010] Another object of this disclosure is to provide a bottom-emitting type light-emitting display device that improves light extraction efficiency and brightness per unit power consumption by extracting light that may be dissipated due to total internal reflection from the central portion of the anode.

[0011] Another object of this disclosure is to provide a bottom-emitting type light-emitting display device in which a groove structure is provided between pixels having a micromirror structure, thereby improving color purity by blocking lateral leakage current.

[0012] To achieve the above-described objectives of this disclosure, the light-emitting display device according to this disclosure includes a substrate, a driving element layer, a first planarization layer, a second planarization layer, an anode, a light-emitting layer, and a cathode. The substrate includes a plurality of pixels. The driving element layer is disposed on the substrate. The first planarization layer is disposed on the driving element layer, and the second planarization layer is disposed on the first planarization layer in each pixel. The anode is disposed on the second planarization layer. The light-emitting layer is disposed on the first planarization layer, the second planarization layer, and the anode. The cathode is disposed on the light-emitting layer.

[0013] In one example embodiment, the substrate further includes: a first pixel and a second pixel adjacent to each other; a first light-emitting diode disposed in the first pixel; a second light-emitting diode disposed in the second pixel; and a dummy anode disposed between the first light-emitting diode and the second light-emitting diode.

[0014] In one example embodiment, the light-emitting display device further includes at least one trench disposed between the first light-emitting diode and the second light-emitting diode.

[0015] In one example embodiment, the light-emitting display device further includes a trench recessed or recessed into a first planarization layer between the first light-emitting diode and the dummy anode.

[0016] The light-emitting display device according to this disclosure can have a structure in which almost all the light emitted from the light-emitting layer can be extracted to the outside without being captured and dissipated inside the device, thereby providing a bottom-emitting type light-emitting display device with maximized light extraction efficiency.

[0017] The light-emitting display device according to this disclosure can provide a bottom-emitting type light-emitting display device that minimizes the non-light-emitting area and improves the light extraction efficiency by arranging micromirrors (or reflectors) without using a dam covering the periphery of the pixel electrodes.

[0018] The light-emitting display device according to this disclosure can have a structure in which a high-refractive-index layer having a refractive index similar to that of the anode can be disposed below the anode, and a low-refractive-index layer can also be disposed below the anode. Therefore, a bottom-emitting type light-emitting display device with further enhanced light extraction efficiency can be provided by extracting light that might otherwise be lost due to total internal reflection within the central portion of the anode.

[0019] The light-emitting display device according to this disclosure can have a structure in which trenches are arranged between adjacent pixels, allowing the light-emitting layer to be separated for each pixel. Therefore, a bottom-emitting type light-emitting display device with improved color purity can be provided by blocking and / or eliminating lateral leakage current caused by the connection of the light-emitting layers.

[0020] The effects that can be obtained from this disclosure are not limited to those described above, and other effects not mentioned can be clearly understood by those skilled in the art to which this disclosure pertains from the above description. Attached Figure Description

[0021] The accompanying drawings, which are incorporated in and constitute a part of this application, are included to provide a further understanding of this disclosure and illustrate embodiments of the present disclosure, serving, together with the specification, to explain the principles of the disclosure. In the drawings:

[0022] Figure 1 This is a diagram illustrating a schematic structure of a light-emitting display device according to the present disclosure.

[0023] Figure 2 This is a circuit diagram illustrating the structure of a pixel included in an example of a light-emitting display device according to the present disclosure.

[0024] Figure 3 This is a plan view showing the arrangement structure of pixels in an example of a light-emitting display device according to the present disclosure.

[0025] Figure 4 It is along Figure 3 The enlarged cross-sectional view taken by line I-I' in the figure is used to illustrate the structure of a light-emitting display device according to an example of the present disclosure.

[0026] Figure 5 It is along Figure 3 The enlarged cross-sectional view taken by line II-II' in the diagram is used to illustrate the optical path in an example of a light-emitting display device according to the present disclosure.

[0027] Figure 6 It is along Figure 3 The section taken by line II-II' shows an enlarged cross-sectional view of the optical path in the light-emitting display device according to the first embodiment of the present disclosure.

[0028] Figure 7 It is along Figure 3 The enlarged cross-sectional view of the structure of the light-emitting display device according to the second embodiment of the present disclosure is shown by line II-II'.

[0029] Figure 8 It is along Figure 3The enlarged cross-sectional view of the structure of the light-emitting display device according to the third embodiment of the present disclosure is shown by line II-II'.

[0030] Figure 9 It is along Figure 3 The enlarged cross-sectional view of the structure of the light-emitting display device according to the fourth embodiment of the present disclosure is shown by line II-II'.

[0031] Figure 10 This is an enlarged plan view showing the structure of a light-emitting display device according to a fifth embodiment of the present disclosure. Detailed Implementation

[0032] The advantages and features of this disclosure, and its implementation methods, will be illustrated by the following embodiments described with reference to the accompanying drawings. However, this disclosure may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these exemplary embodiments are provided so that this disclosure is thorough and complete enough to assist those skilled in the art in fully understanding its scope. Furthermore, the scope of protection of this disclosure is defined by the claims and their equivalents.

[0033] The shapes, dimensions, ratios, angles, quantities, etc., shown in the drawings to describe various exemplary embodiments of this disclosure are given by way of example only. Therefore, this disclosure is not limited to the details shown. Unless otherwise stated, the same reference numerals refer to the same elements throughout the specification. In the following description, detailed descriptions of relevant known functions or configurations may be omitted where such detailed descriptions might unnecessarily obscure the essential points of this disclosure.

[0034] Reference will now be made in detail to exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings to refer to the same or similar parts. In the specification, it should be noted that whenever possible, the same reference numerals already used to denote the same elements in other drawings will be used for the same elements. In the following description, detailed descriptions of functions and configurations known to those skilled in the art that are not related to the basic configuration of the present disclosure will be omitted. The terminology described in the specification should be understood as follows.

[0035] In this specification, one or more additional elements may be added where terms such as “comprising,” “having,” “including,” etc., are used, unless a term such as “only” is used. Elements described in the singular are intended to include multiple elements, and vice versa, unless the context clearly indicates otherwise.

[0036] When interpreting a component, the component is interpreted as including a range of errors or tolerances, even if no explicit description of such range of errors or tolerances is provided.

[0037] In the description of various embodiments of this disclosure, when describing positional relationships, for example, when using terms such as "above," "over," "below," "on top," "below," "beside," "adjacent," etc., to describe the positional relationship between two parts, one or more other parts may be located between the two parts, unless more restrictive terms such as "immediately," "directly," or "closely" are used. For example, when an element or layer is disposed "on" another element or layer, a third layer or element may be inserted between them. Furthermore, if a first element is described as being "on" a second element, it does not necessarily mean that the first element is located above the second element in the drawing. The upper and lower parts of the object involved can change depending on the orientation of the object. Therefore, when a first element is described as being "on" a second element, depending on the orientation of the object, the first element may be located "below" or "above" the second element in the drawing or in actual configuration.

[0038] When describing temporal relationships, discontinuous situations may be included when the time sequence is described as such as "after", "following", "next", or "before", unless more restrictive terms such as "exactly", "immediately", or "directly" are used.

[0039] It should be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms, as they are not used to define a particular order. These terms are only used to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0040] In describing the various elements in this disclosure, terms such as first, second, A, B, (a), and (b) may be used. These terms are used only to distinguish one element from another and not to define a particular property, order, sequence, or number of elements. Where an element is described as “linked,” “connected,” or “joined” to another element, unless otherwise stated, the element may be directly or indirectly connected to that other element. It should be understood that one or more additional elements may be “inserted” between two elements described as “linked,” “joined,” or “joined” to each other.

[0041] More specifically, as used in this specification, the term "connection" is intended to be understood in the broadest possible sense. Specifically, the expression "A connected to B" includes both a direct connection (i.e., no intermediate parts or elements exist between A and B) and an indirect connection (i.e., one or more intermediate parts or elements exist between A and B). In other words, "A connected to B" includes both a direct physical or electrical connection and an indirect connection achieved through one or more intermediate parts. Unless otherwise expressly stated, these terms do not require direct physical or electrical contact. The terms "coupling" and "contact" should be interpreted in the same manner.

[0042] It should be understood that the term "at least one" should be interpreted as including any and all combinations of one or more of the associated listed items. For example, "at least one of the first element, the second element, and the third element" means all combinations of the three listed elements, combinations of any two of the three elements, and each of the individual first, second, and third elements.

[0043] The features of the various embodiments of this disclosure may be combined or integrated with each other in part or in whole, and as will be fully understood by those skilled in the art, may operate differently from each other and be technically driven. The embodiments of this disclosure may be performed independently of each other, or may be performed together in an interdependent relationship.

[0044] In the following, examples of display devices according to this disclosure will be described in detail with reference to the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings to refer to the same or similar parts.

[0045] This disclosure will be described below with reference to the accompanying drawings. Figure 1 This is a diagram illustrating a schematic structure of a light-emitting display device according to the present disclosure. Figure 1 In this diagram, the X-axis refers to the direction parallel to the scan lines, the Y-axis refers to the direction of the data lines, and the Z-axis refers to the height of the display device.

[0046] Reference Figure 1 The light-emitting display device includes a substrate 110, a gate (or scan) driver 200, a pad portion 300, a source driver IC (integrated circuit) 410, a flexible circuit film 430, a circuit board 450, and a timing controller 500.

[0047] The substrate 110 may include an electrically insulating material or a flexible material. The substrate 110 may be made of glass, metal, or plastic, but is not limited to these. When the light-emitting display device is a flexible display, the substrate 110 may be made of a flexible material such as plastic. For example, the substrate 110 may contain a transparent polyimide material.

[0048] The substrate 110 may include a display area AA and a non-display area NDA. The display area AA is the area used to display video images, and can be defined as most of the central area of ​​the substrate 110, but is not limited thereto. Multiple scan lines (or gate lines), multiple data lines, and multiple unit pixels UP can be formed or disposed within the display area AA. The unit pixels UP are arranged in a matrix. Each unit pixel UP may include multiple pixels P. Each pixel P includes both scan lines and data lines.

[0049] The non-display area NDA is the area where video images are not displayed, and it can be defined in the peripheral area of ​​the substrate 110 surrounding all or part of the display area AA. A gate driver 200 and a pad portion 300 may be formed or provided in the non-display area NDA.

[0050] The gate driver 200 can supply scan (or gate) signals to the scan line according to the gate control signal input from the timing controller 500 through the pad section 300. The gate driver 200 can be formed in a non-display area NDA outside the display area AA on the substrate 110 in an in-panel gate driver (GIP) type. The GIP type means that the gate driver 200 is formed directly on the substrate 110. For example, the gate driver 200 can be configured as a shift resistor, and the GIP type refers to a structure in which the transistor of the shift register of the gate driver 200 is formed directly on the substrate 110.

[0051] The pad portion 300 can supply data signals to the data lines according to data control signals input from the timing controller 500. The pad portion 300 can be formed as a driver chip and a flexible circuit film 430 can be mounted on it. The flexible circuit film 430 can be attached to a non-display area NDA at one edge of the display area AA of the substrate 110.

[0052] The source driver IC 410 can receive digital video data and source control signals from the timing controller 500. The source driver IC 410 can convert the digital video data into analog data voltages based on the source control signals and then supply them to the data lines. When the source driver IC 410 is manufactured as a chip, it can be mounted on the flexible circuit film 430 as a chip-on-film (COF) or chip-on-plastic (COP) type.

[0053] The flexible circuit film 430 may include multiple first connection lines connecting the pad portion 300 to the source driver IC 410, and multiple second connection lines connecting the pad portion 300 to the circuit board 450. The flexible circuit film 430 may be attached to the pad portion 300 using an anisotropic conductive film, so that the pad portion 300 can be connected to the first connection lines of the flexible circuit film 430.

[0054] Circuit board 450 can be attached to flexible circuit film 430. Circuit board 450 may include multiple circuits implemented as driver chips. For example, circuit board 450 may be a printed circuit board or a flexible printed circuit board.

[0055] The timing controller 500 can receive digital video data and timing signals from an external system board via cables from the circuit board 450. Based on the timing signals, the timing controller 500 can generate gate control signals for controlling the operating timing of the gate driver 200 and source control signals for controlling the source driver IC 410. The timing controller 500 can supply gate control signals to the gate driver 200 and source control signals to the source driver IC 410. Depending on the product type, the timing controller 500 and the source driver IC 410 can be integrated into a single chip and mounted on the substrate 110.

[0056] In the following text, refer to Figures 2 to 4 The preferred embodiments of this disclosure will be described below. Figure 2 This is a circuit diagram illustrating the structure of a pixel included in an example of a light-emitting display device according to the present disclosure. Figure 3 This is a plan view showing the arrangement structure of pixels in an example of a light-emitting display device according to the present disclosure.

[0057] Figure 4 It is along Figure 3 The enlarged cross-sectional view taken by line I-I' in the figure is used to illustrate the structure of a light-emitting display device according to an example of the present disclosure.

[0058] A pixel of a light-emitting display device may be defined by a scan line SL, a data line DL, and a drive current line (or high voltage line) VDD. Any pixel of the light-emitting display device may include a switching thin-film transistor ST, a driving thin-film transistor DT, a light-emitting diode OLE, and a capacitor Cst. A high-level voltage for driving the light-emitting diode OLE may be supplied to the drive current line VDD.

[0059] For example, a switching thin-film transistor ST can be positioned at the intersection of scan line SL and data line DL. The switching thin-film transistor ST may include a gate SG, a semiconductor layer SA, a source SS, and a drain SD. The gate SG can be connected to the scan line SL. The source SS can be connected to the data line DL, and the drain SD can be connected to the driving thin-film transistor DT. The semiconductor layer SA can be configured to overlap with the gate SG on the gate insulating layer GI. The portion of the semiconductor layer SA that overlaps with the gate SG can be defined as a channel region.

[0060] An intermediate insulating layer IL can be deposited on the semiconductor layer SA. Sources SS and drains SD can be formed on the intermediate insulating layer IL. The source SS can be connected to one side of the semiconductor layer SA via a contact hole formed in the intermediate insulating layer IL. The drain SD can be connected to the other side of the semiconductor layer SA via another contact hole formed in the intermediate insulating layer IL. The switching thin-film transistor ST can select the pixel P to be driven by applying a data signal to the driving thin-film transistor DT.

[0061] A driving thin-film transistor (TFT) DT can drive a light-emitting diode (LED) OLE of a pixel selected by a switching TFT ST. The driving TFT DT may include a gate DG, a semiconductor layer DA, a source DS, and a drain DD. The gate DG of the driving TFT DT can be connected to the drain SD of the switching TFT ST. For example, the gate DG of the driving TFT DT can be connected to the drain SD of the switching TFT ST via a drain contact hole DH through a gate insulating layer GI covering the gate DG. The drain DD can be connected to the drive current line VDD, and the source DS can be connected to the anode ANO of the LED OLE. A capacitor Cst can be disposed between the gate DG of the driving TFT DT and the anode ANO of the LED OLE.

[0062] An intermediate insulating layer IL can be deposited on the semiconductor layer DA. Source DS and drain DD can be formed on the intermediate insulating layer IL. Source DS can be connected to one side of the semiconductor layer DA via a contact hole formed in the intermediate insulating layer IL. Drain DD can be connected to the other side of the semiconductor layer DA via another contact hole formed in the intermediate insulating layer IL.

[0063] The driving thin-film transistor DT can be positioned between the driving current line VDD and the light-emitting diode OLE. The driving thin-film transistor DT can control the amount of current flowing from the driving current line VDD to the light-emitting diode OLE based on the magnitude of the voltage of the gate DG connected to the drain SD of the switching thin-film transistor ST.

[0064] An OLE (Optical Light Emitting Diode) may include an anode (ANO), an emissive layer (EL), and a cathode (CAT). The OLE emits light in response to a current controlled by a driving thin-film transistor (DT). Specifically, since the amount of emitted light can be adjusted according to the current controlled by the DT, the brightness of the light-emitting display device can be controlled. The anode (ANO) of the OLE can be connected to the source (DS) of the DT, and the cathode (CAT) can be connected to a low-voltage line (VSS) to which a low potential voltage is applied. The OLE can be driven by the difference between a low-potential voltage and a high-potential voltage controlled by the DT.

[0065] A passivation layer PAS is deposited on the surface of substrate 110, which has thin-film transistors ST and DT. The passivation layer PAS may contain inorganic materials, such as silicon oxide (SiO2). x ) or silicon nitride (SiN) x The layered structure from the gates SG and DG, and the scan line SL to the passivation layer PAS deposited on the substrate 110 can be referred to as the "driving element layer". The driving element layer may include thin-film transistors for driving the light-emitting diodes (OLEs) included in the "light-emitting element layer" formed on the driving element layer.

[0066] A color filter CF can be formed on the passivation layer PAS. The color filter CF can be set on each pixel P. For example, in each pixel P, the color filter CF can include any one of red, blue, and green. As another example, in each pixel, the color filter CF can include any one of red, blue, green, and white.

[0067] The first planarization layer PL1 can be deposited on the color filter CF. The first planarization layer PL1 can be a thin film used to plan the surface of the substrate 110 on which thin-film transistors ST and DT are formed. In order to make the height difference uniform, the first planarization layer PL1 can be formed of an organic material.

[0068] A second planarization layer PL2 can be formed on the first planarization layer PL1. The second planarization layer PL2 can have the same shape as the anode ANO but slightly larger in size. For example, the second planarization layer PL2 can be configured not to overlap with the scan line SL, data line DL, and drive current line VDD. The first planarization layer PL1 can be deposited to cover the entire top surface of the substrate 110. The second planarization layer PL2 can be patterned into separate islands (one island per pixel).

[0069] A pixel contact hole PH, used to expose a portion of the source DS of the driving thin-film transistor DT, can be formed through the passivation layer PAS, the color filter CF, the first planarization layer PL1, and the second planarization layer PL2. An anode ANO can be formed on the second planarization layer PL2. The anode ANO can be connected to the source DS of the driving thin-film transistor DT via the pixel contact hole PH. In the figures, some portions of the second planarization layer PL2 overlap with the driving thin-film transistor DT, the pixel contact hole PH, and the capacitor Cst. However, this is not a limitation; the second planarization layer PL2 may not overlap with the driving thin-film transistor DT, the pixel contact hole PH, and the capacitor Cst.

[0070] Depending on the light emission type of the LED (OLE), the anode (ANO) can be made of different materials. For bottom-emitting LEDs that emit light towards the substrate 110, the anode (ANO) can be formed of a transparent conductive material. For top-emitting LEDs that emit light upwards away from the substrate 110, the anode (ANO) can be formed of a metallic material with excellent light reflectivity. In this case, the anode (ANO) can have a structure consisting of a transparent conductive layer and a stacked metallic layer.

[0071] For bottom-emitting types, the anode ANO can be made of a transparent conductive material (TCO) or a semi-transparent conductive material. For example, the anode ANO can be made of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium zinc tin oxide (IZTO). Alternatively, the anode ANO can be made of a semi-transparent layer of magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag) with a thickness of less than 100 nm. The anode ANO can be referred to as the first electrode or the transparent electrode.

[0072] The light-emitting layer EL can be disposed on the anode ANO. The light-emitting layer EL can be continuously disposed on the entire upper surface of the substrate 110. The cathode CAT can be deposited on the light-emitting layer EL. The cathode CAT can be configured as a thin layer continuously deposited on the entire surface of the substrate 110. The stacked structure of the anode ANO, the light-emitting layer EL, and the cathode CAT can constitute a light-emitting diode (OLE).

[0073] The cathode CAT can be made of a metallic material with excellent light reflectivity. For example, the cathode CAT can be made of a material with a thickness of at least to The cathode (CAT) is formed from a metallic material with excellent light reflectivity (200 nm to 300 nm). Here, the metallic material with excellent light reflectivity may include aluminum (Al), magnesium (Mg), calcium (Ca), silver (Ag), or alloys of the aforementioned metals (e.g., an aluminum-magnesium alloy (AlMg)). For example, the CAT cathode may include a thin metallic layer with high reflectivity, such as a stack of aluminum and titanium (Ti / Al / Ti), a stack of aluminum and indium tin oxide (ITO / Al / ITO), a silver alloy, or a stack of silver alloy and indium tin oxide (ITO / Ag alloy / ITO). Here, the silver alloy may be an alloy of silver (Ag), palladium (Pd), and copper (Cu). The CAT cathode may be referred to as a second electrode, a reflective electrode, or a counter electrode.

[0074] A stacked structure of an anode (ANO), a light-emitting layer (EL), and a cathode (CAT) can constitute a light-emitting diode (OLE). The light-emitting display device according to this disclosure can have a structure in which each light-emitting diode (OLE) is disposed on a second planarization layer (PL2) patterned in a protruding island shape within a pixel (P).

[0075] The layer from the color filter CF set on the passivation layer PAS to the cathode CAT can be called the "light-emitting element layer".

[0076] Specifically, in each pixel P, the second planarization layer PL2 can be formed as an island with a predetermined thickness, and the anode ANO can be formed within the top surface of the second planarization layer PL2. The light-emitting layer EL can be deposited to cover the upper surface of the first planarization layer PL1, the etched sidewalls of the second planarization layer PL2, the edge of the top surface of the second planarization layer PL2, and the top surface of the anode ANO. The cathode CAT can also be deposited with the same contour as the light-emitting layer EL. Therefore, the cathode CAT can have a downward-facing cap (∩) shape. Since the cathode CAT can be made of a metallic material with excellent light reflectivity, the cathode CAT can have a structure that forms a cap-shaped micromirror around the planarization layer PL.

[0077] In the case of bottom-emitting display, due to the thin-film transistors ST and DT, capacitor Cst, scan line SL, data line DL, and drive current line VDD, the ratio of the aperture area to the pixel area may be relatively smaller than that of the top-emitting display. The light-emitting display device according to this disclosure can provide a structure equipped with micromirrors, so that even with a small aperture area, light generated from the light-emitting layer can be supplied undamaged to the substrate 110 placed below. In the following, reference is made to... Figure 5 This will explain the mechanism by which the light extraction efficiency is enhanced through micromirror. Figure 5 It is along Figure 3 The enlarged cross-sectional view taken by line II-II' in the diagram is used to illustrate the optical path in an example of a light-emitting display device according to the present disclosure.

[0078] Reference Figure 5 The optical path of light emitted from the light-emitting layer EL in the edge region of the anode ANO will be explained ①. Light emitted from the light-emitting layer EL can be transmitted as a spherical wave. In a cross-sectional view, light can be emitted in all directions of 360 degrees. Of this light, light emitted in the upward direction can be reflected by the cathode CAT and propagate downward. That is, most of all the light generated from the light-emitting layer EL can shine downward at 180 degrees. This light can be incident into the anode ANO. Since the anode ANO is made of a transparent conductive material, 60% to 70% of the light can pass through the anode ANO, through the color filter CF placed below, and be emitted to the outside of the substrate 110.

[0079] Furthermore, the anode ANO can be a transparent conductive material with a refractive index of 2.0 to 2.3. The upper surface of the anode ANO is in contact with the light-emitting layer EL, and the bottom surface is in contact with the planarization layer PL. The light-emitting layer EL and the planarization layer PL can have a refractive index of 1.3 to 1.5. Therefore, a structure can be formed in which an anode ANO with a high refractive index is inserted between two low refractive index layers. Thus, 30% to 40% of the light incident on the anode ANO, corresponding to total internal reflection conditions, may propagate horizontally (X-axis direction) within the anode ANO.

[0080] Depending on the material of the emitting layer EL, the refractive index of the emitting layer EL can be similar to that of the anode ANO. In this case, in the light emitted by the emitting layer EL, the light that is totally internally reflected at the interface between the anode ANO and the planarization layer PL may be trapped between the cathode CAT and the planarization layer PL, and therefore this light may propagate in the horizontal direction (X-axis direction).

[0081] Light propagating horizontally within the anode (ANO) or between the cathode (CAT) and the planarization layer (PL) can be emitted from the end of the anode (ANO) and reflected downwards by the cathode (CAT), which has a micromirror structure. Without the micromirror structure formed by the protrusions of the planarization layer (PL), the light may propagate horizontally and dissipate. However, with this structure, light can be extracted downwards through the micromirrors, thereby improving light extraction efficiency.

[0082] Here, to ensure that the light reflected by the cathode CAT with the micromirror structure can be properly emitted downwards, it is necessary to adjust the tilt angle of the cathode CAT deposited on the etched sidewall of the step where the planarization layer PL is formed. For example, the angle θ of the tilted surface of the cathode CAT relative to the horizontal surface of the substrate 110 can preferably be in the range of 40 degrees to 80 degrees. More preferably, the tilt angle θ can be in the range of 50 degrees to 75 degrees. Since the cathode CAT is deposited along the step shape formed between the first planarization layer PL1 and the second planarization layer PL2, the tilt angle θ of the cathode CAT can be substantially equal to the tilt angle θ' of the sidewall of the second planarization layer PL2 protruding from the first planarization layer PL1. Therefore, preferably, the tilt angle θ' between the top surface of the first planarization layer PL1 and the sidewall of the second planarization layer PL2 is formed to be 50 degrees to 75 degrees.

[0083] Next, the light path ② of the light emitted from the light-emitting layer EL in the central region of the anode ANO will be described. Using the same mechanism as described above, the light generated from the light-emitting layer EL can be directed downwards at a 180-degree angle. Since the anode ANO is made of a transparent conductive material, 60% to 70% of the light can pass through the anode ANO, through the color filter CF placed below, and then be emitted to the outside of the substrate 110.

[0084] However, of the light incident on the anode ANO, 30% to 40% that satisfies the total internal reflection condition may propagate horizontally (X-axis direction) within the anode ANO. Specifically, light generated in the central region of the pixel may undergo total internal reflection within the anode ANO, making the propagation path ② longer than the path ① described above. Therefore, before being emitted through the end of the anode ANO, it may dissipate as heat within the anode ANO. Generally, when light propagates a length greater than 20 μm within the anode ANO, the light may be dissipated or annihilated.

[0085] This disclosure may propose a structural feature for minimizing the amount of light lost due to total internal reflection within the anode ANO. For example, this disclosure may feature a second planarization layer PL2 in contact with the anode ANO, which is made of a transparent organic material with the same refractive index as the anode ANO or about 0.2 lower than the refractive index of the anode ANO.

[0086] Utilizing this feature, light generated from the light-emitting layer EL can be emitted in the same manner as in optical path ③. The light generated from the light-emitting layer EL can be directed downwards at a 180-degree angle using the same mechanism described above. Since the anode ANO can be made of a transparent conductive material, and the second planarization layer PL2 can have a refractive index similar to that of the anode ANO, 90% to 98% of the light can be transmitted through the anode ANO and the second planarization layer PL2. Since the first planarization layer PL1 can have a refractive index of 1.4 to 1.5, 60% to 70% of the light incident on the second planarization layer PL2 can pass through the first planarization layer PL1, through the color filter CF arranged below, and be emitted to the outside of the substrate 110.

[0087] However, of the light incident on the second planarization layer PL2, approximately 30% to 40% that satisfies the total internal reflection condition at the interface with the first planarization layer PL1 may be re-incident in the anode ANO and undergo another total internal reflection on the upper surface of the anode ANO. That is, this light may propagate in the horizontal direction (X-axis direction) within the anode ANO and the second planarization layer PL2.

[0088] Light in optical path ③ can be reflected within a total reflection space that is wider than that of optical paths ① and ②, including a second planarization layer PL2 with a thickness of 1μm to 1.5μm, significantly reducing the number of total reflections. Therefore, light emitted and totally reflected from the central region of a pixel can also be reflected by a cathode CAT with a micromirror structure and then emitted downwards.

[0089] The light-emitting display device according to this disclosure can improve light extraction efficiency by extracting light generated from the light-emitting layer EL through a second planarization layer PL2 protruding in an island shape and a cathode CAT having a micromirror structure due to the stepped shape of the planarization layer PL. Specifically, the second planarization layer PL2 can have a refractive index that is the same as or slightly lower than that of the anode ANO, and the first planarization layer PL1 disposed below the second planarization layer PL2 can be configured to have a low refractive index. Therefore, light that might otherwise be lost due to total internal reflection can be extracted to the outside of the substrate, thereby further improving the light extraction efficiency.

[0090] For example, the anode ANO can have a refractive index of 2.0 to 2.3. The second planarization layer PL2 can have a refractive index of 1.8 to 2.0, which is the same as that of the anode ANO or differs from it by about 0.2 or less. Meanwhile, the first planarization layer PL1 can have a refractive index of 1.3 to 1.5, which is more than 0.5 lower than the refractive index of the second planarization layer PL2.

[0091] The structural features of each pixel in the light-emitting display device according to this disclosure have been described above. Hereinafter, structural features for eliminating lateral leakage current between adjacent pixels will be described. Various structural features for eliminating lateral leakage current may exist, and therefore different embodiments can be described.

[0092] <First Embodiment>

[0093] In the following text, refer to Figure 6 The structure of the light-emitting display device according to the first embodiment of the present disclosure will be described. Figure 6 It is along Figure 3 The section taken by line II-II' shows an enlarged cross-sectional view of the optical path in the light-emitting display device according to the first embodiment of the present disclosure.

[0094] The light-emitting display device according to this disclosure can have a structure in which a second planarization layer PL2 with a high refractive index is stacked on a first planarization layer PL1 with a low refractive index. Specifically, the second planarization layer PL2 can be patterned in an island-like manner, and a cathode CAT can cover the top surface and sidewalls of the second planarization layer PL2, thus forming a micromirror structure. Furthermore, the interface between the first planarization layer PL1 and the second planarization layer PL2 can be configured such that total internal reflection occurs at the interface, and the totally reflected light can be reflected by the cathode CAT and emitted downwards.

[0095] In this structure, the etched sidewalls of the second planarization layer PL2 can have a tilt angle of 50 to 70 degrees. The light-emitting layer EL can have a structure that is continuously connected between two adjacent pixels. For example, by utilizing a structure in which a first light-emitting diode OLE1 arranged in a first pixel and a second light-emitting diode OLE2 arranged in a second pixel can be adjacent to each other, the light-emitting layer EL can have a coating structure that continuously extends from the first light-emitting diode OLE1 to the second light-emitting diode OLE2. Since the etched sidewalls of the second planarization layer PL2 can have a relatively gentle tilt angle, the light-emitting layer EL can be continuously deposited with a uniform thickness from the first light-emitting diode OLE1 to the second light-emitting diode OLE2.

[0096] Therefore, leakage current may flow laterally along the light-emitting layer EL, i.e., in the X-axis direction, which may cause unwanted pixels' light-emitting diodes (OLEs) to be turned on. A first embodiment of this disclosure provides a structure for preventing problems caused by lateral leakage current.

[0097] Reference Figure 6 A second planarization layer PL2 with an island shape can be further disposed between the first light-emitting diode OLE1 and the second light-emitting diode OLE2. Furthermore, a dummy anode DAN with an island shape can be disposed on the top surface of the second planarization layer PL2.

[0098] use Figure 6 In the configuration shown, due to the structure of the element disposed between the first LED OLE1 and the second LED OLE2, the light-emitting layer EL can have a longer path length. Therefore, the path of lateral leakage current from the first LED OLE1 to the second LED OLE2 can also be lengthened, thereby suppressing the flow of lateral leakage current to adjacent pixels.

[0099] However, if the tilt angle of the sidewalls of the second planarization layer PL2 is as gentle as 50 degrees, lateral leakage current may not be completely suppressed. In particular, in the case of light-emitting display devices with ultra-high pixel density of 400 PPI (pixels per inch) or more, or in the case of light-emitting display devices with small size, such as less than 10 inches in diagonal length, the spacing between pixels may become narrow, making lateral leakage current more likely to occur.

[0100] In the following, different embodiments of a light-emitting display device having a structure that can further prevent the problems that may occur in the first embodiment will be described.

[0101] <Second Embodiment>

[0102] In the following text, refer to Figure 7The structure of the light-emitting display device according to the second embodiment of the present disclosure will be described. Figure 7 It is along Figure 3 The enlarged cross-sectional view of the structure of the light-emitting display device according to the second embodiment of the present disclosure is shown by line II-II'.

[0103] Reference Figure 7 The first light-emitting diode (LED) OLE1 and the second LED OLE2 can be arranged adjacent to each other. The second planarization layer PL2 can have a structure in which a portion of the second planarization layer PL2 between the first LED OLE1 and the second LED OLE2 can be completely removed, thereby exposing the first planarization layer PL1. Furthermore, the first planarization layer PL1 can be etched to a specific depth to form a trench TR.

[0104] A dummy anode (DAN) can be formed on a first planarization layer PL1 exposed between a first light-emitting diode (OLE1) and a second light-emitting diode (OLE2). The dummy anode (DAN) can be physically and electrically disconnected from the first anode (ANO1) and the second anode (ANO2). As seen in a plan view of the light-emitting display device, the dummy anode (DAN) can be disposed between two adjacent pixel columns and can have a line segment shape extending along the Y-axis. In some cases, the dummy anode (DAN) can be used as a line for supplying electrical signals different from those of the anode (ANO).

[0105] The first anode ANO1 of the first light-emitting diode OLE1 and the second anode ANO2 of the second light-emitting diode OLE2 can be disposed on the top surface of the second planarization layer PL2. Simultaneously, a dummy anode DAN can be disposed on the top surface of the first planarization layer PL1 exposed between the first light-emitting diode OLE1 and the second light-emitting diode OLE2. Using the first anode ANO1, the second anode ANO1, and the dummy anode DAN as a mask, the first planarization layer PL1 can be patterned to form a trench TR with a predetermined depth. Since the second planarization layer PL2 can be made of a different material than the first planarization layer PL1, when the first planarization layer PL1 is patterned, the second planarization layer PL2 will not be etched, and the etched sidewalls will not be over-etched to an angle greater than 70 degrees. Therefore, problems such as pixel shrinkage will not occur.

[0106] By over-etching the first planarization layer PL1, the sidewall angle δ of the trench TR can be formed to have a steep tilt angle of 70 degrees or more. That is, the tilt angle of the etched sidewall of the second planarization layer PL2 can be in the range of 50 degrees to 70 degrees, i.e., a relatively gentle tilt angle. At the same time, the tilt angle δ of the etched sidewall formed by the patterned trench TR in the first planarization layer PL1 can have an angle in the range of 70 degrees to 90 degrees, i.e., a relatively steep tilt angle.

[0107] Therefore, the light-emitting layer EL deposited on the top surface of the substrate 110 with trench TR can be disconnected by the trench TR. Since leakage current will not be transmitted to the light-emitting diodes arranged in the laterally adjacent pixels along the light-emitting layer EL, abnormal operation of the pixels can be prevented. The light-emitting layer EL can be formed on each of the first light-emitting diode OLE1 and the second light-emitting diode OLE2, and the dummy light-emitting layer DEL can be deposited on the dummy anode DAN which is disconnected from the light-emitting layer EL.

[0108] The cathode CAT can be deposited on both the light-emitting layer (EL) and the dummy light-emitting layer (DEL). The cathode CAT can be an inorganic metallic material. Therefore, the cathode CAT can be deposited to maintain connectivity at the breaks in the light-emitting layer (EL).

[0109] The light-emitting display device according to the second embodiment of this disclosure has a micromirror structure by forming the second planarization layer PL2 in an island shape, thereby improving light extraction efficiency by extracting light that might otherwise be lost inside the anode ANO to the outside. Furthermore, by blocking the lateral leakage current caused by the trenches TR disposed between the pixels, abnormal pixel operation can be prevented, and color purity can be enhanced.

[0110] The light-emitting display device according to the second embodiment may have two trenches between the first anode ANO1 of the first light-emitting diode OLE1 and the second anode ANO2 of the second light-emitting diode OLE2. A dummy anode DAN may be disposed between the two trenches TR on the top surface of a first planarization layer PL1, the height of which is higher than the bottom of the trenches TR. Therefore, one trench TR may be disposed between the dummy anode DAN and the first anode ANO1. Furthermore, another trench TR may be disposed between the dummy anode DAN and the second anode ANO2.

[0111] <Third Embodiment>

[0112] In the following text, refer to Figure 8 The following will describe a light-emitting display device according to a third embodiment of the present disclosure. Figure 8 It is along Figure 3 The enlarged cross-sectional view of the structure of the light-emitting display device according to the third embodiment of the present disclosure is shown by line II-II'.

[0113] Reference Figure 8 The structure of the light-emitting display device according to the third embodiment can be very similar to that of the second embodiment. The difference in the third embodiment is that the depth of the trench TR can be the same as the thickness of the first planarization layer PL1. That is, the trench TR can be formed by completely removing the portion of the first planarization layer PL1 exposed between the dummy anode DAN and the second planarization layer PL2.

[0114] The first anode ANO1 of the first light-emitting diode OLE1 and the second anode ANO2 of the second light-emitting diode OLE2 can be disposed on the top surface of the second planarization layer PL2. A dummy anode DAN can be disposed on the top surface of the first planarization layer PL1 exposed between the first light-emitting diode OLE1 and the second light-emitting diode OLE2. Using the first anode ANO1, the second anode ANO2, and the dummy anode DAN as a mask, the exposed portion of the first planarization layer PL1 can be completely removed, thereby forming a trench TR with a depth corresponding to the thickness of the first planarization layer PL1. Since the second planarization layer PL2 can be made of a different material than the first planarization layer PL1, the second planarization layer PL2 does not need to be etched when forming the trench TR by patterning the first planarization layer PL1. Therefore, the tilt angle (i.e., 70 degrees) of the sidewalls of the second planarization layer PL2 does not change. Therefore, there is no problem, such as pixel shrinkage.

[0115] By forming a deeper trench TR in this manner, an over-etching process that increases the etching time for forming the first planarization layer PL1 can be performed. Therefore, the angle of the sidewalls of the trench TR (i.e., the tilt angle of the etched sidewalls of the first planarization layer PL1) can be formed to be a steep angle greater than 70 degrees. Therefore, the light-emitting layer EL deposited on the substrate 110 in which the trench TR is formed can be disconnected by the trench TR. Therefore, leakage current will not be transmitted to the light-emitting diodes arranged in laterally adjacent pixels along the light-emitting layer EL, thus preventing abnormal pixel operation due to lateral leakage current. The light-emitting layer EL can be formed on each of the first light-emitting diode OLE1 and the second light-emitting diode OLE2. Furthermore, a dummy light-emitting layer DEL disconnected from the light-emitting diodes OLE1 and OLE2 can be deposited on the dummy anode DAN.

[0116] The cathode CAT can be deposited on both the light-emitting layer (EL) and the dummy light-emitting layer (DEL). The cathode CAT can contain inorganic metallic materials. Therefore, the cathode CAT can be deposited to maintain connectivity even in areas where the connections in the light-emitting layer (EL) are broken.

[0117] The light-emitting display device according to the third embodiment of this disclosure has a micromirror structure by forming the second planarization layer PL2 in an island shape, thereby improving light extraction efficiency by extracting light that might otherwise be lost inside the anode ANO to the outside. Furthermore, by blocking the lateral leakage current caused by the trenches TR disposed between the pixels, abnormal pixel operation can be prevented, and color purity can be enhanced.

[0118] <Fourth Embodiment>

[0119] In the following text, refer to Figure 9 The following will describe a light-emitting display device according to a fourth embodiment of the present disclosure. Figure 9 It is along Figure 3 The enlarged cross-sectional view of the structure of the light-emitting display device according to the fourth embodiment of the present disclosure is shown by line II-II'.

[0120] Reference Figure 9 The structure of the light-emitting display device according to the fourth embodiment can be very similar to that of the second embodiment. The difference in the fourth embodiment lies in that it has two trenches TR. The trenches TR may include a first trench TR1 and a second trench TR2 sequentially disposed between the dummy anode DAN and the anode ANO. Two trenches TR1 and TR2 can be arranged on each side of the dummy anode ANO. Furthermore, the dummy anode DAN can be disposed between the first trench TR1 and the second trench TR2.

[0121] The light-emitting display device according to the fourth embodiment may include four trenches between the first anode ANO1 of the first light-emitting diode OLE1 and the second anode ANO2 of the second light-emitting diode OLE2. Between each trench TR, a dummy anode DAN may be disposed on the top surface of a first planarization layer PL1 located at a height higher than the bottom of the trench TR.

[0122] However, this is not the only possibility; different numbers of trenches can be formed between two adjacent anodes (ANO). For example, 3, 5, or 6 trenches can be formed between two adjacent anodes (ANO). In this case, dummy anodes (DAN) do not need to be placed between the trenches.

[0123] As the number of trenches (TRs) increases, the path of the luminescent layer (EL) deposited on them becomes longer, and the break in the luminescent layer (EL) can be formed more reliably through the trenches (TRs).

[0124] The structure of the fourth embodiment, which has three or more trenches TR between two adjacent anodes (ANO), can be applied to low-resolution display devices with a pixel pitch of less than 100 PPI, where the pixel pitch is relatively wider than that of high-resolution display devices. Alternatively, the structure according to the fourth embodiment can be applied to large-area display devices of 50 inches or more, where the pixel pitch is relatively wide due to the large area of ​​the display device (even if it has high resolution).

[0125] The light-emitting display device according to the fourth embodiment of this disclosure has a micromirror structure by forming the second planarization layer PL2 in an island shape, thereby improving light extraction efficiency by extracting light that might otherwise be lost inside the anode ANO to the outside. Furthermore, by blocking the lateral leakage current caused by the trenches TR1 and TR2 disposed between the pixels, abnormal pixel operation can be prevented, and color purity can be enhanced.

[0126] <Fifth Embodiment>

[0127] In the following text, refer to Figure 10 The following will describe a light-emitting display device according to a fifth embodiment of the present disclosure. Figure 10 This is an enlarged plan view showing the structure of a light-emitting display device according to a fifth embodiment of the present disclosure.

[0128] Reference Figure 10 The light-emitting display device according to the fifth embodiment of this disclosure can have the same characteristics as... Figure 1 The light-emitting display devices shown have essentially the same structure. Therefore, descriptions of identical components can be omitted or briefly explained, and the main components will be described instead. Figure 10 The low-voltage line VSS is also shown. Figure 1 Components not shown in the diagram. Furthermore, Figure 10 The dummy anode DAN is shown, which is one of the main components of the light-emitting display according to this disclosure.

[0129] A low-voltage line VSS can be disposed in a non-display area NDA surrounding the display area AA. For example, the low-voltage line VSS can be placed on the left, top, and right sides of the display area AA, such that the low-voltage line VSS surrounds the display area AA in a "∩" shape. The low-voltage line VSS can be connected to a pad portion 300 disposed on the non-display area NDA on the lower side of the display area AA, and further connected to a timing controller 500 via a flexible circuit film 430. The timing controller 500 can supply a low-voltage signal to the low-voltage line VSS. The low-voltage line VSS can be connected to pixels P arranged in the display area AA. For example, the low-voltage line VSS can be connected to... Figures 2 to 4 The cathode CAT of the light-emitting diode OLE described in the text.

[0130] According to the first to fourth embodiments of this disclosure, the light-emitting display device according to this disclosure may include a dummy anode (DAN) disposed on a second planarization layer PL2 arranged in an island-like manner between two adjacent pixel columns. Specifically, in Figure 7 In the second embodiment shown, the dummy anode (DAN) can be disposed between two trenches (TR) located between two adjacent pixel columns.

[0131] Since a dummy anode (DAN) can be positioned between two adjacent pixel columns, it can have a line segment shape along the vertical (Y-axis) direction within the display area (AA). The dummy anode (DAN) can be formed from the same material as the anode (ANO) and the transparent conductive material. Therefore, the dummy anode (DAN) can be used as a component for supplying electrical signals.

[0132] For example, by connecting the dummy anode DAN to the low-voltage line VSS located above the display area AA, the dummy anode DAN can be used as an auxiliary low-voltage line. (Refer to...) Figures 4 to 9 As described, the cathode (CAT) can be placed on the dummy anode (DAN). The cathode (CAT) is the element that receives the base voltage (or ground voltage) used to drive the light-emitting diode (OLE) and needs to maintain a stable and constant low potential voltage at all times. Therefore, the dummy anode (DAN) in contact with the cathode (CAT) surface can be connected to the low-voltage line (VSS) so that the low voltage of the cathode (CAT) can always be maintained in a constant state.

[0133] An example of a light-emitting display device according to this disclosure includes a substrate, a driving element layer, a first planarization layer, a second planarization layer, an anode, a light-emitting layer, and a cathode. The substrate includes a plurality of pixels. The driving element layer is disposed on the substrate. The first planarization layer is disposed on the driving element layer, and the second planarization layer is disposed on the first planarization layer in each pixel. The anode is disposed on the second planarization layer. The light-emitting layer is disposed on the first planarization layer, the second planarization layer, and the anode. The cathode is disposed on the light-emitting layer.

[0134] In summary, the light-emitting display devices of various embodiments of this disclosure improve light extraction efficiency by forming a micromirror structure with patterned cathodes above an island-shaped planarization layer. These micromirror structures redirect light that might otherwise be lost due to total internal reflection back towards the substrate, thereby increasing brightness. The device also employs a refractive index layered structure, arranging materials such that light transitions from a higher refractive index anode to a lower refractive index planarization layer, thereby reducing optical losses and improving light extraction efficiency.

[0135] To prevent lateral leakage current and improve color purity, especially in high-resolution or compact displays, the device includes trenches and dummy anodes between adjacent pixels. These features disrupt the continuity of the emissive layer, effectively isolating individual pixels. Furthermore, the sidewalls of the planarization layer are angled between 50 and 75 degrees to optimize light redirection. These combinations and material arrangements improve display performance, enhance pixel separation, and provide adaptability for enhanced display applications.

[0136] In one example, the anode comprises at least one of a transparent conductive material and a semi-transparent metallic material. The cathode comprises an opaque metallic material.

[0137] In one example, the light-emitting layer is deposited on the top surface of the first planarization layer, the sidewalls of the second planarization layer, the edge of the top surface of the second planarization layer, and the top surface of the anode. The cathode is configured to contact the light-emitting layer.

[0138] In one example, the refractive index of the second planarization layer is at most 0.2 lower than that of the anode. The refractive index of the first planarization layer is at least 0.5 lower than that of the second planarization layer.

[0139] In one example, the refractive index of the anode is in the range of 2.0 to 2.3. The refractive index of the second planarization layer is in the range of 1.8 to 2.0. The refractive index of the first planarization layer is in the range of 1.3 to 1.5.

[0140] In one example, the substrate further includes a first pixel and a second pixel that are adjacent to each other, a first light-emitting diode disposed in the first pixel, a second light-emitting diode disposed in the second pixel, and a dummy anode disposed between the first light-emitting diode and the second light-emitting diode.

[0141] In one example, the light-emitting display device further includes at least one trench disposed between the first light-emitting diode and the second light-emitting diode.

[0142] In one example, the trench is recessed or sunken from the top surface of the first planarization layer to a predetermined location inside the first planarization layer.

[0143] In one example, the trench is recessed or sunken from the top surface of the first planarization layer to the bottom surface of the first planarization layer.

[0144] In one example, the trenches include two to four trenches between the first LED and the second LED.

[0145] In one example, the light-emitting layer is disconnected between the first light-emitting diode and the second light-emitting diode through a trench.

[0146] In one example, the light-emitting display device further includes a trench recessed or recessed into a first planarization layer between a first light-emitting diode and a dummy anode. The first light-emitting diode includes a second planarization layer on the first planarization layer, a first anode on the second planarization layer, a light-emitting layer on the first anode, and a cathode on the light-emitting layer. The second light-emitting diode includes a second planarization layer on the first planarization layer, a second anode on the second planarization layer, a light-emitting layer on the second anode, and a cathode on the light-emitting layer.

[0147] In one example, the trench includes a first trench and a second trench disposed adjacent to each other between the first light-emitting diode and the dummy anode.

[0148] In one example, the substrate includes: a display area comprising a plurality of pixels; a non-display area surrounding the display area; and a low-voltage line disposed in the non-display area. A dummy anode is connected to the low-voltage line.

[0149] A light-emitting display device according to another example of this disclosure includes: a substrate having a plurality of pixels disposed thereon; a driving element layer on the substrate; a first planarization layer on the driving element layer; a second planarization layer protruding and formed into an island shape on the first planarization layer; an anode on the second planarization layer; a light-emitting layer on the sidewalls of the first planarization layer and the second planarization layer not covered by the anode and on the anode; and a cathode on the light-emitting layer, wherein the anode comprises a transparent conductive material, and wherein the refractive index of the second planarization layer is at most 0.2 lower than the refractive index of the anode.

[0150] In one example, the light-emitting layer is also disposed on the edge of the top surface of the second planarization layer that is not covered by the anode.

[0151] In one example, the refractive index of the first planarization layer is at least 0.5 lower than that of the second planarization layer.

[0152] In one example, the sidewalls of the second planarization layer are tilted at an angle of 40 to 80 degrees relative to the horizontal surface.

[0153] In one example, the sidewalls of the second planarization layer are tilted at an angle of 50 to 75 degrees relative to the horizontal surface.

[0154] These and other changes can be made to the embodiments based on the detailed description above. Generally, the terminology used in the appended claims should not be construed as limiting the claims to the specific embodiments disclosed in the specification and claims, but should be interpreted to include all possible embodiments and the full scope of their equivalents. Therefore, the claims are not limited by this disclosure.

Claims

1. A light-emitting display device, comprising: The substrate has multiple pixels; A driving element layer is located on the substrate; A first planarization layer is disposed on the driving element layer; A second planarization layer is disposed on the first planarization layer in each of the plurality of pixels; Anode, on the second planarization layer; A light-emitting layer is formed on the first planarization layer, the second planarization layer, and the anode; as well as The cathode is located on the light-emitting layer.

2. The light-emitting display device according to claim 1, wherein, The anode comprises at least one of a transparent conductive material and a semi-transparent metallic material, and The cathode comprises an opaque metallic material.

3. The light-emitting display device according to claim 1, wherein, The light-emitting layer is deposited on the top surface of the first planarization layer, the sidewall of the second planarization layer, the edge of the top surface of the second planarization layer, and the top surface of the anode. The cathode is configured to contact the light-emitting layer.

4. The light-emitting display device according to claim 1, wherein, The refractive index of the second planarization layer is at most 0.2 lower than that of the anode, and The refractive index of the first planarization layer is at least 0.5 lower than that of the second planarization layer.

5. The light-emitting display device according to claim 4, wherein, The refractive index of the anode is in the range of 2.0 to 2.

3. The refractive index of the second planarization layer is in the range of 1.8 to 2.0, and The refractive index of the first planarization layer is in the range of 1.3 to 1.

5.

6. The light-emitting display device according to claim 1, wherein, The substrate further includes: The first and second pixels that are adjacent to each other; A first light-emitting diode disposed in the first pixel; The second light-emitting diode disposed in the second pixel; and A dummy anode is set between the first light-emitting diode and the second light-emitting diode.

7. The light-emitting display device according to claim 6 further includes at least one trench disposed between the first light-emitting diode and the second light-emitting diode.

8. The light-emitting display device according to claim 7, wherein, The at least one groove is recessed from the top surface of the first planarization layer to a predetermined position inside the first planarization layer.

9. The light-emitting display device according to claim 7, wherein, The at least one groove is recessed from the top surface of the first planarization layer to the bottom surface of the first planarization layer.

10. The light-emitting display device according to claim 7, wherein, The at least one trench includes two to four trenches between the first light-emitting diode and the second light-emitting diode.

11. The light-emitting display device according to claim 7, wherein, The light-emitting layer is disconnected between the first light-emitting diode and the second light-emitting diode through the trench.

12. The light-emitting display device according to claim 6, further comprising: At least one trench is recessed into the first planarization layer between the first light-emitting diode and the dummy anode. The first light-emitting diode includes: The second planarization layer is on top of the first planarization layer; The first anode is on the second planarization layer; The light-emitting layer is on the first anode; and The cathode is on the light-emitting layer, and The second light-emitting diode includes: The second planarization layer is on top of the first planarization layer; The second anode is located on the second planarization layer; The light-emitting layer is on the second anode; and The cathode is located on the light-emitting layer.

13. The light-emitting display device according to claim 12, wherein, The at least one trench includes a first trench and a second trench disposed adjacent to each other between the first light-emitting diode and the dummy anode.

14. The light-emitting display device according to claim 6, wherein, The substrate includes: The display area includes the plurality of pixels; Non-display area, surrounding the display area; and Low-voltage lines are located in the non-display area. The dummy anode is connected to the low-voltage line.

15. A light-emitting display device, comprising: A substrate on which multiple pixels are disposed; A driving element layer is located on the substrate; A first planarization layer is disposed on the driving element layer; The second planarization layer protrudes the terrain into island shapes on the first planarization layer; Anode, on the second planarization layer; A light-emitting layer is located on the sidewalls of the first planarization layer, the second planarization layer, and the anode, which are not covered by the anode. as well as Cathode, on the light-emitting layer, The anode comprises a transparent conductive material. The refractive index of the second planarization layer is at most 0.2 lower than that of the anode.

16. The light-emitting display device according to claim 15, wherein, The light-emitting layer is also disposed on the edge of the top surface of the second planarization layer that is not covered by the anode.

17. The light-emitting display device according to claim 16, wherein, The refractive index of the first planarization layer is at least 0.5 lower than that of the second planarization layer.

18. The light-emitting display device according to claim 15, wherein, The sidewalls of the second planarization layer are tilted at an angle of 40 to 80 degrees relative to the horizontal surface.

19. The light-emitting display device according to claim 15, wherein, The sidewalls of the second planarization layer are tilted at an angle of 50 to 75 degrees relative to the horizontal surface.

Images