Heavy duty system and flip chip assembly

Abstract

A reprocessing system includes a substrate; a plurality of substrate main pads disposed on the substrate; and a plurality of substrate repair pads disposed on the substrate. The substrate repair pads are adjacent to and correspond to at least a portion of the substrate main pads.

Description

Technical Field

[0001] This invention relates to a bonding process, and more particularly to a rework system and a flip chip assembly. Background Technology

[0002] Chip-to-Glass (COG) bonding typically uses anisotropic conductive film (ACF) tape to attach chips (such as integrated circuits (ICs)) to a glass substrate. This method ensures a strong and reliable connection between the IC and the glass. When an IC fails, a thermal head can be used to heat the IC to remove it from the substrate. After removing the IC, any remaining adhesive on the glass substrate must be carefully removed. Once the substrate is clean and free of residue, the COG bonding process can be repeated, using new ACF tape to reattach the new or repaired IC to the glass substrate. This process ensures the integrity and functionality of the display.

[0003] However, when components (such as microLEDs) are very small and the density of components on the glass is very high, opaque anisotropic conductive film tape may cover the components (preventing the light-emitting components from emitting light properly), and may damage adjacent components when removing residual adhesive.

[0004] Another method for bonding integrated circuits (ICs) is to use a laser to solder the IC to metal bonding points on a glass substrate. During this process, the IC pins and the metal on the glass form a eutectic alloy, a specific alloy that melts and solidifies at a single temperature. This eutectic alloy provides a strong and reliable bond between the IC and the substrate. However, the high bonding strength and melting temperature of the eutectic alloy pose a challenge if the IC fails and rework is required. Heating with a hot press alone is insufficient to remove the IC; additional external force or other laser processes are needed to separate it. Unfortunately, this separation process often damages the metal bonding points on the glass substrate, making it impossible to reattach new or repaired ICs to the metal bonding points during rework.

[0005] Furthermore, current processes involve using a laser to penetrate an aluminum pad from the back of the chip. The laser locally heats the pad until the tin in the gold-tin (Au-Sn) solder bump melts to form an eutectic. This eutectic forms a strong bond between the chip and the substrate. However, the laser wavelength can only penetrate the silicon layer of the chip. When the laser reaches the circuit layer, the aluminum in the circuitry generates high temperatures and begins to melt. This melting of aluminum can cause chip failure, thus compromising the integrity of the circuitry. This process highlights the trade-offs required in precision laser applications to avoid damaging the complex components of the chip.

[0006] Therefore, there is an urgent need to propose a novel mechanism to overcome the shortcomings of traditional heavy-duty processes and allow lasers to transfer energy to welding bumps to create a bond without affecting circuit functionality. Summary of the Invention

[0007] In view of the above, one of the objectives of the embodiments of the present invention is to provide a rework system that can be reworked even if the metal bonding points on the substrate are damaged, and allows the laser to transfer energy to the welding bumps to produce a bond without affecting the circuit function.

[0008] According to one embodiment of the present invention, the rework system includes a substrate, a substrate main pad, and a substrate repair pad. The substrate main pad and the substrate repair pad are disposed on the substrate. The substrate repair pad is adjacent to and corresponds to at least a portion of the substrate main pad.

[0009] In one embodiment of the present invention, the distance between the plurality of substrate repair pads and the corresponding plurality of substrate main pads does not exceed the size of the chip to be repaired.

[0010] In one embodiment of the present invention, the substrate comprises a glass substrate.

[0011] In one embodiment of the present invention, it further includes: a plurality of welding bumps disposed on corresponding chip pads of the chip to be bonded to the substrate.

[0012] In one embodiment of the present invention, it further includes: at least one wire disposed on the substrate and connecting the substrate main pad and the corresponding substrate repair pad.

[0013] In one embodiment of the invention, the at least one wire includes an original wire that is electrically connected to the substrate master pad and extends to directly connect to the corresponding substrate repair pad.

[0014] In one embodiment of the invention, the at least one wire includes an additional wire that indirectly connects the substrate main pad and the corresponding substrate repair pad.

[0015] In one embodiment of the present invention, the at least one wire includes an original wire that is electrically connected to the substrate main pad and extends in a different direction to indirectly connect to the corresponding substrate repair pad.

[0016] In one embodiment of the present invention, the substrate main pad, the corresponding substrate repair pad, and the at least one conductor are disposed on the same layer above the substrate.

[0017] In one embodiment of the present invention, the substrate main pad and the corresponding substrate repair pad are disposed above the at least one conductor.

[0018] In one embodiment of the present invention, the corresponding substrate repair pad is disposed above the substrate main pad and the at least one conductor.

[0019] In one embodiment of the present invention, the substrate main pad is disposed above the corresponding substrate repair pad and the at least one wire.

[0020] According to another embodiment of the present invention, a flip-chip assembly includes a flipped chip, a reflow area disposed at the front of the chip, at least one metal layer, a chip pad, a substrate, a substrate pad, and solder bumps. The metal layer is disposed at the front of the chip and bypasses the reflow area. The chip pad is disposed at the front of the chip and electrically connected to the metal layer. The substrate pad is disposed on the substrate and electrically connected to the chip pad via solder bumps. Laser heating passes through the chip and the reflow area to melt the solder bumps.

[0021] In one embodiment of the invention, the at least one metal layer bypasses the reflow area at the front of the chip, the reflow area accommodating a corresponding chip pad and the reflow area being perpendicularly aligned with the laser heating and the corresponding chip pad.

[0022] In one embodiment of the present invention, the reflow area of ​​the front of the chip is vertically aligned with the laser heating and located outside the corresponding area of ​​the at least one metal layer.

[0023] In one embodiment of the present invention, the reflow area does not contain the corresponding chip pad, and the corresponding chip pad is located in the corresponding area of ​​the at least one metal layer.

[0024] In one embodiment of the invention, the reflow area is located on the periphery of a corresponding area of ​​the at least one metal layer.

[0025] In one embodiment of the present invention, the solder bump is elongated, with one end connected to the surface of the reflow area, and the other end of the solder bump connected to the corresponding chip pad.

[0026] In one embodiment of the present invention, the plurality of welding bumps, the plurality of chip pads and the plurality of substrate pads are formed into a co-metal after laser heating.

[0027] In one embodiment of the invention, the laser heating is projected from the back of the chip. Attached Figure Description

[0028] Figure 1 A top view schematic diagram of a heavy industry system according to an embodiment of the present invention is shown;

[0029] Figure 2A and Figure 2B show Figure 1 A side view of the heavy industrial system;

[0030] Figures 3A to 3C The top-down diagram shows Figure 1 The substrate main pad, the substrate repair pad, and the wires connected to and disposed on the substrate;

[0031] Figures 4A to 4D The top-down diagram shows Figure 1 The substrate main pad, the substrate repair pad, and the wires connected to and disposed on the substrate;

[0032] Figure 5 This shows a side view of a flip-chip assembly according to another embodiment of the present invention;

[0033] Figure 6 This shows a side view of a flip-chip assembly according to another embodiment of the present invention.

[0034] Figure label:

[0035] 100: Heavy Industry Systems

[0036] 500: Flip Chip Module

[0037] 600: Flip Chip Module

[0038] 10: Chips

[0039] 101: Metal layer

[0040] 102: Chip pad

[0041] 102a: Extension

[0042] 103: Reflow Area

[0043] 11:Substrate

[0044] 111: Substrate pad

[0045] 12: Main pad for substrate

[0046] 13: Substrate repair pad

[0047] 14: Welding bumps

[0048] 15: Conductor

[0049] 15A: Original conductor

[0050] 15B: Additional wire

[0051] 16: Laser heating

[0052] d: distance Detailed Implementation

[0053] Figure 1 This diagram shows a top view of a rework system 100 according to an embodiment of the present invention. The rework system 100 of this embodiment is applicable to repairing chips that embed integrated circuits (ICs) (e.g., driver ICs).

[0054] The heavy-duty system 100 may include a substrate 11 (e.g., a glass substrate) having a plurality of substrate pads 12 thereon for electrically connecting the substrate 11 and a chip (not shown). Figure 1 The substrate main pad 12 may contain a conductive material, such as a transparent conductive material (e.g., indium tin oxide (ITO)).

[0055] According to one feature of this embodiment, the rework system 100 may include a plurality of substrate repair pads 13, also referred to as substrate dummy pads or substrate redundant pads, disposed on the substrate 11. The substrate repair pads 13 may contain a conductive material, such as a transparent conductive material (e.g., indium tin oxide). In this embodiment, the substrate repair pads 13 are adjacent to and correspond to at least a portion of the main substrate pads 12, and have the same pad spacing. Figure 1 As illustrated, each column of substrate repair pads 13 is adjacent to and parallel to the corresponding column of substrate main pads 12. In this embodiment, the distance d between the substrate repair pads 13 and the corresponding substrate main pads 12 does not exceed the size of the chip (e.g., width or length).

[0056] Figure 2A show Figure 1 A side view of the heavy industrial system 100. (See attached diagram.) Figure 2A As shown, the (flipped) chip 10 is connected to the substrate main pad 12 via a solder bump 14, which is located on the corresponding chip pad (not shown) of the chip 10. When the chip 10 fails and needs to be reworked, desoldering is first performed to remove the chip 10 and the solder bump 14 from the substrate main pad 12, for example, by laser heating from the back or front of the chip. Next, re-soldering is performed to connect the new or repaired chip 10 to the substrate repair pad 13, as shown. Figure 2B As shown Figure 1 A side view of the heavy industrial system 100.

[0057] Figures 3A to 3C The top-down diagram shows Figure 1 The substrate main pad 12, the substrate repair pad 13, and the wires 15A / B connected to and disposed on the substrate 11. Figure 3A As illustrated, the original conductor 15A is electrically connected to the substrate main pad 12 and extends (along the original direction) directly to the substrate repair pad 13. For example... Figure 3B As illustrated, the additional wire 15B indirectly connects the substrate main pad 12 and the substrate repair pad 13. For example... Figure 3C As illustrated, the original wire 15A is electrically connected to the substrate main pad 12 and extends (changing its original direction) to indirectly connect to the substrate repair pad 13.

[0058] Figures 4A to 4D The top-down diagram shows Figure 1 The substrate main pad 12, the substrate repair pad 13, and the wire 15 connected to and disposed on the substrate 11. Figure 4A As illustrated, the substrate main pad 12, the substrate repair pad 13, and the connected wire 15 are disposed on the same layer above the substrate 11. Figure 4B As illustrated, the substrate main pad 12 and the substrate repair pad 13 are disposed above the conductor 15. Figure 4C As illustrated, the substrate repair pad 13 is disposed above the substrate main pad 12 and the conductive line 15. For example... Figure 4D As illustrated, the substrate main pad 12 is disposed above the substrate repair pad 13 and the wire 15.

[0059] Figure 5 This diagram shows a side view of a flip chip assembly 500 according to another embodiment of the present invention. In this embodiment, the flip chip assembly 500 may include a (flip) chip 10 with an embedded integrated circuit (e.g., a driver integrated circuit). The chip 10 may include at least one metal layer 101. Figure 5 Example: A dual metal layer is provided to provide circuit functionality and is located on the front of the chip 10. The chip 10 may include a plurality of chip pads 102 (located on the front of the chip 10) electrically connected to the metal layer 101 via extensions 102a. The flip-chip assembly 500 may include a substrate 11 (e.g., a glass substrate) and a plurality of substrate pads 111 disposed on the substrate 11 and electrically connected to the substrate 11 and the chip 10 (chip pads 102) via corresponding solder bumps 14. In one embodiment, the solder bumps 14 may comprise a gold-tin (Au-Sn) alloy. When the flip-chip assembly 500 (from the back of the chip 10) is heated by a laser 16 and aligned with the chip pads 102, solder bumps 14, and substrate pads 111, the solder bumps 14, chip pads 102, and substrate pads 111 form a eutectic alloy, which is a homogeneous mixture with a melting point lower than the melting points of each component.

[0060] According to one feature of this embodiment, the metal layer 101 of the chip 10 bypasses the reflow region 103 at the front of the chip 10. The reflow region 103 accommodates the chip pad 102 and is perpendicularly aligned with the laser heating 16 and the chip pad 102. Therefore, when the flip-chip assembly 500 performs a reflow process, the laser heating 16 passes through the chip 10 and the reflow region 103 to melt the solder bumps 14 and form a eutectic bond between the substrate 11 and the chip 10, without damaging the metal layer 101.

[0061] Figure 6 This shows a side view of a flip-chip component 600 according to another embodiment of the present invention. Figure 6 The flip-chip module 600 is similar to Figure 5 The differences between the flip-chip module 500 and the following are explained.

[0062] According to one feature of this embodiment, the reflow area 103 at the front of the chip 10 is vertically aligned with the laser heating 16 and located outside the corresponding area of ​​the metal layer 101 (e.g., on the periphery of the corresponding area of ​​the metal layer 101), but the reflow area 103 does not accommodate the chip pad 102 (which is located in the corresponding area of ​​the metal layer 101 and is directly electrically connected to the metal layer 101). Furthermore, the solder bump 14 is elongated, with one end connected to (or in contact with) the surface of the reflow area 103 (e.g., on the periphery of the corresponding area of ​​the metal layer 101). Figure 6 The lower surface of the illustrated reflow area 103 is connected to the chip pad 102 at the opposite end of the solder bump 14. Thus, when the flip-chip assembly 600 undergoes a reflow process, laser heating 16 (from the back of the chip 10) passes through the chip 10 and the reflow area 103 to melt the solder bump 14 and form a co-metal between the substrate 11 and the chip 10, without damaging the metal layer 101.

[0063] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. A heavy industry system, characterized in that, Include: substrate; Multiple substrate pads are disposed on the substrate; and Multiple substrate repair pads are disposed on the substrate; The plurality of substrate repair pads are adjacent to each other and correspond to at least a portion of the plurality of substrate main pads.

2. The heavy industry system as described in claim 1, characterized in that, The distance between the multiple substrate repair pads and the corresponding multiple substrate main pads does not exceed the size of the chip to be repaired.

3. The heavy industry system as described in claim 1, characterized in that, The substrate comprises a glass substrate.

4. The heavy industry system as described in claim 1, characterized in that, It also includes: Multiple solder bumps are provided on the corresponding chip pads of the chips to be bonded to the substrate.

5. The heavy industry system as described in claim 1, characterized in that, It also includes: At least one wire is disposed on the substrate and connects the substrate main pad and the corresponding substrate repair pad.

6. The heavy industry system as described in claim 5, characterized in that, The at least one wire includes an original wire that is electrically connected to the substrate master pad and extends to directly connect to the corresponding substrate repair pad.

7. The heavy industry system as described in claim 5, characterized in that, The at least one conductor includes additional conductors that indirectly connect the substrate main pad and the corresponding substrate repair pad.

8. The heavy industry system as described in claim 5, characterized in that, The at least one wire includes the original wire, which is electrically connected to the substrate main pad and extends in a different direction to indirectly connect to the corresponding substrate repair pad.

9. The heavy industry system as described in claim 5, characterized in that, The substrate main pad, the corresponding substrate repair pad, and the at least one conductor are disposed on the same layer above the substrate.

10. The heavy industry system as described in claim 5, characterized in that, The substrate main pad and the corresponding substrate repair pad are disposed above the at least one conductor.

11. The heavy industry system as described in claim 5, characterized in that, The corresponding substrate repair pad is disposed above the substrate main pad and the at least one conductor.

12. The heavy industry system as described in claim 5, characterized in that, The substrate main pad is disposed above the corresponding substrate repair pad and the at least one conductor.

13. A flip-chip module, characterized in that, Include: The chip, which is flipped; The reflow area is located at the front of the chip; At least one metal layer is disposed on the front of the chip and bypasses the reflow area; Multiple chip pads are disposed on the front of the chip and electrically connected to the metal layer; substrate; Multiple substrate pads are disposed on the substrate; and Multiple solder bumps are used to electrically connect the multiple substrate pads and the multiple chip pads; Laser heating passes through the chip and the reflow area to melt the multiple solder bumps.

14. The flip-chip module as described in claim 13, characterized in that, The at least one metal layer bypasses the solder reflow area at the front of the chip, the solder reflow area accommodates a corresponding chip pad and the solder reflow area is perpendicular to the laser heating and the corresponding chip pad.

15. The flip-chip module as described in claim 13, characterized in that, The reflow area at the front of the chip is vertically aligned with the laser heating and located outside the corresponding area of ​​the at least one metal layer.

16. The flip-chip module as claimed in claim 15, characterized in that, The reflow area does not allow for the placement of the corresponding chip pad, and the corresponding chip pad is located in the corresponding area of ​​the at least one metal layer.

17. The flip-chip module as described in claim 15, characterized in that, The reflow area is located on the periphery of the corresponding area of ​​the at least one metal layer.

18. The flip-chip module as claimed in claim 15, characterized in that, The solder bump is elongated, with one end connected to the surface of the reflow area and the other end connected to the corresponding chip pad.

19. The flip-chip module as claimed in claim 13, characterized in that, The plurality of welding bumps, the plurality of chip pads, and the plurality of substrate pads are formed into a co-metal after laser heating.

20. The flip-chip module as claimed in claim 13, characterized in that, The laser heating is projected from the back of the chip.

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