Process method for protecting a trench pn junction of a silicon wafer

Abstract

This invention discloses a process for creating a protective layer for a silicon wafer trench PN junction, comprising: loading the substrate at a low temperature of 400 to 600 degrees Celsius and feeding it into the furnace at a low-speed stepping rate; using multi-stage linear heating to a preset oxidation temperature of 860 degrees Celsius; alternately introducing wet oxygen and dry oxygen at a 2:1 time ratio under constant temperature to grow a silicon dioxide layer in situ, wherein the ratio of hydrochloric acid to water in the wet oxygen stage is 1:5; and after oxidation, slowly cooling the substrate at a controlled rate of 1 to 3 degrees Celsius per minute. This application can improve the interface quality between silicon dioxide and the silicon substrate by optimizing the thermal budget, gas composition, and thermodynamic control curves, solving the problems of uneven oxidation and thermal stress defects in deep and narrow trenches, significantly improving the consistency of device breakdown voltage, effectively suppressing static leakage current, and greatly enhancing the long-term reliability, production yield, and overall economic benefits of the product.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device manufacturing technology, and in particular to a process method for a silicon wafer trench PN junction protective layer. Background Technology

[0002] Transient voltage suppressor diodes (VTPS) are core semiconductor devices for overvoltage protection in circuits, and their performance directly depends on the reliability and stability of their internal structure. In the manufacturing process of trench-type VTPS diodes, a protective structure with high energy absorption and fast response characteristics can be formed by etching deep trenches on a semiconductor substrate and filling them with a dielectric layer. The trench oxide layer, as the core component of the dielectric layer, has a decisive impact on the device's breakdown voltage, leakage current, and reliability. Traditional trench oxidation processes typically place the etched silicon wafer in a high-temperature oxidation furnace at 900 to 1200 degrees Celsius, and grow a silicon dioxide layer in situ on the silicon surface by introducing dry or wet oxygen. However, this conventional oxidation method still faces significant technical bottlenecks in practical applications. First, to ensure the oxide layer in the deep trench reaches the required thickness, a prolonged high-temperature process is often required. The resulting high thermal stress can easily lead to lattice damage such as creep or dislocations in the silicon substrate, thereby reducing the intrinsic properties of the material. Secondly, due to the limited diffusion of the oxidant within the deep and narrow trenches and the differences in silicon atomic density between different crystal planes, the oxidation rate within the trenches exhibits significant non-uniformity. This results in the oxide layer being typically the thinnest at the bottom of the trench, and such thickness fluctuations easily induce electric field concentration, thereby reducing the actual breakdown voltage and reliability of the device. Furthermore, due to the volume expansion of silicon dioxide during formation and the mismatch in thermal expansion coefficients between silicon and silicon dioxide, significant tensile stress is generated at the interface during subsequent cooling. This easily induces microcracks or interface defects in the oxide layer, leading to increased wafer breakage and affecting process yield. Therefore, developing a novel fabrication process that can effectively optimize thermal budget, improve oxide layer uniformity, and significantly reduce thermal stress defects is of significant application value for improving the electrical performance and long-term reliability of transient voltage suppression diode devices. Summary of the Invention

[0003] The purpose of this invention is to provide a process method for a silicon wafer trench PN junction protective layer to overcome the shortcomings of the prior art.

[0004] To achieve the above objectives, the present invention provides the following technical solution: A novel process for preparing a TVS trench oxide protective layer is mainly achieved through the following process steps: S1. Low-Temperature Loading and Furnace Entry: The silicon wafers, after trench etching and cleaning, are placed in a quartz boat. Loading is performed when the furnace opening temperature of the oxidation furnace tube is within the set low-temperature range. The loading process employs a low-speed stepping method, slowly pushing the quartz boat into the constant-temperature zone of the oxidation furnace tube. By controlling the furnace entry speed, the silicon wafer undergoes a gradual transition in ambient temperature, thereby achieving thermal equilibrium before entering the high-temperature zone and eliminating radial thermal stress caused by instantaneous temperature differences between the wafer edges and center.

[0005] Furthermore, during the charging process, high-purity nitrogen is continuously introduced into the oxidation furnace tube as a protective atmosphere. The introduction of nitrogen makes the internal pressure of the furnace tube slightly higher than the external atmospheric pressure, preventing external air from entering while carrying away any trace impurities that may remain on the silicon wafer surface through gas flow. The initial temperature of the low-temperature charging is set between 400 °C and 600 °C, and the furnace feed rate is maintained at 5 cm / min to 15 cm / min. This setting ensures that the silicon wafer lattice is in a linear change phase during thermal expansion, avoiding the generation of lattice dislocations due to thermal shock.

[0006] S2. Temperature Control and Heating Stage: After the silicon wafer has fully entered the constant temperature zone, the heating program of the oxidation furnace is started, raising the temperature inside the oxidation furnace tube from the charging temperature to the preset oxidation temperature. The oxidation temperature is set at 860 °C. By reducing the oxidation temperature from the industry-standard range of 900 °C to 1200 °C to 860 °C, the diffusion energy of silicon atoms during the oxidation reaction is limited, effectively controlling the total heat budget.

[0007] The heating process employs a multi-stage linear heating slope. The initial heating rate is set at 3 °C / min to 5 °C / min. As the temperature approaches 800 °C, the heating slope is adjusted to 1 °C / min to 2 °C / min until it stabilizes at 860 °C. This segmented heating method gradually activates the atomic thermal motion within the silicon substrate. When the energy threshold required for the oxidation reaction is reached, the overall mechanical strength of the silicon wafer remains at a high level, thus preventing creep or permanent dislocation damage to the silicon substrate lattice at high temperatures. This provides a stable physical basis for the subsequent growth of a high-quality oxide layer.

[0008] S3. Combined Oxidation Process Implementation: Under a constant temperature of 860 °C, dry oxygen and wet oxygen are alternately or mixedly introduced into the oxidation furnace tube to grow a silicon dioxide layer in situ. The oxidation process achieves precise control over the oxide layer thickness by accurately adjusting the time ratio of the wet oxygen process to the dry oxygen process.

[0009] Specifically, the time ratio of the wet oxidation process to the dry oxidation process is set at 2:1. In the wet oxidation stage, an oxidizing gas containing water vapor is introduced into the furnace tube. Taking advantage of the high diffusion coefficient of water molecules in silicon dioxide, the rate at which the oxidant penetrates the already formed oxide layer and reaches the silicon surface is increased, which is particularly noticeable in the bottom region of deep and narrow trenches. Due to the geometric limitations of deep and narrow trenches, conventional dry oxygen molecules have difficulty diffusing sufficiently to the bottom of the trench. The introduction of the wet oxidation process compensates for the oxidation rate at the bottom of the trench, thereby reducing the thickness difference between the bottom and sidewalls of the trench.

[0010] Specifically, in the wet oxygen process, the ratio of hydrochloric acid to water is set to 1:5 through a wet oxygen source ratio control system. The chloride ions generated by the decomposition of hydrochloric acid at high temperatures have extremely high electronegativity. During oxide layer growth, these chloride ions diffuse to the interface between silicon and silicon dioxide, capturing and neutralizing heavy metal and alkali metal ions at the interface through chemisorption, forming volatile chlorides that are discharged with the airflow. This passivation effect significantly reduces the interfacial charge density, eliminating leakage channels caused by impurity energy levels in the physical structure. Simultaneously, the presence of chloride ions also regulates the kinetics of the oxidation reaction, further synergistically improving the oxidation environment of different crystal planes within the trench, thus synchronizing the growth of the oxide layer at the top, sidewalls, and bottom of the trench.

[0011] Furthermore, the dry oxygen process introduces high-purity oxygen, resulting in a denser silica structure with higher electrical breakdown strength. A 2:1 time ratio ensures that the oxide layer maintains uniform thickness while possessing excellent insulating density. This composite oxide layer exhibits a more uniform electric field distribution when facing transient high-voltage impacts, preventing electric field concentration at trench corners.

[0012] S4. Optimization of Heating and Cooling Curves and Unloading: After the oxidation reaction is complete, the oxidizing gas is stopped, and the atmosphere is switched to nitrogen, entering a controlled cooling stage. This cooling stage uses a pre-set specific cooling curve to control the slow cooling of the silicon wafer along with the furnace. The cooling rate is set to 1 °C / min to 3 °C / min.

[0013] During this slow cooling process, thermal stress accumulates at the interface due to the significant difference in thermal expansion coefficients between silicon and silicon dioxide. The aforementioned low-rate cooling allows for the gradual release of tensile stress at the interface within the high-temperature plastic range, giving the silicon dioxide molecular network sufficient time for structural rearrangement. This plastically releases the mechanical stress caused by thermal mismatch. This stress release mechanism physically blocks the initiation path of microcracks in the oxide layer, enhancing the adhesion between the oxide layer and the silicon substrate and eliminating the risk of delamination or cracking.

[0014] Once the furnace temperature drops to the set low-temperature exit temperature, typically 400 °C to 500 °C, the quartz boat is slowly removed from the furnace tube. This exit process also follows a low-speed stepping principle to ensure that the silicon wafer does not experience surface thermal distortion due to instantaneous cooling when in contact with external air.

[0015] Compared with the prior art, the beneficial effects of the present invention are as follows: First, this invention significantly improves the uniformity of oxide layer thickness. By using a low-to-medium temperature environment of 860 °C combined with a 2:1 wet-to-dry oxygen ratio, the oxidation reaction achieves equilibrium between the chemical kinetic control region and the diffusion control region, effectively balancing the differences in oxidation rates across different crystal planes, such as the top, sidewalls, and bottom of the trench. In practical applications, this process configuration increases the oxide layer thickness at the bottom of the trench from 350 Å to 500 Å, and reduces the overall thickness non-uniformity from >30% to <10%. This improved uniformity results in a smoother electric field distribution during device operation, eliminating local weak points and thus mitigating the risk of early breakdown caused by concentrated electric fields in the physical structure.

[0016] Secondly, this invention significantly improves the electrical performance of the device. Due to the introduction of a 1:5 hydrochloric acid passivation process during oxidation, the defect density and impurity content at the interface are substantially reduced. The fabricated transient voltage suppressor diode exhibits a significant suppression effect on leakage current under the same breakdown voltage conditions. Experimental data show that at 85% breakdown voltage, the leakage current is reduced by an average of approximately 62.5%; at 25% breakdown voltage, the leakage current is reduced by approximately 68%. This reduction in leakage current directly leads to the optimization of the device's static power consumption, reducing energy loss in standby mode to an extremely low level and improving the overall efficiency of the circuit system.

[0017] Furthermore, this invention enhances the reliability and stability of the product. In reliability testing, this process demonstrated significant technical advantages. In high-temperature reverse bias testing, the testing duration was increased from the industry standard of 168 hours to 500 hours, and the leakage current drift was consistently controlled within 5%, indicating extremely stable electrical characteristics at the oxide-silicon interface. Regarding thermal stress resistance, thanks to the optimized temperature rise and fall profiles, the oxide layer showed no cracking or delamination during severe temperature cycling tests from -55 °C to 150 °C. In terms of long-term stability, after 1000 hours of high-temperature storage testing, the breakdown voltage drift decreased from >10% to <3%, enabling the device to maintain a precise protection threshold even under harsh operating conditions.

[0018] Finally, this invention has significant economic value in reducing production costs and improving yield. Due to the reduction in oxidation temperature and the refined control of the heating and cooling processes, the thermomechanical stress experienced by the silicon wafers during processing is significantly reduced, resulting in a 75% reduction in wafer breakage rate, from 1.20% to 0.30%. This decrease in breakage rate directly improves the utilization rate of raw materials. Simultaneously, due to the improved oxide layer quality, the overall process yield increases by 5.3 percentage points, the rework rate decreases from 8% to 2.5%, and the overall manufacturing cost is reduced by 8% to 12%.

[0019] Furthermore, regarding the detailed implementation of the technical solution of this invention, the oxidation furnace tube is a horizontal or vertical quartz furnace tube, and the furnace tube is wrapped with multiple independently controlled heating resistance wires to achieve precise control over the length and temperature uniformity of the constant temperature zone. In step S3, the inlet pressure of the oxidizing gas is maintained between 1 atm and 1.2 atm, and the slightly positive pressure environment is conducive to the penetration of the oxidant into the bottom of the deep tank. The dry oxygen stage uses high-purity oxygen with a purity of not less than 99.999%, and the wet oxygen stage generates water vapor by introducing high-purity oxygen into a bubble bottle containing deionized water or by generating water vapor through a hydrogen-oxygen synthesis gun, and mixing it with a proportionally metered amount of hydrochloric acid vapor.

[0020] For trenches with different aspect ratios, the ratio of wet oxygen to dry oxygen can be finely adjusted between 1.5:1 and 3:1. For trenches with a large aspect ratio, increasing the wet oxygen ratio helps to further increase the bottom thickness; while for shallow trenches, appropriately increasing the dry oxygen ratio helps to obtain a better dielectric constant. When the ratio of hydrochloric acid to water fluctuates between 1:3 and 1:7, it can still remove interfacial impurities through the complexation of chloride ions, but a ratio of 1:5 has been shown in experiments to achieve the optimal balance between passivation effect and corrosion rate of quartz parts.

[0021] In the detailed description of the heating and cooling curves, to further release stress, an isothermal annealing stage lasting 30 to 60 minutes can be added when cooling to 600 °C. This in-situ annealing treatment under a nitrogen atmosphere further repairs oxygen vacancies in the silicon dioxide film, reduces the fixed charge inside the oxide layer, and thus further optimizes the reverse recovery characteristics of the transient voltage suppression diode.

[0022] The fabrication process is applicable not only to single-component silicon substrates but also to heavily doped silicon substrates doped with phosphorus, boron, or arsenic. When processing silicon wafers with different doping concentrations, maintaining a constant temperature environment of 860 °C prevents the drastic re-diffusion of impurity atoms at high temperatures, thereby preserving the predetermined PN junction impurity gradient distribution and ensuring that the physical properties of the breakdown voltage steepness are not compromised.

[0023] In summary, this invention, through comprehensive innovation in the temperature, composition, timing, and thermodynamic control of the trench oxidation process, successfully constructs a trench protection structure with high uniformity, low stress, and high purity. The optimization of the physical properties of this structure directly translates into superior performance in the electrical parameters of the device, solving the industry challenge of uncontrolled oxide layer thickness and interface defects in deep and narrow trenches. This provides a reliable technical path for the large-scale production of high-performance transient voltage suppression diodes. The process flow described in this invention is logically rigorous, with parameters in each step working in synergy to form a complete technical closed loop. This enables those skilled in the art to stably achieve the expected technical effects and produce semiconductor protection devices with high reliability and high consistency, provided they follow the above process guidelines. Attached Figure Description

[0024] Figure 1 This is a temperature-time control curve in the preparation process of a novel TVS trench oxide protective layer according to the present invention; Figure 2 This is a comparison chart of the uniformity of the trench oxide layer thickness between the process of this invention and the conventional process; Figure 3 This is a comparison chart of the electrical performance parameters of the device between the process of this invention and the conventional process; Figure 4 This is a comparison chart of the device reliability test results between the process of this invention and the conventional process. Figure 5 This is a comparison chart showing the process stability and yield of the process of this invention and the conventional process. Detailed Implementation

[0025] In the manufacturing process of semiconductor power devices, especially transient voltage suppressor diodes, trench oxidation is a critical step that determines device performance. (Reference) Figures 1 to 5 This invention provides a novel process for preparing a TVS trench oxide protective layer, aiming to solve the technical problems of uneven oxide layer thickness and excessive interfacial stress in deep and narrow trenches through refined thermal budget management and chemical composition adjustment. This process is mainly implemented through the following specific steps.

[0026] S1. Low-Temperature Loading and Furnace Entry Stage. First, prepare silicon substrates that have undergone trench etching and standard RCA cleaning in the previous process. These substrates are typically high-purity single-crystal silicon wafers with deep trench structures formed by plasma dry etching on their surface. Multiple silicon substrates are placed vertically or horizontally inside a high-purity quartz boat. At this time, the oxidation furnace tube is in standby mode, with its furnace opening temperature precisely controlled within a set low-temperature range of 400 °C to 600 °C. The loading process is not rapid; instead, a low-speed stepping method is used, with an automated push-pull rod slowly pushing the quartz boat into the isothermal zone of the oxidation furnace tube at a constant speed of 5 cm / min to 15 cm / min. During this process, due to the extremely slow furnace entry speed, the silicon substrate experiences an extremely gradual transition in ambient temperature. This allows the edges and center of the silicon substrate to reach a state of thermal equilibrium before reaching the core high-temperature zone, physically eliminating radial thermal stress caused by sudden large temperature differences and preventing warping of the silicon wafer in the initial stage. Meanwhile, throughout the entire charging process, high-purity nitrogen (99.999%) is continuously introduced into the oxidation furnace tube via a flow meter as a protective atmosphere. The amount of nitrogen introduced maintains the internal pressure of the furnace tube at a slightly positive pressure of 1 to 1.2 atm. This pressure gradient effectively prevents oxygen, moisture, and dust from the external environment from entering the furnace tube, while the directional airflow carries away any trace organic impurities that may be adsorbed on the silicon wafer surface.

[0027] S2. Temperature Control and Heating Stage. Once the quartz boat is fully inside the isothermal zone of the oxidation furnace tube, the system initiates a multi-stage heating program. This invention sets the final oxidation temperature to 860 °C, a temperature point verified through extensive comparative experiments. Compared to the industry-standard high-temperature environment of 900 °C to 1200 °C, the medium-low temperature environment of 860 °C effectively limits the excessive diffusion energy of silicon atoms in the crystal lattice, thereby keeping the total thermal budget at a low level and avoiding lattice creep or dislocation damage within the silicon substrate. During the heating process, this process employs segmented linear heating slope control. In the initial stage, the temperature is increased from approximately 500 °C during loading to 800 °C, with the heating slope set at 3 °C / min to 5 °C / min to quickly cross the non-reactive zone. When the thermocouples inside the furnace detect a temperature of 800 °C, the control system automatically switches the heating rate, reducing it to 1 °C / min to 2 °C / min until the temperature stabilizes at 860 °C. This slow heating strategy, approaching the target temperature, ensures that the atomic thermal motion inside the silicon substrate gradually becomes more active in a controlled manner, maintaining the overall mechanical strength of the silicon substrate and providing a stable physical environment for the subsequent high-quality in-situ growth of the silicon dioxide layer.

[0028] S3. Combined Oxidation Process Implementation Stage. Under a constant temperature environment of 860 °C, this process enters the core silica layer growth stage. This invention grows a silica layer in situ on the exposed surface of the trench by alternately or in combination with dry oxygen. Specifically, the time ratio of the wet oxygen process to the dry oxygen process is precisely set to 2:1. In the wet oxygen process stage, an oxidizing gas containing saturated water vapor is generated using a hydrogen-oxygen synthesis gun or a bubbler and introduced into the furnace tube. Because water molecules have a smaller molecular diameter and a much higher diffusion coefficient in silica than oxygen molecules, the oxidant can penetrate the already formed oxide film more quickly to reach the silicon surface. This characteristic is particularly crucial in deep and narrow trench structures, effectively compensating for the oxidation rate at the bottom of the trench. In conventional dry oxygen processes, limited by the Knudsen diffusion effect, oxygen molecules cannot fully reach the bottom of the trench, resulting in a bottom thickness much lower than the sidewalls; however, this process, by increasing the wet oxygen ratio, ensures a sufficient supply of reactants for the oxidation reaction at the bottom of the trench, thereby reducing the thickness difference between the top and bottom of the trench.

[0029] In the specific implementation of the wet oxidation process, this invention introduces a mixed source of hydrochloric acid and water at a ratio of 1:5. The hydrochloric acid decomposes at a high temperature of 860 °C, releasing highly electronegative chloride ions. These chloride ions rapidly diffuse to the interface between silicon and silicon dioxide during the growth of the silicon dioxide layer. Through chemisorption, the chloride ions capture and neutralize residual alkali metal ions such as sodium and potassium ions, as well as heavy metal ions such as iron and copper ions at the interface, forming volatile chlorides that are discharged with the exhaust gas. This passivation process significantly reduces the interface state charge density, eliminating leakage channels caused by impurity energy levels at the microstructural level. Simultaneously, the presence of chloride ions alters the activation energy of the oxidation reaction, further synergistically improving the oxidation environment of different crystal planes within the trench, resulting in a more efficient oxidation environment at the top of the trench. <100> Crystal face and sidewall <111> The oxidation rates of the crystal planes tend to be uniform. During the dry oxidation stage, the introduced high-purity oxygen ensures a denser framework structure in the silicon dioxide layer, improving the electrical breakdown strength of the dielectric layer. Through this 2:1 combination scheme, a uniformly thick and dense silicon dioxide layer is ultimately formed on the trench surface. Figure 2 As shown, this process increases the oxide layer thickness at the bottom of the trench from 350 Å in conventional processes to approximately 500 Å, and reduces the overall thickness non-uniformity from >30% to <10%. This optimization of the physical structure completely eliminates the electric field concentration phenomenon of the device under high voltage operation.

[0030] S4. Optimization of Heating and Cooling Curves and Furnace Unloading Stage. After the oxidation reaction reaches the predetermined thickness, the system stops supplying oxidizing gas and quickly switches to high-flow-rate nitrogen for purging. Subsequently, the oxidation furnace enters a controlled cooling stage. To address the significant difference in thermal expansion coefficients between silicon and silicon dioxide, this invention establishes an extremely stringent cooling curve. The cooling rate is controlled between 1 °C / min and 3 °C / min. During this slow cooling process, the molecular network within the silicon dioxide layer has sufficient time for structural rearrangement, allowing the tensile stress accumulated at the interface to be slowly released within the high-temperature plastic range. This stress release mechanism effectively blocks the initiation path of microcracks in the oxide layer and enhances the adhesion between the silicon dioxide layer and the silicon substrate.

[0031] To further optimize electrical characteristics, this embodiment adds a 45-minute isothermal annealing step when the temperature drops to 600 °C. This in-situ annealing under a nitrogen atmosphere repairs oxygen vacancy defects in the silicon dioxide film and reduces the fixed charge within the oxide layer, thereby optimizing the reverse recovery characteristics of the TVS device. After the temperature drops to a safe unloading temperature of 400 °C to 500 °C, the quartz boat is removed from the furnace tube again at a low speed of 10 cm / min. This low-speed unloading method ensures that the silicon wafer does not experience surface thermal distortion when exposed to external cold air, further reducing the risk of wafer breakage.

[0032] Combination Figure 3 A comparison of electrical performance parameters shows that the TVS devices fabricated using this process exhibit significantly improved breakdown voltage consistency, with the fluctuation range reduced from ±15% to ±5%. More importantly, due to the thorough removal of interface defects by the hydrochloric acid passivation process, the leakage current at 85% breakdown voltage decreased from 1.2 μA to 0.45 μA, a reduction of 62.5%. This technological improvement significantly reduces the static power consumption of the device in standby mode, extending the battery life of terminal devices.

[0033] Regarding reliability, reference Figure 4 The test results show that the devices fabricated using this process exhibit excellent performance in high-temperature reverse bias testing. Under harsh conditions of 150 °C and 80% breakdown voltage, the testing duration was extended from the industry standard of 168 hours to 500 hours, with leakage current drift of less than 5%, far superior to conventional processes. In temperature cycling tests, due to the optimized heating and cooling profiles releasing interfacial stress, the oxide layer remained intact after 500 severe temperature cycles, without any cracks or delamination.

[0034] From the perspective of production efficiency, such as Figure 5As shown, this invention achieves a significant breakthrough by reducing the silicon wafer breakage rate from 1.20% to 0.30%, a reduction of 75%, through lowering the oxidation temperature to 860 °C and optimizing the heating and cooling curves. The overall process yield increased from 92.5% to 97.8%, and the rework rate due to oxide layer quality issues decreased from 8% to 2.5%. These improvements in quantitative indicators resulted in an overall manufacturing cost reduction of approximately 10%.

[0035] The novel TVS trench oxide protective layer fabrication process described in this invention is applicable not only to standard silicon wafers but also exhibits excellent adaptability to heavily doped silicon substrates doped with phosphorus, boron, or arsenic. When processing silicon wafers with different doping concentrations, the constant temperature environment of 860 °C maintains the preset PN junction impurity gradient distribution without change, ensuring the physical characteristics of the breakdown voltage steepness. In practical applications, such as overvoltage protection in automotive electronic control units or surge protection in communication base stations, TVS devices produced using this process can provide more stable protection thresholds and longer service life.

[0036] In summary, this invention constructs a complete technical closed loop through systematic optimization of the charging rate, oxidation temperature, gas component ratio, and heating / cooling curves. This process improves the interface quality between the silicon dioxide layer and the silicon substrate at the physical level, achieves high uniformity of oxide layer thickness within the trench at the geometric level, and eliminates thermal mismatch stress at the mechanical level. The synergistic effect of these technical features ultimately translates into improved consistency of device electrical parameters and enhanced long-term reliability, providing solid technical support for the localization and large-scale production of high-performance transient voltage suppression diodes. Those skilled in the art can fine-tune the wet-to-dry oxygen ratio within the range of 1.5:1 to 3:1, or the hydrochloric acid to water ratio between 1:3 and 1:7, based on the actual trench depth-to-width ratio, to adapt to different product requirements; all such fine-tuning falls within the protection scope of this invention.

Claims

1. A novel process for preparing a TVS trench oxide protective layer, characterized in that, The process includes the following steps: S1. Low-temperature loading and furnace entry: The silicon substrate that has been etched and cleaned is placed in a quartz boat. Loading is carried out when the furnace opening temperature of the oxidation furnace tube is between 400 °C and 600 °C. During the loading process, the quartz boat is pushed into the constant temperature zone of the oxidation furnace tube in a stepping manner. The furnace entry speed is 5 cm / min to 15 cm / min. Nitrogen gas is introduced into the oxidation furnace tube during the loading process. S2. Temperature control and heating stage: Start the heating program of the oxidation furnace to raise the temperature inside the oxidation furnace tube from the charging temperature to 860 °C; S3. Implementation of combined oxidation process: Under constant temperature of 860 °C, dry oxygen and wet oxygen are alternately or mixedly introduced into the oxidation furnace tube to grow a silicon dioxide layer in situ on the surface of the trench. S4. Optimization of heating and cooling curves and removal from the furnace: After the oxidation reaction is completed, stop the introduction of oxidizing gas and switch to nitrogen atmosphere. Control the silicon substrate to cool down with the furnace. The cooling rate is set to 1 °C / min to 3 °C / min. After the temperature inside the furnace drops to 400 °C to 500 °C, remove the quartz boat from the furnace tube.

2. The preparation process of a novel TVS trench oxide protective layer as described in claim 1, characterized in that, In step S1, the nitrogen flow rate is such that the internal pressure of the oxidation furnace tube is maintained at 1 atm to 1.2 atm.

3. The preparation process of a novel TVS trench oxide protective layer as described in claim 1, characterized in that, In step S2, the heating process adopts a multi-stage linear heating slope. The slope of the initial heating stage is set to 3 °C / min to 5 °C / min. When the temperature reaches 800 °C, the heating slope is adjusted to 1 °C / min to 2 °C / min until the temperature stabilizes at 860 °C.

4. The preparation process of a novel TVS trench oxide protective layer as described in claim 1, characterized in that, In step S3, the thickness of the silicon dioxide layer is controlled by adjusting the time ratio of the wet oxidation process to the dry oxidation process, and the time ratio of the wet oxidation process to the dry oxidation process is set to 2:

1.

5. The preparation process of a novel TVS trench oxide protective layer as described in claim 4, characterized in that, In the wet oxygen process stage, an oxidizing gas containing water vapor and hydrochloric acid vapor is introduced into the oxidation furnace tube, wherein the ratio of hydrochloric acid to water is set to 1:

5.

6. The preparation process of a novel TVS trench oxide protective layer as described in claim 1, characterized in that, In step S3, the pressure of the oxidizing gas is maintained at 1 atm to 1.2 atm.

7. The preparation process of a novel TVS trench oxide protective layer as described in claim 1, characterized in that, In step S4, when the furnace temperature is reduced to 600 °C, an isothermal annealing stage lasting 30 to 60 minutes is added.

8. The preparation process of a novel TVS trench oxide protective layer as described in claim 1, characterized in that, In step S4, the process of removing the quartz boat from the furnace tube is carried out in a stepping manner, and the furnace exit speed is set to 5 cm / min to 15 cm / min.

Images