Multilayer ceramic capacitor

Abstract

The present invention provides a multilayer ceramic capacitor that can suppress stress concentration on the multilayer during patch mounting and can suppress cracking of the multilayer. The multilayer ceramic capacitor (10) of the present invention comprises a multilayer body (12), a first external electrode (24a), a second external electrode (24b), and a first through-hole conductor (25a) and a second through-hole conductor (25b) penetrating the multilayer body (512) along the stacking direction of a plurality of dielectric layers. In the first external electrode (24a), a first upper protrusion (41a) and a first lower protrusion (42a) protruding from other parts are formed in the portion covering the first upper protrusion (25a1) and the first lower protrusion (25a2) of the first through-hole conductor (25a). In the second external electrode (24b), a second upper protrusion (41b) and a second lower protrusion (42b) protruding from other parts are formed in the portion covering the second upper protrusion (25b1) and the second lower protrusion (25b2) of the second through-hole conductor (25b).

Description

Technical Field

[0001] This invention relates to multilayer ceramic capacitors. Background Technology

[0002] In recent years, the miniaturization and thinning of electronic devices such as portable telephones and portable music players have been promoted. Along with this, the miniaturization and thinning of stacked ceramic electronic components housed in these miniaturized and thinner electronic devices has also been promoted.

[0003] A multilayer ceramic capacitor, as a type of multilayer ceramic electronic component, includes, for example, a dielectric sheet having alternating layers of dielectric ceramics such as barium titanate and internal electrodes, as described in Patent Document 1; and external electrodes formed to cover the ends of the dielectric sheet along its length (see Patent Document 1). The multilayer ceramic capacitor disclosed in Patent Document 1 is, for example, a low-profile multilayer ceramic capacitor with a height dimension of 150 μm or less. Such a multilayer ceramic capacitor is mounted on a substrate using a pick-and-place machine.

[0004] Prior art literature

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2014-183186 Summary of the Invention

[0007] The problem the invention aims to solve

[0008] However, when using a pick-and-place machine nozzle to mount low-profile multilayer ceramic capacitors onto a mounting substrate, the impact during mounting may cause cracks in the multilayer ceramic capacitor, resulting in poor insulation.

[0009] Therefore, the main objective of this invention is to provide a multilayer ceramic capacitor that can suppress stress concentration on the multilayer during patch mounting and suppress cracking of the multilayer.

[0010] Technical solutions for solving the problem

[0011] The multilayer ceramic capacitor of the present invention is a multilayer ceramic capacitor comprising: a multilayer body including a plurality of stacked dielectric layers, and including a first main surface and a second main surface opposite to each other in the stacking direction of the plurality of dielectric layers, a first side surface and a second side surface opposite to each other in a width direction orthogonal to the stacking direction, a first end surface and a second end surface opposite to each other in a length direction orthogonal to the stacking direction and the width direction, a first internal electrode layer alternately stacked with the plurality of dielectric layers, and a second internal electrode layer alternately stacked with the plurality of dielectric layers; a first external electrode covering at least a portion of each of the first main surface and the second main surface of the multilayer body; a second external electrode covering at least a portion of each of the first main surface and the second main surface of the multilayer body; a first through-hole conductor penetrating the multilayer body along the stacking direction of the plurality of dielectric layers and connected to the first internal electrode layer; and a second through-hole conductor penetrating the multilayer body along the stacking direction of the plurality of dielectric layers and connected to the second internal electrode layer, wherein the first through-hole conductor has a first through-hole conductor protruding from the first main surface. The first via conductor has an upper protruding end and a lower protruding end protruding from the second main surface. The second via conductor has a second upper protruding end protruding from the first main surface and a second lower protruding end protruding from the second main surface. A first external electrode covers the first upper protruding end and the first lower protruding end of the first via conductor. A second external electrode covers the second upper protruding end and the second lower protruding end of the second via conductor. In the first external electrode, the portion covering the first upper protruding end of the first via conductor has a larger diameter than the portion covering the first main surface. The first upper protrusion of the first via conductor and the portion covering the first lower protrusion of the first via conductor have a first lower protrusion that protrudes more than the other portions covering the second main surface. In the second external electrode, the portion covering the second upper protrusion of the second via conductor has a second upper protrusion that protrudes more than the other portions covering the first main surface, and the portion covering the second lower protrusion of the second via conductor has a second lower protrusion that protrudes more than the other portions covering the second main surface.

[0012] Invention Effects

[0013] According to the present invention, a multilayer ceramic capacitor is provided that can suppress stress concentration on the multilayer during patch mounting and suppress cracking of the multilayer.

[0014] The above-mentioned objects, other objects, features, and advantages of the present invention will become more apparent from the following detailed description of specific embodiments with reference to the accompanying drawings. Attached Figure Description

[0015] Figure 1 This is a perspective view showing an example of a multilayer ceramic capacitor according to an embodiment of the present invention.

[0016] Figure 2This is a front view illustrating an example of a multilayer ceramic capacitor according to an embodiment of the present invention.

[0017] Figure 3 This is a top view illustrating an example of a multilayer ceramic capacitor according to an embodiment of the present invention.

[0018] Figure 4 yes Figure 1 A schematic cross-sectional view of line IV-IV involved.

[0019] Figure 5 yes Figure 4 A schematic cross-sectional view of line VV involved.

[0020] Figure 6 yes Figure 1 A cross-sectional view of line VI-VI.

[0021] Figure 7 This is a diagram showing the state in which the multilayer ceramic capacitor according to an embodiment of the present invention is mounted on a mounting substrate.

[0022] Figure 8 This is a schematic cross-sectional view showing a first modified example of a multilayer ceramic capacitor according to an embodiment of the present invention.

[0023] Figure 9 This is a diagram showing the state in which a first modified example of a multilayer ceramic capacitor according to an embodiment of the present invention is mounted on a mounting substrate.

[0024] Figure 10 This is a cross-sectional schematic diagram showing a second modified example of a multilayer ceramic capacitor according to an embodiment of the present invention.

[0025] Figure 11 This is a cross-sectional schematic diagram showing a third modified example of a multilayer ceramic capacitor according to an embodiment of the present invention.

[0026] Figure 12 (A) to (E) are diagrams illustrating the process of manufacturing a laminated chip of an example of a laminated ceramic capacitor according to an embodiment of the present invention.

[0027] Figure 13 This is a perspective view showing an example of a multilayer ceramic capacitor according to other embodiments of the present invention.

[0028] Figure 14 yes Figure 13 A schematic cross-sectional view of line XIV-XIV involved. Detailed Implementation

[0029] Hereinafter, an example of a multilayer ceramic capacitor according to this embodiment will be described.

[0030] 1. Multilayer ceramic capacitor

[0031] The multilayer ceramic capacitor 10 according to an embodiment of the present invention will be described. Figure 1 This is a perspective view showing an example of a multilayer ceramic capacitor according to an embodiment of the present invention. Figure 2 This is a front view illustrating an example of a multilayer ceramic capacitor according to an embodiment of the present invention. Figure 3 This is a top view illustrating an example of a multilayer ceramic capacitor according to an embodiment of the present invention. Figure 4 yes Figure 1 A schematic cross-sectional view of line IV-IV involved. Figure 5 yes Figure 1 A schematic cross-sectional view of line VV involved. Figure 6 yes Figure 1 A cross-sectional view of line VI-VI.

[0032] The multilayer ceramic capacitor 10 has a laminate 12 and an external electrode 24. Hereinafter, the structure will be described in the order of laminate 12 and external electrode 24.

[0033] (Layered structure)

[0034] The laminate 12 has multiple stacked dielectric layers 14 and multiple internal electrode layers 16. Furthermore, the laminate 12 includes a first main surface 12a and a second main surface 12b opposite each other in the height direction x, which is the stacking direction of the multiple dielectric layers 14; a first side surface 12c and a second side surface 12d opposite each other in the width direction y, which is orthogonal to the height direction x; and a first end surface 12e and a second end surface 12f opposite each other in the length direction z, which is orthogonal to both the height direction x and the width direction y. In this laminate 12, the corners and edges are rounded.

[0035] Furthermore, a corner is the part where three adjacent faces of the laminate 12 intersect, and an edge is the part where two adjacent faces of the laminate 12 intersect. In addition, some or all of the first main face 12a and the second main face 12b, the first side face 12c and the second side face 12d, and the first end face 12e and the second end face 12f may be formed with concave or convex features.

[0036] like Figure 4 as well as Figure 5As shown, the laminate 12 has the following in the height direction x connecting the first main surface 12a and the second main surface 12b: an effective layer portion 15a with multiple internal electrode layers 16 facing each other; a first outer layer portion 15b1 formed by multiple dielectric layers 14 disposed between the internal electrode layer 16 located on the side closest to the first main surface 12a and the first main surface 12a; and a second outer layer portion 15b2 formed by multiple dielectric layers 14 disposed between the internal electrode layer 16 located on the side closest to the second main surface 12b and the second main surface 12b.

[0037] The first outer layer 15b1 is located on the first main surface 12a side of the laminate 12, and is an assembly of multiple dielectric layers 14 located between the first main surface 12a and the inner electrode layer 16 closest to the first main surface 12a.

[0038] The second outer layer 15b2 is located on the second main surface 12b side of the laminate 12, and is an assembly of multiple dielectric layers 14 located between the second main surface 12b and the inner electrode layer 16 closest to the second main surface 12b.

[0039] Furthermore, the area sandwiched between the first outer layer 15b1 and the second outer layer 15b2 is the effective layer 15a.

[0040] The number of stacked dielectric layers 14 is not particularly limited, but it is preferable to have 3 or more and 700 or less, including the first outer layer 15b1 and the second outer layer 15b2. Furthermore, the thickness of the dielectric layer 14 is preferably 0.4 μm or more and 2.0 μm or less.

[0041] The dielectric layer 14 can be formed from a dielectric material, for example. As a dielectric material, for example, a dielectric ceramic containing a main component such as BaTiO3, CaTiO3, SrTiO3, or CaZrO3 can be used. Furthermore, materials containing secondary components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, or Ni compounds in smaller amounts than the main components can be used, depending on the desired characteristics of the laminate.

[0042] (Internal electrode layer)

[0043] like Figure 4 as well as Figure 5 As shown, the internal electrode layer 16 has a first internal electrode layer 16a and a second internal electrode layer 16b. The first internal electrode layer 16a and the second internal electrode layer 16b are stacked alternately with a dielectric layer 14 in between.

[0044] The first internal electrode layer 16a is disposed on the surface of the dielectric layer 14. The first internal electrode layer 16a has a first opposing electrode portion 18a opposite to the second internal electrode layer 16b, and a first lead-out electrode portion 20a located at one end of the first internal electrode layer 16a and extending from the first opposing electrode portion 18a to the first end face 12e of the laminate 12. The end of the first lead-out electrode portion 20a extends to the first end face 12e and is exposed.

[0045] The shape of the first opposing electrode portion 18a of the first internal electrode layer 16a is not particularly limited, but it is preferably rectangular in plan view. However, it is also possible to form rounded corners in plan view, or to form corners that are inclined (conical) in plan view. Alternatively, it may be a conical shape that is inclined in plan view as it faces a certain direction.

[0046] The shape of the first lead-out electrode portion 20a of the first internal electrode layer 16a is not particularly limited, but it is preferably rectangular in plan view. However, it is also possible to form rounded corners in plan view, or to form corners that are inclined (conical) in plan view. Alternatively, it may be a conical shape that is inclined in plan view as it faces a certain direction.

[0047] The width of the first opposing electrode portion 18a of the first internal electrode layer 16a and the width of the first lead-out electrode portion 20a of the first internal electrode layer 16a can be formed to be the same width, or the width of either one can be formed to be narrow.

[0048] The second internal electrode layer 16b is disposed on the surface of a dielectric layer 14 different from the dielectric layer 14 on which the first internal electrode layer 16a is disposed. It has a second opposing electrode portion 18b opposite to the first internal electrode layer 16a, and a second lead-out electrode portion 20b located at one end of the second internal electrode layer 16b and extending from the second opposing electrode portion 18b to the second end face 12f of the laminate 12. The end of the second lead-out electrode portion 20b extends to and is exposed on the second end face 12f.

[0049] The shape of the second opposing electrode portion 18b of the second inner electrode layer 16b is not particularly limited, but it is preferably rectangular in plan view. However, it is also possible to form rounded corners in plan view, or to form corners that are inclined (conical) in plan view. Alternatively, it may be a conical shape that is inclined in plan view as it faces a certain direction.

[0050] The shape of the second lead-out electrode portion 20b of the second inner electrode layer 16b is not particularly limited, but it is preferably rectangular in plan view. However, it is also possible to form rounded corners in plan view, or to form corners that are inclined (conical) in plan view. Alternatively, it may be a conical shape that is inclined in plan view as it faces a certain direction.

[0051] The width of the second opposing electrode portion 18b of the second internal electrode layer 16b and the width of the second lead-out electrode portion 20b of the second internal electrode layer 16b can be formed to be the same width, or the width of either one can be formed to be narrow.

[0052] like Figure 4 As shown, the laminate 12 includes: end portions (hereinafter referred to as "L-spaces") 22b of the laminate 12, formed between the end portion of the first inner electrode layer 16a opposite to the first lead-out electrode portion 20a and the second end face 12f, and between the end portion of the second inner electrode layer 16b opposite to the second lead-out electrode portion 20b and the first end face 12e. Figure 5 As shown, the laminate 12 includes: a side portion (hereinafter referred to as "W spacing") 22a of the laminate 12, formed between one end of the first counter electrode portion 18a and the second counter electrode portion 18b in the width direction y and the first side surface 12c, and between the other end of the first counter electrode portion 18a and the second counter electrode portion 18b in the width direction y and the second side surface 12d.

[0053] The first internal electrode layer 16a and the second internal electrode layer 16b can, for example, be made of a suitable conductive material, which has Ni as the main component and contains at least one selected from metals such as Cu, Ag, Pd, and Au, and alloys such as Ag-Pd alloys. The internal electrode layer 16 may also contain dielectric particles of the same compositional system as the ceramic contained in the dielectric layer 14.

[0054] Alternatively, Sn can be included in both the first internal electrode layer 16a and the second internal electrode layer 16b. By including Sn in both the first internal electrode layer 16a and the second internal electrode layer 16b, the electric field concentration at the interface between the first internal electrode layer 16a and the second internal electrode layer 16b and the dielectric layer 14 can be mitigated, thereby improving reliability under high-temperature loads. In this case, even if Sn is only included in the internal electrode layer 16 of either the first internal electrode layer 16a or the second internal electrode layer 16b, it can still exert a significant effect.

[0055] In this embodiment, the first opposing electrode portion 18a of the first internal electrode layer 16a and the second opposing electrode portion 18b of the second internal electrode layer 16b are opposed to each other across the dielectric layer 14, thereby forming an electrostatic capacitance and exhibiting the characteristics of a capacitor.

[0056] The number of stacked internal electrode layers 16 is not particularly limited, but it is preferably 2 or more and 700 or less. In addition, the thickness of the internal electrode layers 16 is preferably 0.2 μm or more and 2.0 μm or less.

[0057] (Through conductor)

[0058] like Figures 4 to 6 As shown, through-hole conductors 25 are disposed on the side of the first end face 12e and the side of the second end face 12f of the laminate 12.

[0059] The via conductor 25 has a first via conductor 25a and a second via conductor 25b.

[0060] The first via conductor 25a penetrates the portion of the laminate 12 near the first end face 12e along the height direction x, with one end protruding from the first main face 12a as the first upper protrusion 25a1 and the other end protruding from the second main face 12b as the first lower protrusion 25a2.

[0061] The first via conductor 25a penetrates the end 22b of the first lead-out electrode portion 20a, which, when viewed in the height direction x, contains only the first inner electrode layer 16a. In this case, the first via conductor 25a is electrically connected to the first lead-out electrode portion 20a of the first inner electrode layer 16a.

[0062] The first via conductor 25a preferably has a circular end face shape when viewed in the height direction x. However, the end face shape can also be elliptical, oblong, or any other arbitrary shape. Furthermore, regarding the diameter when the end face shape is circular, it is preferably in the range of at least 6 μm and less than 100 μm. Additionally, when the end face shape is elliptical, the minor axis is preferably in the range of 6 μm and less than 100 μm.

[0063] The amount of protrusion from the first main surface 12a at the first upper protruding end 25a1 of the first via conductor 25a is preferably 5 μm or more and 20 μm or less. The amount of protrusion from the second main surface 12b at the first lower protruding end 25a2 of the first via conductor 25a is preferably 5 μm or more and 20 μm or less.

[0064] The second via conductor 25b penetrates the portion of the laminate 12 near the second end face 12f along the height direction x, with one end protruding from the first main face 12a as the second upper protruding end 25b1 and the other end protruding from the second main face 12b as the second lower protruding end 25b2.

[0065] The second via conductor 25b penetrates the end 22b of the second lead-out electrode portion 20b, which, when viewed in the height direction x, contains only the second inner electrode layer 16b. In this case, the second via conductor 25b is electrically connected to the second lead-out electrode portion 20b of the second inner electrode layer 16b.

[0066] The second via conductor 25b preferably has a circular end face shape when viewed in the height direction x. However, the end face shape can also be elliptical, oblong, or any other arbitrary shape. Furthermore, regarding the diameter when the end face shape is circular, it is preferably in the range of at least 6 μm and less than 100 μm. Additionally, when the end face shape is elliptical, the minor axis is preferably in the range of 6 μm and less than 100 μm.

[0067] The amount of protrusion from the first main surface 12a at the second upper protruding end 25b1 of the second via conductor 25b is preferably 5 μm or more and 20 μm or less. The amount of protrusion from the second main surface 12b at the second lower protruding end 25b2 of the second via conductor 25b is preferably 5 μm or more and 20 μm or less.

[0068] The via conductor 25 can be, for example, made of a conductive paste containing conductive metal powder with Ag, Cu and Ni as the main components.

[0069] (External electrode)

[0070] like Figures 1 to 6 As shown, external electrodes 24 are disposed on the first end face 12e side and the second end face 12f side of the laminate 12.

[0071] The external electrode 24 includes: a base electrode layer having an upper base electrode layer 26 formed on the side of the first main surface 12a of the laminate 12 and a lower base electrode layer 27 formed on the side of the second main surface 12b of the laminate 12; and a plating layer 28 formed to cover the upper base electrode layer 26 and the lower base electrode layer 27.

[0072] The external electrode 24 has a first external electrode 24a and a second external electrode 24b.

[0073] The first external electrode 24a is disposed on a portion of the first end face 12e, a portion of the first main face 12a, and a portion of the second main face 12b of the laminate 12. In this case, the first external electrode 24a is electrically connected to the first lead-out electrode portion 20a of the first internal electrode layer 16a. Alternatively, the first external electrode 24a may also slightly surround a portion of the first side face 12c and a portion of the second side face 12d.

[0074] The first external electrode 24a is configured to cover the first upper protruding end 25a1 of the first through-hole conductor 25a, which protrudes from the first main surface 12a of the laminate 12. In the first external electrode 24a, the portion covering the first upper protruding end 25a1 has a first upper protrusion 41a that protrudes further than the other portions covering the first main surface 12a. Thus, the shape of the first external electrode 24a corresponds to the shape of the first upper protruding end 25a1, protruding from the surface 24x.

[0075] The first external electrode 24a is configured to cover the first lower protruding end 25a2 of the first through-hole conductor 25a, which protrudes from the second main surface 12b of the laminate 12. In the first external electrode 24a, the portion covering the first lower protruding end 25a2 has a first lower protrusion 42a that protrudes further than the other portions covering the second main surface 12b. Thus, the first external electrode 24a protrudes from the surface 24x in a shape corresponding to the shape of the first lower protruding end 25a2.

[0076] The second external electrode 24b is disposed on a portion of the second end face 12f, the first main face 12a, and the second main face 12b of the laminate 12. In this case, the second external electrode 24b is electrically connected to the second lead-out electrode portion 20b of the second internal electrode layer 16b. Alternatively, the second external electrode 24b may also slightly surround a portion of the first side face 12c and a portion of the second side face 12d.

[0077] The second external electrode 24b is configured to cover the second upper protruding end 25b1 of the second through-hole conductor 25b, which protrudes from the first main surface 12a of the laminate 12. In the second external electrode 24b, the portion covering the second upper protruding end 25b1 has a second upper protrusion 41b that protrudes further than the other portions covering the first main surface 12a. Thus, the second external electrode 24b protrudes from the surface 24y in a shape corresponding to the shape of the second upper protruding end 25b1.

[0078] The second external electrode 24b is configured to cover the second lower protruding end 25b2 of the second via conductor 25b, which protrudes from the second main surface 12b of the laminate 12. In the second external electrode 24b, the portion covering the second lower protruding end 25b2 has a second lower protrusion 42b that protrudes further than the other portions covering the second main surface 12b. Thus, the second external electrode 24b protrudes from the surface 24y in a shape corresponding to the shape of the second lower protruding end 25b2.

[0079] Furthermore, the first upper protrusion 41a, the first lower protrusion 42a, the second upper protrusion 41b, and the second lower protrusion 42b each preferably have a dimension of 5 μm or more along the height direction x from the surface 24x and the surface 24y, respectively. Furthermore, in this case, it is preferable that the height of the first upper protrusion 41a, determined by the protrusion amount of the first upper protrusion 25a1 of the first through-hole conductor 25a and the thickness of the first external electrode 24a, is the same as the height of the second upper protrusion 41b, determined by the protrusion amount of the second upper protrusion 25b1 of the second through-hole conductor 25b and the thickness of the second external electrode 24b. Similarly, it is preferable that the height of the first lower protrusion 42a, determined by the protrusion amount of the first lower protrusion 25a2 of the first through-hole conductor 25a and the thickness of the first external electrode 24a, is the same as the height of the second lower protrusion 42b, determined by the protrusion amount of the second lower protrusion 25b2 of the second through-hole conductor 25b and the thickness of the second external electrode 24b.

[0080] (Base electrode layer)

[0081] The upper substrate electrode layer 26 of the substrate electrode layer has a first upper substrate electrode layer 26a and a second upper substrate electrode layer 26b.

[0082] The lower substrate electrode layer 27 of the substrate electrode layer has a first lower substrate electrode layer 27a and a second lower substrate electrode layer 27b.

[0083] The first upper base electrode layer 26a is formed to cover a portion of the first main surface 12a on the first end face 12e side of the laminate 12 and the first upper protruding end 25a1 of the first via conductor 25a, but does not cover the first end face 12e of the laminate 12. Alternatively, the first upper base electrode layer 26a may be configured not to cover a portion of the first via conductor 25a.

[0084] The first lower base electrode layer 27a is formed to cover a portion of the second main surface 12b on the side of the first end face 12e of the laminate 12 and the first lower protruding end 25a2 of the first via conductor 25a, but does not cover the first end face 12e of the laminate 12. Alternatively, the first lower base electrode layer 27a may be configured not to cover a portion of the first via conductor 25a.

[0085] The second upper base electrode layer 26b is formed to cover a portion of the first main surface 12a on the second end face 12f side of the laminate 12 and the second upper protruding end 25b1 of the second via conductor 25b, but does not cover the second end face 12f of the laminate 12. Alternatively, the second upper base electrode layer 26b may be configured not to cover a portion of the second via conductor 25b.

[0086] The second lower base electrode layer 27b is formed to cover a portion of the second main surface 12b on the second end face 12f side of the laminate 12 and the second lower protruding end 25b2 of the second via conductor 25b, but does not cover the second end face 12f of the laminate 12. Alternatively, the second lower base electrode layer 27b may be configured not to cover a portion of the second via conductor 25b.

[0087] The upper substrate electrode layer 26 and the lower substrate electrode layer 27 formed from the thin film layer are preferably formed by a thin film formation method such as sputtering or vapor deposition. In particular, the upper substrate electrode layer 26 and the lower substrate electrode layer 27 formed from the thin film layer are preferably sputtered electrodes formed by sputtering. Hereinafter, electrodes formed by sputtering will be described.

[0088] When the upper substrate electrode layer 26 and the lower substrate electrode layer 27 are formed using sputtering electrodes, it is preferable to directly form the sputtering electrode on a portion of the second main surface 12b of the laminate 12.

[0089] Furthermore, the upper base electrode layer 26 and the lower base electrode layer 27 may contain metals such as Ni, Cu, Ag, Pd, Ag-Pd alloy, or Au. In this case, the upper base electrode layer 26 and the lower base electrode layer 27 preferably contain the same dielectric material as the dielectric ceramic contained in the dielectric layer 14 as a common material. By including a common material, the shrinkage behavior of the upper base electrode layer 26 and the lower base electrode layer 27 during firing can be made similar to the shrinkage behavior of the laminate 12, thus preventing the upper base electrode layer 26 and the lower base electrode layer 27 from peeling off from the laminate 12.

[0090] (plating layer)

[0091] The plating layer 28 includes a first plating layer 28a and a second plating layer 28b.

[0092] The first plating layer 28a is configured to integrally cover the first upper substrate electrode layer 26a, the first lower substrate electrode layer 27a, and the first end face 12e of the laminate 12.

[0093] The second plating layer 28b is configured to integrally cover the second upper substrate electrode layer 26b, the second lower substrate electrode layer 27b, and the second end face 12f of the laminate 12.

[0094] The plating layer 28 can be formed by a single layer or by multiple layers.

[0095] The plating layer 28 may contain at least one metal as the main metal component, such as Cu, Ni, Ag, Pd, Ag-Pd alloy, Au, etc., without any particular limitation.

[0096] When the plating layer 28 is a single layer, for example, when Ni is used to form the first internal electrode layer 16a and the second internal electrode layer 16b, it is preferable to use a Cu plating layer that has good adhesion to Ni.

[0097] When the plating layer 28 is composed of multiple layers, preferably, the lower layer that is directly bonded to the first internal electrode layer 16a and the second internal electrode layer 16b is a Cu plating layer as described above, and the upper layer disposed on the lower layer is a Ni plating layer for preventing erosion by solder. When the plating layer 28 has a three-layer structure, it is preferable that from the side of the stack 12, the layers are Cu plating layer, Ni plating layer, Sn plating layer, or Cu plating layer, Ni plating layer, Cu plating layer, etc., but it is not limited to this.

[0098] The thickness of each layer of the plating layer 28 is preferably 0.5 μm or more and 10.0 μm or less.

[0099] The dimension in the length direction z of the stacked ceramic capacitor 10, which includes the stacked body 12, the first external electrode 24a, and the second external electrode 24b, is defined as dimension L. The dimension in the height direction x of the stacked ceramic capacitor 10, which includes the stacked body 12, the first external electrode 24a, and the second external electrode 24b, is defined as dimension T. The dimension in the width direction y of the stacked ceramic capacitor 10, which includes the stacked body 12, the first external electrode 24a, and the second external electrode 24b, is defined as dimension W.

[0100] Regarding the dimensions of the multilayer ceramic capacitor 10, preferably, the length dimension L in the z-direction is 0.2 mm or more and 3.2 mm or less, the width dimension W in the y-direction is 0.1 mm or more and 2.5 mm or less, and the height dimension T in the x-direction is 0.04 mm or more and 0.30 mm or less.

[0101] Here, the state of mounting the multilayer ceramic capacitor 10 on the mounting substrate 50 using the pick-and-place nozzle 60 will be described.

[0102] Figure 7 This is a diagram showing the state in which the multilayer ceramic capacitor according to an embodiment of the present invention is mounted on a mounting substrate.

[0103] like Figure 7As shown, a pick-and-place machine nozzle 60 is used to pick up and mount the multilayer ceramic capacitor 10 according to an embodiment of the present invention onto a mounting substrate 50. The mounting substrate 50 includes a substrate core 52 and conductor connection pads 54. The substrate core 52 is, for example, a substrate comprising a material in which a substrate of a mixture of glass cloth and glass nonwoven fabric is impregnated with epoxy resin or polyimide resin, or a ceramic substrate manufactured by sintering a sheet of mixed ceramic and glass. In addition, the substrate core 52 may be a substrate consisting of a single layer or a substrate consisting of multiple layers stacked together.

[0104] One main surface of the core material 52 of the substrate constitutes a substrate-side mounting surface 52a, on which a conductor connection disk 54 is disposed and which serves as the mounting surface of the stacked ceramic capacitor 10.

[0105] The conductor connection tray 54 includes a first conductor connection tray 54a and a second conductor connection tray 54b. The first conductor connection tray 54a is electrically and mechanically connected to the first external electrode 24a of the multilayer ceramic capacitor 10 via a bonding material 56. The second conductor connection tray 54b is electrically and mechanically connected to the second external electrode 24b of the multilayer ceramic capacitor 10 via a bonding material 56.

[0106] The material of the conductor pad 54 is not particularly limited; for example, metals such as copper, gold, palladium, and platinum can be used. Furthermore, the thickness of the conductor pad 54 (i.e., the dimension in the height direction x) is not particularly limited, but is preferably set to 20 μm or more and 200 μm or less. Regarding the bonding material 56, solder can be used, for example.

[0107] The second main surface 12b of the multilayer ceramic capacitor 10 is mounted on the mounting substrate 50, so that it faces the mounting surface 52a on the substrate side. At this time, the first lower protrusion 42a and the second lower protrusion 42b of the multilayer ceramic capacitor 10 are engaged with the mounting substrate 50.

[0108] On the other hand, if the multilayer ceramic capacitor 10 is attracted by the pick-and-place machine nozzle 60 during surface mount installation, the first upper protrusion 41a and the second upper protrusion 41b of the multilayer ceramic capacitor 10 will come into contact with the pick-and-place machine nozzle 60.

[0109] Furthermore, when the first lower protrusion 42a and the second lower protrusion 42b come into contact with the mounting substrate 50 (conductor connection tray 54), the multilayer ceramic capacitor 10 comes into contact with the pick-and-place nozzle 60. As a result, stress concentration at the end of the external electrode 24 disposed on the second main surface 12b side of the multilayer ceramic capacitor 10 can be reduced during surface mount installation.

[0110] Therefore, when the multilayer ceramic capacitor is made thinner, especially when the multilayer 12 is made thinner, the generation of cracks during installation can be suppressed.

[0111] Alternatively, in the multilayer ceramic capacitor 10, the structure can be configured such that the first lead-out electrode portion 20a of the first inner electrode layer 16a and the second lead-out electrode portion 20b of the second inner electrode layer 16b are not exposed on the first end face 12e and the second end face 12f of the multilayer body 12. Even in this case, the electrical connection between the first external electrode 24a and the second external electrode 24b and the first inner electrode layer 16a and the second inner electrode layer 16b can be ensured by means of the first via conductor 25a and the second via conductor 25b.

[0112] Therefore, the adhesion between the multilayer ceramic capacitor 10 and the substrate is improved when the multilayer ceramic capacitor 10 is mounted. In addition, the mounting status of the multilayer ceramic capacitor 10 can be easily determined by visual identification. Furthermore, the first plating layer 28a located on the first end face 12e and the second end face 12f can be omitted or made thinner, thereby reducing the thickness of the plating layer 28.

[0113] Next, various modifications of the multilayer ceramic capacitor according to this embodiment will be described. Furthermore, for these modifications, the same reference numerals are used for components corresponding to those in the above embodiment, and detailed descriptions thereof are omitted.

[0114] (1) First variation

[0115] A multilayer ceramic capacitor according to a first variation of the embodiments of the present invention will be described. Figure 8 This is a schematic cross-sectional view of a multilayer ceramic capacitor 10A, which is an example of a multilayer ceramic capacitor according to a first variation of an embodiment of the present invention.

[0116] In the multilayer ceramic capacitor 10A according to the first modification, the first external electrode 24a has a structure in which the portion covering the first end face 12e of the multilayer 12, the portion covering a portion of the first main face 12a, and the portion covering a portion of the second main face 12b are each separate. Similarly, the second external electrode 24b has a structure in which the portion covering the second end face 12f of the multilayer 12, the portion covering a portion of the first main face 12a, and the portion covering a portion of the second main face 12b are each separate.

[0117] The first external electrode 24a is configured as follows: The first upper base electrode layer 26a is positioned on the first main surface 12a to selectively cover the first upper protruding end 25a1 of the first via conductor 25a. The first lower base electrode layer 27a is positioned on the second main surface 12b to selectively cover the first lower protruding end 25a2 of the first via conductor 25a and the portion of the laminate closer to the center of the laminate 12 than the first lower protruding end 25a2. The first plating layer 28a is configured to cover the first end face 12e.

[0118] The second external electrode 24b is configured as follows: The second upper base electrode layer 26b is positioned on the first main surface 12a to selectively cover the second upper protrusion 25b1 of the second via conductor 25b. The second lower base electrode layer 27b is positioned on the second main surface 12b to selectively cover the second lower protrusion 25b2 of the second via conductor 25b and the portion of the laminate closer to the center of the laminate 12 than the second lower protrusion 25b2. The second plating layer 28b is configured to cover the second end face 12f.

[0119] Hereinafter, regarding the multilayer ceramic capacitor 10A, the first upper substrate electrode layer 26a and the second upper substrate electrode layer 26b are referred to as the first main surface electrode, and the first lower substrate electrode layer 27a and the second lower substrate electrode layer 27b are referred to as the second main surface electrode. Furthermore, the first plating layer 28a disposed on the first end face 12e is referred to as the first end face electrode, and the second plating layer 28b disposed on the second end face 12f is referred to as the first end face electrode.

[0120] Furthermore, in the multilayer ceramic capacitor 10A, the first plating layer 28a is configured to cover the first upper substrate electrode layer 26a and the first lower substrate electrode layer 27a. Additionally, the second plating layer 28b is configured to cover the second upper substrate electrode layer 26b and the second lower substrate electrode layer 27b.

[0121] The first modified example of the multilayer ceramic capacitor 10A, by having the above structure, enables the thickness of the external electrode 24 in the stacking direction to be reduced, thereby providing a multilayer ceramic capacitor that suppresses the generation of cracks during installation and is further thinned.

[0122] Furthermore, the multilayer ceramic capacitor 10A according to the first modification example achieves the following effect by configuring the second main surface electrode on the second main surface 12b of the multilayer 12 to cover the portion of the multilayer 12 near the center. That is, in Figure 7During the mounting of the stacked ceramic capacitor 10 shown, the impact applied to the stacked ceramic capacitor 10 from the pick-and-place machine nozzle 60 is mainly transmitted from the first upper protrusion 41a and the second upper protrusion 41b to the first lower protrusion 42a and the second lower protrusion 42b via the first through-hole conductor 25a and the second through-hole conductor 25b, respectively.

[0123] At this time, in the multilayer ceramic capacitor 10A involved in the first modification, the second main electrode absorbs the stress transmitted to the first lower protrusion 42a and the second lower protrusion 42b, thereby further reducing the situation where the stress from the pick-and-place machine nozzle 60 is directly transmitted to the multilayer 12, and alleviating the damage to the multilayer 12.

[0124] Furthermore, the mounting of the multilayer ceramic capacitor 10A involved in the first modification to the mounting substrate 50 is performed in the following manner, namely, as follows: Figure 9 As shown, the first conductor connection pad 54a and the second conductor connection pad 54b disposed on the mounting substrate 50 are connected to the first end face electrode and the second end face electrode via bonding material 56. Therefore, the first and second main face electrodes do not need to be used for mounting, thus reducing the mounting area on the multilayer ceramic capacitor 10A.

[0125] Furthermore, by configuring the first plating layer 28a to cover the first upper substrate electrode layer 26a and the first lower substrate electrode layer 27a, and configuring the second plating layer 28b to cover the second upper substrate electrode layer 26b and the second lower substrate electrode layer 27b, more mounting positions in the multilayer ceramic capacitor 10A can be obtained.

[0126] (2) Second variation

[0127] Next, the multilayer ceramic capacitor 10B involved in the second modification will be described.

[0128] Regarding the laminated ceramic capacitor 10B involved in the second modification example, such as Figure 10 As shown, the structure of the external electrode 24 of the multilayer ceramic capacitor 10A according to the first modification example can also be combined with the multilayer ceramic capacitor 10 of the embodiment of the present invention. That is, the external electrode 24 can also be configured to include the base electrode layers 26, 27. Thus, with Figure 8 Similarly, the stacked ceramic capacitor 10A shown can further reduce the direct transmission of stress from the pick-and-place machine nozzle 60 to the stack 12, thereby mitigating damage to the stack 12.

[0129] (3) Third variation

[0130] Next, the third variation of the embodiments of the present invention, involving a multilayer ceramic capacitor 10C, will be described. Figure 11 This is a schematic cross-sectional view illustrating a multilayer ceramic capacitor according to a third variation of an embodiment of the present invention.

[0131] In the third variation of the multilayer ceramic capacitor 10C, the number of via conductors 25 becomes arbitrary. Specifically, as... Figure 11 As shown, two first via conductors 25a are arranged along the width direction y, through which the ends 22b of the first lead-out electrode portion 20a, which only contains the first inner electrode layer 16a, are passed when viewed in the height direction x. Similarly, two second via conductors 25b are arranged along the width direction y, through which the ends 22b of the second lead-out electrode portion 20b, which only contains the second inner electrode layer 16b, are passed when viewed in the height direction x.

[0132] The preferred number of via conductors 25 varies depending on the size of the multilayer ceramic capacitor 10C. Specifically, when the size of the multilayer ceramic capacitor 10C is 0.4 mm or more in the length direction z and 0.2 mm or more in the width direction y, the first via conductor 25a and the second via conductor 25b are preferably each two or more.

[0133] Furthermore, the position of the via conductor 25, when viewed in the height direction x, preferably corresponds to the position of the pick-and-place machine used to mount the multilayer ceramic capacitor 10C. That is, it is preferably set to... Figure 7 The pick-and-place machine nozzles 60 shown are each equally connected to the first via conductor 25a and the second via conductor 25b of the via conductor 25.

[0134] Therefore, even when the multilayer ceramic capacitor is made thinner, the mounting substrate can be stably mounted according to the size of the multilayer ceramic capacitor, and the generation of cracks during mounting can be effectively suppressed.

[0135] 2. Manufacturing method of multilayer ceramic capacitors

[0136] Hereinafter, a method for manufacturing a multilayer ceramic capacitor, which is an example of the multilayer ceramic capacitor according to the above embodiments, will be described.

[0137] First, a conductive paste for the dielectric sheet and internal electrodes is prepared. The conductive paste for the dielectric sheet and internal electrode layer contains an adhesive (e.g., a known organic adhesive) and an organic solvent (e.g., a known organic adhesive).

[0138] Next, conductive paste for the internal electrodes is printed onto the dielectric sheet in a given pattern using methods such as screen printing or gravure printing to form the internal electrode pattern. Additionally, an outer dielectric sheet without the internal electrode pattern is also manufactured.

[0139] A given number of outer layer dielectric sheets without internal electrode patterns are stacked, and dielectric sheets with internal electrode patterns corresponding to the first internal electrode layer 16a and dielectric sheets with internal electrode patterns corresponding to the second internal electrode layer 16b are alternately stacked on them. Then, a given number of outer layer dielectric sheets without internal electrode patterns are stacked on them, thereby creating a laminated sheet.

[0140] Furthermore, laminated sheets are pressed in the lamination direction using methods such as isostatic pressing to produce laminated blocks.

[0141] Next, the stacked block is cut to the given size, resulting in stacked pieces 70. Then, a rolling process can be performed to round the corners and edges of the stacked pieces 70. This yields... Figure 12 The stacked pieces 70 shown in (A).

[0142] Next, as Figure 12 As shown in (B), a protective film 74a is provided on the entire surface of the first main surface of the obtained laminated sheet 70, and a protective film 74b is provided on the entire surface of the second main surface. The protective film 74a and the protective film 74b can be, for example, sheets or films made of materials such as polyethylene naphthalate (PEN), polyamide, or polyimide.

[0143] Next, as Figure 12 As shown in (C), in the stacked small piece provided with protective films 74a and 74b, a through hole 76a as a through hole is formed at a given position where only the first internal electrode pattern 72a is stacked, and a through hole 76b as a through hole is formed at a given position where only the second internal electrode pattern 72b is stacked. The through holes 76a and 76b can be formed, for example, using a laser such as a CO2 laser.

[0144] Next, as Figure 12 As shown in (D), in the laminated sheet 70 with protective films 74a and 74b, through-hole 76a is filled with through-hole conductor paste 78a, and through-hole 76b is filled with through-hole conductor paste 78b. Regarding the through-hole conductor pastes 78a and 78b, for example, it is preferable to mix a given proportion of common material in addition to conductive metal powders mainly composed of Ag, Cu, and Ni, taking into account the thermal shrinkage during firing of the laminated sheet in subsequent processes and the tightness with through-holes 76a and 76b.

[0145] Furthermore, the via conductor pastes 78a and 78b are preferably filled to be flush with the respective surfaces of the protective films 74a and 74b.

[0146] Next, as Figure 12 As shown in (E), the protective film 74a and protective film 74b are removed from the laminated piece 70, which has via conductor paste 78a filling through hole 76a and via conductor paste 78b filling through hole 76b. As a result, on the first main surface side of the laminated piece 70, one end of the via conductor paste 78a filling through hole 76a protrudes out, forming the first upper protruding end 25a1 of the completed first via conductor 25a. Furthermore, on the first main surface side, one end of the via conductor paste 78b filling through hole 76b protrudes out, forming the second upper protruding end 25b1 of the completed second via conductor 25b.

[0147] Similarly, on the second main surface side, the other end of the via conductor paste 78a filling the through hole 76a is exposed in a protruding state, thereby forming the first lower protruding end 25a2 of the completed first via conductor 25a. Furthermore, on the second main surface side, the other end of the via conductor paste 78b filling the through hole 76b is exposed in a protruding state, thereby forming the second lower protruding end 25b2 of the completed second via conductor 25b.

[0148] Next, the stacked small pieces 70 are fired to produce the stacked body 12. Regarding the firing temperature, although it depends on the ceramic and the material of the internal electrode layer 16, it is preferably above 900°C and below 1400°C.

[0149] Next, a first upper substrate electrode layer 26a and a second upper substrate electrode layer 26b are formed by sputtering on a portion of the first main surface 12a of the laminate 12, which includes one end of the conductive paste corresponding to the first upper protrusion 25a1, and a portion of the first main surface 12a of the laminate 12, which includes one end of the conductive paste corresponding to the second upper protrusion 25b1. Alternatively, when forming the first upper substrate electrode layer 26a by sputtering, it may be formed without covering a portion of the first upper protrusion 25a1, and similarly, when forming the second upper substrate electrode layer 26b by sputtering, it may be formed without covering a portion of the second upper protrusion 25b1.

[0150] Similarly, a first lower substrate electrode layer 27a and a second lower substrate electrode layer 27b of a lower substrate electrode layer 27 are formed by sputtering on a portion of the second main surface 12b of the laminate 12, which includes one end of the conductive paste corresponding to the first lower protrusion 25a2, and a portion of the second main surface 12b of the laminate 12, which includes one end of the conductive paste corresponding to the second lower protrusion 25b2. Furthermore, when forming the first lower substrate electrode layer 27a by sputtering, it may be formed so that a portion of the first lower protrusion 25a2 is not covered, and when forming the second lower substrate electrode layer 27b by sputtering, it may also be formed so that a portion of the second lower protrusion 25b2 is not covered.

[0151] Next, a first plating layer 28a and a second plating layer 28b of plating layer 28 are formed on the upper substrate electrode layer 26, the lower substrate electrode layer 27, and the first end face 12e and the second end face 12f of the laminate 12, respectively. The first plating layer 28a is formed to continuously cover the first upper substrate electrode layer 26a, the first end face 12e, and the first lower substrate electrode layer 27a, and the second plating layer 28b is formed to continuously cover the second upper substrate electrode layer 26b, the second end face 12f, and the second lower substrate electrode layer 27b. Specifically, the plating layer 28 is assumed to be a Cu plating layer, formed by electrolytic plating or electroless plating.

[0152] At this point, the laminate 12 after plating is subjected to heat treatment to remove residual moisture remaining in the plating film and at the interface between the ceramic and the plating layer.

[0153] In addition, in manufacturing Figure 8 In the case of the multilayer ceramic capacitor 10A involved in the first modified example shown, the process after obtaining the multilayer body 12 is as follows. That is, at one end of the conductive paste corresponding to the first upper protrusion 25a1, at one end of the conductive paste corresponding to the first lower protrusion 25a2, and at the portion closer to the center side of the multilayer body 12 than the end of the conductive paste corresponding to the first lower protrusion 25a2, a first upper base electrode layer 26a of the upper base electrode layer 26 and a first lower base electrode layer 27a of the lower base electrode layer 27 are selectively formed respectively. Similarly, at one end of the conductive paste corresponding to the second upper protrusion 25b1, at one end of the conductive paste corresponding to the second lower protrusion 25b2, and at the portion closer to the center of the laminate 12 than the end of the conductive paste corresponding to the second lower protrusion 25b2, a second upper base electrode layer 26b of the upper base electrode layer 26 and a second lower base electrode layer 27b of the lower base electrode layer 27 are selectively formed respectively.

[0154] Next, a first plating layer 28a is formed, covering the first upper substrate electrode layer 26a, the first lower substrate electrode layer 27a, and the first end face 12e of the laminate 12. Similarly, a second plating layer 28b is formed, covering the second upper substrate electrode layer 26b, the second lower substrate electrode layer 27b, and the second end face 12f of the laminate 12. Thus, the first external electrode 24a and the second external electrode 24b are obtained.

[0155] As described above, manufacturing Figure 1 The stacked ceramic capacitor 10 shown.

[0156] According to the manufacturing method of the multilayer ceramic capacitor in this embodiment, when the multilayer ceramic capacitor is made thinner, especially when the multilayer body 12 is made thinner, it is possible to obtain a multilayer ceramic capacitor that can suppress the generation of cracks during installation.

[0157] 3. Other embodiments involving multilayer ceramic capacitors

[0158] An example of a multilayer ceramic capacitor 510 according to other embodiments of the present invention will be described.

[0159] Figure 13 This is a perspective view showing an example of a multilayer ceramic capacitor according to other embodiments of the present invention. Figure 14 yes Figure 13 A schematic cross-sectional view of line XIV-XIV involved.

[0160] Figure 13 The multilayer ceramic capacitor 510 shown includes a multilayer body 512 and external electrodes 524 and 525.

[0161] The laminate 512 includes multiple dielectric layers 514 and multiple internal electrode layers 516. The laminate 512 has a first main surface 512a and a second main surface 512b opposing each other in the height direction x, a first side surface 512c and a second side surface 512d opposing each other in the width direction y (orthogonal to the height direction x), and a third side surface 512e and a fourth side surface 512f opposing each other in the length direction z (orthogonal to both the height direction x and the width direction y). The first main surface 512a and the second main surface 512b extend along the width direction y and the length direction z, respectively. The first side surface 512c and the second side surface 512d extend along the height direction x and the width direction y, respectively. The third side surface 512e and the fourth side surface 512f extend along the height direction x and the length direction z, respectively. Therefore, the so-called height direction x is the direction that connects the first main surface 512a and the second main surface 512b, the so-called width direction y is the direction that connects the first side surface 512c and the second side surface 512d, and the so-called length direction z is the direction that connects the third side surface 512e and the fourth side surface 512f.

[0162] Furthermore, the laminate 512 preferably has rounded corners at its corners and edges. Here, the corners are the parts where three faces of the laminate 512 intersect, and the edges are the parts where two faces of the laminate 512 intersect.

[0163] The laminate 512 has the following in the height direction x connecting the first main surface 512a and the second main surface 512b: an effective layer portion with multiple internal electrode layers 516 facing each other; a first outer layer portion formed by multiple dielectric layers 514 disposed between the internal electrode layer 516 located on the side closest to the first main surface 512a and the first main surface 512a; and a second outer layer portion formed by multiple dielectric layers 514 disposed between the internal electrode layer 516 located on the side closest to the second main surface 512b and the second main surface 512b.

[0164] The first outer layer is located on the first main surface 512a side of the laminate 512, and is an assembly of multiple dielectric layers 514 located between the first main surface 512a and the inner electrode layer 516 closest to the first main surface 512a and between multiple dielectric layers 514.

[0165] The second outer layer is located on the second main surface 512b side of the laminate 512, and is an assembly of multiple dielectric layers 514 located between the second main surface 512b and the inner electrode layer 516 closest to the second main surface 512b and between multiple dielectric layers 514.

[0166] Furthermore, the area sandwiched between the first outer layer and the second outer layer is the effective layer 515a.

[0167] The thickness of the first outer layer 515b1 and the second outer layer is preferably 3 μm or more and 15 μm or less. Furthermore, the region sandwiched between the two outer layers is the effective layer. That is, the effective layer is the region where the inner electrode layer 516 is stacked.

[0168] The dielectric layer 514 can be formed of a dielectric material, for example. As the dielectric material, dielectric ceramics containing main components such as BaTiO3, CaTiO3, SrTiO3, and CaZrO3 can be used. Alternatively, materials with secondary components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds added to these main components can also be used.

[0169] like Figure 14 As shown, the internal electrode layer 516 has a plurality of first internal electrode layers 516a and a plurality of second internal electrode layers 516b. The first internal electrode layers 516a and the second internal electrode layers 516b are stacked alternately with a dielectric layer 514 in between.

[0170] The first internal electrode layer 516a is disposed on the surface of the dielectric layer 514. In addition, the first internal electrode layer 516a has a first opposing electrode portion 518a that is opposite to the first main surface 512a and the second main surface 512b and is also opposite to the second internal electrode layer 516b, and is stacked in the direction that connects the first main surface 512a and the second main surface 512b.

[0171] Furthermore, the second internal electrode layer 516b is disposed on the surface of a dielectric layer 514 that is different from the dielectric layer 514 on which the first internal electrode layer 516a is disposed. The second internal electrode layer 516b has a second opposing electrode portion 518b that is opposite to the first main surface 512a and the second main surface 512b, and is stacked in the direction that connects the first main surface 512a and the second main surface 512b.

[0172] like Figure 14 As shown, the first internal electrode layer 516a is led out to the first side surface 512c and the third side surface 512e of the laminate 512 via the first lead-out electrode portion 520a, and is led out to the second side surface 512d and the fourth side surface 512f of the laminate 512 via the second lead-out electrode portion 520b. Furthermore, the width of the first lead-out electrode portion 520a leading to the first side surface 512c can be approximately equal to the width leading to the third side surface 512e, and the width of the second lead-out electrode portion 520b leading to the second side surface 512d can be approximately equal to the width leading to the fourth side surface 512f.

[0173] That is, the first lead-out electrode portion 520a is led out to the third side surface 512e of the laminate 512, and the second lead-out electrode portion 520b is led out to the fourth side surface 512f of the laminate 512.

[0174] The second internal electrode layer 516b is led out to the first side surface 512c and the fourth side surface 512f of the laminate 512 via the third lead-out electrode portion 521a, and to the second side surface 512d and the third side surface 512e of the laminate 512 via the fourth lead-out electrode portion 521b. Furthermore, the width of the third lead-out electrode portion 521a leading to the first side surface 512c can be approximately equal to the width leading to the fourth side surface 512f, and the width of the fourth lead-out electrode portion 521b leading to the second side surface 512d can be approximately equal to the width leading to the third side surface 512e.

[0175] That is, the third lead-out electrode portion 521a is led out to the fourth side surface 512f side of the laminate 512, and the fourth lead-out electrode portion 521b is led out to the second side surface 512d side of the laminate 512.

[0176] Furthermore, when viewing the stacked ceramic capacitor 510 from the stacking direction, it is preferable that the straight line connecting the first lead-out electrode portion 520a and the second lead-out electrode portion 520b of the first internal electrode layer 516a intersects the straight line connecting the third lead-out electrode portion 521a and the fourth lead-out electrode portion 521b of the second internal electrode layer 516b.

[0177] Furthermore, in the sides 512c, 512d, 512e, and 512f of the laminate 512, preferably, the first lead-out electrode portion 520a of the first internal electrode layer 516a and the fourth lead-out electrode portion 521b of the second internal electrode layer 516b are led out to opposite positions, and the second lead-out electrode portion 520b of the first internal electrode layer 516a and the third lead-out electrode portion 521a of the second internal electrode layer 516b are led out to opposite positions.

[0178] In addition, such as Figure 14 As shown, the laminate 512 includes: a side portion (L-space) 522b of the laminate 512, formed between one end of the first counter electrode portion 518a in the length direction z and the third side portion 512e, and between the other end of the second counter electrode portion 518b in the length direction z and the fourth side portion 512f.

[0179] Furthermore, such as Figure 14 As shown, the laminate 512 includes: a side portion (W spacing) 522a of the laminate 512, formed between one end of the first counter electrode portion 518a in the width direction y and the first side portion 512c, and between the other end of the second counter electrode portion 518b in the width direction y and the second side portion 512d.

[0180] The material of the inner electrode layer 516 can be, for example, metals such as Ni, Cu, Ag, Pd, and Au, or alloys containing one of these metals, such as Ag-Pd alloys. The inner electrode layer 516 may also contain dielectric particles of the same composition as the ceramic contained in the dielectric layer 514.

[0181] Alternatively, Sn can be included in both the first internal electrode layer 516a and the second internal electrode layer 516b. By including Sn in the first internal electrode layer 516a and the second internal electrode layer 516b, the potential barrier height at the interface between the first internal electrode layer 516a and the second internal electrode layer 516b and the dielectric layer 514 can be increased, and the thickness of the depletion layer can be increased. This can alleviate the concentration of electric field at the interface and improve the reliability under high-temperature loads. In this case, even if Sn is only included in the internal electrode layer 516 of either the first internal electrode layer 516a or the second internal electrode layer 516b, it can still exert a significant effect.

[0182] (Through conductor)

[0183] A through-hole conductor 252 is disposed on the corner side formed by the first side 512c and the third side 512e and the corner side formed by the second side 512d and the fourth side 512f of the laminate 512.

[0184] A through-hole conductor 253 is disposed on the corner side formed by the first side 512c and the fourth side 512f and the corner side formed by the second side 512d and the third side 512e of the laminate 512.

[0185] The via conductor 252 has a first via conductor 252a and a second via conductor 252b.

[0186] The first via conductor 252a penetrates the corner side portion of the laminate 512 formed by the first side surface 512c and the third side surface 512e along the height direction x, with one end protruding from the first main surface 512a as the first upper protruding end 252a1 and the other end protruding from the second main surface 512b as the first lower protruding end 252a2.

[0187] The first via conductor 252a penetrates the end 522b of the first lead-out electrode portion 520a, which, when viewed in the height direction x, contains only the first inner electrode layer 516a. In this case, the first via conductor 252a is electrically connected to the first lead-out electrode portion 520a of the first inner electrode layer 516a.

[0188] The first via conductor 252a preferably has a circular end face shape when viewed in the height direction x. However, the end face shape can also be elliptical, oblong, or any other arbitrary shape. Furthermore, regarding the diameter when the end face shape is circular, it is preferably in the range of at least 6 μm and less than 100 μm. Additionally, when the end face shape is elliptical, the minor axis is preferably in the range of 6 μm and less than 100 μm.

[0189] The amount of protrusion from the first main surface 512a at the first upper protruding end 252a1 of the first via conductor 252a is preferably 5 μm or more and 20 μm or less. The amount of protrusion from the second main surface 512b at the first lower protruding end 252a2 of the first via conductor 252a is preferably 5 μm or more and 20 μm or less.

[0190] The second via conductor 252b penetrates the corner side portion of the laminate 512 formed by the second side surface 512d and the fourth side surface 512f along the height direction x, with one end protruding from the first main surface 512a as the second upper side protrusion 252b1 and the other end protruding from the second main surface 512b as the second lower side protrusion 252b2.

[0191] The second via conductor 252b penetrates within the laminate 512 through the end 522b of the second lead-out electrode portion 520b, which, when viewed in the height direction x, contains only the first inner electrode layer 516a. In this case, the second via conductor 252b is electrically connected to the second lead-out electrode portion 520b of the second inner electrode layer 516b.

[0192] The second via conductor 252b preferably has a circular end face shape when viewed in the height direction x. However, the end face shape can also be elliptical, oblong, or any other arbitrary shape. Furthermore, regarding the diameter when the end face shape is circular, it is preferably in the range of at least 6 μm and less than 100 μm. Additionally, when the end face shape is elliptical, the minor axis is preferably in the range of 6 μm and less than 100 μm.

[0193] The amount of protrusion from the first main surface 512a at the second upper protruding end 252b1 of the second via conductor 252b is preferably 5 μm or more and 20 μm or less. The amount of protrusion from the second main surface 512b at the second lower protruding end 252b2 of the second via conductor 252b is preferably 5 μm or more and 20 μm or less.

[0194] The via conductor 253 has a third via conductor 253a and a fourth via conductor 253b.

[0195] The third via conductor 253a penetrates the corner side portion of the laminate 512 formed by the first side surface 512c and the fourth side surface 512f along the height direction x, with one end protruding from the first main surface 512a as the third upper protruding end 253a1 and the other end protruding from the second main surface 512b as the third lower protruding end 253a2.

[0196] The third via conductor 253a penetrates the end 522b of the third lead-out electrode portion 521a, which, when viewed in the height direction x, contains only the second inner electrode layer 516b. In this case, the third via conductor 253a is electrically connected to the third lead-out electrode portion 521a of the second inner electrode layer 516b.

[0197] The third via conductor 253a preferably has a circular end face shape when viewed in the height direction x. However, the end face shape can also be elliptical, oblong, or any other arbitrary shape. Furthermore, regarding the diameter when the end face shape is circular, it is preferably in the range of at least 6 μm and less than 100 μm. Additionally, when the end face shape is elliptical, the minor axis is preferably in the range of 6 μm and less than 100 μm.

[0198] The amount of protrusion from the first main surface 512a at the third upper protruding end 253a1 of the third via conductor 253a is preferably 5 μm or more and 20 μm or less. The amount of protrusion from the second main surface 512b at the third lower protruding end 253a2 of the third via conductor 253a is preferably 5 μm or more and 20 μm or less.

[0199] The fourth via conductor 253b penetrates the corner side portion of the laminate 512 formed by the second side surface 512d and the third side surface 512e along the height direction x, with one end protruding from the first main surface 512a as the second upper side protrusion 252b1 and the other end protruding from the second main surface 512b as the fourth lower side protrusion 253b2.

[0200] The fourth via conductor 253b penetrates the end 522b of the fourth lead-out electrode portion 521b, which, when viewed in the height direction x, contains only the second inner electrode layer 516b. In this case, the fourth via conductor 253b is electrically connected to the fourth lead-out electrode portion 521b of the second inner electrode layer 516b.

[0201] The fourth via conductor 253b preferably has a circular end face shape when viewed in the height direction x. However, the end face shape can also be elliptical, oblong, or any other arbitrary shape. Furthermore, regarding the diameter when the end face shape is circular, it is preferably in the range of at least 6 μm and less than 100 μm. Additionally, when the end face shape is elliptical, the minor axis is preferably in the range of 6 μm and less than 100 μm.

[0202] The amount of protrusion from the first main surface 512a at the fourth upper protruding end 253b1 of the fourth via conductor 253b is preferably 5 μm or more and 20 μm or less. The amount of protrusion from the second main surface 512b at the fourth lower protruding end 253b2 of the fourth via conductor 253b is preferably 5 μm or more and 20 μm or less.

[0203] The via conductors 252 and 253 can, for example, be made of a conductive paste containing conductive metal powder with Ag, Cu, and Ni as the main components.

[0204] like Figure 13 As shown, external electrodes 524 and 525 are disposed in the laminate 512.

[0205] The external electrode 524 has a first external electrode 524a and a second external electrode 524b.

[0206] The first external electrode 524a is configured to cover the first lead-out electrode portion 520a in the first side surface 512c and the third side surface 512e, and is configured to cover a portion of the first main surface 512a and the second main surface 512b. The first external electrode 524a is electrically connected to the first lead-out electrode portion 520a of the first internal electrode layer 516a.

[0207] Furthermore, the second external electrode 524b is configured to cover the second lead-out electrode portion 520b in the second side surface 512d and the fourth side surface 512f, and is configured to cover a portion of the first main surface 512a and the second main surface 512b. The second external electrode 524b is electrically connected to the second lead-out electrode portion 520b of the first internal electrode layer 516a.

[0208] The external electrode 525 has a third external electrode 525a and a fourth external electrode 525b.

[0209] The third external electrode 525a is configured to cover the third lead-out electrode portion 521a in the first side surface 512c and the fourth side surface 512f, and is configured to cover a portion of the first main surface 512a and the second main surface 512b. The third external electrode 525a is electrically connected to the third lead-out electrode portion 521a of the second internal electrode layer 516b.

[0210] Furthermore, the fourth external electrode 525b is configured to cover the fourth lead-out electrode portion 521b in the second side surface 512d and the third side surface 512e, and is configured to cover a portion of the first main surface 512a and the second main surface 512b. The fourth external electrode 525b is electrically connected to the fourth lead-out electrode portion 521b of the second internal electrode layer 516b.

[0211] Within the laminate 512, the first opposing electrode portion 518a of the first inner electrode layer 516a and the second opposing electrode portion 518b of the second inner electrode layer 516b are opposed to each other across a dielectric layer 514, thereby forming an electrostatic capacitor. Therefore, an electrostatic capacitor can be obtained between the first external electrode 524a and the second external electrode 524b connected to the first inner electrode layer 516a and the third external electrode 525a and the fourth external electrode 525b connected to the second inner electrode layer 516b, exhibiting the characteristics of a capacitor.

[0212] The first external electrode 524a is configured to cover the first upper protruding end 252a1 of the first through-hole conductor 252a, which protrudes from the first main surface 12a of the laminate 512. In the first external electrode 524a, the portion covering the first upper protruding end 252a1 has a first upper protrusion 412a that protrudes further than the other portions covering the first main surface 512a. Thus, the shape of the first external electrode 524a corresponds to the shape of the first upper protruding end 252a1 as it protrudes from the surface.

[0213] The first external electrode 524a is configured to cover the first lower protruding end 252a2 of the first through-hole conductor 252a, which protrudes from the second main surface 512b of the laminate 512. In the first external electrode 524a, the portion covering the first lower protruding end 252a2 has a first lower protrusion 414a that protrudes further than the other portions covering the second main surface 512b. Thus, the first external electrode 524a protrudes from the surface in a shape corresponding to the first lower protruding end 252a2.

[0214] The second external electrode 524b is configured to cover the second upper protruding end 252b1 of the second through-hole conductor 252b, which protrudes from the first main surface 512a of the laminate 512. In the second external electrode 524b, the portion covering the second upper protruding end 252b1 has a second upper protrusion 412b that protrudes further than the other portions covering the first main surface 512a. Thus, the shape of the second external electrode 524b corresponds to the shape of the second upper protruding end 252b1 as it protrudes from the surface.

[0215] The second external electrode 524b is configured to cover the second lower protruding end 252b2 of the second through-hole conductor 252b, which protrudes from the second main surface 512b of the laminate 512. In the second external electrode 524b, the portion covering the second lower protruding end 252b2 has a second lower protrusion 414b that protrudes further than the other portions covering the second main surface 512b. Thus, the second external electrode 524b protrudes from the surface in a shape corresponding to the shape of the second lower protruding end 252b2.

[0216] The third external electrode 525a is configured to cover the third upper protruding end 253a1 of the third through-hole conductor 253a, which protrudes from the first main surface 12a of the laminate 512. In the third external electrode 525a, the portion covering the third upper protruding end 253a1 has a third upper protrusion 413a that protrudes further than the other portions covering the first main surface 512a. Thus, the shape of the third external electrode 525a corresponds to the shape of the third upper protruding end 253a1 as it protrudes from the surface.

[0217] The third external electrode 525a is configured to cover the third lower protruding end 253a2 of the third through-hole conductor 253a, which protrudes from the second main surface 512b of the laminate 512. In the third external electrode 525a, the portion covering the third lower protruding end 253a2 has a third lower protrusion 415a that protrudes further than the other portions covering the second main surface 512b. Thus, the shape of the third external electrode 525a corresponds to the shape of the third lower protruding end 253a2 as it protrudes from the surface.

[0218] The fourth external electrode 525b is configured to cover the fourth upper protruding end 253b1 of the fourth through-hole conductor 253b, which protrudes from the first main surface 512a of the laminate 512. In the fourth external electrode 525b, the portion covering the fourth upper protruding end 253b1 has a fourth upper protrusion 413b that protrudes further than the other portions covering the first main surface 512a. Thus, the second external electrode 524b protrudes from the surface in a shape corresponding to the fourth upper protruding end 253b1.

[0219] The fourth external electrode 525b is configured to cover the fourth lower protruding end 253b2 of the fourth through-hole conductor 253b, which protrudes from the second main surface 512b of the laminate 512. In the fourth external electrode 525b, the portion covering the fourth lower protruding end 253b2 has a fourth lower protrusion 415b that protrudes further than the other portions covering the second main surface 512b. Thus, the shape of the fourth external electrode 525b corresponds to the shape of the fourth lower protruding end 253b2 as it protrudes from the surface.

[0220] In addition, the first upper protrusion 412a, the first lower protrusion 414a, the second upper protrusion 412b, and the second lower protrusion 414b each preferably have a size of 5 μm or more along the height direction x from the surface. Furthermore, in this case, it is preferable that the height of the first upper protrusion 412a, determined by the protrusion amount of the first upper protrusion 252a1 of the first through-hole conductor 252a and the thickness of the first external electrode 524a, is the same as the height of the second upper protrusion 412b, determined by the protrusion amount of the second upper protrusion 252b1 of the second through-hole conductor 252b and the thickness of the second external electrode 524b. It is also preferable that the height of the first lower protrusion 414a, determined by the protrusion amount of the second lower protrusion 252b2 of the first through-hole conductor 252a and the thickness of the first external electrode 524a, is the same as the height of the second lower protrusion 414b, determined by the protrusion amount of the second lower protrusion 252b2 of the second through-hole conductor 252b and the thickness of the second external electrode 524b.

[0221] Furthermore, the third upper protrusion 413a, the third lower protrusion 415a, the fourth upper protrusion 413b, and the fourth lower protrusion 415b each preferably have a size of 5 μm or more along the height direction x from the surface. Furthermore, in this case, it is preferable that the height of the third upper protrusion 413a, determined by the protrusion amount of the third upper protrusion 253a1 of the third via conductor 253a and the thickness of the third external electrode 525a, is the same as the height of the fourth upper protrusion 413b, determined by the protrusion amount of the fourth upper protrusion 253b1 of the fourth via conductor 253b and the thickness of the fourth external electrode 525b. It is also preferable that the height of the third lower protrusion 415a, determined by the protrusion amount of the third lower protrusion 253a2 of the third via conductor 253a and the thickness of the third external electrode 525a, is the same as the height of the fourth lower protrusion 415b, determined by the protrusion amount of the fourth lower protrusion 253b2 of the fourth via conductor 253b and the thickness of the fourth external electrode 525b.

[0222] In addition, the structure of the external electrode of the multilayer ceramic capacitor 510 in other embodiments may also be combined with all or part of the multilayer ceramic capacitor 10 in this embodiment and the first to fourth modifications as modifications thereof.

[0223] The dimension in the length direction z of the stacked ceramic capacitor 510, which includes the stacked body 512 and the external electrodes 524 and 525, is set as dimension L. The dimension in the height direction x of the stacked ceramic capacitor 510, which includes the stacked body 512 and the external electrodes 524 and 525, is set as dimension T. The dimension in the width direction y of the stacked ceramic capacitor 510, which includes the stacked body 12 and the external electrodes 524 and 525, is set as dimension W.

[0224] Regarding the dimensions of the multilayer ceramic capacitor 510, it is preferable that the length dimension L in the z-direction is 0.1 mm or more and 6.0 mm or less, and the width dimension W in the y-direction is 0.1 mm or more and 6.0 mm or less. Preferably, 7 / 10 ≤ L / W ≤ 10 / 7. This results in a roughly square lattice shape for the multilayer ceramic capacitor, thus increasing the flexibility of its mounting.

[0225] Therefore, the multilayer ceramic capacitor 510 performs in accordance with... Figure 1 The same effect is achieved with the stacked ceramic capacitor 10 shown.

[0226] Furthermore, as described above, the embodiments of the present invention have been disclosed through the above description, but the present invention is not limited thereto.

[0227] That is, various changes can be made to the above-described embodiments and variations in terms of mechanism, shape, material, quantity, position or configuration without departing from the technical concept and scope of the present invention, and these are included in the present invention.

[0228] <1>

[0229] A multilayer ceramic capacitor, comprising:

[0230] A laminate includes a plurality of stacked dielectric layers, and includes a first main surface and a second main surface opposite to each other in the stacking direction of the plurality of dielectric layers, a first side surface and a second side surface opposite to each other in a width direction orthogonal to the stacking direction, a first end surface and a second end surface opposite to each other in a length direction orthogonal to the stacking direction and the width direction, a first internal electrode layer alternately stacked with the plurality of dielectric layers, and a second internal electrode layer alternately stacked with the plurality of dielectric layers;

[0231] The first external electrode covers at least a portion of both the first main surface and the second main surface of the laminate;

[0232] The second external electrode covers at least a portion of both the first main surface and the second main surface of the laminate.

[0233] A first via conductor, extending through the stack along the stacking direction of the plurality of dielectric layers and connected to the first internal electrode layer; and

[0234] The second via conductor penetrates the stack along the stacking direction of the plurality of dielectric layers and connects to the second internal electrode layer.

[0235] The first via conductor has a first upper protruding end protruding from the first main surface and a first lower protruding end protruding from the second main surface.

[0236] The second via conductor has a second upper protruding end protruding from the first main surface and a second lower protruding end protruding from the second main surface.

[0237] The first external electrode covers the first upper protruding end and the first lower protruding end of the first through-hole conductor.

[0238] The second external electrode covers the second upper protruding end and the second lower protruding end of the second through-hole conductor.

[0239] In the first external electrode, the portion covering the first upper protruding end of the first via conductor has a first upper protrusion that protrudes beyond the other portions covering the first main surface, and the portion covering the first lower protruding end of the first via conductor has a first lower protrusion that protrudes beyond the other portions covering the second main surface.

[0240] In the second external electrode, the portion covering the second upper protruding end of the second via conductor has a second upper protrusion that protrudes beyond the other portions covering the first main surface, and the portion covering the second lower protruding end of the second via conductor has a second lower protrusion that protrudes beyond the other portions covering the second main surface.

[0241] <2>

[0242] according to <1> The aforementioned multilayer ceramic capacitor, wherein,

[0243] The first external electrode is configured to also cover the first end face.

[0244] The second external electrode is configured to also cover the second end face.

[0245] In the first external electrode, the portion covering a part of the first main surface, the portion covering a part of the second main surface, and the portion covering the first end face are each separate.

[0246] In the second external electrode, the portion covering a part of the first main surface, the portion covering a part of the second main surface, and the portion covering the second end face are each separated.

[0247] <3>

[0248] according to <1> or <2> The aforementioned multilayer ceramic capacitor, wherein,

[0249] The protruding dimension of the first upper side of the first via conductor, protruding from the first main surface, is 5 μm or more and 20 μm or less.

[0250] The protruding dimension of the first lower side of the first via conductor, protruding from the second main surface, is 5 μm or more and 20 μm or less.

[0251] The second upper protruding end of the second via conductor, protruding from the first main surface, has a dimension of 5 μm or more and 20 μm or less.

[0252] The protruding dimension of the second lower side of the second via conductor, which protrudes from the second main surface, is more than 5 μm and less than 20 μm.

[0253] <4>

[0254] according to <1> to <3> The multilayer ceramic capacitor described in any one of the following, wherein,

[0255] The protrusion of the first upper side of the first external electrode protruding from the other parts covering the first main surface has a dimension of 5 μm or more.

[0256] The protrusion of the first lower side of the first external electrode protruding from the other parts covering the second main surface has a dimension of 5 μm or more.

[0257] The second upper protrusion of the second external electrode, protruding from the other parts covering the first main surface, has a dimension of 5 μm or more.

[0258] The protrusion of the second lower side of the second external electrode protruding from the other parts covering the second main surface has a size of 5 μm or more.

[0259] <5>

[0260] A multilayer ceramic capacitor, comprising:

[0261] A laminate comprising a plurality of stacked dielectric layers, having a first main surface and a second main surface opposite to each other in the stacking direction of the plurality of dielectric layers, a first side surface and a second side surface opposite to each other in a width direction orthogonal to the stacking direction, and a third side surface and a fourth side surface opposite to each other in a length direction orthogonal to the stacking direction and the width direction, and comprising a first internal electrode layer and a second internal electrode layer alternately stacked with the plurality of dielectric layers;

[0262] The first external electrode covers at least the first main surface and the second main surface of the laminate;

[0263] The second external electrode covers at least the first main surface and the second main surface of the laminate;

[0264] The third external electrode covers at least the first main surface and the second main surface of the laminate;

[0265] The fourth external electrode covers at least the first main surface and the second main surface of the laminate;

[0266] The first via conductor and the second via conductor penetrate the laminate along the stacking direction of the plurality of dielectric layers and are connected to the first internal electrode layer; and

[0267] The third and fourth via conductors penetrate the stack along the stacking direction of the plurality of dielectric layers and are connected to the second internal electrode layer.

[0268] The first via conductor has a first upper protruding end protruding from the first main surface and a first lower protruding end protruding from the second main surface.

[0269] The second via conductor has a second upper protruding end protruding from the first main surface and a second lower protruding end protruding from the second main surface.

[0270] The third via conductor has a third upper protruding end protruding from the first main surface and a third lower protruding end protruding from the second main surface.

[0271] The fourth via conductor has a second upper protruding end protruding from the first main surface and a fourth lower protruding end protruding from the second main surface.

[0272] The first external electrode covers the first upper protruding end and the first lower protruding end of the first through-hole conductor.

[0273] The second external electrode covers the second upper protruding end and the second lower protruding end of the second through-hole conductor.

[0274] The third external electrode covers the third upper protruding end and the third lower protruding end of the third via conductor.

[0275] The fourth external electrode covers the fourth upper protruding end and the fourth lower protruding end of the fourth through-hole conductor.

[0276] In the first external electrode, the portion covering the first upper protruding end of the first via conductor has a first upper protrusion that protrudes beyond the other portions covering the first main surface, and the portion covering the first lower protruding end of the first via conductor has a first lower protrusion that protrudes beyond the other portions covering the second main surface.

[0277] In the second external electrode, the portion covering the second upper protruding end of the second via conductor has a second upper protrusion that protrudes beyond the other portions covering the first main surface, and the portion covering the second lower protruding end of the second via conductor has a second lower protrusion that protrudes beyond the other portions covering the second main surface.

[0278] In the third external electrode, the portion covering the third upper protruding end of the third via conductor has a third upper protrusion that protrudes beyond the other portions covering the first main surface, and the portion covering the third lower protruding end of the third via conductor has a third lower protrusion that protrudes beyond the other portions covering the second main surface.

[0279] In the fourth external electrode, the portion covering the fourth upper protruding end of the fourth via conductor has a fourth upper protrusion that protrudes beyond the other portions covering the first main surface, and the portion covering the fourth lower protruding end of the fourth via conductor has a fourth lower protrusion that protrudes beyond the other portions covering the second main surface.

[0280] Explanation of reference numerals in the attached figures

[0281] 10, 10A, 10B, 10C, 510: Multilayer ceramic capacitors;

[0282] 12, 512: Layered bodies;

[0283] 12a, 512a: First principal face;

[0284] 12b, 512b: Second main face;

[0285] 12c, 512c: First side view;

[0286] 12d, 512d: Second side view;

[0287] 12e: First end face;

[0288] 12f: Second end face;

[0289] 14: Dielectric layer;

[0290] 15a: Effective layer;

[0291] 15b1: First outer layer;

[0292] 15b2: Second outer layer;

[0293] 16, 516: Internal electrode layer;

[0294] 16a, 516a: First internal electrode layer;

[0295] 16b, 516b: Second internal electrode layer;

[0296] 18a, 518a: First opposing electrode section;

[0297] 18b, 518b: Second opposing electrode section;

[0298] 20a, 520a: First lead-out electrode section;

[0299] 20b, 520b: Second lead-out electrode section;

[0300] 22a, 522a: Side part;

[0301] 22b, 522b: End;

[0302] 24, 524, 525: External electrodes;

[0303] 24a, 524a: First external electrode;

[0304] 24b, 524b: Second external electrode;

[0305] 24x, 24y: Surface;

[0306] 25, 252, 253: Via conductors;

[0307] 25a, 252a: First via conductor;

[0308] 25b, 252b: Second via conductor;

[0309] 25a1, 252a1: The first upper protruding end;

[0310] 25a2, 252a2: The first lower protruding end;

[0311] 25b1, 252b1: Second upper protruding end;

[0312] 25b2, 252b2: Second lower protruding end;

[0313] 26: Upper base electrode layer;

[0314] 26a: First upper substrate electrode layer;

[0315] 26b: Second upper substrate electrode layer;

[0316] 27: Lower substrate electrode layer;

[0317] 27a: First lower side substrate electrode layer;

[0318] 27b: Second lower side substrate electrode layer;

[0319] 28: Plating layer;

[0320] 28a: First plating layer;

[0321] 28b: Second plating layer;

[0322] 41a, 412a: First upper side protrusion;

[0323] 41b, 412b: Second upper side protrusion;

[0324] 42a, 414a: First lower side protrusion;

[0325] 42b, 414b: Second lower side protrusion;

[0326] 253a: Third via conductor;

[0327] 253a1: The third upper protruding end;

[0328] 253a2: Third lower protruding end;

[0329] 253b: 4th via conductor;

[0330] 253b1: Fourth upper protruding end;

[0331] 253b2: Fourth lower protruding end;

[0332] 413a: Third upper protrusion;

[0333] 413b: Fourth upper protrusion;

[0334] 415a: Third lower side protrusion;

[0335] 415b: Fourth lower side protrusion;

[0336] 512e: Third side;

[0337] 512f: Fourth side view;

[0338] 525a: Third external electrode;

[0339] 525b: Fourth external electrode;

[0340] 50: Mounting the substrate;

[0341] 52: core material;

[0342] 54: Conductor connecting disc;

[0343] 54a: First conductor connection disk;

[0344] 54b: Second conductor connection disc;

[0345] 56: Bonding material;

[0346] 60: Pick and place machine nozzle;

[0347] 70: Layered small pieces;

[0348] 72a: Pattern of the first internal electrode;

[0349] 72b: Second internal electrode pattern;

[0350] 74a, 74b: Protective film;

[0351] 76a, 76b: Through holes;

[0352] 78a, 78b: Through-hole conductor paste.

Claims

1. A multilayer ceramic capacitor, comprising: A laminate includes a plurality of stacked dielectric layers, and includes a first main surface and a second main surface opposite to each other in the stacking direction of the plurality of dielectric layers, a first side surface and a second side surface opposite to each other in a width direction orthogonal to the stacking direction, a first end surface and a second end surface opposite to each other in a length direction orthogonal to the stacking direction and the width direction, a first internal electrode layer alternately stacked with the plurality of dielectric layers, and a second internal electrode layer alternately stacked with the plurality of dielectric layers; The first external electrode covers at least a portion of both the first main surface and the second main surface of the laminate; The second external electrode covers at least a portion of both the first main surface and the second main surface of the laminate. A first via conductor, extending through the stack along the stacking direction of the plurality of dielectric layers and connected to the first internal electrode layer; and The second via conductor penetrates the stack along the stacking direction of the plurality of dielectric layers and connects to the second internal electrode layer. The first via conductor has a first upper protruding end protruding from the first main surface and a first lower protruding end protruding from the second main surface. The second via conductor has a second upper protruding end protruding from the first main surface and a second lower protruding end protruding from the second main surface. The first external electrode covers the first upper protruding end and the first lower protruding end of the first through-hole conductor. The second external electrode covers the second upper protruding end and the second lower protruding end of the second through-hole conductor. In the first external electrode, the portion covering the first upper protruding end of the first via conductor has a first upper protrusion that protrudes beyond the other portions covering the first main surface, and the portion covering the first lower protruding end of the first via conductor has a first lower protrusion that protrudes beyond the other portions covering the second main surface. In the second external electrode, the portion covering the second upper protruding end of the second via conductor has a second upper protrusion that protrudes beyond the other portions covering the first main surface, and the portion covering the second lower protruding end of the second via conductor has a second lower protrusion that protrudes beyond the other portions covering the second main surface.

2. The multilayer ceramic capacitor according to claim 1, wherein, The first external electrode is configured to also cover the first end face. The second external electrode is configured to also cover the second end face. In the first external electrode, the portion covering a part of the first main surface, the portion covering a part of the second main surface, and the portion covering the first end face are each separate. In the second external electrode, the portion covering a part of the first main surface, the portion covering a part of the second main surface, and the portion covering the second end face are each separated.

3. The multilayer ceramic capacitor according to claim 1 or claim 2, wherein, The protruding dimension of the first upper side of the first via conductor, protruding from the first main surface, is 5 μm or more and 20 μm or less. The protruding dimension of the first lower side of the first via conductor, protruding from the second main surface, is 5 μm or more and 20 μm or less. The second upper protruding end of the second via conductor, protruding from the first main surface, has a dimension of 5 μm or more and 20 μm or less. The protruding dimension of the second lower side of the second via conductor, which protrudes from the second main surface, is more than 5 μm and less than 20 μm.

4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein, The protrusion of the first upper side of the first external electrode protruding from the other parts covering the first main surface has a dimension of 5 μm or more. The protrusion of the first lower side of the first external electrode protruding from the other parts covering the second main surface has a dimension of 5 μm or more. The second upper protrusion of the second external electrode, protruding from the other parts covering the first main surface, has a dimension of 5 μm or more. The protrusion of the second lower side of the second external electrode protruding from the other parts covering the second main surface has a size of 5 μm or more.

5. A multilayer ceramic capacitor, comprising: A laminate comprising a plurality of stacked dielectric layers, having a first main surface and a second main surface opposite to each other in the stacking direction of the plurality of dielectric layers, a first side surface and a second side surface opposite to each other in a width direction orthogonal to the stacking direction, and a third side surface and a fourth side surface opposite to each other in a length direction orthogonal to the stacking direction and the width direction, and comprising a first internal electrode layer and a second internal electrode layer alternately stacked with the plurality of dielectric layers; The first external electrode covers at least the first main surface and the second main surface of the laminate; The second external electrode covers at least the first main surface and the second main surface of the laminate; The third external electrode covers at least the first main surface and the second main surface of the laminate; The fourth external electrode covers at least the first main surface and the second main surface of the laminate; The first via conductor and the second via conductor penetrate the laminate along the stacking direction of the plurality of dielectric layers and are connected to the first internal electrode layer; and The third and fourth via conductors penetrate the stack along the stacking direction of the plurality of dielectric layers and are connected to the second internal electrode layer. The first via conductor has a first upper protruding end protruding from the first main surface and a first lower protruding end protruding from the second main surface. The second via conductor has a second upper protruding end protruding from the first main surface and a second lower protruding end protruding from the second main surface. The third via conductor has a third upper protruding end protruding from the first main surface and a third lower protruding end protruding from the second main surface. The fourth via conductor has a second upper protruding end protruding from the first main surface and a fourth lower protruding end protruding from the second main surface. The first external electrode covers the first upper protruding end and the first lower protruding end of the first through-hole conductor. The second external electrode covers the second upper protruding end and the second lower protruding end of the second through-hole conductor. The third external electrode covers the third upper protruding end and the third lower protruding end of the third via conductor. The fourth external electrode covers the fourth upper protruding end and the fourth lower protruding end of the fourth through-hole conductor. In the first external electrode, the portion covering the first upper protruding end of the first via conductor has a first upper protrusion that protrudes beyond the other portions covering the first main surface, and the portion covering the first lower protruding end of the first via conductor has a first lower protrusion that protrudes beyond the other portions covering the second main surface. In the second external electrode, the portion covering the second upper protruding end of the second via conductor has a second upper protrusion that protrudes beyond the other portions covering the first main surface, and the portion covering the second lower protruding end of the second via conductor has a second lower protrusion that protrudes beyond the other portions covering the second main surface. In the third external electrode, the portion covering the third upper protruding end of the third via conductor has a third upper protrusion that protrudes beyond the other portions covering the first main surface, and the portion covering the third lower protruding end of the third via conductor has a third lower protrusion that protrudes beyond the other portions covering the second main surface. In the fourth external electrode, the portion covering the fourth upper protruding end of the fourth via conductor has a fourth upper protrusion that protrudes beyond the other portions covering the first main surface, and the portion covering the fourth lower protruding end of the fourth via conductor has a fourth lower protrusion that protrudes beyond the other portions covering the second main surface.

Images