Wideband harmonic scene-based high-precision ac sampling method for low-voltage power grid

Abstract

The present application relates to low-voltage power grid sampling technology field, specifically for low-voltage power grid high-precision AC sampling method based on wide frequency harmonic scene, including: after the sampling system starts, hardware initialization calibration is completed, the reference frequency of real-time clock is configured, the full-scale reference voltage of analog-digital converter is set, and the gain coefficient of voltage transformer and current transformer secondary side signal input channel is set; the original AC voltage is converted into a square wave of the same frequency through the zero-crossing comparison circuit, the rising edge moment is captured by accessing the real-time clock counter, and the real period of the power grid voltage is calculated; the sampling interval is obtained by dividing the real period according to the preset sampling points per cycle, the programmable timer is configured, the analog-digital converter is triggered by timing interruption to synchronously collect the voltage and current transformer secondary side signal, and the original sampling sequence is obtained. The method can match the actual period of the power grid, improve the sampling accuracy and signal synchronization under wide frequency harmonic.

Description

Technical Field

[0001] This invention relates to the field of low-voltage power grid sampling technology, and in particular to a high-precision AC sampling method for low-voltage power grids based on wideband harmonic scenarios. Background Technology

[0002] Conventional low-voltage power grid AC sampling often adopts a fixed-clock timing sampling mode, using the nominal power frequency cycle of the power grid as the sampling reference. The analog-to-digital converter uses a fixed time interval to trigger sampling. Hardware initialization only performs basic parameter configuration and does not perform accurate calibration of the real-time clock reference frequency, the full-scale reference voltage of the analog-to-digital converter, and the gain coefficient of the secondary side signal channel of the current transformer for wideband harmonic scenarios. The zero-crossing detection circuit is only used for power grid phase discrimination and is not linked with the real-time clock counter to achieve periodic timing capture.

[0003] The sampling method with a fixed sampling interval cannot adapt to the dynamic fluctuations of the actual power grid cycle. Under broadband harmonic interference, the power grid cycle is prone to deviation. Fixed cycle parameters will directly cause the sampling point to be misaligned with the power grid cycle. The accuracy of synchronous acquisition of voltage and current signals will be greatly reduced. Uncalibrated hardware parameters of analog-to-digital converters and transformer channels will further amplify the signal acquisition error. The sampling timing cannot match the actual power grid cycle. The original sampling sequence has obvious cycle synchronization deviation. The sampling distortion problem is prominent in harmonic scenarios.

[0004] This invention aims to eliminate the influence of the deviation between the nominal cycle and the actual cycle of the power grid. It obtains the true cycle length by accurately capturing the moment of the power grid cycle, and at the same time, it dynamically configures the sampling time interval based on the true cycle to complete the synchronous acquisition of voltage and current signals. It also uses hardware parameters for precise initialization and calibration to adapt to the high-precision sampling requirements of low-voltage power grids in broadband harmonic scenarios. Summary of the Invention

[0005] The purpose of this invention is to address the shortcomings of existing technologies by proposing a high-precision AC sampling method for low-voltage power grids in broadband harmonic scenarios.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: a high-precision AC sampling method for low-voltage power grids in broadband harmonic scenarios, comprising: After the sampling system is started, the hardware parameters are initialized and calibrated. The original AC voltage signal of the low-voltage power grid is converted into a square wave signal of the same frequency using a zero-crossing comparator circuit. The rising edge of the square wave signal is connected to a specific counter channel of the real-time clock to capture the moment when the rising edge occurs. The actual cycle length of the grid voltage is calculated by recording the difference in count values ​​between two consecutive captured moments and dividing it by the reference frequency of the real-time clock. The actual cycle length is then divided equally according to the preset number of sampling points per cycle to obtain the theoretical sampling time interval under uncompensated conditions. The theoretical sampling time interval is then loaded into a programmable timer and configured as a timer interrupt cycle. The programmable timer is started to run, and in each time the timer interrupt service routine, the analog-to-digital converter is triggered to synchronously acquire the secondary side signals of the voltage transformer and the current transformer to obtain the uncompensated raw voltage and current sampling sequence.

[0007] As a further aspect of the present invention, the method also includes simultaneously performing environmental monitoring and error tracing during system operation: Throughout the entire operation of the sampling system, the integrated temperature sensor continuously collects real-time temperature readings of key areas of the printed circuit board and stores these real-time temperature readings in a circular buffer queue. Driven by the real-time clock, the number of pulses of the grid voltage square wave signal captured per unit time is periodically counted, and the counted number of pulses is compared with the theoretical number of power frequency pulses to calculate the real-time drift of the clock frequency. During the DC bias self-calibration process of the analog-to-digital converter, the output code value of the analog-to-digital converter under zero input signal condition is recorded, and the output code value of the analog-to-digital converter is stored as the zero-point drift. From the secondary side signal conditioning paths of the voltage transformer and the current transformer, the feedback voltage characterizing the temperature coefficient of the resistive element is extracted, and the real-time gain error coefficient of the resistive network is calculated based on the feedback voltage. The real-time temperature readings, the real-time clock frequency drift, the zero-point drift, and the real-time gain error coefficient are combined to form a real-time error feature vector containing multiple error sources.

[0008] As a further aspect of the present invention, the method further includes a dynamic compensation parameter generation operation based on the error feature vector: Read pre-calibrated temperature-frequency compensation surface data from non-volatile memory. The temperature-frequency compensation surface data describes the correspondence between the system clock frequency offset and temperature within a calibrated temperature range. Using the real-time temperature reading as an input parameter, interpolation is performed on the temperature-frequency compensation surface data to output the clock frequency compensation factor for the current temperature point. Read pre-calibrated temperature-gain compensation surface data from non-volatile memory. The temperature-gain compensation surface data describes the relationship between the change in gain of the signal conditioning path and temperature within a calibrated temperature range. By combining the real-time temperature reading with the real-time gain error coefficient of the resistor network, an interpolation query is performed on the temperature-gain compensation surface data to output a gain compensation factor for the current temperature and circuit state. The pre-calibrated frequency offset-sampling timing compensation relationship table is read from the non-volatile memory, and the real-time drift of the clock frequency is used as an index to query the corresponding sampling timing period correction amount. The clock frequency compensation factor, the gain compensation factor, the sampling timing period correction, and the zero-point drift are integrated to form a dynamic compensation parameter set suitable for the current operating state.

[0009] As a further aspect of the present invention, the method also includes the operation of applying a dynamic compensation parameter set to perform real-time correction of the sampling process: Obtain the sampling timing period correction amount from the dynamic compensation parameter set, and algebraically add the sampling timing period correction amount to the current interrupt period setting value of the programmable timer. The result of the algebraic superposition is used as a new interrupt cycle setting value and reloaded into the cycle register of the programmable timer, so that the subsequent timer interrupt interval is dynamically adjusted according to the real-time drift of the clock frequency. After the analog-to-digital converter completes one data acquisition, the original analog-to-digital converter output code value is read. The zero-point drift is extracted from the set of dynamic compensation parameters, and the original analog-to-digital converter output code value is subtracted from the zero-point drift to eliminate DC bias error. The code value after the subtraction operation is then multiplied and calibrated by applying the gain compensation factor in the dynamic compensation parameter set to obtain the final sampled code value after amplitude compensation. The final sampled code value obtained after each timed interrupt acquisition and compensation is stored in the waveform data buffer in chronological order to form a voltage and current sampling sequence that has been corrected in real time.

[0010] As a further aspect of the present invention, the method further includes synchronous tracking and adaptive filtering of the broadband harmonic signal: Fast Fourier Transform analysis is performed on the voltage sampling sequence in the waveform data buffer after real-time correction to extract the frequency and amplitude of each harmonic in the power grid voltage signal; Identify the fundamental frequency and each harmonic frequency whose amplitude exceeds a preset threshold, calculate the ratio of each harmonic frequency to the fundamental frequency, and obtain the harmonic order. Divide the actual period length of the grid voltage by the harmonic order to calculate the period of each major harmonic component. Based on the new interrupt cycle setting value of the programmable timer, calculate the current system actual sampling frequency, compare the actual sampling frequency with the frequency of each major harmonic component, and verify whether the sampling process satisfies the Nyquist sampling theorem. If there are harmonic components that are close to or exceed half of the Nyquist frequency, the interrupt period setting of the programmable timer is dynamically adjusted so that the actual sampling frequency of the system is increased to more than twice the target harmonic frequency, and the number of sampling points per cycle is updated synchronously.

[0011] As a further aspect of the present invention, the method also includes the operation of reconstructing high-quality waveform data using the compensated sampling sequence: Extract a real-time corrected voltage and current sampling sequence for a complete fundamental cycle from the waveform data buffer; Linear interpolation is performed on the voltage and current sampling sequence of the complete fundamental period to resample the non-uniformly spaced sampling point sequence into a point sequence with uniform time intervals. A digital low-pass filter is applied to the resampled uniform time interval voltage and current point sequence. The cutoff frequency of the digital low-pass filter is set to the highest harmonic frequency to be analyzed in order to suppress high-frequency noise and aliasing components. The voltage and current point sequence processed by the digital low-pass filter is output as the waveform reconstruction result to the harmonic analysis and calculation module.

[0012] The initialization and calibration operations include configuring the reference frequency of the real-time clock, setting the full-scale reference voltage of the analog-to-digital converter, and setting the gain coefficient of the secondary signal input channels of the voltage transformer and current transformer.

[0013] As a further aspect of the present invention, the method further includes parameter self-learning and mapping table update operations performed during system idle periods: The control system enters self-learning mode and connects the signal input terminal of the sampling system to a programmable standard AC source; The programmable standard AC source is controlled to sequentially output standard test signals containing specific amplitudes, specific frequencies, and specific harmonic components. Control the temperature control device to ensure that the sampling system traverses the set temperature range according to the preset temperature gradient; At each preset temperature gradient point and under each standard test signal, uncompensated raw sampling data is collected, and the real-time error feature vector is recorded. The collected raw sampling data is compared with the true parameters of the standard test signal, and an iterative optimization algorithm is used to solve for a set of optimal compensation parameters that minimize the error. A mapping relationship is established between the real-time error feature vector corresponding to each temperature gradient point and the calculated optimal compensation parameters, and the temperature-frequency compensation surface data and the temperature-gain compensation surface data stored in the non-volatile memory are updated.

[0014] As a further aspect of the present invention, reading the pre-calibrated temperature-frequency compensated surface data from the non-volatile memory includes the following steps: Access the storage sector reserved for temperature-frequency compensation data in the non-volatile memory, read the total number of calibration data entries and temperature range, load the stored discrete calibration point data into the internal random access memory, and form a two-dimensional data table of temperature values ​​and frequency compensation amounts. Based on the two-dimensional data table, a surface fitting algorithm is used to generate a continuous compensation surface function covering the entire temperature range. The continuous compensation surface function is the temperature-frequency compensation surface data that can be queried.

[0015] As a further aspect of the present invention, the step of reloading the result of algebraic superposition as a new interrupt period setting value into the period register of the programmable timer includes the following steps: Calculate the ratio of the clock source frequency of the programmable timer to the target interrupt cycle setting value to obtain the initial count value to be written to the cycle register; Write the calculated initial count value into the auto-reload register of the programmable timer; Clear the current count value and interrupt flag of the programmable timer; Enable the counting function of the programmable timer so that it restarts the decrementing count from the new initial count value to achieve the updated timer interrupt cycle.

[0016] Compared with the prior art, the advantages and positive effects of the present invention are as follows: The original AC voltage signal of the low-voltage power grid is converted into a square wave signal of the same frequency by a zero-crossing comparator circuit. The rising edge of the square wave is connected to a specific counter channel of the real-time clock to capture the moment of the rising edge. The difference in count value between two consecutive rising edge capture moments is recorded. The true cycle length of the power grid voltage can be directly obtained by dividing the difference in count value by the real-time clock reference frequency. This eliminates the reliance on the nominal cycle parameter of the power grid and avoids the cycle parameter error caused by the cycle fluctuation of the power grid. The linkage capture of the rising edge of the square wave and the counter channel can accurately lock the cycle node. The real-time clock reference frequency provides a stable measurement reference for cycle calculation. Even under wideband harmonic interference, the cycle value that fits the actual operating state of the power grid can still be obtained.

[0017] The actual grid cycle length is divided equally according to the preset number of sampling points per cycle to obtain the theoretical sampling time interval under uncompensated conditions. This time interval is loaded into a programmable timer and configured as a timer interrupt cycle. In the timer interrupt service routine, the analog-to-digital converter is triggered to synchronously acquire the secondary side signals of the voltage transformer and current transformer. This ensures that the sampling timing is accurately matched with the actual grid cycle, and the sampling points are evenly distributed within the grid cycle, eliminating the timing offset problem caused by the fixed sampling interval. The voltage and current signal acquisition timing is consistent, and the periodic synchronization of the original sampling sequence is guaranteed. After the sampling system starts, hardware parameter initialization calibration is performed, which can optimize the hardware foundation of signal acquisition and reduce the sampling signal distortion caused by hardware parameter deviation. Attached Figure Description

[0018] Figure 1 This is a flowchart of the high-precision AC sampling method for low-voltage power grids in broadband harmonic scenarios described in this invention; Figure 2 A flowchart illustrating the synchronous environmental monitoring and error tracing during system operation; Figure 3 This is a flowchart for applying a dynamic compensation parameter set to correct the sampling process in real time. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0020] In the description of this invention, it should be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships, are based on the orientation or positional relationships shown in the accompanying drawings and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, in the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0021] See Figure 1 This invention provides a high-precision AC sampling method for low-voltage power grids in broadband harmonic scenarios, the specific method including: After the sampling system starts, hardware parameter initialization and calibration operations are performed. These operations include configuring the reference frequency of the real-time clock, setting the full-scale reference voltage of the analog-to-digital converter, and setting the gain coefficients of the secondary signal input channels of the voltage and current transformers. A zero-crossing comparator circuit converts the raw AC voltage signal of the low-voltage grid into a square wave signal of the same frequency. The rising edge of the square wave signal is connected to a specific counter channel of the real-time clock to capture the moment of its occurrence. By recording the difference in count values ​​between two consecutive captured moments and dividing it by the reference frequency of the real-time clock, the true cycle length of the grid voltage is calculated. Based on the preset number of sampling points per cycle, the true cycle length is divided equally to obtain the theoretical sampling time interval in the uncompensated state. This theoretical sampling time interval is loaded into a programmable timer and configured as a timer interrupt cycle. The programmable timer is started, and in each timer interrupt service routine, the analog-to-digital converter is triggered to synchronously acquire data from the secondary signals of the voltage and current transformers, obtaining the uncompensated raw voltage and current sampling sequence.

[0022] In one embodiment of the present invention, see [reference] Figure 2 Throughout the sampling system's operation, integrated temperature sensors continuously collect real-time temperature readings of key areas on the printed circuit board, storing these readings in a circular buffer queue. Driven by a real-time clock, the number of pulses of the captured grid voltage square wave signal per unit time is periodically counted. This count is compared with the theoretical power frequency pulse count to calculate the real-time clock frequency drift. During the DC bias self-calibration of the analog-to-digital converter (ADC), the ADC output code value under zero-input signal conditions is recorded and stored as the zero-point drift. Feedback voltages characterizing the temperature coefficient of resistive elements are extracted from the secondary signal conditioning paths of the voltage and current transformers, and the real-time gain error coefficient of the resistive network is calculated based on these feedback voltages. The real-time temperature readings, real-time clock frequency drift, zero-point drift, and real-time gain error coefficient are combined to form a real-time error feature vector encompassing multiple error sources.

[0023] In practical implementation, the sampling system continuously collects real-time temperature readings of key areas on the printed circuit board using integrated temperature sensors throughout its operation. These real-time temperature readings are stored in a circular buffer queue, which employs a first-in-first-out (FIFO) data structure to manage the readings and cover recent temperature change history. Driven by a real-time clock, the system periodically counts the number of pulses of the captured grid voltage square wave signal per unit time. The unit time is set to a fixed duration, and the theoretical power frequency pulse count is pre-calculated based on the product of the power frequency and the unit time. The counted pulse count is compared with the theoretical power frequency pulse count to calculate the real-time clock frequency drift. Through the formula:

[0024] in: This represents the real-time drift of the clock frequency. Its value can be positive, negative, or zero, corresponding to a clock that is too fast, too slow, or has no drift, respectively. Its absolute value reflects the stability of the clock. This indicates the number of pulses of the grid voltage square wave signal captured per unit time. Indicates the theoretical number of power frequency pulses. , The specific values ​​are determined by the actual frequency of the power grid, the statistical duration, and the theoretical power frequency value. This represents a statistical unit of time. In some embodiments, the temperature sensing device is arranged near the analog-to-digital converter and the real-time clock chip to ensure that the real-time temperature reading accurately reflects the operating environment of the critical components. The periodic statistical operation is triggered by the second interrupt signal generated by the real-time clock to achieve frequency drift monitoring at fixed intervals.

[0025] In practical implementation, during the DC bias self-calibration of the analog-to-digital converter (ADC), the ADC output code value under zero input signal conditions is recorded and stored as the zero-point drift. The DC bias self-calibration process is completed during the initialization phase of the sampling system or repeated at a preset cycle during system operation. Feedback voltage characterizing the temperature coefficient of the resistive element is extracted from the secondary signal conditioning paths of the voltage and current transformers. This feedback voltage is obtained through a precision voltage divider resistor network connected in the signal conditioning path. The real-time gain error coefficient of the resistor network is calculated based on the feedback voltage, reflecting the gain deviation of the signal conditioning path due to temperature changes. It can be understood that the extraction of the feedback voltage utilizes an additional input channel of the ADC, and the calculation of the real-time gain error coefficient involves the ratio of the feedback voltage to the reference voltage. Optionally, during the DC bias self-calibration process, the ADC input port is switched to ground via an internal switch to obtain the zero-point drift. The calculation of the real-time gain error coefficient of the resistor network is performed by combining the feedback voltage with the calibration parameters stored in non-volatile memory.

[0026] In some embodiments, the real-time clock frequency drift calculation process further includes smoothing and filtering the number of pulses to suppress statistical fluctuations caused by accidental interference. The theoretical power frequency pulse count is calculated as a fixed value based on the nominal power frequency of the power grid and the statistical unit time. The real-time temperature readings, real-time clock frequency drift, zero-point drift, and real-time gain error coefficient are summarized to form a real-time error feature vector containing multiple error sources. This real-time error feature vector is stored in memory as a data structure for use in subsequent dynamic compensation parameter generation operations. It can be understood that each element in the real-time error feature vector corresponds to one error source, and the element update frequency is consistent with the execution cycle of each monitoring process. Optionally, the size of the circular buffer queue is configured to accommodate a sufficient number of real-time temperature readings to support historical temperature trend analysis, and the feedback voltage used in the real-time gain error coefficient calculation undergoes multi-sample averaging to improve stability.

[0027] In one embodiment of the present invention, pre-calibrated temperature-frequency compensation surface data is read from non-volatile memory. This temperature-frequency compensation surface data describes the correspondence between the system clock frequency offset and temperature within a calibrated temperature range. The storage sector reserved for temperature-frequency compensation data in the non-volatile memory is accessed, and the total number of calibration data entries and the temperature range are read. The stored discrete calibration point data is loaded into internal random access memory, forming a two-dimensional data table of temperature values ​​and frequency compensation amounts. Based on the two-dimensional data table, a surface fitting algorithm is used to generate a continuous compensation surface function covering the entire temperature range. This continuous compensation surface function is the queryable temperature-frequency compensation surface data. Using real-time temperature readings as input parameters, interpolation is performed on the temperature-frequency compensation surface data to output the clock frequency compensation factor for the current temperature point. Pre-calibrated temperature-gain compensation surface data is also read from non-volatile memory. This temperature-gain compensation surface data describes the correspondence between the gain change of the signal conditioning path and temperature within a calibrated temperature range. By combining real-time temperature readings with the real-time gain error coefficients of the resistor network, interpolation lookup is performed on the temperature-gain compensation surface data to output a gain compensation factor specific to the current temperature and circuit state. A pre-calibrated frequency offset-sampling timing compensation table is read from non-volatile memory, using the real-time clock frequency drift as an index to retrieve the corresponding sampling timing period correction. The clock frequency compensation factor, gain compensation factor, sampling timing period correction, and zero-point drift are integrated to form a dynamic compensation parameter set suitable for the current operating state.

[0028] In practice, pre-calibrated temperature-frequency compensation surface data is read from non-volatile memory. This data describes the relationship between the system clock frequency offset and temperature within a calibrated temperature range. The storage sector reserved for temperature-frequency compensation data in the non-volatile memory is accessed to read the total number of calibration data entries and the temperature range. The stored discrete calibration point data is then loaded into internal random access memory, forming a two-dimensional data table of temperature values ​​and frequency compensation amounts. Temperature values ​​in the table are stored in degrees Celsius, and the frequency compensation amount is a dimensionless scaling factor. Based on this two-dimensional data table, a surface fitting algorithm is used to generate a continuous compensation surface function covering the entire temperature range. This continuous compensation surface function is the queryable temperature-frequency compensation surface data. The surface fitting algorithm uses bilinear interpolation or cubic spline interpolation to generate smooth compensation values ​​between discrete calibration points. Real-time temperature readings are used as input parameters to perform interpolation queries within the temperature-frequency compensation surface data, outputting the clock frequency compensation factor for the current temperature point. (Clock frequency compensation factor) formula:

[0029] in: Indicates the clock frequency compensation factor. This represents the real-time temperature reading, and its value range covers the calibrated temperature range in which the system operates. This represents the functional relationship defined by the temperature-frequency compensated surface data. Indicates according to exist The interpolation query operation is performed on the [the data source]. The clock frequency compensation factor is obtained through the interpolation query. It is a real number, usually close to 1, used to scale and compensate for clock frequency offsets.

[0030] In specific implementations, pre-calibrated temperature-gain compensation surface data is read from non-volatile memory. This data describes the relationship between the gain change of the signal conditioning path and temperature within a calibrated temperature range. By combining real-time temperature readings with the real-time gain error coefficients of the resistor network, interpolation is performed on the temperature-gain compensation surface data to output a gain compensation factor for the current temperature and circuit state. A pre-calibrated frequency offset-sampling timing compensation table is read from non-volatile memory, using the real-time clock frequency drift as an index to retrieve the corresponding sampling timing period correction. In some embodiments, the storage and access methods for temperature-gain compensation surface data are similar to those for temperature-frequency compensation surface data, also involving loading a two-dimensional data table from non-volatile memory and performing surface fitting. The frequency offset-sampling timing compensation table is stored in lookup table form, with the index value being the real-time clock frequency drift and the output value being the corresponding timing period adjustment. The clock frequency compensation factor, gain compensation factor, sampling timing period correction, and zero-point drift are integrated to form a dynamic compensation parameter set applicable to the current operating state. This dynamic compensation parameter set is organized and updated in memory as a structure. Optionally, when interpolating and querying the clock frequency compensation factor and gain compensation factor, if the real-time temperature reading exceeds the calibrated temperature range, the compensation value corresponding to the temperature range boundary point is taken as the output. Optionally, the content of the frequency offset-sampling timing compensation relationship table is pre-calibrated experimentally based on the characteristics of the system clock circuit, ensuring that the queried sampling timing period correction accurately offsets the impact of clock drift on timing.

[0031] In some embodiments, temperature-frequency compensation surface data and temperature-gain compensation surface data are loaded from non-volatile memory to internal random access memory during system power-on initialization to reduce access latency during operation. When interpolating the temperature-frequency compensation surface data, the interval containing the real-time temperature reading is first located in the two-dimensional data table, and then the interpolation result is calculated using the data from the interval boundary points. It can be understood that the real-time gain error coefficient of the resistor network participates in the query of the temperature-gain compensation surface data as a correction parameter, its role being to fine-tune the basic temperature-gain relationship. The integration operation gathers multiple independent compensation and correction quantities into a single data structure, with the dynamic compensation parameter set serving as input for subsequent real-time correction operations.

[0032] In one embodiment of the present invention, see [reference] Figure 3The process involves: acquiring the sampling timing period correction from the dynamic compensation parameter set; algebraically superimposing the sampling timing period correction with the current interrupt period setting of the programmable timer; and reloading the result of the algebraic superposition into the programmable timer's period register as the new interrupt period setting. The ratio of the programmable timer's clock source frequency to the target interrupt period setting is calculated to obtain the initial count value to be written to the period register. This initial count value is written to the programmable timer's auto-reload register, clearing the programmable timer's current count value and interrupt flag, enabling the programmable timer's counting function, and restarting the decrementing count from the new initial count value to achieve the updated timing interrupt period. This allows subsequent timing interrupt intervals to be dynamically adjusted according to the real-time clock frequency drift. After the analog-to-digital converter (ADC) completes one data acquisition, the original ADC output code value is read. The zero-point drift is extracted from the dynamic compensation parameter set, and the original ADC output code value is subtracted from the zero-point drift to eliminate DC bias error. The code value after the subtraction operation is then multiplied and calibrated using the gain compensation factor from the dynamic compensation parameter set to obtain the final sampled code value after amplitude compensation. The final sampled code value obtained after each timed interrupt acquisition and compensation is stored in the waveform data buffer in chronological order to form a voltage and current sampling sequence that has been corrected in real time.

[0033] In practical implementation, the sampling timing period correction value from the dynamic compensation parameter set is obtained. This correction value is then algebraically superimposed with the current interrupt period setting value of the programmable timer. This algebraic superposition operation is performed in the arithmetic logic unit of the microcontroller. The result of the algebraic superposition is used as the new interrupt period setting value and reloaded into the programmable timer's period register. The ratio of the programmable timer's clock source frequency to the target interrupt period setting value is calculated to obtain the initial count value to be written to the period register. The initial count value is calculated using the formula:

[0034] in: This indicates the initial count value that needs to be written to the auto-reload register; its value is limited by the maximum bit width of the register. This indicates the clock source frequency of the programmable timer, which is a normal value set by the system. The initial count value, representing the reciprocal of the target interrupt frequency (i.e., the new interrupt cycle setting), is a positive number calculated based on sampling requirements. The calculated initial count value is written to the programmable timer's auto-reload register, the programmable timer's current count value and interrupt flag are cleared, and the programmable timer's counting function is enabled, causing it to restart the decrementing count from the new initial count value to achieve the updated timing interrupt cycle. In some embodiments, the sampling timing cycle correction amount in the dynamic compensation parameter set is expressed in microseconds or timer count units. When algebraically superimposing it with the current interrupt cycle setting value, it is necessary to ensure that the units are consistent. The calculation result is rounded and written to the auto-reload register.

[0035] In practical implementation, after the analog-to-digital converter (ADC) completes one data acquisition, the original ADC output code value is read. The zero-point drift is extracted from the dynamic compensation parameter set, and the original ADC output code value is subtracted from the zero-point drift to eliminate DC bias error. The code value after subtraction is then multiplied using the gain compensation factor from the dynamic compensation parameter set to obtain the final sampled code value after amplitude compensation. Essentially, the subtraction operation directly subtracts the zero-point drift from the original ADC output code value, while the multiplication calibration multiplies the subtraction result by the gain compensation factor. The final sampled code values ​​obtained after each timed interrupt acquisition and compensation are stored sequentially in the waveform data buffer, forming a real-time corrected voltage and current sampling sequence. Optionally, the waveform data buffer adopts a circular buffer structure to support the storage and retrieval of continuous data streams, and the final sampled code value can be converted to floating-point format before being stored in the waveform data buffer to preserve accuracy.

[0036] In some embodiments, the calculated initial count value Due to the limited register bit width of the programmable timer, if the calculation result exceeds the register's representation range, the maximum value that the register can represent is used, and the target interrupt frequency is determined. Adjustments need to be made according to this limitation. Write operations to the auto-reload register occur during the pause or update event intervals of the programmable timer to prevent unpredictable timing behavior. Clearing the current count value and interrupt flag of the programmable timer ensures that the timer starts a new timing cycle from a precise initial state. Optionally, the zero-point drift is stored in the same format as the original analog-to-digital converter output code value, and the gain compensation factor is stored in floating-point or fixed-point format. It is understood that the depth of the waveform data buffer must meet the requirement of storing at least one complete power frequency cycle of data; the real-time corrected voltage and current sampling sequence provides the basis data for subsequent harmonic analysis. Refer to Table 1 for an example auto-reload register configuration to illustrate the specific numerical relationships of the programmable timer parameter configuration.

[0037] Table 1, Automatic Reload Register Configuration Table:

[0038] In one embodiment of the present invention, a Fast Fourier Transform (FFT) analysis is performed on the voltage sampling sequence in the waveform data buffer after real-time correction to extract the frequency and amplitude of each harmonic present in the grid voltage signal. The fundamental frequency and harmonic frequencies with amplitudes exceeding a preset threshold are identified, and the ratio of each harmonic frequency to the fundamental frequency is calculated to obtain the harmonic order. The actual period length of the grid voltage is divided by the harmonic order to calculate the period of each major harmonic component. Based on the new interrupt period setting of the programmable timer, the actual sampling frequency of the current system is calculated, and the actual sampling frequency is compared with the frequency of each major harmonic component to verify whether the sampling process satisfies the Nyquist sampling theorem. If there are harmonic components close to or exceeding half of the Nyquist frequency, the interrupt period setting of the programmable timer is dynamically adjusted to increase the actual sampling frequency of the system to more than twice the target harmonic frequency, and the number of sampling points per cycle is updated synchronously. A real-time corrected voltage and current sampling sequence for a complete fundamental period is extracted from the waveform data buffer. Linear interpolation is performed on the voltage and current sampling sequences of the complete fundamental period to resample the non-uniformly spaced sampling point sequences into a uniformly timed point sequence. A digital low-pass filter is applied to the resampled uniformly timed voltage and current point sequences, with the cutoff frequency of the digital low-pass filter set to the highest harmonic frequency to be analyzed, in order to suppress high-frequency noise and aliasing components. The voltage and current point sequences processed by the digital low-pass filter are then output as waveform reconstruction results to the harmonic analysis calculation module.

[0039] In practical implementation, a Fast Fourier Transform (FFT) analysis is performed on the voltage sampling sequence in the waveform data buffer after real-time correction. This extracts the frequencies and amplitudes of each harmonic present in the grid voltage signal. The FFT analysis runs on a microprocessor, and its number of points corresponds to the number of sampling points in a complete fundamental cycle. The fundamental frequency and harmonic frequencies with amplitudes exceeding preset thresholds are identified. The ratio of each harmonic frequency to the fundamental frequency is calculated to obtain the harmonic order. The actual cycle length of the grid voltage is divided by the harmonic order to calculate the period of each major harmonic component. Based on the new interrupt cycle setting of the programmable timer, the actual sampling frequency of the current system is calculated. The actual sampling frequency is compared with the frequencies of each major harmonic component to verify whether the sampling process satisfies the Nyquist sampling theorem. (System actual sampling frequency) Through the formula:

[0040] in: Indicates the actual sampling frequency of the system. This represents the new interrupt cycle setting for the programmable timer and is a positive number. It's understandable that the Nyquist sampling theorem requires the sampling frequency to be at least twice the highest frequency component of the signal; the verification process involves comparing the actual sampling frequency. Is it greater than twice the highest frequency among the major harmonic components? If there are harmonic components that are close to or exceed half of the Nyquist frequency, the interrupt period setting of the programmable timer is dynamically adjusted to increase the actual sampling frequency of the system to more than twice the target harmonic frequency, and the number of sampling points per cycle is updated synchronously. The update of the number of sampling points per cycle is achieved by recalculating the ratio of the actual cycle length to the new interrupt period setting.

[0041] In practice, a real-time corrected voltage and current sampling sequence for a complete fundamental period is extracted from the waveform data buffer. The start and end points of the complete fundamental period are determined by the zero-crossing points of the voltage signal. Linear interpolation is then performed on the voltage and current sampling sequence for the complete fundamental period, resampling the non-uniformly spaced sampling points into a uniformly timed sequence. The uniform time interval is based on the calculated actual sampling frequency of the system. The reciprocal setting is used. A digital low-pass filter is applied to the resampled uniform time interval voltage and current point sequence. The cutoff frequency of the digital low-pass filter is set to the highest harmonic frequency to be analyzed, in order to suppress high-frequency noise and aliasing components. It can be understood that linear interpolation is performed between known non-uniform sampling time points and sampled values, and the interpolation at the target uniform time point is calculated. The digital low-pass filter is implemented using a finite impulse response filter or an infinite impulse response filter. The voltage and current point sequence processed by the digital low-pass filter is output as the waveform reconstruction result to the harmonic analysis calculation module. Optionally, the linear interpolation calculation uses the slope and time difference between two adjacent non-uniform sampling points. The design of the digital low-pass filter needs to consider the attenuation characteristics and phase response at the cutoff frequency. In some embodiments, if the harmonic frequency is found to be unsatisfactory through verification by the Nyquist sampling theorem, dynamically adjusting the interrupt period setting of the programmable timer is a process of decreasing the setting value to increase the actual sampling frequency. The number of sampling points per cycle will increase accordingly after the update, see Table 2.

[0042] Table 2, Harmonic Analysis and Sampling Frequency Verification Table:

[0043] In some embodiments, the preset threshold is set as a certain percentage of the fundamental amplitude according to the measurement accuracy requirements. Harmonic components below this threshold are not considered in the verification of the Nyquist sampling theorem. When the waveform reconstruction result is output, the corresponding uniform time interval sequence is also output. The order and coefficients of the digital low-pass filter are dynamically calculated based on the currently set cutoff frequency or selected from a preset filter coefficient table. Optionally, the operation of resampling into a uniform time interval sequence can also use other interpolation methods such as spline interpolation. The processing of the digital low-pass filter can be implemented in the frequency domain through windowed convolution. After extracting the data of the complete fundamental period from the waveform data buffer, the linear interpolation processing and digital low-pass filtering processing are performed in a temporary buffer allocated in memory to prevent overwriting the data in the original waveform data buffer.

[0044] In one embodiment of the present invention, windowed Fourier transform operations are performed on the voltage and current point sequences output as waveform reconstruction results. From the Fourier transform results of the voltage signal, the voltage amplitude, phase angle, and frequency values ​​of the fundamental wave and each harmonic are extracted. From the Fourier transform results of the current signal, the current amplitude, phase angle, and frequency values ​​of the fundamental wave and each harmonic are extracted. The voltage phase angle and current phase angle of the same harmonic order are subtracted to obtain the impedance angle of the corresponding harmonic order. Combining the voltage amplitude and current amplitude of the corresponding harmonic order, the active power component, reactive power component, and apparent power of the corresponding harmonic order are calculated. All calculation results from the fundamental wave to the set highest harmonic are summarized to generate a harmonic analysis report containing complete spectral information. The control system enters a self-learning mode and connects the signal input terminal of the sampling system to a programmable standard AC source. The programmable standard AC source is controlled to sequentially output standard test signals containing specific amplitudes, specific frequencies, and specific harmonic components. The temperature control device is controlled to make the sampling system traverse within a set temperature range according to a preset temperature gradient. At each preset temperature gradient point and under each standard test signal, uncompensated raw sampling data is collected, and real-time error feature vectors are recorded. The collected raw sampling data is compared with the true parameters of the standard test signals, and an iterative optimization algorithm is used to solve for a set of optimal compensation parameters that minimize the error. A mapping relationship is established between the real-time error feature vector corresponding to each temperature gradient point and the calculated optimal compensation parameters, and the temperature-frequency compensation surface data and temperature-gain compensation surface data stored in non-volatile memory are updated.

[0045] In practical implementation, the voltage and current point sequences output as waveform reconstruction results are subjected to windowed Fourier transform operations. The windowed Fourier transform uses either a Hanning window or a Blackman window function to reduce spectral leakage. From the Fourier transform results of the voltage signal, the voltage amplitude, phase angle, and frequency values ​​of the fundamental wave and each harmonic are extracted. The voltage amplitude is obtained by performing a complex modulo operation on the Fourier transform result, the phase angle is obtained by calculating the complex phase angle, and the frequency value is obtained through peak detection and frequency interpolation algorithms. From the Fourier transform results of the current signal, the current amplitude, phase angle, and frequency values ​​of the fundamental wave and each harmonic are extracted, using the same extraction method as for the voltage signal. The voltage phase angle and current phase angle for the same harmonic order are subtracted to obtain the impedance angle for the corresponding harmonic order. Impedance angle:

[0046] in: Indicates the first The impedance angle of the second harmonic typically ranges from -π to π radians. Indicates the first Voltage phase angle of subharmonics Indicates the first The current phase angle of the next harmonic is calculated. Combining the voltage and current amplitudes for the corresponding harmonic order, the active power component, reactive power component, and apparent power for that harmonic order are calculated. All calculation results from the fundamental frequency to the set highest harmonic are summarized to generate a harmonic analysis report containing complete spectral information. The harmonic analysis report is organized and stored in data structure or file format. It can be understood that the active power component... The calculation is based on the following formula: Reactive power component The calculation is based on the following formula:

[0047] in: and They represent the first The voltage and current amplitudes of the second harmonics range from [−1, 1]. In some embodiments, the number of points in the windowed Fourier transform is consistent with the length of the uniform time interval sequence output by the waveform reconstruction result, and the highest harmonic order is predefined by the system analysis capability or standard requirements.

[0048] In practical implementation, the control system enters a self-learning mode, connecting the signal input of the sampling system to a programmable standard AC source. The programmable standard AC source is controlled to sequentially output standard test signals containing specific amplitudes, frequencies, and harmonic components. The parameters of the standard test signals are predefined in a configuration file according to calibration requirements. A temperature control device is controlled to allow the sampling system to traverse a preset temperature gradient within a set temperature range, covering the entire temperature range expected to operate within the system. At each preset temperature gradient point and for each standard test signal, uncompensated raw sampling data is acquired, and a real-time error feature vector is recorded. The recording of the real-time error feature vector is synchronized with the acquisition of the raw sampling data. The acquired raw sampling data is compared with the true parameters of the standard test signal, and an iterative optimization algorithm is used to find a set of optimal compensation parameters that minimize the error. The iterative optimization algorithm can employ the least squares method or gradient descent method. It can be understood that the comparison between the raw sampling data and the true parameters of the standard test signal involves the calculation of errors in multiple dimensions, including amplitude, phase, and frequency. A mapping relationship is established between the real-time error feature vector corresponding to each temperature gradient point and the calculated optimal compensation parameters. The temperature-frequency compensation surface data and temperature-gain compensation surface data stored in the non-volatile memory are then updated. The update operation involves overwriting or supplementing the original calibration data. Optionally, a programmable standard AC source receives control commands through a standard communication interface. The temperature control device is a constant temperature chamber or a temperature control platform. The recorded content of the real-time error feature vector includes the real-time temperature reading, the real-time clock frequency drift, the zero-point drift, and the real-time gain error coefficient.

[0049] In some embodiments, the self-learning mode is triggered by maintenance personnel before the system leaves the factory or during periodic maintenance. The standard test signals include pure power frequency signals and composite signals containing specific subharmonics. Preset temperature gradients are set at equal or non-equal intervals, and testing is only performed after the internal temperature of the sampling system has stabilized at each temperature gradient point. When collecting uncompensated raw sampling data, the hardware operating state of the sampling system is consistent with the normal measurement mode, but the software compensation stage is temporarily bypassed. The iterative optimization algorithm runs on an external computing device or the high-performance processor of the sampling system itself, and the optimal compensation parameters obtained include the clock frequency compensation factor and gain compensation factor for the current temperature point. Optionally, the calculated optimal compensation parameters undergo format conversion and validity verification before being stored in non-volatile memory. The mapping relationship is established by using the real-time error feature vector as the index key and storing the optimal compensation parameters as associated values. It can be understood that updating the temperature-frequency compensation surface data and the temperature-gain compensation surface data means refreshing the system compensation database, providing a more accurate query basis for dynamic compensation during subsequent normal operation.

[0050] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention in any other way. Any person skilled in the art may make changes or modifications to the above-disclosed technical content to create equivalent embodiments that can be applied to other fields. However, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the protection scope of the present invention.

Claims

1. A high-precision AC sampling method for low-voltage power grids in broadband harmonic scenarios, characterized in that, The method includes: After the sampling system starts, hardware parameter initialization and calibration are performed. The original AC voltage signal of the low-voltage power grid is converted into a square wave signal of the same frequency using a zero-crossing comparator circuit. The rising edge of the square wave signal is connected to a specific counter channel of the real-time clock to capture the moment of the rising edge. The actual cycle length of the power grid voltage is calculated by recording the difference in count values ​​between two consecutive captured moments and dividing it by the reference frequency of the real-time clock. The actual cycle length is divided equally according to the preset number of sampling points per cycle to obtain the theoretical sampling time interval in the uncompensated state. The time interval is loaded into the programmable timer. The programmable timer is started and runs. In each timer interrupt service routine, the analog-to-digital converter is triggered to synchronously acquire the secondary side signals of the voltage transformer and current transformer to obtain the uncompensated original voltage and current sampling sequence. The method also includes simultaneous environmental monitoring and error tracing during system operation: Throughout the entire operation of the sampling system, the integrated temperature sensor continuously collects real-time temperature readings of key areas of the printed circuit board and stores the real-time temperature readings in a circular buffer queue. Driven by the real-time clock, the number of pulses of the grid voltage square wave signal captured per unit time is periodically counted, and the counted number of pulses is compared with the theoretical number of power frequency pulses to calculate the real-time drift of the clock frequency. During the DC bias self-calibration process of the analog-to-digital converter, the output code value of the analog-to-digital converter under zero input signal condition is recorded, and the output code value of the analog-to-digital converter is stored as the zero-point drift. From the secondary side signal conditioning paths of the voltage transformer and the current transformer, the feedback voltage characterizing the temperature coefficient of the resistive element is extracted, and the real-time gain error coefficient of the resistive network is calculated based on the feedback voltage. The real-time temperature readings, the real-time clock frequency drift, the zero-point drift, and the real-time gain error coefficient are combined to form a real-time error feature vector containing multiple error sources.

2. The high-precision AC sampling method for low-voltage power grids in broadband harmonic scenarios according to claim 1, characterized in that, The method also includes a dynamic compensation parameter generation operation based on the error feature vector: Read pre-calibrated temperature-frequency compensation surface data from non-volatile memory. The temperature-frequency compensation surface data describes the correspondence between the system clock frequency offset and temperature within a calibrated temperature range. Using the real-time temperature reading as an input parameter, interpolation is performed on the temperature-frequency compensation surface data to output the clock frequency compensation factor for the current temperature point. Read pre-calibrated temperature-gain compensation surface data from non-volatile memory. The temperature-gain compensation surface data describes the relationship between the change in gain of the signal conditioning path and temperature within a calibrated temperature range. By combining the real-time temperature reading with the real-time gain error coefficient of the resistor network, an interpolation query is performed on the temperature-gain compensation surface data to output a gain compensation factor for the current temperature and circuit state. The pre-calibrated frequency offset-sampling timing compensation relationship table is read from the non-volatile memory, and the real-time drift of the clock frequency is used as an index to query the corresponding sampling timing period correction amount. The clock frequency compensation factor, the gain compensation factor, the sampling timing period correction, and the zero-point drift are integrated to form a dynamic compensation parameter set suitable for the current operating state.

3. The high-precision AC sampling method for low-voltage power grids in broadband harmonic scenarios according to claim 2, characterized in that, The method also includes applying a dynamic compensation parameter set to correct the sampling process in real time. Obtain the sampling timing period correction amount from the dynamic compensation parameter set, and algebraically add the sampling timing period correction amount to the current interrupt period setting value of the programmable timer. The result of the algebraic superposition is used as a new interrupt cycle setting value and reloaded into the cycle register of the programmable timer, so that the subsequent timer interrupt interval is dynamically adjusted according to the real-time drift of the clock frequency. After the analog-to-digital converter completes one data acquisition, the original analog-to-digital converter output code value is read. The zero-point drift is extracted from the set of dynamic compensation parameters, and the original analog-to-digital converter output code value is subtracted from the zero-point drift to eliminate DC bias error. The code value after the subtraction operation is then multiplied and calibrated by applying the gain compensation factor in the dynamic compensation parameter set to obtain the final sampled code value after amplitude compensation. The final sampled code value obtained after each timed interrupt acquisition and compensation is stored in the waveform data buffer in chronological order to form a voltage and current sampling sequence that has been corrected in real time.

4. The high-precision AC sampling method for low-voltage power grids in broadband harmonic scenarios according to claim 3, characterized in that, The method also includes synchronous tracking and adaptive filtering of broadband harmonic signals: Fast Fourier Transform analysis is performed on the voltage sampling sequence in the waveform data buffer after real-time correction to extract the frequency and amplitude of each harmonic in the power grid voltage signal; Identify the fundamental frequency and each harmonic frequency whose amplitude exceeds a preset threshold, calculate the ratio of each harmonic frequency to the fundamental frequency, and obtain the harmonic order. Divide the actual period length of the grid voltage by the harmonic order to calculate the period of each major harmonic component. Based on the new interrupt cycle setting value of the programmable timer, calculate the current system actual sampling frequency, compare the actual sampling frequency with the frequency of each major harmonic component, and verify whether the sampling process satisfies the Nyquist sampling theorem. If there are harmonic components that are close to or exceed half of the Nyquist frequency, the interrupt period setting of the programmable timer is dynamically adjusted so that the actual sampling frequency of the system is increased to more than twice the target harmonic frequency, and the number of sampling points per cycle is updated synchronously.

5. The high-precision AC sampling method for low-voltage power grids in broadband harmonic scenarios according to claim 4, characterized in that, The method also includes the operation of reconstructing high-quality waveform data using the compensated sampling sequence: Extract a real-time corrected voltage and current sampling sequence for a complete fundamental cycle from the waveform data buffer; Linear interpolation is performed on the voltage and current sampling sequence of the complete fundamental period to resample the non-uniformly spaced sampling point sequence into a point sequence with uniform time intervals. A digital low-pass filter is applied to the resampled uniform time interval voltage and current point sequence. The cutoff frequency of the digital low-pass filter is set to the highest harmonic frequency to be analyzed in order to suppress high-frequency noise and aliasing components. The voltage and current point sequence processed by the digital low-pass filter is output as the waveform reconstruction result to the harmonic analysis and calculation module.

6. The high-precision AC sampling method for low-voltage power grids in broadband harmonic scenarios according to claim 1, characterized in that, The initialization and calibration operations include configuring the reference frequency of the real-time clock, setting the full-scale reference voltage of the analog-to-digital converter, and setting the gain coefficient of the secondary signal input channels of the voltage transformer and current transformer.

7. The high-precision AC sampling method for low-voltage power grids in broadband harmonic scenarios according to claim 2, characterized in that, The method also includes parameter self-learning and mapping table update operations performed during system idle periods: The control system enters self-learning mode and connects the signal input terminal of the sampling system to a programmable standard AC source; The programmable standard AC source is controlled to sequentially output standard test signals containing specific amplitudes, specific frequencies, and specific harmonic components. Control the temperature control device to ensure that the sampling system traverses the set temperature range according to the preset temperature gradient; At each preset temperature gradient point and under each standard test signal, uncompensated raw sampling data is collected, and the real-time error feature vector is recorded. The collected raw sampling data is compared with the true parameters of the standard test signal, and an iterative optimization algorithm is used to solve for a set of optimal compensation parameters that minimize the error. A mapping relationship is established between the real-time error feature vector corresponding to each temperature gradient point and the calculated optimal compensation parameters, and the temperature-frequency compensation surface data and the temperature-gain compensation surface data stored in the non-volatile memory are updated.

8. The high-precision AC sampling method for low-voltage power grids in broadband harmonic scenarios according to claim 2, characterized in that, The process of reading pre-calibrated temperature-frequency compensated surface data from non-volatile memory includes the following steps: Access the storage sector reserved for temperature-frequency compensation data in the non-volatile memory, read the total number of calibration data entries and temperature range, load the stored discrete calibration point data into the internal random access memory, and form a two-dimensional data table of temperature values ​​and frequency compensation amounts. Based on the two-dimensional data table, a surface fitting algorithm is used to generate a continuous compensation surface function covering the entire temperature range. The continuous compensation surface function is the temperature-frequency compensation surface data that can be queried.

9. The high-precision AC sampling method for low-voltage power grids in broadband harmonic scenarios according to claim 3, characterized in that, The step of reloading the algebraic superposition result as a new interrupt cycle setting value into the cycle register of the programmable timer includes the following steps: Calculate the ratio of the clock source frequency of the programmable timer to the target interrupt cycle setting value to obtain the initial count value to be written to the cycle register; Write the calculated initial count value into the auto-reload register of the programmable timer; Clear the current count value and interrupt flag of the programmable timer; Enable the counting function of the programmable timer so that it restarts the decrementing count from the new initial count value to achieve the updated timer interrupt cycle.

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