一种面向神经网络在FPGA上高效部署的混合精度自动化优化方法

By constructing a hardware resource consumption prediction model and using adaptive penalized augmented Lagrange optimization, the problems of low efficiency and poor reliability in neural network deployment on FPGA are solved, and efficient mixed-precision configuration and deployment under hardware constraints are achieved.

CN122261673BActive Publication Date: 2026-07-17NANJING UNIV OF SCI & TECH
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
NANJING UNIV OF SCI & TECH
Filing Date
2026-05-26
Publication Date
2026-07-17

AI Technical Summary

Technical Problem

Existing methods for deploying neural networks on FPGAs suffer from problems such as low optimization efficiency, lack of hardware feature awareness, and reliance on labeled data, making it difficult to achieve the optimal balance between accuracy and hardware overhead.

Method used

A hardware resource consumption prediction model is constructed, a graph-structured perceptual network is used for accurate configuration prediction, and an adaptive penalized augmented Lagrange method is used for constraint optimization. Combined with hierarchical neighborhood search, adapted hardware code is generated to meet FPGA resource and timing constraints.

Benefits of technology

It enables efficient deployment of neural networks on FPGAs, significantly improving inference energy efficiency and deployment efficiency, reducing dependence on labeled data, and expanding applicable scenarios.

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Abstract

本发明提供一种面向神经网络在FPGA上高效部署的混合精度自动化优化方法,涉及深度学习与硬件加速技术领域,包括:接收原始神经网络模型及硬件约束信息,解析获得量化算子,经两级过滤生成候选精度配置组合集;基于目标FPGA架构构建图结构感知网络预测各配置下的硬件资源消耗;构建融合任务损失与加权量化误差的微分目标函数,以硬件约束为条件采用自适应惩罚增广拉格朗日法求解获得初始混合精度配置;通过分层邻域搜索逐级扩大邻域替换配置得到最终配置;针对定点和浮点格式分别生成硬件描述代码并调用后端工具链输出比特流文件。本发明实现了在满足FPGA资源与时序约束下的自动化精度配置,显著提升了推理能效与部署效率。
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