Chip test vector adaptive intelligent generation and optimization method

Abstract

This invention belongs to the field of test vector optimization technology in electronic information processing. It relates to an adaptive intelligent generation and optimization method for chip test vectors. By parsing the netlist file of the chip under test, three weights are assigned to each signal path: signal controllability, signal observability, and fault sensitivity. The comprehensive feature values ​​of each node are calculated through forward and backward propagation algorithms to construct a three-dimensional topology map. Based on the three-dimensional topology map, the potential function of candidate test vectors is defined, and the redundancy coefficient, coverage coefficient, and entropy weight coefficient are dynamically adjusted according to the optimization progress index. Gradient descent operator, topology tunneling operator, and topology homotopy operator are used for collaborative evolutionary search, and a three-layer adaptive mechanism is used to schedule operator selection, population size, and termination conditions. A producer-consumer architecture combined with incremental forward fault propagation is adopted to efficiently screen and obtain the test vector set, realizing the fully adaptive and efficient generation of test vector sets with high fault coverage and low redundancy.

Description

Technical Field

[0001] This invention belongs to the field of test vector optimization technology in the discipline of electronic information processing, and relates to an adaptive intelligent generation and optimization method for chip test vectors, which can be used for quality control in the process of integrated circuit chip manufacturing. Background Technology

[0002] The continuous evolution of integrated circuit manufacturing processes has led to an exponential increase in the number of logic nodes within a chip, often reaching millions or even tens of millions of logic nodes per chip. During mass production, various manufacturing defects must be detected by applying test vectors to the circuit inputs and observing the output responses. The fault coverage and redundancy of the test vector set directly determine the yield control level of the final product and the overall manufacturing and testing costs. Therefore, efficiently generating test vector sets with both high fault coverage and low redundancy for large-scale complex circuits has become a core technological requirement in modern integrated circuit mass production.

[0003] Currently, the industry commonly employs automated test pattern generation methods based on deterministic algorithms, such as the D algorithm and the PODEM algorithm. These methods primarily involve deep analysis of the circuit netlist, deriving test vectors that meet specific detection requirements based on fault activation conditions and sensitive path penetration conditions. When encountering logical constraint conflicts during the derivation process, a state backtracking mechanism is triggered to find feasible solutions. In finite-scale circuit scenarios, deterministic algorithms can generate test vector sets covering major faults within a reasonable timeframe, making them the most mature and widely used application method in industry for a long time.

[0004] To address the technical bottlenecks of traditional deterministic algorithms in large-scale circuit scenarios, the industry has conducted extensive research on intelligent test vector generation, adaptive optimization, and redundancy control. For example, Chinese patent application CN121659865A discloses an intelligent chip test vector generation method and system for failure analysis. By acquiring chip design netlists, fault models, and known failure modes, it analyzes potential design and manufacturing defects, achieving automated generation of targeted test vectors for failure analysis scenarios and improving the accuracy of defect location. Another example is Chinese patent application CN116775386A, which discloses a method, electronic device, and storage medium for generating test vectors. This method focuses on power consumption control during test vector generation, dynamically detecting the power consumption of intermediate test packages and adaptively adjusting test packages with power consumption exceeding a threshold, ensuring that the generated test vectors meet preset power consumption constraints, thus achieving single-dimensional adaptive control. For example, the Chinese patent document with authorization announcement number CN120370142B discloses an integrated circuit chip testing system based on AI algorithms. It constructs a dataset by collecting historical chip test data, trains a test vector AI optimization model, learns the mapping relationship between chip performance and test vectors, and realizes automated optimization of test vectors, which reduces the redundant overhead of the traditional item-by-item testing process to a certain extent.

[0005] However, as circuit scale increases, none of the aforementioned technical solutions have overcome the core bottleneck of traditional test vector generation methods. The computational complexity of traditional deterministic automatic test mode generation methods increases exponentially with the number of nodes, and the backtracking search depth expands dramatically, causing the generation time to fail to meet the requirements of mass production cycle time. These methods generate test vectors one by one for a single fault, lacking a global optimization perspective. The generated test vector sets have high redundancy and high similarity between vectors, making it difficult to effectively cover fault nodes that are poorly controllable and have weak observability distributed deep within the circuit. Existing improved intelligent generation solutions either can only achieve single-dimensional adaptive adjustment and cannot establish a multi-objective collaborative global optimization system; or they are only oriented towards specific scenarios and cannot adapt to the needs of large-scale mass production full-scale testing; or they rely heavily on historical data and cannot achieve dynamic adaptation to the topological characteristics of new chips. All solutions cannot dynamically adjust the entire process generation strategy according to the current fault coverage status, and cannot adaptively concentrate search resources on uncovered difficult-to-test areas during the optimization process, resulting in low efficiency in improving fault coverage and failing to meet the test engineering requirements of high coverage, low redundancy, and high efficiency for large-scale integrated circuits. Summary of the Invention

[0006] The purpose of this invention is to overcome the shortcomings of existing technologies and to design and propose an adaptive intelligent generation and optimization method for chip test vectors. This method aims to solve the technical problems of existing deterministic automatic test mode generation methods, such as high computational complexity, high redundancy of test vector sets, lack of global optimization capabilities, and inability to adaptively adjust generation strategies.

[0007] To achieve the above objectives, the present invention provides a technical solution for an adaptive intelligent generation and optimization method for chip test vectors, comprising the following process steps: The netlist file of the chip under test is parsed, and each signal path is extracted and assigned a signal controllability weight, a signal observability weight, and a fault sensitivity weight. The comprehensive feature value of each node is calculated using forward and backward propagation algorithms to construct a three-dimensional topology map. Based on the three-dimensional topology map, a potential function for candidate test vectors is defined. The potential function is composed of a redundancy component, a coverage gain component, and a distribution entropy component, dynamically weighted. The redundancy coefficient, coverage coefficient, and entropy weight coefficient are dynamically adjusted according to an optimization progress indicator, which is the ratio of the current fault coverage rate to the preset target coverage rate. Based on the potential function, gradient descent, topology tunneling, and topology homotopy operators are used to... An evolutionary search is performed on the initial candidate test vectors to generate a candidate test vector set. Based on the changes in the potential function values ​​of each candidate test vector in the candidate test vector set, the gradient descent operator, topological tunneling operator, or topological homotopy operator is dynamically selected to perform the next round of evolutionary search. The population size and evolution termination condition of the candidate test vector set are adaptively adjusted according to the current growth rate of fault coverage. For each newly generated candidate test vector, forward fault propagation is performed along the subgraph in the three-dimensional topology that is affected by the changes in the input bit values ​​of the candidate test vector. The number of newly covered faults is counted, and the candidate test vector that optimizes the fault coverage is selected to obtain the test vector set.

[0008] This invention, by parsing the netlist file of the chip under test and constructing a three-dimensional topology map, can structurally encapsulate the core test-related characteristics of each signal path and node in the circuit, providing a precise structural foundation for the subsequent test vector generation process. The potential energy function defined based on the three-dimensional topology map can comprehensively measure the multi-dimensional test value of candidate test vectors. The weighting coefficients, dynamically adjusted according to the optimization progress indicators, allow the search strategy to automatically adapt to the core requirements of different optimization stages, achieving an adaptive balance between exploration breadth and coverage accuracy. This invention, through evolutionary search conducted collaboratively by three types of operators, can balance local optimization and global exploration, avoiding the search process from falling into a limited state. Dynamic operator selection, population size, and termination condition adjustments allow search resources to be automatically scheduled according to the optimization state, maintaining optimal search efficiency without manual intervention. Furthermore, the forward fault propagation update performed on the affected subgraph in this invention can significantly reduce the computational scope of fault coverage statistics, improve the efficiency of candidate test vector selection, and accurately select test vectors with optimal fault coverage capabilities. Ultimately, it achieves efficient generation of test vector sets with high fault coverage and low redundancy, solving the problems of heavy computational burden, insufficient global optimization capabilities, and inability to adaptively adjust generation strategies in traditional methods.

[0009] The signal controllability weight described in this invention is determined by the reciprocal of the shortest path length from the input terminal to the signal path; the signal observability weight is determined by the reciprocal of the shortest path length from the signal path to the output terminal; and the fault sensitivity weight is determined by performing fault injection simulation on the signal path and statistically analyzing the probability of fault propagation to the output terminal under different input modes.

[0010] This invention can accurately reflect the upper bound of the optimal control capability that external input signals can achieve for the current node, accurately reflect the upper bound of the optimal propagation capability that node fault signals can reach the output end, and comprehensively reflect the average fault propagation capability of the node under different fault injection conditions, so that the constructed three-dimensional topology map can fully reflect the global distribution of circuit controllability, observability, and fault sensitivity.

[0011] The present invention describes the calculation of the comprehensive feature value of each node using forward propagation and backward propagation algorithms, comprising: obtaining the signal controllability weights of all input signal paths associated with the node, and setting the maximum value among the signal controllability weights of the input signal paths as the controllable feature value of the node; obtaining the signal observability weights of all output signal paths associated with the node, and setting the maximum value among the signal observability weights of the output signal paths as the observable feature value of the node; obtaining the fault sensitivity weights of all signal paths associated with the node, and setting the arithmetic mean of the fault sensitivity weights as the sensitive feature value of the node; and combining the controllable feature value, observable feature value, and sensitive feature value to constitute the comprehensive feature value of the node.

[0012] This invention enables the three-dimensional topology map to accurately reflect the distribution of testing difficulty in each region of the circuit, providing a reliable structured input for the potential energy function, thereby improving the directionality and targeting of subsequent evolutionary searches.

[0013] The method for calculating the redundancy component in the potential energy function described in this invention includes: Calculate the Hamming distance between the candidate test vector and each existing test vector in the generated test vector set; calculate the attenuation value using the Hamming distance as the independent variable; calculate the arithmetic mean of all attenuation values ​​corresponding to the existing test vector, and set the arithmetic mean as the redundancy component of the candidate test vector.

[0014] This invention can effectively constrain highly repetitive candidate test vectors in the potential energy function, avoid redundant expansion of the generated test vector set, ensure that the final output test vector set has lower redundancy, and reduce unnecessary test overhead.

[0015] The method for calculating the distributed entropy component in the potential energy function described in this invention includes: Based on the comprehensive feature values ​​of each node, the input bits of the chip under test are divided into a preset number of topological partitions; The proportion of the number of bits with a value of 1 in each topology partition to the total number of bits in that topology partition is calculated, and this proportion is set as the bit density of that topology partition. The standard Shannon information entropy is calculated based on the bit density of each topological partition, and the standard Shannon information entropy is set as the distribution entropy component of the candidate test vector.

[0016] The steps for dynamically adjusting based on optimized progress indicators as described in this invention include: The difference between the optimized progress index and the preset coverage threshold is used as the independent variable to input the Sigmoid mapping function to calculate the redundancy coefficient. The mean change in fault coverage in a preset batch is calculated as the growth rate of the current fault coverage. The reciprocal of the sum of the growth rate of the current fault coverage and the preset stability constant is calculated, and the reciprocal is added to the base value of the coverage coefficient to obtain the coverage coefficient. Using the optimized progress index as the independent variable, the entropy weight coefficient is calculated by taking the reciprocal of the sum of the constant 1 and the optimized progress index.

[0017] The evolutionary search steps of the topological tunneling operator described in this invention include: Randomly flip a preset number of bits in the current candidate test vector to generate candidate test vectors for adjacent states; Calculate the difference between the potential energy function value of the adjacent state candidate test vector and the potential energy function value of the current candidate test vector, and set this difference as the barrier height; When the barrier height is less than 0, the adjacent state candidate test vector is directly used as the new candidate test vector; When the barrier height is greater than or equal to 0, the adjacent state candidate test vector is accepted as a new candidate test vector with a jump probability, and the jump probability is equal to the reciprocal of the sum of the constant 1 and the barrier height.

[0018] This invention can effectively prevent evolutionary search from getting stuck in local optima, ensuring that the search process can continuously explore more regions in the solution space, and improving the diversity and global coverage of candidate test vectors.

[0019] The evolutionary search steps of the topological homotopy operator described in this invention include: Statistically analyze the fault coverage distribution of the current test vector set and identify low fault coverage areas that have not reached the preset coverage threshold; Based on the controllable feature values ​​of each node in the three-dimensional topology map, the circuit input bit bits associated with the low fault coverage area are extracted to form a target input bit set; Keeping the bit values ​​of the non-target input bit set in the current candidate test vector unchanged, randomly flipping a preset proportion of the bits in the target input bit set to generate a new candidate test vector; The new candidate test vector is accepted when the coverage gain component of the low-fault coverage area is greater than 0.

[0020] The step of adaptively adjusting the population size of the candidate test vector set according to the present invention includes: Obtain the preset target distribution entropy and the current distribution entropy of the candidate test vector set, calculate the difference between the preset target distribution entropy and the current distribution entropy, multiply the difference by a preset adjustment coefficient, update the population size of the next batch proportionally, and limit the updated population size to a preset upper and lower limit range.

[0021] The method for counting the number of newly covered faults as described in this invention includes: A producer-consumer architecture is adopted, in which operators are continuously run in the producer thread to perform evolutionary search to generate new candidate test vectors and push them into a shared queue; In the consumer thread, the new candidate test vectors are retrieved sequentially from the shared queue and compared bit by bit with the most recently included benchmark test vector in the test vector set to identify the set of input bits whose values ​​have changed. Based on the structure of the three-dimensional topology graph, the nodes directly driven by the input bit set signal and all their successor nodes are extracted as the subgraph; Perform logic simulation and forward fault propagation calculation only on the nodes within the subgraph, and output the number of newly added coverable faults.

[0022] Compared with existing technologies, the advantages of this invention are as follows: By constructing a three-dimensional topology map, the controllability, observability, and fault sensitivity information of the circuit are structured; the redundancy, coverage gain, and distribution uniformity of candidate test vectors are uniformly quantified using a potential energy function; and three weighting coefficients are adaptively adjusted throughout the optimization process based on optimization progress indicators, driving the collaborative search of three types of evolution operators. Simultaneously, by leveraging incremental forward fault propagation and a producer-consumer parallel architecture, the computational load of each evaluation round is significantly reduced. The combined effect of these mechanisms enables the test vector generation process to output a test vector set with high fault coverage and low redundancy within the production cycle of large-scale integrated circuits without manual parameter intervention. Attached Figure Description

[0023] Figure 1 This is a schematic flowchart illustrating the adaptive intelligent generation and optimization method for chip test vectors in this invention.

[0024] Figure 2 This is a graph showing the evolution of fault coverage as a function of iteration number in this invention.

[0025] Figure 3 This is a schematic diagram of the evolution curve of the potential energy value of the candidate test vector as a function of the number of iterations in this invention. Detailed Implementation

[0026] The present invention will now be clearly and completely described in conjunction with the embodiments and accompanying drawings.

[0027] Example 1: like Figure 1 As shown, the adaptive intelligent generation and optimization method for chip test vectors in this embodiment includes the following steps: S1. Netlist parsing and 3D topology graph construction.

[0028] This step parses the netlist file of the chip under test, extracts each signal path, and assigns signal controllability weight, signal observability weight, and fault sensitivity weight respectively. The comprehensive feature value of each node is calculated through forward propagation algorithm and backward propagation algorithm to construct a three-dimensional topology map.

[0029] In integrated circuit mass production testing scenarios, for a certain type of multi-core application processor chip, which integrates millions of logic gates and flip-flops, resulting in a massive circuit scale, traditional global simulation solutions are too computationally intensive to generate test vectors within the production line cycle time. Therefore, this approach first parses the chip's netlist file to extract the circuit's topology information, representing the circuit as a directed weighted graph. Nodes represent logic gates and flip-flops in the circuit, and signal paths represent the signal propagation paths between nodes.

[0030] To assess the importance of each signal path in chip testing, this step assigns a controllability weight, an observability weight, and a fault sensitivity weight to each extracted signal path. A forward propagation algorithm is used to propagate controllability information layer by layer from the circuit input to the output, and a backward propagation algorithm is used to propagate observability information layer by layer from the circuit output to the input, thereby completing the feature calculation for all nodes.

[0031] In practice, the system calculates the shortest physical or logical path length from the circuit input to the target signal, and sets the reciprocal of this shortest path length as the signal controllability weight. The larger the shortest path length, the deeper the signal path is buried inside the circuit, and the more difficult it is to control this local area with external input signals. Therefore, the calculated signal controllability weight is smaller.

[0032] Similarly, the signal observability weight is assigned based on the shortest path length from the target signal path to the circuit output. The system calculates this shortest path length and sets its reciprocal as the signal observability weight. The larger the value of the shortest path length, the farther the physical distance of the fault signal occurring on that signal path propagates to the observable output. The higher the probability that the fault is shielded by logic gates during propagation, the more difficult the overall testing and detection becomes. Therefore, the calculated signal observability weight is smaller.

[0033] Regarding the fault sensitivity weight, the system employs a simulation-based statistical method for assignment. Fault injection simulation with a fixed value of 0 or 1 is performed on the target signal path, and a preset number of random input patterns are traversed at the input. The system continuously counts the total number of times a fault signal successfully penetrates multiple logic gates and propagates to the circuit output, calculating the ratio of this successful propagation count to the total number of input patterns. This ratio is then set as the fault sensitivity weight. For example, after injecting a fault into each signal path, 1000 sets of random input patterns are traversed. If the fault propagates to the output 350 times, then the fault sensitivity weight of that signal path is... It is 0.35.

[0034] After assigning the three weights to each signal path, the comprehensive characteristic value of each node is calculated using forward and backward propagation algorithms. Specifically, the forward propagation algorithm propagates controllability information layer by layer from the circuit input to the output, while the backward propagation algorithm propagates observability information layer by layer from the circuit output to the input, thus completing the characteristic calculation for all nodes. In the step of calculating the comprehensive characteristic value of each node, firstly, the signal controllability weights of all input signal paths associated with the node are obtained, and the maximum value among these input path weights is set as the controllable characteristic value of that node. Selecting the maximum value accurately reflects the upper bound of the optimal controllability that the external input signal can achieve for the current node. Subsequently, the signal observability weights of all output signal paths associated with the node are obtained, and the maximum value among these output path weights is set as the observable characteristic value of that node. Here, the logic for selecting the maximum value is symmetrical to the controllable characteristic value, reflecting the upper bound of the optimal propagation capability of the node's fault signal to reach the output. For the sensitive feature value of a node, obtain the fault sensitivity weights of all signal paths associated with that node, calculate the arithmetic mean of these weights, and set it as the sensitive feature value of that node. Here, the mean value is used to comprehensively reflect the average fault propagation capability of the node under different fault injection conditions.

[0035] The aforementioned controllable, observable, and sensitive eigenvalues ​​together constitute the comprehensive eigenvalue of each node. It should be noted that during the forward propagation calculation of the controllable eigenvalues, an input dependency set is synchronously constructed and updated for each node. This input dependency set records the indices of the circuit input bits that contribute the most to the transmission of the controllable eigenvalues ​​for that node, thereby establishing an explicit addressing mapping between internal nodes and external input pins. The controllable, observable, sensitive eigenvalues, and input dependency sets of each node are then aggregated to construct a three-dimensional topology map.

[0036] Taking the aforementioned multi-core application processor chip as an example, the shortest path length of the input signal path for a node located near the chip's input stage... The smaller the controllable characteristic value, the larger the controllable characteristic value; while the node located deep in the circuit has a smaller controllable characteristic value, indicating that the node is more difficult to activate directly through external input during testing.

[0037] Thus, by parsing the netlist file, assigning three types of weights, and calculating the comprehensive feature values ​​of each node through forward and backward propagation algorithms, a three-dimensional topology map that can fully reflect the controllability, observability, and fault sensitivity distribution of the circuit is constructed, providing an accurate structured data foundation for the subsequent definition and evolution search of the potential function.

[0038] S2. Construction of potential energy function and dynamic adjustment of weighting coefficients.

[0039] This step defines the potential function of candidate test vectors based on a three-dimensional topology map. The potential function is composed of redundancy components, coverage gain components, and distribution entropy components, which are dynamically weighted. The redundancy coefficient, coverage coefficient, and entropy weight coefficient involved in the dynamic weighting are dynamically adjusted according to the optimization progress index, which is the ratio of the current fault coverage rate to the preset target coverage rate.

[0040] After constructing the three-dimensional topology map, a potential energy function is further defined to quantify the comprehensive test value of each candidate test vector, guiding the subsequent evolutionary search process. Candidate test vectors refer to test vectors generated during the evolutionary search process that have not yet been included in the final test vector set; each candidate test vector is a binary vector with the same number of bits as the circuit input.

[0041] In this embodiment, the potential energy function Redundancy components Coverage gain component and distribution entropy components Weighted composition, satisfying the following relation:

[0042] In the formula, As candidate test vectors, This is the redundancy coefficient. For coverage factor, These are the entropy weighting coefficients, and all three weighting coefficients are dynamically adjusted based on the optimization progress indicators. Candidate test vectors Redundancy components, To cover the gain component, This represents the distribution entropy component. Candidate test vectors with lower potential function values ​​have higher overall testing value and are more likely to be selected for the final test vector set.

[0043] The optimization progress metrics are determined by the current fault coverage status and satisfy the following relationship:

[0044] In the formula, To optimize progress indicators, The current fault coverage rate is the proportion of the number of faults that the generated test vector set can cover out of the total number of faults to be tested. The target coverage rate. In this embodiment, The value is set to 0.95, which means that the final test vector set is required to cover 95% of the faults under test. The value range is 0~1. The closer it is to 1, the closer the current fault coverage is to the target, and the more complete the optimization progress.

[0045] The calculation steps for the redundancy component in the potential energy function include: designating the candidate test vectors generated before the current iteration as the existing vector set; calculating the decay value using the Hamming distance between the candidate test vector and each vector in the existing vector set as the independent variable; and taking the average of all decay values ​​as the redundancy component. The redundancy component is negatively correlated with the Hamming distance; the larger the Hamming distance, the smaller the redundancy component.

[0046] Let the existing vector set be... , The number of candidate test vectors in the existing vector set. Redundancy components Satisfying the relation:

[0047] In the formula, Candidate test vectors With the existing set of vectors, the first vectors The Hamming distance between two vectors is the number of bits that differ in value between the two vectors. The maximum Hamming distance is equal to the length of the candidate test vector.

[0048] Understandably, when candidate test vectors The higher the similarity with vectors in an existing vector set, the better each... The smaller the value, the greater the corresponding attenuation value and the redundancy component. The larger the value, the higher the redundancy of the candidate test vector with existing vectors, and the lower its test value. Conversely, the larger the Hamming distance, the smaller the redundancy component and the lower the potential function value of the candidate test vector, and the more likely it is to be selected into the test vector set.

[0049] The calculation steps for the distribution entropy component in the potential energy function include: dividing the input bits into a predetermined number of topological partitions based on the comprehensive characteristic values ​​of each node in the 3D topological map; counting the proportion of bits with a value of 1 in each topological partition to the total number of bits in that topological partition; calculating the information entropy for each topological partition based on the proportion; and using the resulting information entropy as the distribution entropy component. A larger distribution entropy component indicates a more uniform distribution of the candidate test vector across the topological partitions.

[0050] In this embodiment, based on the controllable characteristic values ​​of each node in the three-dimensional topology map, the bits at the circuit input terminal are divided according to the circuit regions they affect. A topological partition, exemplarily Choosing 16 means dividing the circuit's input bits into 16 equal topological partitions according to the three-dimensional topological map. For candidate test vectors... , No. Bit density of each topological partition Satisfying the relation:

[0051] In the formula, For the first The number of bits with a value of 1 in each topological partition. This represents the total number of bits in this topology partition. For the first Bit density of each topological partition. Candidate test vectors. Distribution entropy components Calculated using standard Shannon information entropy:

[0052] In the formula, The number of topology partitions, For the first Bit density of each topological partition; These are the normalization coefficients. Distribution entropy components. The larger the value, the more uniform the distribution of candidate test vectors across different topological partitions. Using a negative sign in the weighting of the potential energy function can reduce the value of the potential energy function, thereby prioritizing the generation of diverse candidate test vectors covering different regions of the circuit during the evolutionary search process, and avoiding the concentration of test vectors in a certain local area.

[0053] Coverage gain component in potential energy function This is used to measure the actual fault detection capability of newly added candidate test vectors. Specifically, the system evaluates candidate test vectors... Incremental forward fault propagation calculations are performed along the structure of the three-dimensional topology map, verifying the logic response results of the circuit at each node to determine whether each potential fault point in an uncovered state can be successfully activated and stably propagated to the observable output. To ensure the uniformity of the three-dimensional components of the potential energy function in terms of mathematical magnitude, the number of coverable faults newly activated by the candidate test vector that are not yet covered by the test vector set is counted. Then, the ratio of this number of newly coverable faults to the total number of target faults is calculated, and the resulting normalized ratio is defined as the coverage gain component. The target total number of faults is the total number of all possible faults. The larger the value, the stronger the ability of the candidate test vector to add fault coverage. It participates in the weighting in the potential energy function with a negative sign. The lower the potential energy function value, the higher the priority of being selected into the test vector set.

[0054] The redundancy coefficient is the weighting coefficient used to weight the redundancy component among the three weighting coefficients. In the dynamic adjustment step of the redundancy coefficient, the difference between the optimization progress index and the preset coverage threshold is used as the independent variable, and the redundancy coefficient is determined by mapping through the sigmoid function. When the optimization progress index is lower than the preset coverage threshold, the redundancy coefficient approaches the preset lower limit, and the redundancy penalty is weakened to encourage the exploration breadth of the evolutionary search. When the optimization progress index exceeds the preset coverage threshold, the redundancy coefficient is rapidly increased to the preset upper limit to suppress the generation of duplicate candidate test vectors.

[0055] In this embodiment, the redundancy coefficient is It satisfies the following relation:

[0056] In the formula, This is the preset lower limit for the redundancy coefficient. This is a preset upper limit for the redundancy coefficient. To set a preset coverage threshold, To optimize the progress metric, in the initial stage of the evolutionary search, the progress metric is kept at a low level, and the redundancy coefficient of the calculated output approaches the preset lower limit. The penalty constraint on highly redundant candidate test vectors is deliberately relaxed to encourage the search algorithm to conduct a large-scale divergent exploration in the unknown solution space. Once the progress metric exceeds the preset coverage threshold, the redundancy coefficient undergoes a phase transition jump via the Sigmoid function and rapidly approaches the preset upper limit. A strong penalty is then applied to all candidate test vectors that have highly similar characteristics to the existing benchmark vectors, effectively suppressing the generation of duplicate candidate test vectors and preventing the redundant expansion of the test vector set.

[0057] The weighting coefficient used to weight the coverage gain component among the three weighting coefficients is the coverage coefficient. In the dynamic adjustment step of the coverage coefficient, the coverage coefficient is negatively correlated with the growth rate of the current fault coverage rate. When the growth rate of the fault coverage rate decreases, the coverage coefficient increases to strengthen the reward for newly covered faults and promote the improvement of fault coverage.

[0058] In this embodiment, the coverage coefficient is It satisfies the following relation:

[0059] In the formula, The current rate of increase in fault coverage is expressed as the change in the mean of fault coverage over the most recent five batches. When the rate of increase in fault coverage... When it is a maximum value, As the rate approaches 1, evolutionary search proceeds according to the conventional reward mechanism; when the fault coverage growth rate... During descent, Increase the weight of the coverage gain component to make the evolutionary search more actively seek candidate test vectors that can improve fault coverage, effectively addressing the problem of stagnant coverage growth.

[0060] Among the three weighting coefficients, the weighting coefficient used to weight the distribution entropy component is called the entropy weight coefficient. In the dynamic adjustment step of the entropy weight coefficient, the entropy weight coefficient is negatively correlated with the optimization progress index. In the early stage of optimization, the entropy weight coefficient takes a larger value to improve the exploration breadth of candidate test vectors in the solution space. As the optimization progress index increases, the entropy weight coefficient decreases, so that the evolutionary search gradually shifts to local refinement.

[0061] In this embodiment, the entropy weighting coefficient is It satisfies the following relation:

[0062] In the formula, To optimize the progress metrics, during the initial testing vacuum period when the progress metrics are almost zero, the entropy weight coefficient reaches its global maximum value of 1. The distributed entropy component has a significant weight in the potential energy function, forcing all newly generated candidate test vectors to have the maximum possible circuit region projection attribute. As the optimization progress metrics increase, the entropy weight coefficient gradually decreases, and the influence of the distributed entropy component on the potential energy function gradually weakens. The evolutionary search shifts to a local refinement stage with the primary goal of improving fault coverage. After generating 50 candidate test vectors, the optimization progress metrics are recalculated, and the redundancy coefficient, coverage coefficient, and entropy weight coefficient are updated synchronously according to the above relationship.

[0063] In this way, the redundancy, coverage and distribution uniformity of candidate test vectors are comprehensively quantified by the potential energy function, and the dynamic adjustment mechanism of the three weighting coefficients enables the evolutionary search to automatically balance breadth exploration and precise coverage at different optimization stages, so as to achieve fully adaptive test vector generation without manual intervention.

[0064] S3, Multi-operator Cooperative Candidate Test Vector Evolution Search.

[0065] This step uses the potential function to perform an evolutionary search on the initial candidate test vectors using the gradient descent operator, topological tunneling operator, and topological homotopy operator, generating a set of candidate test vectors.

[0066] After constructing and defining the potential function, this step uses the potential function to perform a deep evolutionary search on the initially generated candidate test vectors, thereby generating a high-quality set of candidate test vectors. In order to balance local optimization accuracy and global exploration breadth in the complex binary solution space, this step deploys three types of cooperative topological evolution operators to gradually guide the candidate test vectors in the solution space to an ideal region with a lower potential function value.

[0067] Specifically, the gradient descent operator is first used to perform a fast local optimization search in the potential energy field. During this process, each bit of the current candidate test vector is subjected to an independent logical flip test, and the decrease in the potential energy function value corresponding to each single bit flip is precisely calculated. Then, the potential energy decrease magnitudes of all bits are sorted, and the bits with the highest decrease magnitudes are extracted and flipped simultaneously to generate new candidate test vectors. The core design logic of the gradient descent operator lies in using the highly defined local potential energy gradient to guide the candidate test vectors located in the smooth potential energy basin to converge to the local optimum of the current region at an extremely fast computation speed, significantly reducing the ineffective search time in the early stages.

[0068] The topological tunneling operator borrows from the quantum tunneling effect, allowing candidate test vectors to cross the potential barrier with a specific probability and make discontinuous jumps to non-adjacent search regions, thus avoiding the evolutionary search from getting trapped in local optima. A preset number of bits are randomly flipped on the current candidate test vector to generate neighboring state candidate test vectors. The system then calculates the difference between the potential function values ​​of the neighboring state candidate test vectors and the current candidate test vector, and sets this difference as the barrier height.

[0069] In this embodiment, the barrier height is It satisfies the following relation:

[0070] In the formula, Candidate test vectors for adjacent states The potential energy function value, The current candidate test vector Potential energy function value, barrier height This represents the energy cost required to jump from the current search state to a neighboring state of the target. When the calculated barrier height is less than 0, it indicates that the neighboring state has lower potential energy and higher testing value, and the system directly accepts the candidate test vector of that neighboring state as a new candidate test vector. However, when the barrier height is greater than or equal to 0, it indicates that the neighboring state is in a disadvantageous position with higher potential energy. The system does not discard it directly, but instead accepts the candidate test vector of the neighboring state as a new candidate test vector with a specific jump probability based on a statistical probability mechanism.

[0071] In this embodiment, a specific jump probability Satisfying the relation:

[0072] In the formula, The potential barrier height is calculated above. For example, the number of bits flipped each time is approximately 30% of the total number of bits at the circuit input, in order to achieve nonlocal jumps across a large potential barrier.

[0073] The topological homotopy operator performs a targeted search on candidate test vectors based on the structural information of the 3D topological map to improve fault coverage in difficult-to-test regions. Specifically, it analyzes the fault coverage distribution of the existing vector set to identify circuit regions with low fault coverage; based on the controllable feature values ​​of each node in the 3D topological map, it extracts the circuit input bits strongly correlated with the low-coverage region to form a target input bit set; it keeps the bits related to high-coverage signal paths in the candidate test vectors unchanged, and only performs random flipping on the bits corresponding to the target input bit set to generate new candidate test vectors; if the new candidate test vector improves the fault coverage of the target region, it is accepted. For example, approximately 50% of the bits in the target input bit set are randomly selected for flipping each time. The evolutionary search of the three types of operators continues, and the generated candidate test vectors are summarized to form a candidate test vector set.

[0074] like Figure 3 As shown in the figure, this is an evolution curve of the potential energy value of the candidate test vector as a function of the number of iterations. The figure shows that in the early stages of iteration (from 0 to 20 iterations), the potential energy value is concentrated in the range of -0.9 to -0.5, with small fluctuations and a generally low value. This indicates that at this stage, it is easy to find candidate test vectors that are significantly different from the existing vector set and have high coverage gain, and the potential energy field has a strong attraction for the evolutionary search. As the iteration progresses to the middle and later stages, after about 40 iterations, the potential energy value generally shows an upward trend, with periodic pulse peaks showing gradually increasing amplitudes, reaching a maximum of about 0.9. This phenomenon reflects the process by which the topological tunneling operator accepts neighboring states with higher potential energy with a certain jump probability and actively jumps over the potential barrier to non-adjacent search regions. The potential energy value falls back after the pulse, indicating that the candidate test vector successfully enters a new low-potential region after the jump, achieving continuous coverage of faults in difficult-to-detect areas.

[0075] Thus, through the synergistic effect of gradient descent, topological tunneling, and topological homotopy operators, evolutionary search can simultaneously address the three needs of local refinement, global exploration, and targeted optimization in the solution space, effectively improving the diversity and fault coverage of the candidate test vector set.

[0076] S4, Operator scheduling and adaptive adjustment of evolution parameters.

[0077] This step dynamically selects the gradient descent operator, topological tunneling operator, or topological homotopy operator to perform the next round of evolutionary search based on the change in the potential function value of each candidate test vector in the candidate test vector set, and adaptively adjusts the population size and evolution termination condition of the candidate test vector set according to the current growth rate of fault coverage.

[0078] During the evolutionary search of candidate test vectors, the demands for solution space exploration differ significantly at different optimization stages. The initial stage urgently requires macroscopic generalization exploration across the vast solution space; the mid-stage necessitates focused, targeted breakthroughs in local blind spots where fault coverage encounters bottlenecks; and the late stage demands extremely precise convergence of the evolutionary trajectory to the optimal stable state with high fault coverage. To address this, this step establishes a three-layer adaptive mechanism, encompassing operator selection adaptation, population size adaptation, and termination condition adaptation.

[0079] Based on the potential function values ​​of each candidate test vector in the candidate test vector set, the historical performance of the three types of evolution operators is dynamically evaluated. The average potential energy decrease rate and fault coverage improvement rate of the gradient descent operator, topological tunneling operator, and topological homotopy operator in the most recent batches are statistically analyzed. A confidence upper bound strategy is used to dynamically allocate the usage probability of the three types of operators, giving operators with excellent historical performance more execution opportunities, while continuously exploring operators with poor historical performance to prevent high-quality operators from being prematurely eliminated due to changes in local conditions. The exploration coefficients are optimized. When the system detects that the overall performance of a specific evolutionary operator falls below the average baseline level of the three operator classes for three consecutive batches, it will decisively intervene, temporarily reducing the probability of its use in the next batch to 50% of the current weight, and evenly distributing the stripped probability share to the other two operator classes. When the system detects that the overall search has stagnated and the coverage curve has flattened, it will forcibly distribute the usage probabilities of the three operator classes equally, reactivating broad exploration.

[0080] In addition to regulating the operator execution probability, this step also adaptively scales the population size of candidate test vectors participating in the evolutionary search based on the changing trends of the distribution entropy of the candidate test vector set and the fault coverage growth curve. When the current distribution entropy of the candidate test vector set is lower than the preset target distribution entropy, it indicates that the current candidate test vectors are unevenly distributed in the solution space, indicating insufficient exploration, and the population size needs to be increased; when the distribution entropy is higher than the target distribution entropy and the fault coverage growth tends to stagnate, it indicates that the evolutionary search has entered the convergence stage, and the population size can be reduced to save computational resources. The population size satisfies the following relationship:

[0081] In the formula, For the first Population size of each batch For the first Population size of a batch; The target distribution entropy is taken as the theoretical maximum Shannon information entropy that the candidate test vector can achieve under the ideal state of absolute uniform distribution. The distribution entropy of the current candidate test vector set is used to reflect the degree of dispersion of the current population in each partition of the three-dimensional topological map; To adjust the population size, a value of 0.1 is preferred, which limits the drastic extent of each population expansion or contraction. The population size adjustment range is limited to between 50 and 500 to prevent search degradation due to an excessively small size or waste of computational resources due to an excessively large size.

[0082] This step comprehensively considers fault coverage saturation, candidate test vector redundancy, and computational budget, using multiple criteria to determine the termination time of the evolutionary search. During continuous evolutionary iterations, the system will issue an instruction to terminate the evolutionary search if any of the following conditions are met: The fault coverage improvement is less than 0.1% for 10 consecutive batches, indicating that the fault coverage has approached saturation; the average Hamming distance between the newly generated candidate test vectors and the existing vector set is less than 5% of the total number of bits at the circuit input, indicating that the newly generated candidate test vectors are highly homogeneous with existing vectors, making it difficult to find effective new candidate test vectors in the existing solution space; the number of evolutionary iterations reaches the preset maximum or the total running time exceeds the preset time limit, exhausting the computational budget. The aforementioned 5% threshold is an exemplary threshold, which can be flexibly adjusted by those skilled in the art according to the circuit scale and testing requirements. For example, it can be set to 3% for large-scale circuits and 1% for small- to medium-scale circuits.

[0083] Thus, through a three-layer adaptive mechanism, evolutionary search can automatically adjust operator combinations, population size, and termination timing based on real-time optimization status, achieving optimal resource allocation and strategy scheduling at different stages, and improving the efficiency and flexibility of test vector generation.

[0084] S5, Incremental Fault Propagation and Optimal Test Vector Selection.

[0085] For each newly generated candidate test vector, this step performs forward fault propagation update along the subgraph of the three-dimensional topology graph that is affected by the change in the input bit value of the candidate test vector, counts the number of newly added coverable faults, and selects the candidate test vector that makes the fault coverage optimal, thus obtaining the test vector set.

[0086] This step employs a producer-consumer architecture to execute candidate test vector generation and fault coverage calculation in parallel. The process of generating candidate test vectors acts as the producer, continuously outputting candidate test vectors; the fault coverage calculation process acts as the consumer, performing forward fault propagation updates only on subgraphs affected by changes in the input bit values ​​of the current candidate test vectors based on the locality of the 3D topology graph. After counting the number of newly covered faults for each candidate test vector, the selection is completed.

[0087] Understandably, the producer thread continuously runs the gradient descent operator, topological tunneling operator, and topological homotopy operator, generating candidate test vectors and placing them into a shared queue; the consumer thread sequentially retrieves candidate test vectors from the shared queue and performs incremental forward fault propagation. Specifically, for newly retrieved candidate test vectors... First, compare it with the candidate test vectors most recently included in the test vector set. A bit-by-bit comparison is performed to identify the set of input bits whose values ​​have changed. Based on the topological structure of the 3D topology map, the circuit node subgraph affected by the aforementioned input bit value changes is determined. Logic simulation and fault propagation analysis are re-executed only on the nodes in this subgraph and their successor nodes, and candidate test vectors are counted. Increase the number of faults that can be covered without performing a full simulation of the entire circuit. For example, for a large-scale integrated circuit with 1 million nodes, if... and With only a few bits differing, the affected subgraph typically contains only tens of thousands of nodes, reducing the computational cost to less than 5% of the global simulation.

[0088] After counting the number of newly covered faults for each candidate test vector, the candidate test vector that maximizes the improvement in fault coverage is selected from the candidate test vector set and added to the test vector set. The existing vector set and the current fault coverage are updated simultaneously. Candidate test vectors with zero newly covered faults are considered redundant and are not included in the test vector set. This selection process continues until the termination condition in S4 is met, and the final test vector set is output. Figure 2As shown in the figure, this is an evolution curve of fault coverage as a function of iteration number. The figure shows that in the early iterations (0 to 20 iterations), the fault coverage slowly increases from about 5% to about 20%. During this stage, the evolutionary search is mainly based on extensive exploration, with candidate test vectors gradually covering faults in easily testable areas of the circuit. In the middle iterations (about 20 to 60 iterations), the fault coverage shows an accelerated growth trend, rapidly increasing from 20% to about 80%, indicating that the adaptive adjustment mechanism of the potential function effectively guides the three types of evolutionary operators to break through the coverage bottleneck region. In the later iterations (about 60 to 100 iterations), the growth of fault coverage tends to level off and converges to about 93%. The coverage coefficient increases synchronously with the decrease in the growth rate, continuously incentivizing the evolutionary search to advance towards difficult-to-test regions, ultimately achieving a high level of fault coverage.

[0089] In this way, by decoupling the generation of candidate test vectors from fault coverage calculation in parallel through a producer-consumer architecture, and combining incremental forward fault propagation with efficient simulation of local subgraphs, the computational load of fault coverage calculation is significantly reduced while ensuring the accuracy of screening. This achieves efficient test vector screening for large-scale integrated circuits, and finally obtains a test vector set with high fault coverage and low redundancy.

Claims

1. An adaptive intelligent generation and optimization method for chip test vectors, characterized in that, This includes: parsing the netlist file of the chip under test, extracting each signal path, assigning signal controllability weights based on the reciprocal of the shortest path length from the input to the signal path, signal observability weights based on the reciprocal of the shortest path length from the signal path to the output, and fault sensitivity weights based on the fault injection simulation propagation probability; calculating the comprehensive feature values ​​of each node through forward and backward propagation algorithms, and constructing a three-dimensional topology map. The potential energy function of the candidate test vector is defined based on the three-dimensional topological map. Redundancy components Coverage gain component and distribution entropy components Weighted composition, satisfying the following relation: In the formula, As candidate test vectors, This is the redundancy coefficient. For coverage factor, The three weighting coefficients are dynamically adjusted based on the optimization progress index, which is the ratio of the current fault coverage to the preset target coverage. Based on the potential function, the initial candidate test vectors are used to perform an evolutionary search using gradient descent, topological tunneling, and topological homotopy operators to generate a candidate test vector set. Based on the changes in the potential function values ​​of each candidate test vector in the candidate test vector set, the gradient descent, topological tunneling, or topological homotopy operator is dynamically selected to execute the next round of evolutionary search, and the population size and evolution termination condition of the candidate test vector set are adaptively adjusted according to the current fault coverage growth rate. For each newly generated candidate test vector, forward fault propagation is performed along the subgraph affected by the changes in the input bit values ​​of that candidate test vector in the three-dimensional topological graph. The number of newly covered faults is counted, and the candidate test vector that optimizes the fault coverage is selected to obtain the test vector set. The number of coverable faults that are not yet covered by the statistical test vector set but are newly activated by the candidate test vector is then calculated as a ratio of the number of newly covered faults to the total number of target faults. The normalized ratio obtained is defined as the coverage gain component. The step of calculating the comprehensive feature value of each node using forward and backward propagation algorithms includes: obtaining the signal controllability weights of all input signal paths associated with the node, and setting the maximum value among the signal controllability weights of the input signal paths as the controllable feature value of the node; obtaining the signal observability weights of all output signal paths associated with the node, and setting the maximum value among the signal observability weights of the output signal paths as the observable feature value of the node; obtaining the fault sensitivity weights of all signal paths associated with the node, and setting the arithmetic mean of the fault sensitivity weights as the sensitivity feature value of the node; and combining the controllable feature value, observable feature value, and sensitivity feature value to form the comprehensive feature value of the node. The method for calculating the redundancy component in the potential energy function includes: Calculate the Hamming distance between the candidate test vector and each existing test vector in the generated test vector set; calculate the attenuation value using the Hamming distance as the independent variable; calculate the arithmetic mean of all attenuation values ​​corresponding to the existing test vector, and set the arithmetic mean as the redundancy component of the candidate test vector. The method for calculating the distribution entropy component in the potential energy function includes: Based on the comprehensive feature values ​​of each node, the input bits of the chip under test are divided into a preset number of topological partitions; The proportion of the number of bits with a value of 1 in each topology partition to the total number of bits in that topology partition is calculated, and this proportion is set as the bit density of that topology partition. The standard Shannon information entropy is calculated based on the bit density of each topological partition, and the standard Shannon information entropy is set as the distribution entropy component of the candidate test vector; The evolutionary search steps of the topological tunneling operator include: Randomly flip a preset number of bits in the current candidate test vector to generate candidate test vectors for adjacent states; Calculate the difference between the potential energy function value of the adjacent state candidate test vector and the potential energy function value of the current candidate test vector, and set this difference as the barrier height; When the barrier height is less than 0, the adjacent state candidate test vector is directly used as the new candidate test vector; When the barrier height is greater than or equal to 0, the adjacent state candidate test vector is accepted as a new candidate test vector with a jump probability, and the jump probability is equal to the reciprocal of the sum of the constant 1 and the barrier height. The evolutionary search steps for the topological homotopy operator include: Statistically analyze the fault coverage distribution of the current test vector set and identify low fault coverage areas that have not reached the preset coverage threshold; Based on the controllable feature values ​​of each node in the three-dimensional topology map, the circuit input bit bits associated with the low fault coverage area are extracted to form a target input bit set; Keeping the bit values ​​of the non-target input bit set in the current candidate test vector unchanged, randomly flipping a preset proportion of the bits in the target input bit set to generate a new candidate test vector; The new candidate test vector is accepted when the coverage gain component of the low-fault coverage area is greater than 0.

2. The method of claim 1, wherein the method further comprises: The steps for dynamically adjusting based on optimized progress indicators include: The difference between the optimized progress index and the preset coverage threshold is used as the independent variable to input the Sigmoid mapping function to calculate the redundancy coefficient. The mean change in fault coverage in a preset batch is calculated as the growth rate of the current fault coverage. The reciprocal of the sum of the growth rate of the current fault coverage and the preset stability constant is calculated, and the reciprocal is added to the base value of the coverage coefficient to obtain the coverage coefficient. Using the optimized progress index as the independent variable, the entropy weight coefficient is calculated by taking the reciprocal of the sum of the constant 1 and the optimized progress index.

3. The adaptive intelligent generation and optimization method for chip test vectors according to claim 1, characterized in that, The step of adaptively adjusting the population size of the candidate test vector set includes: Obtain the preset target distribution entropy and the current distribution entropy of the candidate test vector set, calculate the difference between the preset target distribution entropy and the current distribution entropy, multiply the difference by a preset adjustment coefficient, update the population size of the next batch proportionally, and limit the updated population size to a preset upper and lower limit range.

4. The adaptive intelligent generation and optimization method for chip test vectors according to claim 1, characterized in that, The method for counting the number of newly covered faults includes: adopting a producer-consumer architecture, continuously running operators in the producer thread to perform evolutionary search to generate new candidate test vectors and pushing them into a shared queue; in the consumer thread, sequentially retrieving the new candidate test vectors from the shared queue and comparing them bit by bit with the most recently included benchmark test vector in the test vector set to identify the set of input bits whose values ​​have changed; based on the structure of the three-dimensional topology graph, extracting the nodes directly driven by the signals of the input bit set and all their successor nodes as the subgraph; performing logic simulation and forward fault propagation calculation only on the nodes in the subgraph, and outputting the number of newly covered faults.

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