An automatic routing method for phased negotiation of radiation-hardened standard cells

Abstract

The application belongs to the technical field of integrated circuit design automation, and relates to an automatic routing method for anti-radiation standard cells in phased negotiation, comprising the following steps: obtaining layout information, and organizing process design rule parameters in the form of a configuration file; constructing a three-dimensional grid map in multiple routing layers, and extracting routable areas in each routing layer; performing a two-stage routing task according to channel sensitivity, and performing a DRC-driven negotiated iterative repair on the routing completion result of any stage; after the iterative repair is completed, searching for optimal access points in a target metal layer for each I / O network based on a selection strategy considering DRC violations, channel spaciousness and geometric positions; and performing local shape rule optimization to obtain a GDS layout satisfying all design rules. The application effectively reduces the complexity of manual design and improves the efficiency of layout generation, is suitable for complex anti-radiation standard cell design scenarios containing a protection band reinforcement structure, and has good engineering application value and promotion prospects.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit design automation technology, and relates to an automatic routing method for phased negotiation of radiation-resistant standard cells. Background Technology

[0002] Standard cells are the fundamental building blocks for digital integrated circuits, and their layout quality directly affects chip performance, power consumption, area, and manufacturability. In chips exposed to long-term radiation, standard cells typically require hardening structures such as guard bands to enhance radiation resistance and address the threats to device reliability posed by single-event effects (SEE) and total iodizing dose (TID). These hardening structures create continuous or semi-continuous geometric barriers on active layers, via layers, and metal layers, significantly reducing the available wiring space within the cell compared to conventional standard cells. The underlying wiring channels, such as the Poly layer and M1 layer, become extremely narrow and fragmented.

[0003] The layout design of standard cells typically includes transistor placement and subsequent detailed routing. For radiation-hardened standard cells, in addition to the usual design rules constraints such as line width, line spacing, and via enclosures, the routing stage also requires additional handling of the segmentation of available space by the guard band. Traditional sequential routing methods route nets one by one in a fixed order. The first net routed often occupies critical channels and via landing points with locally optimal paths, forcing subsequent nets to detour or frequently jump across layers. In severe cases, this can lead to unsolvable resource deadlocks. With the addition of radiation-hardened structures, resource contention issues are particularly prominent, and Design Rule Check (DRC) violations are difficult to converge. Furthermore, existing routing methods rarely consider the coverage of the routing tracks of cell ports on the target metal layer, resulting in problems such as unreachable I / O ports or insufficient effective access points during chip integration, increasing the rework costs of subsequent designs.

[0004] A standard cell library often contains thousands of cells. Currently, the routing design of radiation-hardened standard cells mainly relies on manual work, which is not only inefficient and time-consuming, but also difficult to meet the urgent need for rapid iteration in engineering practice. Although some studies have proposed automatic routing methods for standard cells, they are all geared towards conventional logic cell design and do not consider the strong geometric constraints brought about by radiation-hardened structures. They also lack dedicated strategies for prioritizing underlying resources and cross-network negotiation in narrow channel environments. Summary of the Invention

[0005] To address the aforementioned technical problems in existing technologies, this invention proposes an automatic routing method for phased negotiation of radiation-resistant standard cells. Under the premise of satisfying process design rules and radiation-resistant geometric constraints, this method automatically generates internal cell routing results free from DRC issues. The specific technical solution is as follows: An automated wiring method for phased negotiation of radiation-resistant standard cells includes: Step 1: Obtain layout information containing geometry and netlist, and organize process design rule parameters in the form of a configuration file; Step 2: Construct a 3D mesh map containing same-layer trace edges and cross-layer via edges in multiple routing layers, and extract the routingable area in each routing layer; Step 3: Perform two-stage routing tasks according to channel sensitivity, and perform DRC-driven negotiation-based iterative repair on the routing completion results of either stage; Step 4: After completing the iterative repair, for each I / O network, based on the selection strategy that takes into account DRC violations, channel width and geometric location, search for the optimal access point in the target metal layer. Step 5: Perform local shape rule optimization to obtain a GDS layout that satisfies all design rules.

[0006] Furthermore, the process design rule parameters are mapped to discrete integer constraints under a fixed grid step size. The process design rule parameters include: line width, line spacing, endpoint extension, minimum area, and minimum groove.

[0007] Furthermore, in step 2, extracting the routable area in each routing layer specifically involves: for each routing layer, performing morphological expansion on the geometry by the sum of half the line width and the safety line spacing to construct an isolation area; the grids within the isolation area are marked as unusable, thereby obtaining the routable area. For a via spanning multiple layers, establish a set of discrete directions in the upper and lower layers. Mark a grid location as a via that can fall if and only if all directions in the upper and lower layer direction sets are available.

[0008] Furthermore, step 2 also includes: setting a soft constraint cost field for the deployed network, raising the grid cost within the range around its centerline, and guiding subsequent searches to avoid potential conflict areas.

[0009] Furthermore, step 3 specifically includes: Step 3.1: Complete the gate alignment and short path connection, which are most sensitive to the underlying resources, in the first stage, and immediately perform DRC iterative repair, and define the routing results of the first stage as an environmental snapshot and fix it. Step 3.2, the second stage, based on the environmental snapshot, adopts an iterative strategy based on the Prim algorithm to perform minimum cost path search on the three-dimensional mesh graph, gradually construct an approximate Steiner tree, complete the global cross-layer interconnection of the remaining network, and perform DRC iterative repair.

[0010] Further, step 3.1 specifically involves: performing geometric proximity clustering preprocessing on the network containing multiple gate pins, constructing an adjacency graph based on the Euclidean distance of the pins in the plane and the blocking rate of intermediate obstacles, extracting connected components to form several pin clusters; and performing a restricted A* path search at the bottom layer for each pin cluster to generate a local interconnect topology. Perform DRC checks on the first-stage routing completion results. If violations are detected, extract the network set related to the violation, remove its routing at the bottom layer, and re-execute A* path search in conjunction with the updated historical cost field. Once all bottom-layer connections meet the design rules, define the current routing result as an environment snapshot and fix it.

[0011] Furthermore, step 3.2 specifically involves: abstracting each network into a set of geometric objects to be connected, including the underlying interconnect islands generated in the first stage and the scattered metal pins; at the beginning of the second stage, selecting the component containing the most geometric elements from the network and adding it to the connected set, and adding the rest to the unconnected set; in each iteration, searching for a minimum cost path from the connected set to the unconnected set on the 3D mesh graph, merging the component to which the endpoint belongs into the connected set, and repeating the iteration until all components are connected, thereby constructing an approximate Steiner tree; DRC iterative checks are performed on the completed two-stage routing results. If violations are detected, a teardown and rerouting iteration is initiated. The traces and vias generated in the two-stage violation network are completely removed, returning it to the environmental snapshot state at the end of the first stage. After releasing the occupied routing resources, global pathfinding is re-executed. Each iteration only re-pathfinds the set of violation networks, and the paths of networks without conflicts remain unchanged.

[0012] Furthermore, the first and second phases share the same negotiation mechanism based on historical costs, namely: maintaining a three-dimensional historical cost map of the same size as the cabling mesh; if a DRC violation occurs in the cabling result of any phase, the historical cost of the violation node area is accumulated; at the same time, an attenuation is applied to the global historical cost, so that the cost of the area where no violation has occurred gradually decreases with iteration according to a preset attenuation factor, while the cost of the area where congestion occurs repeatedly increases cumulatively, thereby forcing the network of subsequent cabling to automatically bypass the congested area by accumulating historical costs. The comprehensive factors for the minimum cost path search include the evaluation line length, number of vias, number of turns, soft constraint cost, and historical violation cost.

[0013] Furthermore, step 4 specifically involves: after completing the iterative repair, firstly identifying the geometric centroid of each I / O network in the lower metal layer, and using this as a benchmark to delineate candidate regions in the target layer; then, based on a multi-criteria lexicographical order selection strategy, evaluating the grid points within the candidate regions. The selection strategy comprehensively considers the following criteria: prioritizing the location with the lowest historical violation cost to avoid high-risk DRC areas, prioritizing the location farther from obstacles to select the center of a wider channel, and selecting the location closer to the network's geometric center from multiple equivalent candidates. After selecting the optimal target point, a restricted 3D A* search is initiated to elevate the low-level signal to the target access point layer, and a local metal reinforcement area conforming to the design rules is automatically generated at the connection end to enhance the via enclosure margin.

[0014] Furthermore, step 5, which involves optimizing local shape rules, specifically includes: First, minimum area repair based on wavefront expansion is performed. Each layer is traversed, and all connected regions with insufficient area are identified as seeds. All seeds simultaneously initiate a breadth-first search to the outer empty grid. The following rules are followed during expansion: wavefronts do not enter the occupied area of ​​heterogeneous networks and their safe distance range. Networks that have met the area requirements stop growing and their boundaries are solidified as dynamic walls to block other wavefronts from intruding. When multiple wavefronts compete for the same empty grid, the first-come, first-served principle is followed. If they arrive at the same time, arbitration is performed based on the size of the area gap. All metal islands adaptively fill the surrounding empty space until the area threshold is met. After expansion, DRC is performed. Then, morphological groove filling and grid alignment are performed, and a closing operation is performed on each mask pattern, first dilating and then eroding, automatically filling the recessed areas smaller than the minimum groove rule value and eliminating tiny groove violations.

[0015] Beneficial effects: This invention effectively decouples the underlying local interconnection from the upper-layer global bridging through a phased incremental routing strategy. It embeds a DRC-driven iterative repair closed loop within each phase, ensures the stability of the underlying critical topology through an environmental snapshot mechanism, and realizes automatic resource negotiation and convergence among multiple networks through a historical cost negotiation mechanism. This effectively reduces the complexity of manual design and improves the efficiency of layout generation. It is suitable for complex radiation-resistant standard cell design scenarios with protective strip reinforcement structures and has good engineering application value and promotion prospects. Attached Figure Description

[0016] Figure 1 This is a flowchart of the main automatic wiring method for phased negotiation of radiation-resistant standard units in this embodiment; Figure 2 This is a schematic diagram of the constraints of the wiring layer conductors and isolation areas in this embodiment; Figure 3This is a schematic diagram of pin grouping based on geometric proximity clustering in this embodiment; Figure 4 This is a schematic diagram of minimum area repair based on wavefront dilation in this embodiment; Figure 5 This is a schematic diagram of groove filling and grid alignment based on morphological expansion corrosion in this embodiment. Detailed Implementation

[0017] To make the objectives, technical solutions, and technical effects of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0018] like Figure 1 As shown, this embodiment of the invention provides an automatic routing method for phased negotiation of radiation-resistant standard cells, including the following steps: Step 1: Rule Parameterization and Data Processing: The router reads the geometry and netlist from the layout results, converting information such as active layers, isolation structures, guard strips, and metal layers and vias into a unified data representation. Process design rule parameters such as linewidth, line spacing, endpoint extension, minimum area, and minimum notch are organized in a configuration file. These rule parameters are mapped to discrete integer constraints under a fixed mesh step size, decoupling the routing algorithm from the specific process. When the target process changes, only the parameter values ​​in the configuration file need to be updated; the algorithm implementation does not need to be modified.

[0019] Step 2, Extraction of wireable regions and construction of 3D mesh: such as Figure 2 As shown, for each routing layer, the geometry in the layout result, including active layers, power network metal layers, etc., is summarized into an original blocking set, with the geometry set at half the line width. W l / 2 and safety line spacing S l Morphological expansion is used to construct isolation zones. Grids within these zones are marked as unusable, ensuring that subsequent routing centerlines naturally meet basic spacing and linewidth requirements as long as they fall on usable grids. For vias spanning multiple layers, a discrete set of directions for each layer is established. A grid location is marked as a potential location for a via if and only if all directions within the set of directions for both layers are usable.

[0020] A 3D mesh is constructed on multiple routing layers. Nodes in the same layer are connected by horizontal and vertical edges, which means that the edges in the same layer describe the horizontal and vertical trace extensions. Nodes across layers are connected by via edges, which means that the edges across layers describe via jumps. The effectiveness of cross-layer vias is strictly limited to the intersection of the availability of the meshes above and below.

[0021] At the same time, a soft constraint cost field is set for the deployed network to increase the grid cost within a certain range around its centerline, guiding subsequent searches to avoid potential conflict areas.

[0022] Step 3: The cabling task is divided into two stages based on channel sensitivity, as follows: Step 3.1, First-stage local routing and DRC iterative repair: The first stage prioritizes completing local interconnects that are more sensitive to critical resources at the lower layer, such as the Poly layer. This aims to resolve gate alignment and short-path connections, which are most sensitive to lower-level resources. If such connections are not handled properly, they are easily blocked by global routing.

[0023] like Figure 3 As shown, the first stage preprocesses the network containing multiple gate pins using geometric proximity clustering. An adjacency graph is constructed based on the Euclidean distance between the pins in the plane and the blocking rate of intermediate obstacles, and connected components are extracted to form several pin clusters. For each pin cluster, a restricted A* path search is performed at the Poly layer to generate a local interconnect topology.

[0024] Immediately after the first-stage routing is completed, a DRC check is performed on the routing results. If a violation is detected, the set of networks associated with the violation is extracted, their routing at the Poly layer is removed, and the A* path search is re-executed based on the updated historical cost field. Once all lower-level connections meet the design rules, the current routing result is defined as an environment snapshot and fixed. This environment snapshot serves as a reference anchor point for stabilizing the lower-level topology in subsequent second-stage iterations. Even if higher-level routing is removed and re-routed during congestion relief, its internal paths remain rigidly locked, preventing higher-level routing fluctuations from damaging lower-level device connections.

[0025] Step 3.2, Two-Stage Global Routing and DRC Iterative Repair: Based on the baseline determined by the environmental snapshot, the second stage completes the cross-layer interconnection of the remaining network components. At this point, each network is abstracted as a set of geometric objects to be connected, including the Poly islands generated in stage one and the scattered metal pins.

[0026] Specifically, the second phase employs an iterative strategy based on the Prim algorithm, searching for the minimum cost path on the 3D mesh graph to gradually construct an approximate Steiner tree, completing the global cross-layer interconnection of the remaining network. Initially, the component containing the most geometric elements is selected and added to the connected set, while the rest are added to the disconnected set. In each iteration, a minimum cost path from the connected set to the disconnected set is searched on the 3D mesh graph, and the component to which the endpoint belongs is merged into the connected set. This iteration is repeated until all components are connected.

[0027] After the second-stage routing is completed, the system also performs DRC checks on the routing results. If a violation is detected, a teardown and rerouting iteration is initiated within the second stage. This completely removes the traces and vias generated in the second stage for the violating network, returning it to the environment snapshot state at the end of the first stage. After releasing the occupied routing resources, global pathfinding is re-executed. Each iteration only re-pathfinds the set of violating networks; networks without conflicts retain their paths. Once violation cleanup is complete or the preset maximum number of iterations is reached, the process enters the post-processing stage.

[0028] The teardown and redeployment processes in both phases share the same historical cost-based negotiation mechanism. If a DRC violation occurs in any phase of the cabling process, a DRC-driven, negotiation-based iterative repair is executed. Path search comprehensively evaluates line length, via quantity, number of turns, soft constraint cost, and historical violation cost, forcing the network to automatically bypass congestion bottlenecks during resource contention and achieve global convergence. Specifically, the system maintains a 3D historical cost map of the same size as the cabling mesh. When a DRC violation is detected near a node, the historical cost of that node is accumulated. Simultaneously, a decay effect is applied to the global historical cost, causing the cost in areas without violations to gradually decrease with iteration according to a preset decay factor, while the cost in areas with repeated congestion accumulates and increases. In this way, it is not necessary to rigidly prohibit certain paths; instead, the high accumulated historical cost forces subsequent cabling networks to automatically bypass congested areas, thereby achieving negotiation and convergence during resource contention. In the early stages of iteration, historical costs have not yet accumulated, and the search tends to choose geometrically shorter paths. As iteration progresses, the cost of violation areas accumulates, and the search gradually moves away from high-violation locations towards more relaxed channels.

[0029] Step 4, Channel-Centered I / O Access Point Enhancement: Search for the optimal physical access location for each I / O network using the highest layer of metal in the cabling layer.

[0030] First, identify the geometric centroid of each I / O network in the lower metal layer, and use this as a reference to delineate candidate regions in the target layer.

[0031] Subsequently, based on a multi-criteria lexicographical order selection strategy, grid points within the candidate region are evaluated. The selection strategy comprehensively considers the following criteria: prioritizing the location with the lowest historical violation cost to avoid high-risk DRC areas; Based on this, priority is given to selecting locations farther from obstacles to choose the center of a wider channel; finally, among multiple equivalent candidates, the location closer to the network geometric center is selected to ensure access stability. After selecting the optimal target point, the router initiates a restricted 3D A* search to elevate the low-level signal to the target access point layer, and automatically generates local metal reinforcement areas conforming to design rules at the connection end to enhance via enclosure margin and improve the robustness of subsequent rule checks.

[0032] Step 5: Post-routing rule optimization: After completing iterative repair and I / O access, repair the local shape-type rules.

[0033] like Figure 4 As shown, the process first performs minimum area repair based on wavefront dilation. It traverses each layer to identify all connected regions with insufficient area as seeds. All seeds simultaneously initiate a breadth-first search towards the outer empty grid. The following rules apply during dilation: the wavefront, i.e., the original shape being dilated, must not enter the occupied area or safe distance range of other heterogeneous networks; networks that have met the area requirements stop growing and their boundaries are solidified as dynamic walls to block other wavefronts from intruding; when multiple wavefronts compete for the same empty grid, a first-come, first-served principle applies, and if they arrive simultaneously, arbitration is based on the size of the area gap. All metal islands adaptively fill the surrounding empty space until the area threshold is met. After dilation, DRC (Device Restriction Control) is performed to confirm that no new violations are introduced.

[0034] like Figure 5 As shown, morphological-based groove filling and grid alignment are then performed. Closure operations are applied to each mask layer, involving dilation followed by erosion, automatically filling recessed areas smaller than the minimum groove rule value and eliminating minor groove violations. Finally, a detailed routing result is obtained, resulting in a GDS layout file that satisfies all design rules.

[0035] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention in any way. Although the implementation process of the present invention has been described in detail above, those skilled in the art can still modify the technical solutions described in the foregoing examples or make equivalent substitutions for some of the technical features. All modifications and equivalent substitutions made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An automatic wiring method for phased negotiation of radiation-resistant standard cells, characterized in that, include: Step 1: Obtain layout information containing geometry and netlist, and organize process design rule parameters in the form of a configuration file; Step 2: Construct a 3D mesh map containing same-layer trace edges and cross-layer via edges in multiple routing layers, and extract the routingable area in each routing layer; Step 3: Perform two-stage routing tasks according to channel sensitivity, and perform DRC-driven negotiation-based iterative repair on the routing completion results of either stage; specifically including: Step 3.1: Complete the gate alignment and short path connection, which are most sensitive to the underlying resources, in the first stage, and immediately perform DRC iterative repair, and define the routing results of the first stage as an environmental snapshot and fix it. Step 3.2, the second stage, based on the environmental snapshot, adopts an iterative strategy based on the Prim algorithm to perform minimum cost path search on the three-dimensional mesh graph, gradually construct an approximate Steiner tree, complete the global cross-layer interconnection of the remaining network, and perform DRC iterative repair. Step 4: After completing the iterative repair, for each I / O network, based on the selection strategy that takes into account DRC violations, channel width and geometric location, search for the optimal access point in the target metal layer. Step 5: Perform local shape rule optimization to obtain a GDS layout that satisfies all design rules.

2. The automatic routing method with phased negotiation as described in claim 1, characterized in that, The process design rule parameters are mapped to discrete integer constraints under a fixed grid step size. The process design rule parameters include: line width, line spacing, endpoint extension, minimum area, and minimum groove.

3. The automatic routing method for phased negotiation as described in claim 1, characterized in that, In step 2, extracting the routable area in each routing layer specifically involves: for each routing layer, performing morphological expansion on the geometry by half the line width and the safety line spacing to construct an isolation area. The grids within the isolation area are marked as unusable, thus obtaining the routable area. For a via spanning multiple layers, establish a set of discrete directions in the upper and lower layers. Mark a grid location as a via that can fall if and only if all directions in the upper and lower layer direction sets are available.

4. The automatic routing method with phased negotiation as described in claim 1, characterized in that, Step 2 further includes: setting a soft constraint cost field for the deployed network, raising the grid cost within the range around its centerline, and guiding subsequent searches to avoid potential conflict areas.

5. The automatic routing method for phased negotiation as described in claim 1, characterized in that, Step 3.1 specifically involves: performing geometric proximity clustering preprocessing on a network containing multiple gate pins; constructing an adjacency graph based on the Euclidean distance of the pins in the plane and the blocking rate of intermediate obstacles; extracting connected components to form several pin clusters; and performing a restricted A* path search at the bottom layer for each pin cluster to generate a local interconnect topology. Perform DRC checks on the first-stage routing completion results. If violations are detected, extract the network set related to the violation, remove its routing at the bottom layer, and re-execute A* path search in conjunction with the updated historical cost field. Once all bottom-layer connections meet the design rules, define the current routing result as an environment snapshot and fix it.

6. The automatic routing method for phased negotiation as described in claim 1, characterized in that, Step 3.2 specifically involves: abstracting each network into a set of geometric objects to be connected, including the underlying interconnect islands and scattered metal pins generated in the first stage; at the beginning of the second stage, selecting the component with the most geometric elements from the network and adding it to the connected set, and adding the rest to the unconnected set; in each iteration, searching for a minimum cost path from the connected set to the unconnected set on the 3D mesh graph, merging the component to which the endpoint belongs into the connected set, and repeating the iteration until all components are connected, thereby constructing an approximate Steiner tree; DRC iterative checks are performed on the completed two-stage routing results. If violations are detected, a teardown and rerouting iteration is initiated. The traces and vias generated in the two-stage violation network are completely removed, returning it to the environmental snapshot state at the end of the first stage. After releasing the occupied routing resources, global pathfinding is re-executed. Each iteration only re-pathfinds the set of violation networks, and the paths of networks without conflicts remain unchanged.

7. The automatic routing method for phased negotiation as described in claim 1, characterized in that, The first and second phases share the same negotiation mechanism based on historical costs, namely: maintaining a three-dimensional historical cost map of the same size as the cabling mesh; if a DRC violation occurs in the cabling result of any phase, the historical cost of the violation node area is accumulated; at the same time, an attenuation is applied to the global historical cost, so that the cost of the area where no violation has occurred gradually decreases with iteration according to a preset attenuation factor, while the cost of the area where congestion occurs repeatedly increases cumulatively, and the network of subsequent cabling is forced to automatically bypass the congested area by accumulating historical costs. The comprehensive factors for the minimum cost path search include the evaluation line length, number of vias, number of turns, soft constraint cost, and historical violation cost.

8. The automatic routing method for phased negotiation as described in claim 1, characterized in that, Step 4 specifically involves: after completing the iterative repair, firstly identifying the geometric centroid of each I / O network in the lower metal layer, and using this as a benchmark to delineate candidate regions in the target layer; then, based on a multi-criteria lexicographical order selection strategy, evaluating the grid points within the candidate regions. The selection strategy comprehensively considers the following criteria: prioritizing the location with the lowest historical violation cost to avoid high-risk DRC areas, prioritizing the location farther from obstacles to select the center of a wider channel, and selecting the location closer to the network's geometric center from multiple equivalent candidates. After selecting the optimal target point, a restricted 3D A* search is initiated to elevate the low-level signal to the target access point layer, and a local metal reinforcement area conforming to the design rules is automatically generated at the connection end to enhance the via enclosure margin.

9. The automatic routing method for phased negotiation as described in claim 1, characterized in that, Step 5, which involves performing local shape rule optimization, specifically includes: First, minimum area repair based on wavefront expansion is performed. Each layer is traversed, and all connected regions with insufficient area are identified as seeds. All seeds simultaneously initiate a breadth-first search to the outer empty grid. The following rules are followed during expansion: wavefronts do not enter the occupied area of ​​heterogeneous networks and their safe distance range. Networks that have met the area requirements stop growing and their boundaries are solidified as dynamic walls to block other wavefronts from intruding. When multiple wavefronts compete for the same empty grid, the first-come, first-served principle is followed. If they arrive at the same time, arbitration is performed based on the size of the area gap. All metal islands adaptively fill the surrounding empty space until the area threshold is met. After expansion, DRC is performed. Then, morphological groove filling and grid alignment are performed, and a closing operation is performed on each mask pattern, first dilating and then eroding, automatically filling the recessed areas smaller than the minimum groove rule value and eliminating tiny groove violations.

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