Device link visualization rendering method, apparatus, and computer readable medium

CN122265498BActive Publication Date: 2026-08-28BEIJING TELIXIN ELECTRONICS TECH
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Patent Information

Application Number
CN202610732309.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-05-26
Publication Date
2026-08-28
Estimated Expiration
2046-05-26

AI Technical Summary

Technical Problem

SVG技术和Canvas技术依赖CPU进行渲染,当网络设备数量较多时,会导致渲染效率急剧下降,进而出现卡顿、刷新延迟等问题

Benefits of technology

[0010]The various embodiments of this disclosure have the following beneficial effects: Through the device link visualization rendering method of some embodiments of this disclosure, efficient link graph rendering is achieved in large-scale complex device link visualization rendering scenarios, thereby ensuring the smoothness of the visualization effect and reducing refresh latency. Specifically, this disclosure first obtains a set of device link information, wherein the device link information in the set includes: device attribute information and device link description information. The device attribute information represents the device attributes of the network device, and the device link description information represents the device link relationship corresponding to the network device. Next, the set of device link information is preprocessed to obtain a set of target device link information groups. Information preprocessing ensures the integrity and format uniformity of the obtained device link information. Then, for each target device link information group in the set of target device link information groups, local topology generation is performed based on the target device link information group to generate a local device link graph. In practice, conventional topology generation algorithms often iterate continuously to obtain a device link diagram. However, in large-scale and complex device link visualization rendering scenarios, as the number of network devices and their corresponding link relationships increase, conventional topology generation algorithms often experience excessive iterations. Therefore, this disclosure combines the characteristics of the topology structure and performs local topology generation in parallel to improve generation efficiency. Furthermore, global topology optimization is performed based on the obtained set of local device link diagrams to obtain a global device link diagram. In practice, while local topology generation can improve generation efficiency, it may get stuck in a local topology optimum, leading to local congestion in the final device link diagram. Therefore, this disclosure achieves global optimization through global topology optimization. In addition, the global device link diagram is rendered in layers to obtain a set of rendering layers. This set of rendering layers includes a basic rendering layer and an overlay rendering layer. The basic rendering layer includes a device node layer and a device link layer, and the overlay rendering layer includes a status identifier layer and an interactive control layer. In practice, the number of network devices, their corresponding link relationships, device status, link status, and interactive components often change and respond at varying frequencies. Layered rendering is used to improve rendering efficiency. Finally, the above rendering layers are blended and overlaid to obtain the rendered device link diagram. This blending and overlay method avoids redundant rendering. In summary, this approach achieves efficient link diagram rendering in large-scale, complex device link visualization scenarios, ensuring smooth visualization and reducing refresh latency.

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Abstract

Embodiments of the present disclosure disclose a device link visualization rendering method, device and computer readable medium. A specific embodiment of the method comprises: obtaining a device link information set; performing information preprocessing on the device link information set to obtain a target device link information group set; for each target device link information group in the target device link information group set, performing local topology generation according to the target device link information group to generate a local device link graph; performing global topology optimization according to the obtained local device link graph set to obtain a global device link graph; performing hierarchical rendering on the global device link graph to obtain a rendering layer set; and performing mixed layer superposition on the rendering layer set to obtain a rendered device link graph. The embodiment realizes efficient link graph rendering in a large-scale complex device link visualization rendering scenario.
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Description

Technical Field

[0001] Embodiments of this disclosure relate to the field of computer technology, particularly to the fields of data visualization and computer graphics, and specifically to device link visualization rendering methods, apparatus, and computer-readable media. Background Technology

[0002] In various application areas such as industrial production scheduling, communication network operation and maintenance, data center management, and smart grid control, the number of devices is growing exponentially with the large-scale deployment and network interconnection of equipment. This has led to increasingly complex link relationships between devices (e.g., physical links, logical links). To ensure stable system operation, visualization technology is typically used to transform these complex and abstract device link relationships into an intuitive graphical interface. Currently, technologies such as SVG (Scalable Vector Graphics) and Canvas are mainly used for this purpose.

[0003] However, for large-scale, complex device link visualization rendering scenarios, the aforementioned existing technologies often have the following technical problems: SVG and Canvas technologies rely on the CPU for rendering. When there are many network devices, the rendering efficiency will drop sharply, leading to problems such as stuttering and refresh delays. Summary of the Invention

[0004] The summary portion of this disclosure is intended to provide a brief overview of the concepts, which will be described in detail in the detailed description portion. This summary portion is not intended to identify key or essential features of the claimed technical solutions, nor is it intended to limit the scope of the claimed technical solutions.

[0005] Some embodiments of this disclosure provide a device link visualization rendering method, apparatus, and computer-readable medium to address the technical problems mentioned in the background section above.

[0006] In a first aspect, some embodiments of this disclosure provide a device link visualization rendering method, the method comprising: acquiring a device link information set, wherein the device link information in the device link information set includes: device attribute information and device link description information, wherein the device attribute information represents the device attributes of a network device, and the device link description information represents the device link relationship corresponding to the network device; performing information preprocessing on the device link information set to obtain a target device link information group set; for each target device link information group in the target device link information group set, performing local topology generation based on the target device link information group to generate a local device link diagram; performing global topology optimization based on the obtained local device link diagram set to obtain a global device link diagram; performing layered rendering on the global device link diagram to obtain a rendering layer set, wherein the rendering layer set includes: a basic rendering layer and an overlay rendering layer, wherein the basic rendering layer includes: a device node layer and a device link layer, and the overlay rendering layer includes: a status identifier layer and an interactive control layer; and performing mixed layer overlay on the rendering layer set to obtain a rendered device link diagram.

[0007] Secondly, some embodiments of this disclosure provide a device link visualization rendering apparatus, the apparatus comprising: an acquisition unit configured to acquire a set of device link information, wherein the device link information in the set includes: device attribute information and device link description information, the device attribute information representing the device attributes of a network device, and the device link description information representing the device link relationship corresponding to the network device; an information preprocessing unit configured to perform information preprocessing on the set of device link information to obtain a set of target device link information groups; and a local topology generation unit configured to, for each target device link information group in the set of target device link information groups, generate a local topology based on the above... The target device link information group is used to generate a local topology to produce a local device link diagram. A global topology optimization unit is configured to perform global topology optimization based on the obtained local device link diagram set to obtain a global device link diagram. A layered rendering unit is configured to perform layered rendering on the global device link diagram to obtain a set of rendering layers, wherein the set of rendering layers includes: a basic rendering layer and an overlay rendering layer. The basic rendering layer includes: a device node layer and a device link layer. The overlay rendering layer includes: a status identifier layer and an interactive control layer. A mixed layer overlay unit is configured to perform mixed layer overlay on the set of rendering layers to obtain a rendered device link diagram.

[0008] Thirdly, some embodiments of this disclosure provide an electronic device, including: one or more processors; and a storage device having one or more programs stored thereon, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the method described in any implementation of the first aspect above.

[0009] Fourthly, some embodiments of this disclosure provide a computer-readable medium having a computer program stored thereon, wherein the program, when executed by a processor, implements the method described in any of the implementations of the first aspect above.

[0010] The various embodiments of this disclosure have the following beneficial effects: Through the device link visualization rendering method of some embodiments of this disclosure, efficient link graph rendering is achieved in large-scale complex device link visualization rendering scenarios, thereby ensuring the smoothness of the visualization effect and reducing refresh latency. Specifically, this disclosure first obtains a set of device link information, wherein the device link information in the set includes: device attribute information and device link description information. The device attribute information represents the device attributes of the network device, and the device link description information represents the device link relationship corresponding to the network device. Next, the set of device link information is preprocessed to obtain a set of target device link information groups. Information preprocessing ensures the integrity and format uniformity of the obtained device link information. Then, for each target device link information group in the set of target device link information groups, local topology generation is performed based on the target device link information group to generate a local device link graph. In practice, conventional topology generation algorithms often iterate continuously to obtain a device link diagram. However, in large-scale and complex device link visualization rendering scenarios, as the number of network devices and their corresponding link relationships increase, conventional topology generation algorithms often experience excessive iterations. Therefore, this disclosure combines the characteristics of the topology structure and performs local topology generation in parallel to improve generation efficiency. Furthermore, global topology optimization is performed based on the obtained set of local device link diagrams to obtain a global device link diagram. In practice, while local topology generation can improve generation efficiency, it may get stuck in a local topology optimum, leading to local congestion in the final device link diagram. Therefore, this disclosure achieves global optimization through global topology optimization. In addition, the global device link diagram is rendered in layers to obtain a set of rendering layers. This set of rendering layers includes a basic rendering layer and an overlay rendering layer. The basic rendering layer includes a device node layer and a device link layer, and the overlay rendering layer includes a status identifier layer and an interactive control layer. In practice, the number of network devices, their corresponding link relationships, device status, link status, and interactive components often change and respond at varying frequencies. Layered rendering is used to improve rendering efficiency. Finally, the above rendering layers are blended and overlaid to obtain the rendered device link diagram. This blending and overlay method avoids redundant rendering. In summary, this approach achieves efficient link diagram rendering in large-scale, complex device link visualization scenarios, ensuring smooth visualization and reducing refresh latency. Attached Figure Description

[0011] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and elements are not necessarily drawn to scale.

[0012] Figure 1 These are flowcharts of some embodiments of the device link visualization rendering method according to this disclosure; Figure 2 This is a schematic diagram of a local network topology; Figure 3 This is a diagram illustrating the judgment logic; Figure 4 This is a schematic diagram of the model structure of the first link graph generation model; Figure 5 These are schematic diagrams illustrating the structure of some embodiments of the device link visualization rendering apparatus according to this disclosure; Figure 6 This is a schematic diagram of the structure of an electronic device suitable for implementing some embodiments of the present disclosure. Detailed Implementation

[0013] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. While some embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.

[0014] It should also be noted that, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings. Unless otherwise specified, the embodiments and features described in this disclosure can be combined with each other.

[0015] It should be noted that the concepts of "first" and "second" mentioned in this disclosure are used only to distinguish different devices, modules or units, and are not used to limit the order of functions performed by these devices, modules or units or their interdependencies.

[0016] It should be noted that the terms "a" and "a plurality of" used in this disclosure are illustrative rather than restrictive, and those skilled in the art should understand that, unless otherwise expressly indicated in the context, they should be understood as "one or more".

[0017] The names of messages or information exchanged between multiple devices in the embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of such messages or information.

[0018] This disclosure will now be described in detail with reference to the accompanying drawings and embodiments.

[0019] refer to Figure 1 The diagram illustrates a flow 100 of some embodiments of a device link visualization rendering method according to the present disclosure. This device link visualization rendering method includes the following steps: Step 101: Obtain the set of device link information.

[0020] In some embodiments, the execution subject of the device link visualization rendering method (e.g., a computing device) can obtain a set of device link information through a wired or wireless connection.

[0021] The device link information represents the network devices to be visualized and their corresponding device link relationships. The device link information set includes: device attribute information and device link description information. Device attribute information represents the device attributes of the network devices. Device link description information represents the device link relationships corresponding to the network devices.

[0022] Specifically, device attribute information may include, but is not limited to: device identifier, device name, device type, device status, port configuration information, and communication address. Port configuration information represents the communication port parameters of the network device. Specifically, port configuration information may include, but is not limited to: port number and port status. Device type represents the type of network device. For example, device type may include, but is not limited to: switch type, server type. Switch type can be further subdivided into: core switch type and non-core switch type. Device status represents the operating status of the network device corresponding to the device attribute information. For example, device status may include, but is not limited to: normal operation status, alarm status, fault status, and offline status. Port number represents the communication port of the network device. Port status represents the status of the communication port corresponding to the port number. Communication address represents the network address of the network device. For example, the communication address can use an IP (Internet Protocol) address.

[0023] Specifically, device link description information may include, but is not limited to: link identifier, source device identifier, destination device identifier, link bandwidth, link delay, and link type. The source device identifier represents the device identifier of the network device that is the sender, connected through the device link corresponding to the device link description information. The destination device identifier represents the device identifier of the network device that is the receiver, connected through the device link corresponding to the device link description information. The link bandwidth represents the maximum data transmission volume of the device link corresponding to the device link description information per unit time. The link delay represents the data transmission delay of the device link corresponding to the device link description information. The link type represents the type of device link corresponding to the device link description information. For example, the link type may include, but is not limited to: physical link type and logical link type.

[0024] In practice, device link information sets can be obtained in real time through data sources such as device management systems and network monitoring systems. Specifically, device identifier, device type, device status, port configuration information, communication address, link identifier, source device identifier, destination device identifier, and link type are mandatory parameters. Other parameters included in the device link information can be collected and configured according to actual needs.

[0025] It should be noted that the aforementioned wireless connection methods may include, but are not limited to, 3G / 4G / 5G connections, WiFi connections, Bluetooth connections, WiMAX connections, Zigbee connections, UWB (Ultra Wide Band) connections, and other currently known or future wireless connection methods.

[0026] It should be noted that the aforementioned computing devices can be either hardware or software. When the computing device is hardware, it can be implemented as a distributed cluster consisting of multiple servers or terminal devices, or as a single server or a single terminal device. When the computing device is software, it can be installed on the hardware devices listed above. It can be implemented as, for example, multiple software programs or software modules used to provide distributed services, or as a single software program or software module. No specific limitations are made here.

[0027] Step 102: Perform information preprocessing on the device link information set to obtain the target device link information group set.

[0028] In some embodiments, the aforementioned execution entity may perform information preprocessing on the device link information set to obtain a target device link information group set.

[0029] The target device link information is preprocessed data. Specifically, it includes device attribute information and device link description information. The target device link information group represents the target network device and multiple network devices centered around it in the topology. The target network device is a network device with a preset device type. For example, the preset device type could be a core switch.

[0030] In practice, firstly, each device link information in the device link information set is validated, including but not limited to value validity checks. Then, device link information that fails the validation is removed. Next, based on the device types included in the device link information sets that have passed validation, the target network device set is determined. Further, using the target network device as the center, based on the link delay between non-target network devices and the target network device, it is determined whether non-target network devices belong to the local network topology corresponding to the target network device, thus obtaining the target device link information group.

[0031] As an example, see Figure 2 The illustrated local network topology diagram includes: network devices A1, A2, A3, A4, A5, A6, A7, A8, A9, A10, A11, and A12. Network devices A5 and A11 are both core switch types. Therefore, based on the link delays between other network devices, network device A5, and network device A11, it can be determined whether a non-target network device belongs to the local network topology corresponding to the target network device. Figure 2 As shown, network devices A1, A2, A3, A4, A6, A7, and A8 belong to the local network topology corresponding to network device A5. Network devices A9, A10, and A12 belong to the local network topology corresponding to network device A11. Therefore, the link information of the eight target devices corresponding to network devices A1, A2, A3, A4, A5, A6, A7, and A8 constitutes one group of target device link information. The link information of the four target devices corresponding to network devices A9, A10, A11, and A12 constitutes another group of target device link information.

[0032] In some optional implementations of certain embodiments, the above-mentioned information preprocessing of the device link information set to obtain the target device link information group set includes: Step S1: For each device link information in the above device link information set, perform the following preprocessing steps: Step S11: Remove outliers from the device attribute information and device link description information included in the above device link information to obtain the first device link information.

[0033] The first device link information is the device link information after outlier removal. Specifically, when there are parameters in the device link information that require outlier removal, the first device link information is obtained after outlier removal. When there are no parameters in the device link information that require outlier removal, the device link information is directly used as the first device link information.

[0034] In practice, firstly, for numerical parameters in the device attribute information and device link description information included in the device link information, a set numerical range can be used for matching to determine if the parameter is abnormal. If a parameter is abnormal, it is removed. For example, the numerical range for link bandwidth can be 0~100 Gbps. Secondly, for non-numerical parameters in the device attribute information and device link description information included in the device link information, regular expression matching can be used to determine if the parameter is abnormal. If a parameter is abnormal, it is removed. For example, the following regular expression can be used to determine if a communication address is abnormal: / ^((25[0-5]|2[0-4]\d|

[01] ?\d\d?)\.){3}(25[0-5]|2[0-4]\d|

[01] ?\d\d?)$ / ).

[0035] Step S12: Fill in the missing values ​​in the first device link information to obtain the second device link information.

[0036] The second device link information is the first device link information after missing value completion. Specifically, when the first device link information contains parameters requiring missing value completion, the second device link information is obtained after completion. When the first device link information does not contain any parameters requiring missing value completion, the first device link information is directly used as the second device link information.

[0037] In practice, default value completion can be used to complete parameters in the first device link information that require missing values. For example, when the device status is missing, the default completion is offline; when the link bandwidth is missing, the default completion is 0 Gbps; and when the link latency is missing, the default completion is 100 ms.

[0038] Alternatively, missing values ​​in the first device link information can be filled in using either mean-based or correlation-based methods. For example, when using mean-based filling, the missing values ​​in the first device link information can be filled in using the mean of parameters of the same type. Similarly, when using correlation-based filling, the fill value can be calculated based on field correlations to fill in the missing values ​​in the first device link information. For instance, if the device is offline but the link bandwidth is missing, the fill value for the link bandwidth can be calculated as 0 Gbps based on the device status.

[0039] Step S13: Generate the node duplicate check string and link duplicate check string corresponding to the link information of the second device mentioned above.

[0040] The node duplication check string is a check string generated based on the device attribute information included in the second device link information, used to verify the uniqueness of the network device corresponding to the second device link information. The link duplication check string is a check string generated based on the device link description information included in the second device link information, used to verify the device link relationship corresponding to the second device link information.

[0041] In practice, for example, hashing can be used to hash the device attribute information and the device link description information included in the second device link information, respectively, to obtain the node duplicate check string and the link duplicate check string. Alternatively, string concatenation can be used to concatenate the device attribute information and the device link description information included in the second device link information, respectively, to obtain the node duplicate check string and the link duplicate check string.

[0042] Step S2: Based on the node duplicate check string and link duplicate check string corresponding to the second device link information, perform information deduplication on the obtained second device link information set to obtain the third device link information set.

[0043] The third device link information is the second device link information after information deduplication.

[0044] In practice, since each second device link information corresponds to a node duplicate check string and a link duplicate check string, the duplicate second device link information in the second device link information set can be determined by string matching. This duplicate second device link information can be filtered out, and the non-duplicate second device link information can be used as the third device link information to obtain the third device link information set.

[0045] Step S3: Convert the format of each third device link information in the above third device link information set to obtain the fourth device link information set.

[0046] The fourth device link information is the third device link information in a preset information format. The preset information format can be JSON (JavaScript Object Notation) or XML (Extensible Markup Language). In particular, the preset information format is JSON by default to ensure compatibility with subsequent WebGL rendering engines.

[0047] Step S4: Filter each fourth device link information in the above fourth device link information set using non-core attributes to obtain the target device link information set.

[0048] In practice, non-core attributes (parameters) can be determined through customization to filter the link information of the fourth device and obtain the link information of the target device.

[0049] Step S5: Associate and aggregate the target device link information in the above target device link information set to obtain a target device link information group set.

[0050] In practice, firstly, the target network device set can be determined based on the device types included in the device link information of multiple device link information sets that have passed information verification. Further, centering on the target network device, based on the link latency and link type between non-target network devices and the target network device, it is determined whether non-target network devices belong to the local network topology corresponding to the target network device, thus obtaining the target device link information group. Specifically, when the link type is a physical link and is directly connected to the target network device, the corresponding network device is included in the local network topology corresponding to the target network device; when the corresponding link latency is lower than a latency threshold, the corresponding network device is included in the local network topology corresponding to the target network device. In particular, when there are device link relationships between a network device and multiple target network devices, the network device is preferentially included in the local network topology corresponding to the target network device with low link latency.

[0051] Step 103: For each target device link information group in the target device link information group set, perform local topology generation based on the target device link information group to generate a local device link diagram.

[0052] In some embodiments, for each target device link information group in the target device link information group set, the aforementioned execution entity can perform local topology generation based on the target device link information group to generate a local device link diagram.

[0053] The local device link diagram is the network topology corresponding to the target device link information group after layout optimization. Because it needs to be visualized, layout optimization is necessary to clearly display the topology.

[0054] In practice, the aforementioned local device link diagram can be generated based on the target device link information group using a force-oriented algorithm.

[0055] In some optional implementations of certain embodiments, the execution entity performs local topology generation for each target device link information group in the target device link information group set, to generate a local device link graph, including: Step S1: For each target device link information in the above target device link information group, perform the following feature extraction steps: Step S11: Based on the device attribute information included in the target device link information, generate topology nodes and the gravity weights corresponding to the topology nodes.

[0056] In this context, topology nodes are graph nodes in the local device link graph. Gravity weights represent the distance constraint of a topology node from the graph center. Specifically, a larger gravity weight indicates that the corresponding topology node is closer to the graph center, while a smaller gravity weight indicates that the corresponding topology node is farther from the graph center.

[0057] In practice, gravity weight mapping can be performed based on the device type included in the device attribute information to obtain the gravity weight corresponding to the topology node. Specifically, the device type and its corresponding gravity weight can be preset. For example, a core switch type might have a gravity weight of 1.8, a non-core switch type (e.g., access switch) might have a gravity weight of 1.5, a server type might have a gravity weight of 1.2, and a terminal device type might have a gravity weight of 1.0. In particular, the device type and its corresponding gravity weight value can be customized according to actual needs.

[0058] Step S12: Generate link constraint information based on the device link description information included in the target device link information.

[0059] The link constraint information mentioned above includes: core link type and link distance constraint parameters. The core link type indicates whether the device link corresponding to the target device's link information is a core link. The link constraint information represents the pixel distance constraint of the device link in the local device link diagram. By setting link constraint relationships, the visualization results corresponding to physical link types and low-latency, high-bandwidth device links are made clearer, avoiding topology overlap and cross-entanglement issues.

[0060] As an example, the core link type can be represented by "0", "1", or "2". When the core link type is "0", it indicates that the device link corresponding to the target device link information is a core link. When the core link type is "1", it indicates that the device link corresponding to the target device link information is a medium-sized link that is not a core link. When the core link type is "2", it indicates that the device link corresponding to the target device link information is a normal link that is not a core link. See also Figure 3 The diagram illustrates the judgment logic. When the link type is a physical link, or the link bandwidth is ≥ 10 Gbps and the link latency is ≤ 1 ms, the core link type included in the link constraint information is set to "0". When the link type is not a physical link, and 5 Gbps ≤ link bandwidth ≤ 10 Gbps, and 1 ms ≤ link latency ≤ 5 ms, the core link type included in the link constraint information is set to "1". Otherwise, the core link type included in the link constraint information is set to "2". Furthermore, the corresponding pixel distance constraints differ depending on the link type. For example, the pixel distance for a core link can be 50 px, the pixel distance for a normal link in a non-core link can be 120 px, and the pixel distance for a medium link in a non-core link can be 80 px.

[0061] Step S13: Generate topology node features based on the topology node feature encoder, the device attribute information included in the target device link information, and the gravity weights corresponding to the topology nodes.

[0062] The topology node feature encoder is used to encode the device attribute information and gravity weights corresponding to topology nodes. Topology node features represent the semantic features corresponding to the topology nodes. Specifically, the device attribute information and gravity weights corresponding to the topology nodes in the target device link information have been normalized before being input into the topology node feature encoder.

[0063] As an example, see Figure 4The diagram shows the model structure of the first link graph generation model. The topology node feature encoder 401 includes a linear layer L11, a ReLU activation function, a linear layer L12, a ReLU activation function, and a linear layer L13. The input to linear layer L11 is the normalized result of the device attribute information (including the target device link information) and the gravity weights corresponding to the topology nodes (the device attribute information and gravity weights can be normallyized independently before being concatenated sequentially as the input to linear layer L11). The output dimension of linear layer L11 is 1×128. The output dimension of linear layer L12 is 1×128. The output dimension of linear layer L13 is 1×64. In practice, multiple topology node feature encoders can be deployed in parallel to encode the device attribute information (including the target device link information) and the gravity weights corresponding to the topology nodes in parallel, thereby improving encoding efficiency. Simultaneously, independent encoding at the topology node level avoids prematurely introducing topology information and maintains the independent feature expression of each topology node.

[0064] Step S14: Generate topology link features based on the topology link feature encoder, the device link description information included in the target device link information, and the link constraint information.

[0065] The topology link feature encoder is an encoder used to encode the device link description information and the aforementioned link constraint information, which are included in the target device link information. Topology link features characterize the semantic features corresponding to the topology links. Specifically, the device link description information and the aforementioned link constraint information, which are included in the target device link information, are first concatenated as strings and used as input to the topology link feature encoder.

[0066] As an example, see further. Figure 4 The topology link feature encoder 402 includes: a linear layer L21, a ReLU activation function, a linear layer L22, a ReLU activation function, a max-pooling layer, and a linear layer L23. The output dimensions of linear layers L21, L22, and L23 are all 1×64. In practice, multiple topology link feature encoders can be deployed in parallel to encode the device link description information and corresponding link constraint information of multiple target devices, thereby improving encoding efficiency. Simultaneously, independent encoding is performed at the topology link granularity to improve the independent feature representation capability for a single topology link.

[0067] Step S2: Perform feature embedding based on the topology node embedding feature encoder, the obtained topology node feature set, and the obtained topology link feature set to obtain the topology node embedding feature set.

[0068] Assuming there are M topology nodes, the feature set of each topology node can be represented as an M×128 feature matrix. Similarly, assuming there are N topology links, the feature set of each topology link can be represented as an N×128 feature matrix. The topology node embedding feature encoder is an encoder used to perform overall feature encoding on the feature sets of both topology nodes and topology links.

[0069] As an example, see further. Figure 4 The topology node embedding feature encoder 403 includes a concatenation layer, a feature aggregation layer C1, a ReLU activation function, a feature aggregation layer C2, a ReLU activation function, and a linear layer L31. For each topology node, the concatenation layer first concatenates the topology node features corresponding to the topology node and the K topology link features corresponding to the K topology links associated with that topology node, thus obtaining a 1×(K+1)×128 feature matrix. This matrix serves as the input to the feature aggregation layer C1. Both feature aggregation layers C1 and C2 employ the GraphSAGE module. This captures the semantic expression of the neighborhood topology based on high-quality topology node and topology link features, thereby expanding the receptive field. The output dimension of the concatenation layer is 1×(K+1)×128. The output dimensions of feature aggregation layers C1 and C2 are both 1×128. The output dimension of the linear layer L31 is 1×64.

[0070] Step S3: Based on the link graph layout prediction network and the above topology node embedding feature set, generate a local device link graph.

[0071] The aforementioned topology node feature encoder, topology link feature encoder, topology node embedding feature encoder, and link graph layout prediction network are included in the first link graph generation model. The link graph layout prediction network is a prediction network used to output the node position corresponding to each topology node.

[0072] As an example, see further. Figure 4 The link graph layout prediction network 404 includes: a linear layer L41, a ReLU activation function, a linear layer L42, a ReLU activation function, a linear layer L43, and a Tanh activation function. For each topological node embedding feature in the topological node embedding feature set, the topological node embedding feature is used as the input to the linear layer L41. The output dimension of the linear layer L41 is 1×128. The output dimension of the linear layer L42 is 1×64. The output dimension of the linear layer L43 is 1×2. By predicting the position based on each topological node embedding feature, M two-dimensional coordinates corresponding to M topological nodes are obtained.

[0073] The aforementioned first link graph generation model decouples and independently encodes topology nodes and device links, thereby ensuring the encoding quality of each. Simultaneously, the decoupled network design enables parallel multi-node and multi-link encoding, significantly improving encoding efficiency, especially for large-scale, complex device link visualization rendering scenarios. Furthermore, feature fusion via feature aggregation after independent encoding ensures the controllability of feature fusion and effectively avoids weighted interference problems compared to conventional average weighted feature fusion methods.

[0074] In some optional implementations of certain embodiments, the execution entity can generate the local device link diagram based on the gravity weights and link constraint information generated in steps S11 and S12, using a force-directed algorithm. This involves introducing gravity weights and link constraint information as constraints into the force-directed algorithm to improve the rationality of the generated local device link diagram. Specifically, when using the improved force-directed algorithm, the number of iterations is set to 100 by default. The more iterations, the more stable the topology layout of the resulting device link diagram. For scenarios with tens of thousands of topology nodes, the number of iterations can range from 150 to 200. In particular, the improved force-directed algorithm also includes an overlap avoidance threshold. When the distance between topology nodes is less than this threshold, repulsion enhancement is triggered to avoid overlap between topology nodes.

[0075] Step 104: Perform global topology optimization based on the obtained local device link graph set to obtain the global device link graph.

[0076] In some embodiments, the aforementioned execution entity can perform global topology optimization based on the obtained local device link graph set to obtain a global device link graph.

[0077] The global device link diagram is the network topology corresponding to the target device link information group after layout optimization. Since the local device link diagram is the network topology corresponding to the target device link information group after layout optimization, that is, the local device link diagram is in a locally optimal state, global topology optimization is needed based on the local device link diagram set to avoid getting trapped in a local optimum.

[0078] In practice, each local device link graph can be abstracted as a virtual topology node. Using a force-directed algorithm, the graph position of each local device link graph can be determined, and multiple local device link graphs can be concatenated to obtain a candidate global device link graph. Then, based on the candidate device link graph, combined with gravity weights and link constraint information, a second iterative topology optimization is performed using an improved force-directed algorithm. Compared to iterative methods starting from zero, this approach significantly reduces the number of iterations because it roughly locates the relatively optimal positions of the topology nodes.

[0079] In some optional implementations of some embodiments, the above-described global topology optimization based on the obtained local device link graph set to obtain a global device link graph includes: Step S1: For each local device link graph in the above set of local device link graphs, generate a virtual topology node and generate the virtual topology node features corresponding to the virtual topology node based on the above local device link graph.

[0080] In practice, each local device link graph can be abstracted as a virtual topology node. This virtual topology node (local device link graph) is then concatenated with the outputs (1×64) of the linear layer L42 corresponding to the M topology nodes of the local device link graph, resulting in a feature dimension of M×64, which serves as the virtual topology node feature.

[0081] Step S2: Generate a candidate global device link graph based on the obtained virtual topology node feature set and the second link graph generation model.

[0082] The second link graph generation model is a predictive network used to output the corresponding node positions of virtual topology nodes based on the features of virtual topology nodes. Since the second link graph generation model functions similarly to the link graph layout prediction network, it includes: a first linear layer, a ReLU activation function, a second linear layer, a ReLU activation function, a third linear layer, a ReLU activation function, a fourth linear layer, and a Tanh activation function. The first linear layer has an input dimension of M×64 (corresponding to the virtual topology node features) and an output dimension of 1×128. The second linear layer has an input dimension of 1×128 and an output dimension of 1×128. The third linear layer has an input dimension of 1×128 and an output dimension of 1×64. The fourth linear layer has an input dimension of 1×64 and an output dimension of 1×2. This outputs the node position of each virtual topology node, and based on the obtained node positions of multiple virtual topology nodes (the center positions of the local device link graph), a candidate global device link graph is constructed.

[0083] Step S3: Determine the iteration scale parameters based on the above candidate global device link diagram.

[0084] The iteration scale parameter represents the number of iterations in the subsequent global force-guided topology optimization. Specifically, a mapping relationship between the number of nodes and the number of iterations for different topologies can be preset. In particular, the mapping relationship can be obtained statistically to avoid the problem of excessive iterations leading to a long graph generation cycle, and to avoid the problem of insufficient iterations leading to poor graph generation quality.

[0085] In practice, the iteration scale parameter can be obtained by mapping the number of topology nodes in the candidate global device link graph.

[0086] Step S4: Perform global force-guided topology optimization based on the above candidate global device link graph and the above iteration scale parameters to obtain the global device link graph.

[0087] In practice, since the candidate global device link graph is based on global topology node optimization using virtual topology nodes, there may be overlaps between topology nodes in the local device link graphs corresponding to different virtual topology nodes. Therefore, using the iteration scale parameter as the iteration number, combined with gravity weights and link constraint information, a second topology optimization is performed to obtain the global device link graph. Compared to randomly initializing topology node positions, this method, involving multiple iterations, can significantly reduce the number of iterations. Especially for large-scale complex device link visualization rendering scenarios (i.e., containing a large number of topology nodes and device links), it can significantly compress the iteration cycle and improve the generation efficiency of the global device link graph.

[0088] Step 105: Perform layered rendering of the global device link diagram to obtain a set of rendering layers.

[0089] In some embodiments, the aforementioned execution entity may perform layered rendering of the global device link graph to obtain a set of rendering layers.

[0090] The rendering layer set includes a base rendering layer and overlay rendering layers. The base rendering layer includes a device node layer and a device link layer, while the overlay rendering layers include a status identifier layer and an interactive control layer. The device node layer contains the topology nodes corresponding to network devices. The device link layer contains the device links. The status identifier layer identifies the status of topology nodes and / or device links. The interactive control layer contains interactive components. Specifically, because the topology nodes, device links, status identifiers, and interactive components change differently, conventional methods require re-rendering the link diagram whenever any of these elements change. This is especially problematic for large-scale, complex device link visualization rendering scenarios, as it increases the amount of repetitive rendering tasks. Therefore, layered rendering improves rendering efficiency.

[0091] In practice, WebGL technology can be used to render the global device link graph in layers, resulting in a set of rendering layers.

[0092] In some optional implementations of certain embodiments, the above-described layered rendering of the global device link graph yields a set of rendering layers, including: Step S1: Split the above global device link diagram into layers to obtain a set of layers to be rendered.

[0093] Among them, the layers to be rendered in the set of layers to be rendered correspond to the device node layer, device link layer, status identifier layer and interactive control layer, respectively.

[0094] In practice, since topology nodes, device links, status identifiers, and interactive controls correspond to different page component identifiers, the global device link diagram can be split into four layers to be rendered by filtering by component identifiers, which can then be used as a set of layers to be rendered.

[0095] Step S2: For each layer in the set of layers to be rendered, generate vertex shader parameters and fragment shader parameters, and perform layer rendering on the layer to be rendered using the vertex shader and fragment shader based on the vertex shader parameters and fragment shader parameters to obtain the rendered layer.

[0096] The vertex shader is the executable program for each vertex, responsible for handling its geometric properties. The fragment shader is the executable program for each fragment, responsible for handling the pixel color. Vertex shader parameters represent the shader parameters corresponding to the vertex shader. Fragment shader parameters represent the shader parameters corresponding to the fragment shader. Specifically, vertex shader parameters include: node size configuration parameters and coordinate transformation parameters. Node size configuration parameters represent the pixel size corresponding to different topology nodes (network devices). Coordinate transformation parameters represent the projection type, specifically including but not limited to: orthographic projection and perspective projection. Orthographic projection is selected by default. Fragment shader parameters include: state parameters, link type parameters, and rendering enhancement parameters. State parameters represent the mapping relationship between the state and color of topology nodes and device links. For example, the color corresponding to a normal device status is green (color value: #00C853), the color corresponding to an alarm status is yellow (color value: #FFC107), the color corresponding to a fault status is red (color value: #F44336), and the color corresponding to an offline status is gray (color value: #FF5722). Optionally, the mapping relationship can be customized, and custom color tables can be imported. The link type parameter represents the line segment type of different device links. For example, physical link type devices correspond to solid lines, logical link type devices correspond to dashed lines with a dotted line spacing of 5 px, and virtual link type devices correspond to dotted lines with a dot diameter of 2 px and a dot spacing of 3 px. Optionally, line types and related line parameters can be customized. Rendering enhancement parameters represent rendering parameters, specifically including but not limited to: whether anti-aliasing is enabled, whether shadow effects are enabled, whether texture sampling is enabled, and whether color blending is enabled. In particular, anti-aliasing, texture sampling, and color blending are enabled by default.

[0097] In practice, a WebGL rendering object can be created using vertex shader parameters and the aforementioned fragment shader parameters. Combined with the vertex and fragment shaders, the layers to be rendered are then rendered to obtain the rendered layers. Specifically, firstly, during the rendering process, the rendering order is controlled by rendering level parameters. For example, the rendering order is prioritized for the layers corresponding to device node layers, followed by the layers corresponding to device link layers, then the layers corresponding to status flag layers, and finally the layers corresponding to interactive control layers. Next, the completeness of the rendering is controlled by precision adjustment parameters. For instance, taking the layers corresponding to device link layers as an example, in low-precision mode, only physical link-type device links are rendered; in high-precision mode, all device links are rendered. Custom rendering modes are also supported. Furthermore, the layer refresh rate is controlled by caching parameters, such as using a default-enabled framebuffer object for layer buffering. This method allows for dynamic adjustment of the rendering order and rendering fineness, thereby ensuring both rendering efficiency and precision.

[0098] Step 106: Perform a blending layer overlay on the rendering layer set to obtain the rendered device link diagram.

[0099] In some embodiments, the aforementioned execution entity may perform layer blending on the rendering layer set to obtain a rendered device link diagram.

[0100] Among them, the rendered device link diagram is a rendering of the overall link diagram for the set of device link information.

[0101] In practice, since rendering layers are obtained through layered rendering, layer overlay is necessary for complete visualization. For example, a set of rendering layers can be blended and overlaid using texture blending to obtain a rendered device link diagram.

[0102] In some optional implementations of certain embodiments, the above-described layer blending and overlay of the rendering layer set to obtain the rendered device link diagram includes: Step S1: For each rendering layer in the above set of rendering layers, create a framebuffer object corresponding to the rendering layer.

[0103] The frame buffer object is used to cache the color texture corresponding to the rendering layer. Specifically, the frame buffer object (FBO) is generated using OpenGL rendering technology.

[0104] Step S2: Based on the obtained set of framebuffer objects, perform blending layer overlay using texture blending to obtain the rendered device link diagram.

[0105] In practice, the rendering process is accelerated by the GPU and color textures (units) are buffered by the frame buffer object. Each color texture (unit) is characterized by a state identifier. When the state identifier does not change, the rendering is not repeated. Multiple layers are blended and superimposed using texture blending technology in OpenGL rendering technology to obtain the rendered device link graph.

[0106] In some optional implementations of some embodiments, the above method further includes: Step S1: Determine the scaling precision.

[0107] The scaling precision mentioned above is obtained by listening to the link graph scaling component. The link graph scaling component is used to control the scaling ratio of the link graph; for example, it can be a mouse wheel component or a button component. The scaling precision characterizes the scaling ratio of the link graph.

[0108] Step S2: In response to the above scaling accuracy being within the first accuracy range, the above-rendered device link diagram is sequentially visualized and loaded according to the first loading strategy information.

[0109] The first precision interval is a half-open interval that is closed on the left and open on the right, for example, the first precision interval could be [0.5, 1.5]. The first loading strategy information can include: loading order, loading precision, and loading frame rate. The loading order represents the rendering order of the device node layer, device link layer, state representation layer, and interactive control layer corresponding to the rendered device link graph. The loading precision represents the loading fineness of each layer. The loading frame rate represents the frame rate of the rendered device link graph.

[0110] In practice, the above execution state can control the loading order, loading precision, and loading frame rate according to the first loading strategy information, so as to perform sequential visualization loading of the rendered device link graph.

[0111] Step S2: In response to the above scaling accuracy being within the second accuracy range, the low-precision visualization of the above-rendered device link graph is loaded according to the second loading strategy information.

[0112] The upper limit of the second precision interval is less than the lower limit of the first precision interval. The second precision interval is a half-open interval (left-closed, right-open), for example, it could be [0, 0.5]. The second loading strategy information may include: loading order, loading precision, and loading frame rate. Specifically, the loading precision included in the second loading strategy information is a low loading precision mode.

[0113] Step S3: In response to the above scaling accuracy being within the third accuracy range, the above-rendered device link graph is loaded with high-precision visualization according to the third loading strategy information.

[0114] The lower limit of the third precision interval is greater than the upper limit of the first precision interval. The third precision interval is a closed interval; for example, it could be [1.5, 5]. The third loading strategy information may include: loading order, loading precision, and loading frame rate. In particular, the loading precision included in the third loading strategy information is a high loading precision mode.

[0115] In practice, each topology node and device link is pre-assigned a unique RGB (Red, Green, Blue) color code, stored in a hidden rendering buffer. When a user triggers a click or interactive operation, WebGL technology quickly reads the color code of the mouse click location, rapidly mapping it to the corresponding network device and device link for accurate matching. Specifically, color-coding is used by default (configurable color code bit depth to ensure unique color encoding), and ray-coding can also be used. Configuring a unique color code bit depth avoids selection errors caused by duplicate color codes for different objects, and controlling the mouse click recognition range by adjusting the picking precision ensures accurate matching and reduces misoperations. Furthermore, multi-mode page interaction is supported, such as zooming in and out, viewing specific areas, and viewing detailed information on the rendered device link map via mouse, scroll wheel, selection box, and double-click. After an interaction is triggered, a partial refresh mechanism updates the displayed content of the local topology, topology nodes, and device links in real time, avoiding a full re-render and ensuring efficient rendering and fast response, thus guaranteeing smooth operation. In particular, the visualization results and response time of the response can be controlled by response feedback parameters. For example, the highlighting parameters included in the response feedback parameters can control the visualization effect of topology nodes or device links (e.g., link thickening, link color darkening, topology node proportional magnification, etc.). Furthermore, the response time threshold included in the response feedback parameters can control the refresh time threshold, thereby ensuring that the response does not exceed the refresh time threshold and thus avoiding long waiting times for users.

[0116] The various embodiments of this disclosure have the following beneficial effects: Through the device link visualization rendering method of some embodiments of this disclosure, efficient link graph rendering is achieved in large-scale complex device link visualization rendering scenarios, thereby ensuring the smoothness of the visualization effect and reducing refresh latency. Specifically, this disclosure first obtains a set of device link information, wherein the device link information in the set includes: device attribute information and device link description information. The device attribute information represents the device attributes of the network device, and the device link description information represents the device link relationship corresponding to the network device. Next, the set of device link information is preprocessed to obtain a set of target device link information groups. Information preprocessing ensures the integrity and format uniformity of the obtained device link information. Then, for each target device link information group in the set of target device link information groups, local topology generation is performed based on the target device link information group to generate a local device link graph. In practice, conventional topology generation algorithms often iterate continuously to obtain a device link diagram. However, in large-scale and complex device link visualization rendering scenarios, as the number of network devices and their corresponding link relationships increase, conventional topology generation algorithms often experience excessive iterations. Therefore, this disclosure combines the characteristics of the topology structure and performs local topology generation in parallel to improve generation efficiency. Furthermore, global topology optimization is performed based on the obtained set of local device link diagrams to obtain a global device link diagram. In practice, while local topology generation can improve generation efficiency, it may get stuck in a local topology optimum, leading to local congestion in the final device link diagram. Therefore, this disclosure achieves global optimization through global topology optimization. In addition, the global device link diagram is rendered in layers to obtain a set of rendering layers. This set of rendering layers includes a basic rendering layer and an overlay rendering layer. The basic rendering layer includes a device node layer and a device link layer, and the overlay rendering layer includes a status identifier layer and an interactive control layer. In practice, the number of network devices, their corresponding link relationships, device status, link status, and interactive components often change and respond at varying frequencies. Layered rendering is used to improve rendering efficiency. Finally, the above rendering layers are blended and overlaid to obtain the rendered device link diagram. This blending and overlay method avoids redundant rendering. In summary, this approach achieves efficient link diagram rendering in large-scale, complex device link visualization scenarios, ensuring smooth visualization and reducing refresh latency.

[0117] Further reference Figure 5 As an implementation of the methods shown in the above figures, this disclosure provides some embodiments of a device link visualization rendering apparatus, which are similar to... Figure 1 Corresponding to the method embodiments shown, this device link visualization rendering device can be specifically applied to various electronic devices.

[0118] like Figure 5 As shown, a device link visualization rendering apparatus 500 in some embodiments includes: an acquisition unit 501, an information preprocessing unit 502, a local topology generation unit 503, a global topology optimization unit 504, a layered rendering unit 505, and a hybrid layer overlay unit 506. The acquisition unit 501 is configured to acquire a set of device link information, wherein the device link information in the set includes: device attribute information and device link description information. The device attribute information represents the device attributes of the network device, and the device link description information represents the device link relationship corresponding to the network device. The information preprocessing unit 502 is configured to perform information preprocessing on the set of device link information to obtain a set of target device link information groups. The local topology generation unit 503 is configured to perform local topology generation for each target device link information group in the set of target device link information groups to generate a local device link diagram. The global topology optimization unit 504... Topology optimization unit 504 is configured to perform global topology optimization based on the obtained local device link diagram set to obtain a global device link diagram; layered rendering unit 505 is configured to perform layered rendering on the global device link diagram to obtain a set of rendering layers, wherein the set of rendering layers includes: a basic rendering layer and an overlay rendering layer, the basic rendering layer includes: a device node layer and a device link layer, and the overlay rendering layer includes: a status identifier layer and an interactive control layer; hybrid layer overlay unit 506 is configured to perform hybrid layer overlay on the set of rendering layers to obtain a rendered device link diagram. It is understood that the units recorded in the device link visualization rendering device 500 are related to the reference... Figure 1 The steps in the described method correspond to each other. Therefore, the operations, features, and beneficial effects described above for the method also apply to the device link visualization rendering device 500 and the units contained therein, and will not be repeated here.

[0119] The following is for reference. Figure 6 It shows a schematic diagram of the structure of an electronic device (e.g., a computing device) 600 suitable for implementing some embodiments of the present disclosure. Figure 6 The electronic device shown is merely an example and should not be construed as limiting the functionality and scope of the embodiments of this disclosure.

[0120] like Figure 6As shown, the electronic device 600 may include a processing unit (e.g., a central processing unit, a graphics processing unit, etc.) 601, which can perform various appropriate actions and processes according to a program stored in a read-only memory 602 or a program loaded from a storage device 608 into a random access memory 603. The random access memory 603 also stores various programs and data required for the operation of the electronic device 600. The processing unit 601, the read-only memory 602, and the random access memory 603 are interconnected via a bus 604. An input / output interface 605 is also connected to the bus 604.

[0121] Typically, the following devices can be connected to the input / output interface 605: input devices 606 including, for example, a touchscreen, touchpad, keyboard, mouse, camera, microphone, accelerometer, gyroscope, etc.; output devices 607 including, for example, a liquid crystal display (LCD), speaker, vibrator, etc.; storage devices 608 including, for example, magnetic tape, hard disk, etc.; and communication devices 609. Communication device 609 allows electronic device 600 to communicate wirelessly or wiredly with other devices to exchange data. Although Figure 6 An electronic device 600 with various devices is shown; however, it should be understood that it is not required to implement or possess all of the devices shown. More or fewer devices may be implemented or possessed alternatively. Figure 6 Each box shown can represent a device or multiple devices as needed.

[0122] In particular, according to some embodiments of this disclosure, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, some embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device 609, or installed from a storage device 608, or installed from a read-only memory 602. When the computer program is executed by the processing device 601, it performs the functions defined above in the methods of some embodiments of this disclosure.

[0123] It should be noted that, in some embodiments of this disclosure, the computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. A computer-readable storage medium may be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In some embodiments of this disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In some embodiments of this disclosure, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium can be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wires, optical fibers, RF (radio frequency), etc., or any suitable combination thereof.

[0124] In some implementations, clients and servers can communicate using any currently known or future-developed network protocol such as HTTP (Hypertext Transfer Protocol) and can interconnect with digital data communication (e.g., communication networks) of any form or medium. Examples of communication networks include local area networks (“LANs”), wide area networks (“WANs”), the Internet (e.g., the Internet of Things), and peer-to-peer networks (e.g., ad hoc peer-to-peer networks), as well as any currently known or future-developed networks.

[0125] The aforementioned computer-readable medium may be included in the aforementioned electronic device; or it may exist independently and not assembled into the electronic device. The aforementioned computer-readable medium carries one or more programs. When the electronic device executes the aforementioned one or more programs, the electronic device causes the electronic device to: acquire a set of device link information, wherein the device link information in the set includes: device attribute information and device link description information, whereby the device attribute information represents the device attributes of the network device, and the device link description information represents the device link relationship corresponding to the network device; perform information preprocessing on the set of device link information to obtain a set of target device link information groups; for each target device link information group in the set of target device link information groups, perform local topology generation based on the target device link information group to generate a local device link diagram; perform global topology optimization based on the obtained set of local device link diagrams to obtain a global device link diagram; perform layered rendering on the global device link diagram to obtain a set of rendering layers, wherein the set of rendering layers includes: a basic rendering layer and an overlay rendering layer, whereby the basic rendering layer includes: a device node layer and a device link layer, and the overlay rendering layer includes: a status identifier layer and an interactive control layer; and perform mixed layer overlay on the set of rendering layers to obtain a rendered device link diagram.

[0126] Computer program code for performing operations of some embodiments of this disclosure can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0127] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0128] The functions described above in this document can be performed at least in part by one or more hardware logic components. For example, exemplary types of hardware logic components that can be used, without limitation, include: field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), system-on-a-chip (SoCs), complex programmable logic devices (CPLDs), and so on.

[0129] The above description is merely a selection of preferred embodiments of this disclosure and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of the invention involved in the embodiments of this disclosure is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the above-described inventive concept. For example, technical solutions formed by substituting the above-described features with (but not limited to) technical features with similar functions disclosed in the embodiments of this disclosure.

Claims

1. A device link visualization rendering method, characterized in that, include: Obtain a set of device link information, wherein the device link information in the set of device link information includes: device attribute information and device link description information, the device attribute information represents the device attributes of the network device, and the device link description information represents the device link relationship corresponding to the network device; The device link information set is preprocessed to obtain a target device link information group set, wherein the target device link information group represents the target network device and multiple network devices with the target network device as the topology center; For each target device link information group in the target device link information group set, a local topology is generated based on the target device link information group to generate a local device link diagram; Global topology optimization is performed based on the obtained local device link graph set to obtain the global device link graph; The global device link graph is rendered in layers to obtain a set of rendering layers, wherein the set of rendering layers includes: a basic rendering layer and an overlay rendering layer. The basic rendering layer includes: a device node layer and a device link layer. The overlay rendering layer includes: a status identifier layer and an interactive control layer. The rendered layer set is overlaid with blending layers to obtain a rendered device link diagram, wherein... For each target device link information group in the target device link information group set, local topology generation is performed based on the target device link information group to generate a local device link diagram, including: For each target device link information in the target device link information group, perform the following feature extraction steps: Based on the device attribute information included in the target device link information, a topology node and its corresponding gravity weight are generated. Based on the device link description information included in the target device link information, link constraint information is generated, wherein the link constraint information includes: core link type and link distance constraint parameters; Based on the topology node feature encoder, the device attribute information included in the target device link information, and the gravity weight corresponding to the topology node, a topology node feature is generated; A topology link feature is generated based on the topology link feature encoder, the device link description information included in the target device link information, and the link constraint information; Based on the topology node embedding feature encoder, the obtained topology node feature set, and the obtained topology link feature set, feature embedding is performed to obtain the topology node embedding feature set; A local device link graph is generated based on the link graph layout prediction network and the topology node embedding feature set, wherein the topology node feature encoder, the topology link feature encoder, the topology node embedding feature encoder, and the link graph layout prediction network are included in the first link graph generation model.

2. The device link visualization rendering method according to claim 1, characterized in that, The method further includes: Determine the scaling precision, wherein the scaling precision is obtained by performing component monitoring on the link graph scaling component; In response to the scaling accuracy being within the first accuracy range, the rendered device link graph is sequentially visualized and loaded according to the first loading strategy information; In response to the scaling accuracy being within the second accuracy range, the rendered device link graph is loaded with low-precision visualization according to the second loading strategy information, wherein the upper limit value of the second accuracy range is less than the lower limit value of the first accuracy range. In response to the scaling accuracy being within the third accuracy interval, the rendered device link graph is loaded with high-precision visualization according to the third loading strategy information, wherein the lower limit of the third accuracy interval is greater than the upper limit of the first accuracy interval.

3. The device link visualization rendering method according to claim 2, characterized in that, The step of preprocessing the device link information set to obtain the target device link information group set includes: For each piece of device link information in the device link information set, perform the following preprocessing steps: Outlier removal is performed on the device attribute information and device link description information included in the device link information to obtain the first device link information; The missing values ​​of the first device link information are filled in to obtain the second device link information; Generate the node duplicate check string and link duplicate check string corresponding to the link information of the second device; Based on the node duplicate check string and link duplicate check string corresponding to the second device link information, the obtained second device link information set is deduplicated to obtain the third device link information set. Each third device link information in the third device link information set is converted to a new format to obtain a fourth device link information set. Non-core attribute filtering is performed on each fourth device link information in the fourth device link information set to obtain the target device link information set; The target device link information in the target device link information set is associated and aggregated to obtain a target device link information group set.

4. The device link visualization rendering method according to claim 3, characterized in that, The process of performing layered rendering on the global device link graph to obtain a set of rendering layers includes: The global device link diagram is split into layers to obtain a set of layers to be rendered; For each layer in the set of layers to be rendered, vertex shader parameters and fragment shader parameters are generated, and the layer to be rendered is rendered using the vertex shader and fragment shader according to the vertex shader parameters and the fragment shader parameters to obtain the rendered layer.

5. The device link visualization rendering method according to claim 4, characterized in that, The step of blending and overlaying the rendered layer set to obtain the rendered device link diagram includes: For each rendering layer in the rendering layer set, a frame buffer object corresponding to the rendering layer is created, wherein the frame buffer object is used to cache the color texture corresponding to the rendering layer; Based on the obtained set of framebuffer objects, blended layers are overlaid using texture blending to obtain the rendered device link diagram.

6. The device link visualization rendering method according to claim 5, characterized in that, The step of performing global topology optimization based on the obtained local device link graph set to obtain a global device link graph includes: For each local device link graph in the set of local device link graphs, a virtual topology node is generated based on the local device link graph, and the virtual topology node features corresponding to the virtual topology node are also generated. Based on the obtained set of virtual topology node features and the second link graph generation model, a candidate global device link graph is generated. Based on the candidate global device link diagram, determine the iteration scale parameters; Global force-guided topology optimization is performed based on the candidate global device link graph and the iteration scale parameter to obtain the global device link graph.

7. A device link visualization rendering apparatus, applied to the method described in any one of claims 1 to 6, characterized in that, include: The acquisition unit is configured to acquire a set of device link information, wherein the device link information in the set of device link information includes: device attribute information and device link description information, the device attribute information representing the device attributes of the network device, and the device link description information representing the device link relationship corresponding to the network device; The information preprocessing unit is configured to preprocess the device link information set to obtain a target device link information group set, wherein the target device link information group represents a target network device and multiple network devices with the target network device as the topology center. The local topology generation unit is configured to generate a local topology based on each target device link information group in the target device link information group set, so as to generate a local device link diagram. The global topology optimization unit is configured to perform global topology optimization based on the obtained set of local device link graphs to obtain a global device link graph. A layered rendering unit is configured to perform layered rendering of the global device link graph to obtain a set of rendering layers, wherein the set of rendering layers includes: a basic rendering layer and an overlay rendering layer, the basic rendering layer includes: a device node layer and a device link layer, and the overlay rendering layer includes: a status identifier layer and an interactive control layer; The blending layer overlay unit is configured to blend and overlay the set of rendering layers to obtain a rendered device link diagram.

8. An electronic device, characterized in that, include: One or more processors; A storage device on which one or more programs are stored; When the one or more programs are executed by the one or more processors, the one or more processors implement the method as described in any one of claims 1 to 6.

9. A computer-readable medium, characterized in that, It stores a computer program thereon, wherein the computer program, when executed by a processor, implements the method as described in any one of claims 1 to 6.

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