Semiconductor device and method of manufacturing the same, laser

Abstract

Embodiments of the present application provide a semiconductor device, a preparation method thereof and a laser. The preparation method comprises: forming a photoelectric conversion layer on a substrate; and forming a ridge structure extending along a first direction on the photoelectric conversion layer. The ridge structure serves as a carrier of a virtual grating. A first semiconductor layer extending along a second direction and across the ridge structure, and a second semiconductor layer covering part of the first semiconductor layer are formed on the ridge structure. A first temperature control electrode and a second temperature control electrode are in electrical contact with the first semiconductor layer and the second semiconductor layer, respectively. By loading an electrical signal to the temperature control electrodes, the first semiconductor layer periodically heats the ridge structure, and the refractive index of the ridge structure periodically changes, thereby forming a virtual grating. In this way, the problems of multiple longitudinal mode lasing and wavelength tuning of a Fabry-Perot laser are solved, the single longitudinal mode selection and wavelength tuning of the semiconductor device are realized through the virtual grating, and the manufacturing yield is improved.

Description

Technical Field

[0001] This application relates to the field of lasers, and more particularly to a semiconductor device and its fabrication method, and a laser. Background Technology

[0002] Semiconductor lasers are widely used in high-tech fields such as modern optical communication, data center interconnection, and laser sensing.

[0003] In related technologies, Fabry-Perot lasers do not have physical gratings and rely on cleavage surface reflection to achieve multi-mode lasing.

[0004] However, the Fabry-Perot laser mentioned above lacks mode selection and tuning mechanisms, resulting in the inability to achieve single longitudinal mode output and wavelength tuning. Summary of the Invention

[0005] This application provides a semiconductor device and its fabrication method, as well as a laser, to achieve single-mode selection and wavelength tuning.

[0006] To achieve the above objectives, in a first aspect, this application provides a method for fabricating a semiconductor device, comprising:

[0007] A substrate is provided, and a photoelectric conversion layer is formed on the substrate;

[0008] A ridge structure is formed, the ridge structure is disposed on the side of the photoelectric conversion layer opposite to the substrate, and covers a portion of the photoelectric conversion layer; wherein, the ridge structure extends along a first direction;

[0009] Multiple semiconductor layers are formed and arranged at intervals along a first direction. Each semiconductor layer includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is disposed on the photoelectric conversion layer and spans the ridge structure along a second direction. The second semiconductor layer is disposed on the first semiconductor layer and covers a portion of the first semiconductor layer. The conductivity type of the second semiconductor layer is different from that of the first semiconductor layer. The second direction intersects with the first direction.

[0010] A temperature control electrode is formed, comprising a first temperature control electrode and a second temperature control electrode. The first temperature control electrode is disposed on the first semiconductor layer and is in electrical contact with the first semiconductor layer, and the second temperature control electrode is disposed on the second semiconductor layer and is in electrical contact with the second semiconductor layer.

[0011] As one feasible implementation, the step of forming the ridge structure in the semiconductor device fabrication method includes:

[0012] A ridge waveguide layer is formed, wherein the ridge waveguide layer is disposed on the side of the photoelectric conversion layer opposite to the substrate;

[0013] A first electrode is formed, and the first electrode is disposed on the side of the ridge waveguide layer opposite to the photoelectric conversion layer;

[0014] An isolation layer is formed, which covers the ridge waveguide layer and the first electrode.

[0015] As one possible implementation, the step of forming multiple semiconductor layers in the method for fabricating a semiconductor device includes:

[0016] An initial semiconductor layer is formed, the initial semiconductor layer comprising a first initial semiconductor layer and a second initial semiconductor layer stacked together;

[0017] A portion of the initial semiconductor layer is removed to form a plurality of intermediate semiconductor layers, the plurality of intermediate semiconductor layers being spaced apart along the first direction, each of the intermediate semiconductor layers comprising a first semiconductor layer and a second intermediate semiconductor layer stacked together, wherein the retained first initial semiconductor layer constitutes the first semiconductor layer;

[0018] Remove a portion of the second intermediate semiconductor layer from the intermediate semiconductor layer so that the remaining second intermediate semiconductor layer constitutes the second semiconductor layer.

[0019] As one possible implementation, the thickness of the first semiconductor layer is A, where A is greater than or equal to 0.2 μm and less than or equal to 0.3 μm.

[0020] As one possible implementation, the material of the first semiconductor layer includes any one of N-type doped polycrystalline silicon, aluminum indium gallium nitride, and aluminum gallium arsenide.

[0021] The material of the second semiconductor layer includes either P-type heavily doped aluminum indium gallium nitride or aluminum gallium arsenide.

[0022] As a feasible implementation, at least one of the first temperature control electrode and the second temperature control electrode includes a first electrode layer and a second electrode layer stacked together, wherein the conductivity of the second electrode layer is greater than that of the first electrode layer, and the first electrode layer is used to block the diffusion of metal elements from the second electrode layer to the semiconductor layer.

[0023] As one possible implementation, after the step of forming the temperature-controlled electrode, the preparation method further includes:

[0024] A second electrode is formed, which is disposed on the side of the substrate opposite to the photoelectric conversion layer.

[0025] Secondly, embodiments of this application provide a semiconductor device, including:

[0026] A substrate on which a photoelectric conversion layer is disposed;

[0027] A ridge structure is disposed on the side of the photoelectric conversion layer opposite to the substrate and covers a portion of the photoelectric conversion layer; wherein the ridge structure extends along a first direction;

[0028] The system comprises multiple semiconductor layers, which are spaced apart along a first direction. Each semiconductor layer includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is disposed on the photoelectric conversion layer and spans the ridge structure along a second direction. The second semiconductor layer is disposed on the first semiconductor layer and covers a portion of the first semiconductor layer. The conductivity type of the second semiconductor layer is different from that of the first semiconductor layer. The second direction intersects with the first direction.

[0029] The temperature control electrode includes a first temperature control electrode and a second temperature control electrode. The first temperature control electrode is disposed on the first semiconductor layer and is in electrical contact with the first semiconductor layer. The second temperature control electrode is disposed on the second semiconductor layer and is in electrical contact with the second semiconductor layer.

[0030] As one possible implementation, the ridge structure in the semiconductor device includes:

[0031] A ridge waveguide layer is disposed on the side of the photoelectric conversion layer opposite to the substrate;

[0032] The first electrode is disposed on the side of the ridge waveguide layer opposite to the photoelectric conversion layer;

[0033] An isolation layer covering the ridge waveguide layer and the first electrode.

[0034] Thirdly, embodiments of this application provide a laser, which includes any of the aforementioned semiconductor devices.

[0035] This application provides a semiconductor device and its fabrication method, as well as a laser, by introducing a semiconductor layer and temperature-controlled electrodes. A first temperature-controlled electrode supplies an electrical signal to the first semiconductor layer, and a second temperature-controlled electrode supplies an electrical signal to the second semiconductor layer. Utilizing the Joule heating effect of the semiconductor material, the first semiconductor layer periodically heats the ridge structure, thereby causing a periodic change in the refractive index of the ridge structure along a first direction, forming a virtual grating, and thus achieving single-mode selection of the laser. Simultaneously, the magnitude of the electrical signal of the temperature-controlled electrodes is controlled by digital logic to change the effective refractive index of the virtual grating; the period of the virtual grating is changed by adjusting the interval of the electrical signals of the temperature-controlled electrodes, thereby achieving wavelength tuning of the semiconductor device. This virtual grating solves the problem that traditional Fabry-Perot lasers cannot achieve single-mode selection and wavelength tuning, realizing single-mode selection and wavelength tuning of semiconductor devices. Furthermore, since there is no need to fabricate a physical grating inside the photoelectric conversion layer through etching processes, the manufacturing yield of the semiconductor device is improved.

[0036] In addition to the technical problems solved by the embodiments of this application, the technical features constituting the technical solutions, and the beneficial effects brought about by the technical features of these technical solutions described above, other technical problems that can be solved by the semiconductor devices and their preparation methods and electronic devices provided by the embodiments of this application, other technical features included in the technical solutions, and the beneficial effects brought about by these technical features will be further explained in detail in the specific embodiments. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0038] Figure 1 A process flow diagram of the semiconductor device fabrication method provided in the embodiments of this application;

[0039] Figure 2 A top view of a semiconductor device provided in an embodiment of this application;

[0040] Figure 3 A schematic diagram showing the formation of the photoelectric conversion layer in the fabrication method of the semiconductor device provided in the embodiments of this application;

[0041] Figure 4 This is a schematic diagram showing the formation of a ridge structure in the fabrication method of the semiconductor device provided in the embodiments of this application;

[0042] Figure 5A schematic diagram showing the formation of an intermediate semiconductor layer in the fabrication method of the semiconductor device provided in the embodiments of this application;

[0043] Figure 6 A schematic diagram showing the formation of the second semiconductor layer in the method for fabricating the semiconductor device provided in this application embodiment;

[0044] Figure 7 A schematic diagram showing the formation of a temperature control electrode in the fabrication method of the semiconductor device provided in the embodiments of this application;

[0045] Figure 8 This is a schematic diagram of the structure of a semiconductor device provided in an embodiment of this application.

[0046] Explanation of reference numerals in the attached figures:

[0047] 100. Substrate;

[0048] 200, Photoelectric conversion layer; 210, N-type carrier injection layer; 220, First confinement layer; 230, First waveguide layer; 240, Active layer; 250, Second waveguide layer; 260, First barrier layer; 270, Second confinement layer; 280, P-type carrier injection layer;

[0049] 300, Ridge structure; 310, Ridge waveguide layer; 320, First electrode; 330, Isolation layer;

[0050] 400, Semiconductor layer; 410, First semiconductor layer; 420, Second semiconductor layer; 421, Second intermediate semiconductor layer;

[0051] 500, Temperature control electrode; 510, First temperature control electrode; 520, Second temperature control electrode;

[0052] 600, Second electrode.

[0053] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0054] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0055] As described in the background section, traditional Fabry-Perot lasers lack a mode selection mechanism due to the absence of a physical grating, enabling only multi-mode lasing and failing to meet single-frequency output requirements and wavelength tuning. In related technologies, distributed feedback lasers and Bragg reflector lasers can achieve single-mode selection and wavelength tuning through internal physical gratings. Typically, these internal physical gratings are formed in the active region of the photoelectric conversion layer using photolithography and etching processes. During the etching process of the physical grating, lattice damage to the active layer is easily caused, resulting in surface defects and reducing the laser's yield.

[0056] To address the aforementioned technical problems, this application provides a semiconductor device and its fabrication method, as well as a laser. A semiconductor layer and a temperature-controlled electrode are disposed on the ridge structure of the semiconductor device. Utilizing the Joule heating and thermo-optic effects of semiconductor materials, an electrical signal is applied to the semiconductor layer via the temperature-controlled electrode. The first semiconductor layer periodically heats the ridge structure, achieving a periodic change in the refractive index of the ridge waveguide layer, thereby forming a virtual grating and enabling single-mode selection. By adjusting the width and spacing of multiple first semiconductor layers, or by adjusting the magnitude of the electrical signal on the temperature-controlled electrode, the period or refractive index of the virtual grating is changed, achieving wavelength tuning. Furthermore, because this semiconductor device achieves single-mode selection and wavelength tuning through a virtual grating, the low production yield problem caused by physical grating fabrication is avoided, thereby improving manufacturing yield.

[0057] To make the above-mentioned objectives, features, and advantages of the embodiments of this application more apparent and understandable, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0058] First, let me explain the terms used in this application:

[0059] Joule heating effect: refers to the phenomenon that when an electric current passes through a semiconductor material, due to the resistance of the material, the charge carriers scatter and collide with the lattice, impurities, and defects during their directional motion, converting the kinetic energy given by the electric field into lattice vibration energy (internal energy), resulting in an increase in the material temperature and the irreversible conversion of electrical energy into heat energy, which follows Joule's law.

[0060] Thermo-optic effect: The physical effect in which the refractive index of a semiconductor material changes regularly with temperature.

[0061] Fabry-Perot laser: A type of semiconductor laser whose resonant cavity is composed of two parallel reflecting surfaces (usually the natural cleavage surfaces of the chip), forming a Fabry-Perot interferometer structure; photons oscillate back and forth in the cavity and are amplified by stimulated emission, outputting multi-longitudinal-mode laser with a multi-peak spectrum.

[0062] A grating is a diffractive optical element consisting of a large number of parallel slits (or reflective units) of equal width and spacing arranged periodically. It can use multi-slit diffraction and interference effects to disperse incident light in space according to wavelength.

[0063] Bragg diffraction principle: When parallel monochromatic electromagnetic waves (light waves) are incident on a periodic lattice or grating periodic structure, the wavelets reflected from different layers undergo coherent interference. Only when the optical path difference is an integer multiple of the wavelength can constructive interference be generated and strong diffraction maxima be formed.

[0064] Lift-off process: This is an additive patterning process in semiconductor manufacturing. It involves forming a reverse mask with photoresist, depositing the target thin film, dissolving and removing the photoresist, and simultaneously peeling off excess film from the photoresist, leaving only the desired pattern on the substrate.

[0065] like Figure 1 As shown, in a first aspect, this application provides a method for fabricating a semiconductor device, comprising the following steps:

[0066] Step S100: Provide a substrate and form a photoelectric conversion layer on the substrate.

[0067] The substrate 100 serves as a support component for the semiconductor device, supporting other components disposed thereon. The material of the substrate 100 may be any one of gallium arsenide, indium phosphide, gallium nitride, silicon carbide, and aluminum oxide, among others.

[0068] The photoelectric conversion layer 200 is mainly used to convert electrical energy into light energy and can be formed on the substrate 100 through epitaxial growth processes (such as metal-organic chemical vapor deposition, molecular beam epitaxy, etc.). In some embodiments, the photoelectric conversion layer 200 includes an N-type carrier injection layer 210, a first confinement layer 220, a first waveguide layer 230, an active layer 240, a second waveguide layer 250, a first barrier layer 260, a second confinement layer 270, and a P-type carrier injection layer 280, which are sequentially stacked along a direction opposite to the substrate 100. The N-type carrier injection layer 210 is mainly used to provide free electrons to the active layer 240; the P-type carrier injection layer 280 is mainly used to inject holes into the active layer 240. It should be noted that the materials of the N-type carrier injection layer 210 and the P-type carrier injection layer 280 can include any one of aluminum indium gallium nitride (AlInGaN) and aluminum gallium arsenide (AlGaAs). For example, an N-type carrier injection layer 210 is formed by heavily doping silicon in an AlInGaN material; and a P-type carrier injection layer 280 is formed by heavily doping magnesium in the AlInGaN material. It is understood that heavily doping the N-type carrier injection layer 210 and the P-type carrier injection layer 280 is beneficial for increasing the carrier concentration. It should be noted that the thickness of the N-type carrier injection layer 210 and the P-type carrier injection layer 280 is greater than or equal to 0.3 μm and less than or equal to 1 μm. Optionally, the thickness of the carrier injection layer can be 0.3 μm, 0.7 μm, or 1 μm.

[0069] The first confinement layer 220 and the second confinement layer 270 are mainly used to achieve vertical optical field confinement and to restrict the reverse diffusion of charge carriers. It should be noted that the vertical direction refers to the thickness direction along the photoelectric conversion layer 200. Specifically, the first confinement layer 220 forms a potential barrier with the N-type charge carrier injection layer 210, restricting the diffusion of electrons from the active region to the N-type charge carrier injection layer 210. The second confinement layer 270 forms a potential barrier with the P-type charge carrier injection layer 280, blocking the diffusion of holes from the active region to the P-type charge carrier injection layer 280. In some embodiments, the doping concentration of the first confinement layer 220 and the second confinement layer 270 is lower than the doping concentration of the aforementioned N-type charge carrier injection layer 210 and P-type charge carrier injection layer 280, to avoid absorption losses and increased defects caused by high-concentration doping. The material of the first confinement layer 220 and the second confinement layer 270 can include any one of aluminum indium gallium nitride (AlInGaN) and aluminum gallium arsenide (AlGaAs). For example, a first confinement layer 220 is formed by silicon doping in an AlInGaN material; a second confinement layer 270 is formed by magnesium doping in the AlInGaN material. It should be noted that the thicknesses of the first confinement layer 220 and the second confinement layer 270 are greater than or equal to 0.1 μm and less than or equal to 3 μm. Optionally, the thickness of the waveguide layer can be 0.1 μm, 1 μm, 2 μm, or 3 μm.

[0070] The first barrier layer 260 is disposed between the second confinement layer 270 and the second waveguide layer 250, and is mainly used to prevent electrons from overflowing from the active region. The first barrier layer 260 is undoped or nearly intrinsically doped to form a high-energy band barrier, thereby preventing electrons from leaking from the active region. In some embodiments, the material of the first barrier layer 260 may include any one of aluminum indium gallium nitride (AlInGaN) and aluminum gallium arsenide (AlGaAs). It should be noted that the thickness of the first barrier layer 260 is greater than or equal to 0.1 μm and less than or equal to 3 μm. Optionally, the thickness of the first barrier layer 260 may be 0.1 μm, 1.5 μm, or 3 μm.

[0071] The first waveguide layer 230 and the second waveguide layer 250 are mainly used to confine light waves to the vicinity of the active layer 240, thereby reducing light loss. The first waveguide layer 230 is disposed between the active layer 240 and the first confinement layer 220, and the second waveguide layer 250 is disposed between the active layer 240 and the first blocking layer 260. The doping concentration of the first waveguide layer 230 and the second waveguide layer 250 is lower than that of the first confinement layer 220 and the second confinement layer 270, thereby reducing light absorption loss and light scattering. In some embodiments, the waveguide layer material may include any one of aluminum indium gallium nitride (AlInGaN) and aluminum gallium arsenide (AlGaAs). For example, the first waveguide layer 230 is formed by lightly doping silicon in AlInGaN material; the second waveguide layer 250 is formed by lightly doping magnesium in AlInGaN material. It should be noted that the thickness of the waveguide layer is greater than or equal to 0.1 μm and less than or equal to 0.5 μm. Optionally, the thickness of the waveguide layer can be 0.1μm, 0.3μm, or 0.5μm.

[0072] The active layer 240 is the core layer for injecting carrier recombination and generating laser light. In some embodiments, the active layer 240 is a quantum well structure, and the thickness of the active layer 240 may include, but is not limited to, 0.1 μm. For example, the active layer 240 may include, but is not limited to, any one of alternating AlInGaN well-AlInGaN barrier layers or alternating InGaAs well-AlGaAs barrier layers.

[0073] For example, such as Figure 3 As shown, the substrate 100 is made of gallium nitride, and a photoelectric conversion layer 200 is formed on the substrate 100 using a metal-organic chemical vapor deposition (MOCVD) process. First, the substrate 100 is placed in a MOCVD reaction chamber, using hydrogen as the carrier gas and trimethylaluminum, trimethylgallium, trimethylindium, and ammonia as the reaction gases; silane is simultaneously introduced as a dopant source for in-situ doping during the growth process. The introduced gaseous reactants are used to perform single-crystal epitaxial growth of a silicon-doped aluminum indium gallium nitride (AlInGaN) layer on the surface of the substrate 100 according to the crystal lattice orientation, forming an N-type carrier injection layer 210.

[0074] Subsequently, without removing the substrate 100, the metal-organic chemical vapor deposition process is continued by adjusting the gas source flow rate, temperature, and doping concentration to form a first confinement layer 220, a first waveguide layer 230, an active layer 240, a second waveguide layer 250, a first barrier layer 260, a second confinement layer 270, and a P-type carrier injection layer 280 sequentially stacked on the N-type carrier injection layer 210 in a direction away from the substrate 100. This completes the fabrication of the photoelectric conversion layer 200. Since the fabrication method of the photoelectric conversion layer 200 is a conventional technique, it will not be described in detail here.

[0075] Step S200: Form a ridge structure, the ridge structure is disposed on the side of the photoelectric conversion layer away from the substrate and covers a portion of the photoelectric conversion layer; wherein, the ridge structure extends along a first direction.

[0076] As one possible implementation, the method for fabricating a semiconductor device includes forming a ridge structure 300, forming a ridge waveguide layer 310, forming a first electrode 320, and forming an isolation layer 330.

[0077] To facilitate defining the first and second directions, the first direction can be: Figure 2 In the Y direction, the second direction can be Figure 2 The X direction in the equation. Figures 3 to 8 This is a cross-sectional view of the semiconductor device along the second direction.

[0078] like Figure 2 As shown, the ridge waveguide layer 310 is disposed on the side of the photoelectric conversion layer 200 away from the substrate 100 and extends along the first direction. The ridge waveguide layer 310 is used to limit the spread of the light field along the second direction and to serve as a carrier for the virtual grating, thereby improving the output quality of the light beam.

[0079] like Figure 4 As shown, in some embodiments, the fabrication method of the ridge waveguide layer 310 includes: forming a highly doped P-type semiconductor layer 400 on the side of the photoelectric conversion layer 200 away from the substrate 100 by an epitaxial growth process. A photoresist layer is coated on the P-type semiconductor layer 400, and after exposure and development, a patterned photoresist layer is formed. Subsequently, the exposed P-type semiconductor layer 400 is removed by an etching process (such as inductively coupled plasma reactive ion etching). The patterned photoresist layer is stripped off, and the P-type semiconductor layer 400 covered by the patterned photoresist layer is retained; the retained P-type semiconductor layer 400 serves as the ridge waveguide layer 310. It should be noted that the material of the ridge waveguide layer 310 may include any one of highly doped magnesium aluminum indium gallium nitride (AlInGaN) or highly doped zinc aluminum gallium arsenide (AlGaAs). The thickness of the ridge waveguide layer 310 is greater than or equal to 0.3 μm and less than or equal to 0.5 μm. Optionally, the thickness of the ridge waveguide layer 310 can be 0.3 μm, 0.4 μm, or 0.5 μm.

[0080] The first electrode 320 is disposed on the side of the ridge waveguide layer 310 opposite to the photoelectric conversion layer 200, for injecting holes into the ridge waveguide layer 310. In some embodiments, the first electrode 320 is fabricated using a lift-off process. Specifically, a photoresist layer is coated on the ridge waveguide layer 310 and the photoelectric conversion layer 200. After exposure and development, the photoresist layer in a portion of the area above the ridge waveguide layer 310 is removed. Subsequently, a first metal material layer is deposited using a method such as electron beam evaporation or magnetron sputtering, depositing the first metal material layer in the area above the ridge waveguide layer 310 not covered by the photoresist layer. Then, the photoresist layer is removed, along with the first metal material layer located on the photoresist layer, while the first metal material layer located above the ridge waveguide layer 310 is retained. This retained first metal material layer serves as the first electrode 320.

[0081] The isolation layer 330 covers the ridge waveguide layer 310 and the first electrode 320 to prevent lateral leakage of the first electrode 320, and to allow auxiliary current to be injected into the active layer 240 in a vertical direction. In addition, the isolation layer 330 can also isolate the ridge waveguide layer 310 from the influence of air moisture and process acids and alkalis, thus effectively protecting the ridge waveguide layer 310.

[0082] In some embodiments, the method for fabricating the isolation layer 330 specifically includes: forming a dielectric layer by a thin-film deposition process (such as plasma chemical vapor deposition, atomic layer deposition), the dielectric layer covering the photoelectric conversion layer 200, the side of the first electrode 320 facing away from the substrate 100, and the ridge waveguide layer 310. Then, a photoresist layer is coated on the dielectric layer, and the photoresist layer is patterned by exposure and development. The dielectric layer not covered by the patterned photoresist layer is removed by an etching process (such as inductively coupled plasma reactive ion etching). The remaining dielectric layer covers the sidewalls and top of the first electrode 320 and the ridge waveguide layer 310, serving as the isolation layer 330 of the ridge structure 300. It should be noted that the material of the isolation layer 330 may include silicon oxide, silicon nitride, etc. The thickness of the isolation layer 330 is greater than or equal to 0.2 μm and less than or equal to 0.3 μm. Optionally, the thickness of the isolation layer 330 may be 0.2 μm, 0.25 μm, or 0.3 μm.

[0083] This application embodiment introduces a method for fabricating a ridge structure 300 to confine the optical field along the second direction, enabling vertical injection of current into the active region, achieving stable fundamental mode output and improving optical gain utilization, thereby effectively ensuring the stability and quality of the output beam from the semiconductor device. Furthermore, by forming the ridge waveguide layer 310, the virtual grating carrier is fabricated, providing conditions for the realization of the virtual grating.

[0084] Step S300: Forming multiple semiconductor layers, which are spaced apart along a first direction. Each semiconductor layer includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is disposed on the photoelectric conversion layer and spans the ridge structure along a second direction. The second semiconductor layer is disposed on the first semiconductor layer and covers a portion of the first semiconductor layer. The conductivity type of the second semiconductor layer is different from that of the first semiconductor layer. The second direction intersects with the first direction.

[0085] Multiple semiconductor layers 400 are primarily used to heat the ridge structure 300 and alter the refractive index of the ridge waveguide layer 310. The first semiconductor layer 410 mainly serves as the heating element of the semiconductor resistive micro-heater. The second semiconductor layer 420, through heavy doping, reduces the contact resistance between the first semiconductor layer 410 and the temperature control electrode 500. It can be understood that by applying an electrical signal to the temperature control electrodes 500 at both ends of the semiconductor layers 400, based on the Joule heating effect, current flows through the first semiconductor layer 410 and the second semiconductor layer 420. Current carriers move within the first semiconductor layer, colliding with the lattice, defects, and impurities of the first semiconductor layer 410, converting electrical energy into lattice heat energy, thereby achieving localized heating of the ridge structure 300.

[0086] In one possible implementation, the process of forming multiple semiconductor layers 400 includes: after the ridge structure 300 is formed, forming an initial semiconductor layer 400. The initial semiconductor layer 400 includes a first initial semiconductor layer 400 and a second initial semiconductor layer 400 stacked together. First, the first initial semiconductor layer 400 is formed on the ridge structure 300 and the photoelectric conversion layer 200 by an epitaxial growth process. Then, a second initial semiconductor layer 400 is formed on the side of the first initial semiconductor layer 400 facing away from the substrate 100 by an epitaxial growth process. This second initial semiconductor layer 400 is heavily p-type doped in the epitaxial process. It should be noted that the epitaxial growth process can include any one of metal-organic chemical vapor deposition, electron beam epitaxy, magnetron sputtering, etc.

[0087] Next, a photoresist layer is coated on the second initial semiconductor layer 400, and the photoresist layer is patterned by exposure and development. Etching gas is introduced to etch the second initial semiconductor layer 400, forming multiple second intermediate semiconductor layers 421. The type and ratio of the etching gas are changed to etch the first initial semiconductor layer 400, and the remaining first initial semiconductor layer 400 forms multiple first semiconductor layers 410. Thus, by removing a portion of the initial semiconductor layer 400, multiple intermediate semiconductor layers 400 are formed. Figure 5 As shown, a plurality of intermediate semiconductor layers 400 are arranged at intervals along a first direction and span the ridge structure 300 along a second direction. Each intermediate semiconductor layer 400 includes a first semiconductor layer 410 and a second intermediate semiconductor layer 421 stacked together.

[0088] Subsequently, a photoresist layer is formed over multiple second intermediate semiconductor layers 421, the ridge structure 300, and the photoelectric conversion layer 200, and the photoresist layer is patterned by exposure and development. For example... Figure 6 As shown, a portion of the second intermediate semiconductor layer 421 that is not covered by the photoresist layer in the plurality of intermediate semiconductor layers 400 is removed by an etching process, so that the remaining second intermediate semiconductor layer 421 constitutes a plurality of second semiconductor layers 420.

[0089] It should be noted that the formation of multiple semiconductor layers 400 includes, but is not limited to, the above-described preparation methods.

[0090] This application embodiment introduces a method for fabricating multiple semiconductor layers 400, forming multiple first semiconductor layers 410 spanning the ridge structure 300. This provides conditions for periodic temperature control of the ridge structure 300, thereby achieving periodic modulation of the refractive index of the ridge waveguide layer 310. Furthermore, by fabricating a second semiconductor layer 420, the contact resistance between the semiconductor layers 400 and the temperature control electrode 500 is reduced.

[0091] Step S400: Form a temperature control electrode, which includes a first temperature control electrode and a second temperature control electrode. The first temperature control electrode is disposed on the first semiconductor layer and is in electrical contact with the first semiconductor layer. The second temperature control electrode is disposed on the second semiconductor layer and is in electrical contact with the second semiconductor layer.

[0092] The temperature control electrode 500 is mainly used to introduce current from an external power source into the semiconductor layer 400, thereby converting electrical energy into heat energy. For example... Figure 7 As shown, in some embodiments, the temperature control electrode 500 is fabricated using a lift-off process. After the semiconductor layer 400 is formed, a photoresist layer is coated to cover the aforementioned structures (such as the semiconductor layer 400, the ridge structure 300, and the photoelectric conversion layer 200). Subsequently, a patterned photoresist layer is formed by exposure and development, thereby removing the photoresist layer on a portion of the first semiconductor layer 410 and a portion of the second semiconductor layer 420.

[0093] Subsequently, a second metal material layer is deposited on the photoresist layer, the exposed portion of the first semiconductor layer 410, and the exposed portion of the second semiconductor layer 420 using thin-film deposition processes (such as electron beam evaporation or magnetron sputtering). The photoresist layer is then peeled off, simultaneously removing the second metal material layer located on the photoresist. The second metal material layers on portions of the first semiconductor layer 410 and the second semiconductor layer 420 are retained. The second metal material layer stacked on the portion of the first semiconductor layer 410 serves as the first temperature control electrode 510; the second metal material layer stacked on the portion of the second semiconductor layer 420 serves as the second temperature control electrode 520.

[0094] Furthermore, in this embodiment, by forming a semiconductor layer 400 and a temperature control electrode 500, periodic heating of the ridge structure 300 is achieved, forming a virtual grating in the ridge waveguide layer 310. The virtual grating enables single-mode selection and wavelength tuning of the semiconductor device, instead of the physical grating of a laser in related technologies. Therefore, this embodiment avoids fabricating a physical grating within the photoelectric conversion layer 200 using photolithography and etching processes, thereby improving manufacturing yield.

[0095] This application introduces a method for fabricating semiconductor devices. By forming a ridge structure 300, the optical field along the second direction is confined, achieving stable fundamental mode output and improving beam quality; simultaneously, a virtual grating carrier is fabricated. By forming a semiconductor layer 400 and a temperature-controlled electrode 500, periodic heating of the ridge structure 300 is achieved, thereby providing conditions for the formation of the virtual grating. Since the fabrication of a physical grating is unnecessary, this method also improves manufacturing yield.

[0096] As one possible implementation, the thickness of the first semiconductor layer 410 is A, where A is greater than or equal to 0.2 μm and less than or equal to 0.3 μm.

[0097] The semiconductor layer 400 provided in this application embodiment typically serves as a semiconductor resistive microheater for heating the ridge structure 300. The first semiconductor layer 410 within the semiconductor layer 400 primarily functions as the main body of the semiconductor resistive microheater, utilizing the resistive characteristics of the doped semiconductor material to directly convert electrical energy into heat energy through the Joule heating effect. When the material and aspect ratio of the first semiconductor layer 410 are determined, under constant voltage operation, the greater the total resistance of the first semiconductor layer 410, the greater the Joule heating power, and the stronger the ability to heat the local area of ​​the ridge structure 300. Therefore, a suitable total resistance value for the first semiconductor layer 410 can ensure a moderate heating rate for the ridge structure 300, enabling precise attainment of the set temperature and meeting the matching requirements of the temperature control range.

[0098] In some embodiments, once the material of the first semiconductor layer 410 is selected, the total resistance of the first semiconductor layer 410 needs to be adjusted by its film thickness due to the physical space constraints of the semiconductor device and the minimum linewidth process limitations. With a constant applied voltage, a larger film thickness of the first semiconductor layer 410 results in a smaller total resistance, lower Joule heating power, and consequently, a slower heating rate. Conversely, a larger film thickness of the first semiconductor layer 410 results in a larger total resistance and consequently, a faster heating rate.

[0099] It should be noted that the film thicknesses of the first semiconductor layer 410 and the second semiconductor layer 420 are both greater than or equal to 0.2 μm and less than or equal to 0.3 μm. Optionally, the film thicknesses of the first semiconductor layer 410 and the second semiconductor layer 420 are 0.2 μm, 0.25 μm, and 0.3 μm, respectively. For example, if silicon-doped aluminum indium gallium nitride (AlInGaN) is used as the material of the first semiconductor layer 410, the thickness of the first semiconductor layer 410 can be 0.2 μm.

[0100] In this embodiment, by introducing the film thickness range of the first semiconductor layer 410, the accuracy of controlling the total resistance of the first semiconductor layer 410 is improved, thereby improving the control of the heating temperature of the ridge structure 300, realizing precise control of the refractive index of the ridge waveguide layer 310, and ensuring the accurate formation of the virtual grating.

[0101] As one feasible implementation, the material of the first semiconductor layer 410 includes any one of N-type doped polycrystalline silicon, aluminum indium gallium nitride, and aluminum gallium arsenide. The heating rate of the first semiconductor layer 410 is also closely related to the semiconductor material. Furthermore, the resistivity of the first semiconductor layer 410 can be changed by adjusting the doping concentration of the semiconductor material, thereby meeting the resistance requirements of the semiconductor layer 400 resistance heater.

[0102] The material of the second semiconductor layer 420 includes either P-type heavily doped aluminum indium gallium nitride or aluminum gallium arsenide. The interface between the second semiconductor layer 420 and the temperature control electrode 500 is better matched, thereby reducing the contact resistance between the semiconductor layer 400 and the temperature control electrode 500, so that heat is concentrated only in the main heating area of ​​the first semiconductor layer 410.

[0103] For example, if N-type doped aluminum indium gallium nitride (AlInGaN) is used as the first semiconductor layer 410, and P-type heavily doped aluminum indium gallium nitride (AlInGaN) is used as the second semiconductor layer 420. The preparation method of the first semiconductor layer 410 being N-type doped aluminum indium gallium nitride (AlInGaN) can be referred to the formation of the N-type carrier injection layer 210 mentioned above, and will not be repeated here. After the preparation of the first semiconductor layer 410 is completed, the substrate 100 is placed in the reaction chamber and evacuated. Then, trimethylaluminum, trimethylgallium, trimethylindium, and ammonia are introduced as reaction gases; simultaneously, magnesium pyrocene is introduced as a dopant source for in-situ doping during the growth process. The reaction gases undergo thermal decomposition and reactive epitaxy on the surface of the substrate 100 to grow a magnesium-doped P-type aluminum indium gallium nitride layer. After annealing and activation, the second semiconductor layer 420 is formed.

[0104] This application embodiment controls the total resistance of the semiconductor layer 400 by introducing the material of the first semiconductor layer 410 and the material of the second semiconductor layer 420, thereby achieving precise temperature control of the ridge structure 300 and further achieving periodic precise control of the refractive index of the ridge structure 300.

[0105] In one feasible implementation, at least one of the first temperature-controlling electrode 510 and the second temperature-controlling electrode 520 includes a first electrode layer 320 and a second electrode layer 600 stacked together. The first electrode layer 320 is used to prevent the diffusion of metal elements from the second electrode layer 600 to the semiconductor layer 400 and to enhance the adhesion between the second electrode layer 600 and the semiconductor layer 400. It should be noted that the material of the first electrode layer 320 can be, but is not limited to, any one of chromium, titanium, and nickel. The second electrode layer 600 mainly serves as a conductive layer, and its conductivity is greater than that of the first electrode layer 320. It should be noted that the material of the second electrode layer 600 can be, but is not limited to, any one of gold, silver, platinum, palladium, aluminum, and copper.

[0106] In some embodiments, the first temperature control electrode 510 and the second temperature control electrode 520 each include a first electrode 320 layer and a second electrode 600 layer stacked together.

[0107] For example, the first temperature control electrode 510 and the second temperature control electrode 520 are fabricated using a lift-off process. The first electrode layer 320 is made of titanium, and the second electrode layer 600 is made of gold. After the semiconductor layer 400 is fabricated, a photoresist layer is coated on the side of the photoelectric conversion layer 200, the ridge structure 300, and the semiconductor layer 400 facing away from the substrate 100. Subsequently, the photoresist layer is patterned by exposure and development to expose a portion of the first semiconductor layer 410 and a portion of the second semiconductor layer 420.

[0108] Next, the substrate 100 is placed in an electron beam evaporation chamber, and the chamber is evacuated to reduce the impact of impurity gases on the film quality. An electron beam is used to bombard the titanium crucible source, causing the titanium to melt, vaporize, and evaporate. Titanium atoms are deposited on the exposed surface of the substrate, forming a titanium layer as an adhesion barrier layer. Without removing the substrate 100, the electron beam is then switched to bombard a gold crucible, causing gold to evaporate above the titanium layer, forming the main conductive layer. The photoresist layer is then removed, along with the titanium and gold layers on it. Thus, the titanium and gold layers remaining on the first semiconductor layer 410 serve as the first temperature control electrode 510; and the titanium and gold layers remaining on the second semiconductor layer 420 serve as the second temperature control electrode 520.

[0109] In this embodiment, the first electrode 320 layer of the temperature-controlling electrode 500 is introduced as an adhesion barrier layer, enhancing the adhesion between the second electrode 600 layer and the semiconductor layer 400, while simultaneously preventing the diffusion of metal elements from the second electrode 600 layer into the semiconductor layer 400. Furthermore, the introduction of the second electrode 600 layer of the temperature-controlling electrode 500 enhances its conductivity and oxidation resistance, thereby improving the accuracy and reliability of the semiconductor resistance heater's temperature control of the ridge structure 300.

[0110] As a feasible implementation, after the step of forming the temperature control electrode 500, the preparation method further includes: forming a second electrode 600, the second electrode 600 being disposed on the side of the substrate 100 away from the photoelectric conversion layer 200.

[0111] The second electrode 600 is mainly used to form a complete current loop with the first electrode 320, and as a heat conduction path for the semiconductor device. For example... Figure 8 As shown, in some embodiments, the second electrode 600 is fabricated using a lift-off process. Specifically, after the temperature control electrode 500 is fabricated, the back side of the substrate 100 is thinned and polished, followed by mechanical and chemical polishing. Then, a photoresist layer is coated on the side of the substrate 100 away from the photoelectric conversion layer 200, and the photoresist layer is patterned by exposure and development. Next, a third metal material layer is deposited on the patterned photoresist layer using a thin film deposition process (such as magnetron sputtering or electron beam evaporation). The photoresist layer is then lifted off, along with the third metal material layer on the photoresist layer. The third metal material layer remaining on the back side of the substrate 100 away from the photoelectric conversion layer 200 serves as the second electrode 600.

[0112] Optionally, the second electrode 600 may include a multilayer composite electrode. For example, the second electrode 600 is a bilayer metal electrode layer consisting of a titanium layer and a gold layer sequentially stacked on the side of the substrate 100 opposite to the photoelectric conversion layer 200. The titanium layer serves as an adhesion barrier layer, and the gold layer serves as the main conductive layer. It should be noted that the fabrication method of the second electrode 600 as a multilayer composite electrode can refer to the fabrication method of the first electrode layer 320 and the second electrode layer 600 of the temperature control electrode 500 described above, and will not be repeated here.

[0113] This application embodiment, by introducing the fabrication of a second electrode 600, enables carrier injection into the semiconductor device, thereby providing the electrical conditions for population inversion in the active region and laser lasing. Furthermore, the second electrode 600 also serves a thermal conductivity function, thus improving the stability and lifespan of the semiconductor device.

[0114] like Figure 8 As shown, in a second aspect, embodiments of this application provide a semiconductor device, including:

[0115] A substrate 100 is provided with a photoelectric conversion layer 200. The photoelectric conversion layer 200 includes an N-type carrier injection layer 210, a first confinement layer 220, a first waveguide layer 230, an active layer 240, a second waveguide layer 250, a first barrier layer 260, a second confinement layer 270, and a P-type carrier injection layer 280, which are stacked on the substrate 100 and sequentially stacked along the side away from the substrate 100.

[0116] On one hand, the photoelectric conversion layer 200 is used to realize the transport and recombination of charge carriers. The doping concentration of the N-type charge carrier injection layer 210, the first confinement layer 220, and the first waveguide layer 230 decreases sequentially, smoothing the energy band transition and thus allowing electrons to be smoothly injected into the active region. Similarly, the doping concentration of the P-type charge carrier injection layer 280, the second confinement layer 270, and the second waveguide layer 250 decreases sequentially, which is conducive to the smooth gradient transport of holes and their smooth injection into the active region. Electrons and holes undergo radiative recombination in the active region.

[0117] Secondly, the photoelectric conversion layer 200 blocks the back diffusion of charge carriers. Specifically, when electrons diffuse backward from the active region to the N-type carrier injection layer 210, the increasing band gaps of the first waveguide layer 230 and the first confinement layer 220 form a heterojunction barrier, which confines the electrons step by step. If electrons diffuse backward from the active region to the P-type carrier injection layer 280, they are also blocked by the barrier of the first blocking layer 260. When holes diffuse backward from the active region to the P-type carrier injection layer 280, they are similarly confined step by step by the second waveguide layer 250 and the second confinement layer 270. It should be noted that because the first confinement layer 220 and the second confinement layer 270 have higher band barriers, their blocking effect on the back diffusion of charge carriers is stronger, thereby confining electrons and holes within the active region, reducing non-radiative recombination and leakage current, and thus improving carrier utilization efficiency.

[0118] On the other hand, the photoelectric conversion layer 200 is used to confine the generation and transmission of light. The active layer 240 mainly serves as a site for electron-hole recombination, stimulating emission, and achieving optical gain. The first waveguide layer 230 and the second waveguide layer 250 are symmetrically distributed on both sides of the active layer 240 along its thickness direction, mainly used for optical field confinement in the vertical direction and guiding light propagation. Furthermore, two parallel natural crystal cleavage planes exist on the side of the photoelectric conversion layer 200 in the vertical direction, forming the two end faces of the resonant cavity of the semiconductor device for optical feedback. It is understood that the refractive index difference between these natural crystal cleavage planes and air forms an optical reflective surface.

[0119] A ridge structure 300 is disposed on the side of the photoelectric conversion layer 200 facing away from the substrate 100 and covers a portion of the photoelectric conversion layer 200; wherein, the ridge structure 300 extends along a first direction. The ridge structure 300 is used to achieve optical field confinement along a second direction and lateral carrier restriction.

[0120] Semiconductor layer 400 includes a first semiconductor layer 410 and a second semiconductor layer 420. The first semiconductor layer 410 is disposed on the photoelectric conversion layer 200 and spans the ridge structure 300 along a second direction. The first semiconductor layer 410 mainly serves as the main body of the semiconductor resistive micro-heater for heating the ridge structure 300. Semiconductor layer 400 includes multiple first semiconductor layers 410 spaced apart along a first direction to achieve periodic modulation of the refractive index of the ridge structure 300.

[0121] The second semiconductor layer 420 is disposed on the first semiconductor layer 410 and covers a portion of the first semiconductor layer 410. The conductivity type of the second semiconductor layer 420 is different from that of the first semiconductor layer 410; wherein, the second direction intersects the first direction. The second semiconductor layer 420 is mainly used to reduce the contact resistance between the semiconductor layer 400 and the temperature control electrode 500, and the PN junction formed between the second semiconductor layer 420 and the first semiconductor layer 410 can be used to regulate the total resistance of the semiconductor layer 400, thereby achieving precise regulation of the heating capacity of the ridge structure 300.

[0122] Temperature control electrode 500 includes a first temperature control electrode 510 and a second temperature control electrode 520. The first temperature control electrode 510 is disposed on the first semiconductor layer 410 and is in electrical contact with the first semiconductor layer 410. The second temperature control electrode 520 is disposed on the second semiconductor layer 420 and is in electrical contact with the second semiconductor layer 420.

[0123] like Figure 2 As shown, in some embodiments, a first temperature-controlled electrode 510 applies an electrical signal to the first semiconductor layer 410, and a second temperature-controlled electrode 520 applies an electrical signal to the other end of the first semiconductor layer 410 through electrical contact with the second semiconductor layer 420. Because the first semiconductor layer 410 itself has sheet resistance, Joule heating is generated when current flows through it. Multiple first semiconductor layers 410 spaced apart along a first direction achieve periodic heating of the ridge structure 300. Based on the thermo-optical effect of semiconductor materials, the temperature of the ridge waveguide layer 310 changes periodically, resulting in a periodic change in the refractive index of the ridge waveguide layer 310. For example, as the temperature of the ridge waveguide layer 310 increases, the effective refractive index increases. Thus, by utilizing the Joule heating effect and thermo-optical effect of semiconductor materials, the periodic control of the refractive index of the ridge waveguide layer 310 is achieved, thereby forming a virtual grating.

[0124] The semiconductor device also includes a second electrode 600, which is disposed on the side of the substrate 100 away from the photoelectric conversion layer 200, for loading electrical signals and dissipating heat from the semiconductor device.

[0125] For example, when the semiconductor device starts operating, a positive voltage is applied to the first electrode 320 and a negative voltage is applied to the second electrode 600, forming an electric field from the first electrode 320 to the second electrode 600. Under the influence of this electric field, electrons in the N-type carrier injection layer 210 become negatively charged and are injected into the active layer 240 through the first confinement layer 220 and the first waveguide layer 230. Simultaneously, holes in the P-type carrier injection layer 280 become positively charged and are repelled by the first electrode 320, then injected into the active region through the second confinement layer 270, the first barrier layer 260, and the second waveguide layer 250. Continuous carrier injection results in the number of high-energy electrons in the conduction band of the active layer 240 being far greater than the number of electrons that can transition to low-energy valence band levels, thus achieving population inversion.

[0126] Injected electrons and holes recombine in the active layer 240 and undergo spontaneous emission, releasing excess energy as photons. These photons, generated by spontaneous emission, serve as incident light, exciting high-energy electrons to transition from higher to lower energy levels. Simultaneously with electron-hole recombination, new photons with the same frequency, phase, and propagation direction as the incident photons are released, achieving stimulated emission. The two natural crystal cleavage planes of the photoelectric conversion layer 200 form a resonant cavity, where photons feedback back and forth. When the optical gain overcomes transmission and mirror losses, stable laser oscillation is formed and output.

[0127] Meanwhile, the ridge structure 300 restricts the optical field along the second direction and limits the current extension along the second direction, so that the optical field is precisely matched with the gain region, suppresses high-order transverse mode oscillations, and realizes stable single transverse mode operation of the laser, thereby improving beam quality.

[0128] Furthermore, as mentioned earlier, an electrical signal is applied to the semiconductor layer 400 via the temperature-controlled electrode 500, causing the refractive index of the ridge waveguide layer 310 to change periodically, forming a virtual grating. Light oscillating back and forth within the cavity is reflected at interfaces with different refractive indices within the ridge waveguide layer 310. Based on the periodic change in the refractive index of the virtual grating, diffraction occurs between multiple reflected beams. Under the same virtual grating period, light of different wavelengths has different diffraction angles, resulting in different optical path differences. According to the Bragg diffraction principle, only when the optical path difference between adjacent refractive index period interfaces of the incident light propagating along the ridge waveguide layer 310 satisfies certain conditions will the reflected light at each interface undergo constructive interference, enhancing the incident light of that wavelength and forming a lasing. Conversely, if the incident light wavelength does not satisfy the Bragg diffraction principle, destructive interference occurs, which is suppressed due to high loss and cannot oscillate. In this way, single-mode selection of the semiconductor device is achieved through the virtual grating, thereby outputting laser with good monochromaticity and strong coherence, reducing transmission dispersion and signal distortion.

[0129] It should be noted that wavelength tuning can be achieved by adjusting the period of the virtual grating. For example, the period of the virtual grating can be changed by designing the width of the first semiconductor layer 410 and the spacing between the multiple first semiconductor layers 410. Furthermore, the electrical signals of the multiple temperature control electrodes 500 can be selectively set through simple digital logic control, thereby selectively setting whether the multiple first semiconductor layers 410 are heated, thus achieving period adjustment of the virtual grating. For example, electrical signals can be applied to the first, third, and fifth of the multiple first semiconductor layers 410 through simple digital logic control, while no electrical signal is applied to the second, fourth, and sixth of the multiple first semiconductor layers 410, thereby changing the period of refractive index change of their corresponding ridge structures 300.

[0130] Optionally, the temperature of the ridge structure 300 can be changed by altering the electrical signal of the temperature control electrode 500, thereby controlling the current flowing through the first semiconductor layer 410, which in turn changes the effective refractive index of the virtual grating, thus achieving wavelength tuning.

[0131] This embodiment of the application introduces a semiconductor layer 400 and a temperature-controlled electrode 500 into a semiconductor device to achieve periodic modulation of the refractive index of the ridge waveguide layer 310, thereby forming a virtual grating and further enabling single-mode selection. Furthermore, the virtual grating period can be adjusted by setting the width and spacing of multiple first semiconductor layers 410, or by selectively loading electrical signals; and the effective refractive index of the ridge waveguide layer 310 can be changed by adjusting the magnitude of the electrical signal loaded by the temperature-controlled electrode 500, thereby achieving wavelength tuning.

[0132] As a feasible implementation, the ridge structure 300 in the semiconductor device includes a ridge waveguide layer 310, which is disposed on the side of the photoelectric conversion layer 200 facing away from the substrate 100. The ridge waveguide layer is used to confine the optical field along the second direction and output a stable fundamental mode. It is understood that the film layers along the vertical direction of the ridge structure 300 region include the ridge waveguide layer 310, the P-type carrier injection layer 280, the second confinement layer 270, and the second waveguide layer 250. However, the film layers on both sides of the ridge structure 300 lack the ridge waveguide layer 310, therefore the overall equivalent refractive index on both sides of the ridge structure 300 is lower than the overall equivalent refractive index of the ridge structure 300 region. Because of the refractive index difference between the ridge structure 300 region and the two sides of the ridge structure 300, the total internal reflection condition is satisfied, confining the light beam to the active layer 240 corresponding to the ridge waveguide layer 310, thus achieving confinement of the optical field along the second direction.

[0133] Furthermore, the ridge waveguide layer 310 also serves as a carrier for the virtual grating. The ridge structure 300 is periodically heated by the semiconductor layer 400, thereby achieving periodic modulation of the refractive index of the ridge waveguide layer 310 and forming a virtual grating. The virtual grating enables single-mode selection of light, stabilizes the mode selection mechanism, and obtains highly stable single-mode output.

[0134] The first electrode 320 is disposed on the side of the ridge waveguide layer 310 opposite to the photoelectric conversion layer 200. The first electrode 320 is used to provide an electrical signal to the semiconductor device, so that charge carriers are vertically injected into the active region.

[0135] An isolation layer 330 covers the ridge waveguide layer 310 and the first electrode 320. The isolation layer 330 serves to electrically isolate the ridge waveguide layer 310 and the first electrode 320 from the outside. Furthermore, the isolation layer 330 can isolate the ridge waveguide layer 310 from the influence of air moisture and process acids and alkalis, providing reliable passivation protection for the ridge waveguide layer 310.

[0136] Understandably, after etching both sides of the ridge waveguide layer 310, the carrier path narrows and the resistance increases, making it difficult for the current to diffuse laterally. At the same time, the isolation layers 330 located on both sides of the ridge waveguide layer 310 further confine the carriers to the narrow region of the ridge waveguide layer 310, vertically injecting them into the active region and improving the carrier injection efficiency.

[0137] Since both the optical field and current are confined below the ridge waveguide layer 310, the carrier gain region and the optical field energy region completely overlap. The increased carrier utilization lowers the threshold current of the semiconductor device. Due to the high carrier concentration in the optical field region, stimulated emission efficiency is highest, thus improving optical gain. Because there are insufficient carriers on both sides of the ridge waveguide layer 310 to provide gain for higher-order transverse modes, these modes are suppressed, allowing the semiconductor device to operate stably in the fundamental mode, resulting in better beam quality.

[0138] In this embodiment, the ridge waveguide layer 310 of the ridge structure 300 is introduced to form a carrier of the virtual grating, providing conditions for the semiconductor device to achieve single longitudinal mode selection; at the same time, the ridge waveguide layer 310 also realizes the lateral confinement of the optical field, thereby realizing the stable output of the fundamental mode and obtaining better beam quality.

[0139] Furthermore, the embodiments of this application introduce a first electrode 320 to provide conditions for carrier injection, thereby realizing the electrical connection of the semiconductor device; by introducing an isolation layer 330, the ridge waveguide layer 310 and the first electrode 320 are electrically isolated from the outside and the influence of the external environment is isolated, thereby enhancing the stability and reliability of the semiconductor device.

[0140] Thirdly, embodiments of this application provide a laser, including any of the semiconductor devices described above.

[0141] In some embodiments, the aforementioned semiconductor device can be incorporated into a Fabry-Perot laser as the primary source of laser light, enabling single-mode selection and wavelength tuning. This laser can be applied in fields such as precision measurement and sensing, and fiber optic communication.

[0142] For example, after the semiconductor device is fabricated, the second electrode 600 of the semiconductor device is connected to a heat sink (such as a copper-tungsten surface mount heat sink, an aluminum nitride surface mount heat sink, etc.) by silver adhesive bonding. The heat sink is disposed on a metal socket base, thereby connecting the second electrode 600 to the negative terminal pin of the package. This achieves mechanical fixation of the semiconductor chip, rapid heat conduction and dissipation, and electrical conduction. The first electrode 320 of the semiconductor device is connected to the internal leads of the socket via gold wire, thereby connecting the first electrode 320 to the positive terminal pin outside the package. The first temperature control electrode 510 and the second temperature control electrode 520 can be connected to the internal leads of the socket via gold wire, thereby connecting the temperature control electrode 500 to the pin outside the package. Optical components (such as lenses, optical isolators, etc.) are disposed at the light outlet of the photoelectric conversion layer 200 to achieve laser collimation and isolate backlight.

[0143] By applying electrical signals to the first electrode 320 and the second electrode 600 through the external pins of the package, the semiconductor device achieves stable fundamental mode laser output. Simultaneously, by applying electrical signals to the first temperature control electrode 510 and the second temperature control electrode 520 through the external pins of the package, the heating temperature of the semiconductor layer 400 can be controlled, thereby controlling the periodic change of the refractive index of the ridge waveguide layer 310 to form a virtual grating. The virtual grating can perform single-mode frequency selection on the laser, filtering out a single resonant longitudinal mode; after collimation, filtering, and coupling by the internal optical components of the package, a stable and pure single-mode laser is finally output.

[0144] The embodiments of this application incorporate any of the aforementioned semiconductor devices into the laser, thereby forming a laser with good monochromaticity and high wavelength stability, improving the measurement accuracy of the laser, and expanding its application fields.

[0145] Finally, it should be noted that other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein, and is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A method for fabricating a semiconductor device, characterized in that, include: A substrate is provided, and a photoelectric conversion layer is formed on the substrate; A ridge structure is formed, the ridge structure is disposed on the side of the photoelectric conversion layer opposite to the substrate, and covers a portion of the photoelectric conversion layer; wherein, the ridge structure extends along a first direction; Multiple semiconductor layers are formed and arranged at intervals along a first direction. Each semiconductor layer includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is disposed on the photoelectric conversion layer and spans the ridge structure along a second direction. The second semiconductor layer is disposed on the first semiconductor layer and covers a portion of the first semiconductor layer. The conductivity type of the second semiconductor layer is different from that of the first semiconductor layer. The second direction intersects with the first direction. A temperature control electrode is formed, comprising a first temperature control electrode and a second temperature control electrode. The first temperature control electrode is disposed on the first semiconductor layer and is in electrical contact with the first semiconductor layer, and the second temperature control electrode is disposed on the second semiconductor layer and is in electrical contact with the second semiconductor layer.

2. The method for fabricating a semiconductor device according to claim 1, characterized in that, The steps for forming the ridge structure include: A ridge waveguide layer is formed, wherein the ridge waveguide layer is disposed on the side of the photoelectric conversion layer opposite to the substrate; A first electrode is formed, and the first electrode is disposed on the side of the ridge waveguide layer opposite to the photoelectric conversion layer; An isolation layer is formed, which covers the ridge waveguide layer and the first electrode.

3. The method for fabricating a semiconductor device according to claim 1 or 2, characterized in that, The step of forming multiple semiconductor layers includes: An initial semiconductor layer is formed, the initial semiconductor layer comprising a first initial semiconductor layer and a second initial semiconductor layer stacked together; A portion of the initial semiconductor layer is removed to form a plurality of intermediate semiconductor layers, the plurality of intermediate semiconductor layers being spaced apart along the first direction, each of the intermediate semiconductor layers comprising a first semiconductor layer and a second intermediate semiconductor layer stacked together, wherein the retained first initial semiconductor layer constitutes the first semiconductor layer; Remove a portion of the second intermediate semiconductor layer from the intermediate semiconductor layer so that the remaining second intermediate semiconductor layer constitutes the second semiconductor layer.

4. The method for fabricating a semiconductor device according to claim 3, characterized in that, The thickness of the first semiconductor layer is A, which is greater than or equal to 0.2 μm and less than or equal to 0.3 μm.

5. The method for fabricating a semiconductor device according to claim 4, characterized in that, The material of the first semiconductor layer includes any one of N-type doped polycrystalline silicon, aluminum indium gallium nitride, and aluminum gallium arsenide; The material of the second semiconductor layer includes either P-type heavily doped aluminum indium gallium nitride or aluminum gallium arsenide.

6. The method for fabricating a semiconductor device according to claim 4 or 5, characterized in that, At least one of the first temperature control electrode and the second temperature control electrode includes a first electrode layer and a second electrode layer stacked together, wherein the conductivity of the second electrode layer is greater than that of the first electrode layer, and the first electrode layer is used to block the diffusion of metal elements from the second electrode layer to the semiconductor layer.

7. The method for fabricating a semiconductor device according to claim 6, characterized in that, After the step of forming the temperature-controlled electrode, the preparation method further includes: A second electrode is formed, which is disposed on the side of the substrate opposite to the photoelectric conversion layer.

8. A semiconductor device, characterized in that, include: A substrate on which a photoelectric conversion layer is disposed; A ridge structure is disposed on the side of the photoelectric conversion layer opposite to the substrate and covers a portion of the photoelectric conversion layer; wherein the ridge structure extends along a first direction; The system comprises multiple semiconductor layers, which are spaced apart along a first direction. Each semiconductor layer includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is disposed on the photoelectric conversion layer and spans the ridge structure along a second direction. The second semiconductor layer is disposed on the first semiconductor layer and covers a portion of the first semiconductor layer. The conductivity type of the second semiconductor layer is different from that of the first semiconductor layer. The second direction intersects with the first direction. The temperature control electrode includes a first temperature control electrode and a second temperature control electrode. The first temperature control electrode is disposed on the first semiconductor layer and is in electrical contact with the first semiconductor layer. The second temperature control electrode is disposed on the second semiconductor layer and is in electrical contact with the second semiconductor layer.

9. The semiconductor device according to claim 8, characterized in that, The ridge-shaped structure includes: A ridge waveguide layer is disposed on the side of the photoelectric conversion layer opposite to the substrate; The first electrode is disposed on the side of the ridge waveguide layer opposite to the photoelectric conversion layer; An isolation layer covering the ridge waveguide layer and the first electrode.

10. A laser, characterized in that, Includes the semiconductor device described in claim 8 or claim 9.

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