Image sensor with in-pixel histogramming

Abstract

The present disclosure relates to image sensors with in-pixel histogramming. An imaging circuit is provided that includes an array of image pixels, where each image pixel in the array includes a single photon avalanche diode (SPAD) coupled to a plurality of counters configured to obtain an in-pixel histogram, and a time gate driver circuit configured to output a plurality of non-overlapping time gate pulses to the plurality of counters. Each image pixel can also include a pulse generator having an input coupled to the SPAD. Each of the counters can have a first input coupled to an output of the pulse generator and a second input configured to receive a respective one of a plurality of time gate signals. Each of the counters can also include an analog memory circuit having one or more capacitors.

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