Semiconductor device and method of manufacturing the same

CN122269730APending Publication Date: 2026-06-23QINGDAO AUCMA YUNLIAN INFORMATION TECHNOLOGY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
QINGDAO AUCMA YUNLIAN INFORMATION TECHNOLOGY CO LTD
Filing Date
2024-12-19
Publication Date
2026-06-23

AI Technical Summary

Technical Problem

In the prior art, wet etching processes cause silicon loss in the gate and substrate layers when removing the SiN layer on the gate, affecting the LDD ion implantation process and making it difficult to control device performance.

Method used

A dry etching process combined with photoresist back etching technology is used to form a protective layer after the formation of the re-oxidation layer, which protects the gate and the substrate layer. Part of the protective layer is removed by photoresist back etching, exposing the sacrificial layer and removing the re-oxidation layer and the sacrificial layer to avoid silicon loss.

Benefits of technology

It effectively improves the silicon loss problem on the gate side surface and substrate layer, enhances the control precision of the LDD ion implantation process, and improves the performance of semiconductor devices.

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Abstract

The application provides a semiconductor device and a preparation method thereof. The preparation method of the semiconductor device comprises the following steps: providing a semiconductor substrate, wherein the semiconductor substrate comprises a base layer, a gate and a sacrificial layer from bottom to top; sequentially forming a re-oxidation layer and a protective layer on the semiconductor substrate, and removing part of the thickness of the protective layer to expose the re-oxidation layer on the upper surface and the side surface of the sacrificial layer; removing the exposed re-oxidation layer and the sacrificial layer, and forming a side wall outside the re-oxidation layer on both sides of the gate. The application can effectively improve the Si loss problem of the gate side surface and the base layer, so as to improve the subsequent LDD ion implantation process.
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