Semiconductor testing apparatus and inspection system

Abstract

This invention relates to a semiconductor testing apparatus and inspection system, comprising: a main housing; a plurality of substrate units disposed inside the main housing; and an anti-misinsertion mechanism formed in a shape corresponding to the type of substrate unit to restrict the incorrect insertion of the substrate units into the interior of the main housing. The anti-misinsertion mechanism comprises: a pin unit having a pin disposed at a position corresponding to the type of substrate unit; and a pin insertion plate having a pin insertion hole provided at a position for the pin unit to be inserted. The pin unit is disposed in one of the main housing and the substrate units, and the pin insertion plate is disposed in the other of the main housing and the substrate units.

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